RF Microwave Hybrids: Basics, Materials and Processes

RF/MICROWAVE HYBRIDS

Basics, Materials and Processes

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RF/MICROWAVE HYBRIDS

Basics, Materials and Processes

by

Richard Brown Richard Brown Associates, Inc. Shelton, CT

KLUWER ACADEMIC PUBLISHERS NEW YORK, BOSTON, DORDRECHT, LONDON, MOSCOW

eBook ISBN: Print ISBN:

0-306-48153-7 1-4020-7233-3

©2004 Kluwer Academic Publishers New York, Boston, Dordrecht, London, Moscow Print ©2003 Kluwer Academic Publishers Dordrecht All rights reserved No part of this eBook may be reproduced or transmitted in any form or by any means, electronic, mechanical, recording, or otherwise, without written consent from the Publisher Created in the United States of America Visit Kluwer Online at: and Kluwer's eBookstore at:

http://kluweronline.com http://ebooks.kluweronline.com

DEDICATION

TO JUDY

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TABLE OF CONTENTS Preface Acknowledgements

xiii xv

CHAPTER 1:

Hybrids vs MMICs

1

CHAPTER 2:

Basic Concepts

5

Introduction Maxwell's Laws Permittivity and Permeability Free Space Wavelength Propagation velocity Decibel Scale (dB) Q Measurements Small Signal (S-Parameters)

5 5 6 7 8 9 9 10

2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8

CHAPTER 3: Planar Waveguides 3.1 Impedance 3.2 Microstrip 3.2.1 Guide Wavelength 3.3 Coplanar 3.4 Stripline CHAPTER 4:

Current Flow and Loss Considerations

4.1 Dielectric losses 4.1.1 Tan 4.1.2 Anisotropy 4.2 Conductor losses 4.2.1 Guide length losses 4.2.2 Attenuation 4.2.3 Return Loss 4.2.4 VSWR, Voltage Standing Wave Ratio 4.2.5 Skin Depth 4.2.6 Adhesion layers 4.2.7 Surface roughness

CHAPTER 5:

Substrates

13

13 15 18 21 24 29 29 29 32 35 35 35 35 37 39 44 49 55

viii

5.1 Glass 5.2 Single crystals 5.3 Polycrystalline ceramics 5.3.1 Fabrication 5.3.1.1 Powder pressing 5.3.1.2 Tape casting 5.3.1.3 Roll compaction 5.3.1.4 Lamination 5.3.1.5 Glazing 5.3.2 Substrate characteristics 5.4 Low temperature cofired (LTCC) 5.5 Clad Materials 5.5.1 Glass transition temperature 5.5.2 Material properties 5.5.3 Fabrication 5.5.4 Mechaical patterning 5.6 Cleaning 5.6.1 Wet processes 5.6.2 Dry processes 5.7 Safety

55

57

57

57

57

59

60

61

62

63

70

73

73

73

81

85

87

88

88

90

CHAPTER 6: Thick Film 6.1 Screen printing 6.2 Metal foil screens 6.3 Lithographically defined thick film 6.3.1 Photoengravable thick film 6.3.2 Photoimagable thick film 6.4 Additive techniques 6.4.1 Metal-organics 6.4.2 Direct write 6.4.3 Direct bond

93

93

98

101

102

103

105

105

107

109

CHAPTER 7: Thin Film 7.1 Physical vapor deposition 7.1.1 Evaporation 7.1.1.1 Filament 7.1.1.2 Electron beam 7.1.2 Sputtering 7.1.2.1 DC 7.1.2.2 RF

113

113

113

113

114

115

116

117

ix

7.1.2.3 Magnetron 7.1.2.4 Reactive CHAPTER 8: Dielectric Deposition 8.1 PELPCVD 8.2 Anodization

118 119 123 123 124

CHAPTER 9: Polymers 9.1 Material Properties 128 9.1.1 Moisture absorption 9.1.2 Mechanical properties 9.1.3 Glass transition temperature 9.1.4 Planarization 9.2 Deposition 9.2.1 Spin coating 9.2.2 Spray coating 9.2.3 Screen printing 9.2.4 Other deposition methods 9.3 Patterning 9.3.1 Wet etching 9.3.2 Dry etching 9.3 Photosensitive polymers 138

129

CHAPTER 10

141

Processing Strategies

CHAPTER 11: Photolithography 11.1 Photoresist 11.1.1 Spin-on 11.1.2 Spraying 11.1.3 Roller coating 11.1.4 Meniscus coating 11.1.5 Electrodeposited 11.1.6 Dry Film 11.1.7 Dip coating 11.2 Artwork and masks 11.3 Exposure 11.3.1 Non-colllimated 11.3.2 Large flood 11.3.3 Short flood 11.3.4 Collimated 11.3.5 Laser exposure

130 131 131 131 132 132 133 134 134 136 136 136

143 143 146 148 148 149 150 151 153 156 160 161 161 161 162 163

x

CHAPTER 12:

Electroplating

General Inorganic additives Organic additives Waveforms 12.4.1 Asymmetric dc 12.4.2 Pulse 12.5 Field density 12.6 Electroless

12.1 12.2 12.3 12.4

169 169 171 172 174 174 175 180 182

CHAPTER 13: Etching 13.1 Wet etching 13.2 Dry etching 13.2.1 Sputtering 13.2.2 Ion beam milling 13.2.3 Reactive techniques 13.3 Etching effects on imedance

185 185 186 186 187 190 191

CHAPTER 14 Components 14.1 Passive components 14.1.1 Resistors 14.1.2 Attenuators 14.1.3 Capacitors 14.1.3.1 Parallel plate 14.1.3.2 Interdigitated 14.1.4 Inductors 14.2 Transmission line components 14.2.1 Reciprocal dividers/combiners 14.2.2 Filters

195 195 195 202 205 211 217 218 220 220 224

CHAPTER 15

229

Packaging

15.1 Level of Integration 15.2 Interconnects 15.2.1 Round wire 15.2.2 Strip ribbon 15.2.3 Modified TAB 15.2.4 Integrated wiring 15.2.5 Enclosures

230 231 232 234 237 239 239

xi

15.2.6 Thermal expansion 15.2.7 Substrate attachment 15.2.8 Grounding 15.2.9 Vias 15.2.10 Platability 15.2.11 Time domain reflectometry (TDR)

240

241

243

243

249

251

CHAPTER 16: Superconductivity 16.1 Properties of High-Tc materials 16.2 Materials considerations 16.3 Substrate materials 16.4 Expansion coefficient 16.5 Buffer (barrier) layers 16.6 Film formation 16.6.1 Off-axis sputtering 16.6.2 Pulsed laser deposition 16.6.3 Evaporation 16.6.4 Metalorganic 16.7 Patterning 16.7.1 Wet etching 16.7.2 Dry etching

257

259

261

262

263

263

263

263

264

265

265

266

266

267

CHAPTER 17:

269

MEMS

APPENDIX A: Definition of symbols APPENDIX B: Company directory APPENDIX C: Conversion table APPENDIX D: Graphic evaluation of w/h and

SUBJECT INDEX

271

273

275

for microstrip 277

279

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PREFACE

xiii

In 1991 this author published a monograph[l] based on his experience teaching microwave hybrid materials and processing technology at the annual ISHM (now the International Microelectronics and Packaging Society, IMAPS) symposia. Since that time, the course has been presented at that venue and on-site at a number of industrial and government organizations. The course has been continually revised to reflect the many evolutionary changes in materials and processes. Microwave technology has existed for almost 175 years. It was only after the invention of the klystron, just before World War II, that microwave design and manufacture moved from a few visionaries to the growth the industry sees today. Over the last decade alone there have been exploding applications for all types of high frequency electronics in the miltary, automotive, wireless, computer, telecommunications and medical industries. These have placed demands, unimaginable a decade ago, on designs, materials, processes and equipment to meet the ever expanding requirements for increasingly reliable, smaller, faster and lower cost circuits. Microwave electronics is realized by monolithic microwave integrated circuits (MMICs), or hybrid microwave integrated circuits (HMICs). Growth in the computer and wireless industries in particular, has spurred the volume manufacture of both products. Mass fabrication of 300mm silicon (Si) and gallium arsenide (GaAs) wafers is being introduced. Additionally, efforts are ongoing to perfect Si and GaAs, moving toward the creation of defect-free crystals , leading to new levels of performance. Hybrid technologists have responded as well to compliment the MMIC efforts. The past decade has witnessed innovative advances in many areas, leading to a variety of new materials and processes. Among these are new powder technologies for photo­ engravable and photo-definable thick film inks, allowing the use of thick films at frequencies once reserved for thin films. New generation liquid, dry and electrophoretic resists with improved application and sensitivity have appeared on the market. New organic-based substrate composites, organic encapsulants, via technology, planar and buried passives and technology (low temperature co-fired and multi-chip modules) for advanced packaging and interconnects are being exploited to take advantage of advancements in monolithic technology. This text is directed to acquaint technical managers, engineers and technicians, either with experience, or just enetering the field, with the capabilities and limitations of the materials and processes used for fabricating high frequency circuits. It is essentially introductory in nature. Where possible, equations have been kept simple and to a minimum. Unfortunately, there is little consistency with measurement units and notation. In many of the figures and tables originally published by other authors, I have reproduced their data "as is". As such, the conversion table, Appendix E, may be of some help.

xiv

This text begins with an introduction to hybrid technology and basic high frequency principles. Following these, the major forms of transmission waveguide are discussed, and then current flow and loss considerations. Substrates, thick and thin film deposition, polymers, artwork, masks, photolithography, subtractive, additive and semi-additive methods, electro- and electroless plating and etching are covered. Passive and transmission line components are then treated within the confines of process requirements. With this background established, the text is directed toward the effects of processing and materials on passive and transmission line-based components. Packaging is discussed with emphasis on inductance considerations. Materials and processes for superconductive components are briefly highlighted. 1. R. Brown, Materials and Processes for Microwave Hybrids, International Microelectronics and Packaging Society, ISHM, Reston, VA., (1991)

ACKNOWLEDGEMENTS

xv

This book is really the product of contributions from many people. It is impossible to recognize the advice and suggestions of everyone. However, many colleagues from industry freely gave their time on a variety of topics. A special thank you is extended to the editorial staff at Kluwer for their Jobian patience. I also want to acknowledge the many vendors who sent catalogues and answered innumerable questions, and I want to express my appreciation to all those who gave me permission to use their material and graphics for this text. As such, certain commercial materials, equipment and processes are identified in the text for illustration. Their use neither implies endorsement nor recommendation by the author. Also no implication is implied or expressed that any of the said materials, equipment or processes are the best available or suitable for the purpose. If anyone has been omitted, it was inadvertent. The author assumes sole responsibility for all errors and omissions.

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CHAPTER 1

HYBRIDS vs. MIMICS

Microwave electronics is realized by monolithic microwave integrated circuits (MMICs), hybrid microwave integrated circuits (HMICs) or radio frequency integrated circuits (RFICs). The latter two offer economic, design, reliability, reparability and flexibility advantages. Obviously, all three technologies must coexist to satisfy the requirements of a wide variety of applications. Materials and process requirements for RF and microwave hybrids are far more stringent than those for low frequency circuits. As the available microwave spectrum becomes congested at the lower end, there will be a shift into the higher frequencies in the millimeter range. Optoelectronic interconnections will place even higher demands on board properties. Conductor and substrate properties are of particular importance since they substantially affect circuit design and performance. Many of the advantages of solid-state devices can only be achieved if the hybrid circuitry is of comparable size.

2

Toward this end, hybrid technologists have steadily been improving their ability to batch produce sophisticated, smaller, low-cost circuits, while simultaneously improving reliability. Some examples of these circuits are shown in Figure 1.1. The goals of a successful high frequency hybrid circuit design are shown in Table 1-1.

What distinguishes RF/Microwave packages from low frequency or digital packages? Typically RF/Microwave packages require low lead High isolation is required for high sensitivity, noise immunity and wide dynamic range Controlled transmission line impedance is required at RF leads The package exerts greater influence, hence importance, in maintaining overall performance despite reflections and insertion loss The majority of the temperature gradient is in the semiconductor chip Package dimensions are comparable to, or larger than the wavelength. As a result, multiple resonances may arise within the package. As opposed to monolithic devices, where all the circuit elements are planar, hybrid circuits may employ discrete surface (add-on) components. These add-ons may include: Semiconductor IC chips - MMICS, power conditioning chips Discrete semiconductor devices - pin diodes, temperature sensors Passive components - Large inductors, large capacitors, resistors High Q components - Dielectric resonators Non-reciprocal (Ferrite) components - Isolators Transmission line components - Directional couplers, power dividers/combiners Interconnections - Bond wires, connectors

3

In addition multilayer modules may include embedded passives such as resistors, capacitors, inductors and splitters/couplers.

Table 1-2 compares hybrid and monolithic MICs with respect to their major features. It is apparent from Table 1-2 that each of the technologies have both plusses and minuses. In general, HMICs are more versatile, but at the expense of poorer reproducibility and higher

4

parasitics. Table 1-3 summarizes the advantages and disadvantages of HMICs.

The following section is devoted to understanding some of the underlying concepts and terminology used in high frequency circuits

References 1.1. 1.2 1.3

With permission, DAV Technology, Tynsborough, MA With permission, DAV Technology, Tynsborough, MA With permission, DuPont, Wilmington, DE

CHAPTER 2

BASIC CONCEPTS

2.1 Introduction. The electronics industry continues to increase function per unit area, reduce overall packaging size and cost, all with a concomitant improvement in reliability. These factors are spawning a wider effort by the electronics industry to exploit these advances by identifying additional applications. As an example, the demand for bandwidth is increasing. Cellular will operate in the 800 MHz to 6 GHz (“Bluetooth”) range. Broadband access for wireless will operate in the 2 to 30 GHz spectrum. Automotive radar operates in the 70 GHz area. At these frequencies, one can no longer consider a device package attached to a substrate as simply meeting the needs of the designer. What makes design life relatively easy at the lower frequencies, but more difficult at higher frequencies, is the wavelength of the signal relative to interconnect length. Wavelength proportionately decreases with increasing frequency with the result that as interconnect lengths decrease, signal propagation time between circuit parts becomes comparable to the period of the sinusoidal currents. Conductor traces become transmission lines; mechanical design and electrical performance of these circuits become interrelated. It is important for those interested in the application of high frequency circuits to have an understanding of the concepts and manufacturing processes necessary for their production. It is the intent of this text to first distill some basic design information necessary to appreciate the material and processing requirements of high frequency circuits. A variety of fabrication techniques used to realize circuits are then compared and discussed in light of their applicability for microwave circuitry. 2.2 Maxwell's Laws. Maxwell discovered that, by its very nature, light is electromagnetic and shortly developed a mathematical theory of electrostatics and magnetostatics in terms of fields, extending it to include Faraday’s laws of emf. The essence of the classical Maxwellian equations is the theoretical prediction of the existence of electromagnetic waves, and was the starting point for the concept of an electromagnetic spectrum that extends from dc to rays. The electromagnetic wave is a type of time-varying field, combining electric and magnetic components , which carries energy away from its source. Essentially Maxwell’s four laws may be qualitatively described as follows: Law #1 Electric Field (E): Naturally occurring electric charges are monopolar, i.e., they may be either positive or negative, the choice of polarity, a matter of convention. (Coulomb’s Law): As such, the overall electric field pattern, strength and direction are determined by the geometric distribution of the electrical charges producing the field.

6

Law #2 Magnetic Field (H): Conductors carrying current produce magnetic fields. Magnets, as opposed to electric charges are dipolar, and as such, the magnetic field must describe a closed loop Law #3 If the rate of change of an electric field is not constant, e.g., it changes in a sinusoidal pattern, then the generated magnetic fields are also sinusoidal. The magnetic field changes concomitantly as the electric field. Law #4 (Faraday’s Law) A changing magnetic field applied to a system results in a changing electric field in within the system in opposition to the change. Law #4 completes the relationship between electric and magnetic fields. These laws, impact for the purposes of this text, on substrate and conductor design, effects of conductor and dielectric properties, impedance, and the import of high frequency on loss. In 1888 Hertz confirmed Maxwell’s theories of electromagnetic propagation. Indeed, Hertz may be considered the first microwave engineer, and possibly the only one for at least a generation. In 1893 Hertz[2.1] conducted a series of experiments proving beyond doubt the existence of wave motion. Although the propagation of EM waves through metal pipe was soon used by German investigators before the turn of the century, and scientific interest continued in this new field, it was close to 40 years before microwaves were commercially applied. This was primarily due to a lack of high frequency sources and, as is usually the case, need. 2.3 Permittivity and Permeability. The way an electric or magnetic field propagates inside a medium primarily depends on the dielectric and magnetic properties of the individual materials. In dielectric materials where charges are rigidly fixed and cannot move under an applied field, the permittivity, is a quantitative measure of the ease with which the dielectric can be polarized to form dipoles which cancel the applied electric field (voltage), in effect a measure of the dielectric to store energy.

where, in free space (F/m), in air and vacuum, The permittivities of other media are generally expressed as the relative and equation (3) may be rearranged to: dielectric constant,

Similarly, permeability and relative permeability are defined by:

7

where

and:

is typically 1 for non-magnetic materials.

2.4 Free Space Wavelength. The term frequencies, as used here, commonly refers to electromagnetic radiation from about 400 Megahertz (MHz) to 100 gigahertz (GHz). The free space wave length may be readily calculated from the basic relationship between the propagation velocity of light and frequency, Equation (2-5), where:

where: c = velocity of light in free space f = frequency in Hertz and:

In Figure 2-1, the free space wavelength, is plotted as function of frequency, with selected applications annotated at various frequencies. What makes life relatively easy at the lower frequencies, but difficult at microwave frequencies, is the size of the signal wavelength relative to the signal processing circuitry. From Figure 2.1 note there are 2 orders of magnitude in wavelength between 1 and 100 GHz. The free space wavelength at 950 MHz, used by cellular frequencies, for example, is 31.5 cm. As frequency increases, the wavelengths shorten. At 16 GHz is only 1.9 centimeters, (slightly over 0.7 inches), while at 70 Ghz, in the automotive sensor area, the wavelength shrinks even further to 0.3cm, (slightly over 0.1 inches). It will be shown in later chapters how increasing the dielectric constant of the transmission line media further reduces the signal wavelength. The free space wavelength is replaced by the guide wavelength, discussed in further complicates phase differences between nearby Chapter 3 points since its length is shorted than In addition, high frequency effects such as radiation and dielectric loss and inductive and capacitive interactions make high frequency design a rigorous challenge. We shall see later how the realization of MICs can be just as arduous as the design.

8

2.5 Propagation Velocity. Inside transmission line media inductive and capacitive parasitics along the transmission line combine to slow the propagating electromagnetic wave down. If the inductance and capacitance are known, the propagation velocity or phase velocity, may be expressed by:

9

Alternatively, the propagation velocity in the medium may be expressed by:

typically

so that (2-7) reduces to:

2.6 Decibel Scale (dB). Originally used for comparison of sound intensities, the decibel scale is generally used to compare power or voltage levels. By definition, the decibel, abbreviated dB, is:

Thus, if and we end up with 3dB. Similarly, and has a value of -3dB. Table 2-1 lists selected power ratios and their corresponding decibel values.

2.7 Q Measurements. Unfortunately, predicted ohmic losses can not take into account line cross-section, roughness or variations in sheet resistivity due to processing. Q measurements of resonators offer a convenient and simple method of determining losses due to processing, dielectric and other system contributions. A general definition of the Q of a resonant circuit is:

10

A useful expression from Collin[2-2] for determining unloaded Q is:

where:

For thick, high quality films theoretical conductor Q values may be as high as 500. As a rule of thumb many workers in the field prefer to use 60% to 75% of the theoretical unloaded Q to determine actual conductor losses Conductor loss per unit guide length in dB may be derived from the following expression:

Simply stated, Q is inversely proportional to For maximum Q, then, conductors should have as highly conductive as possible.

2.8 Small Signal (S-Parameters). S-parameters are reflection coefficients directly related to VSWR. Impedance and transmission coefficients usually referred to as gain or attenuation. S-parameters describe circuit inputs and outputs in terms of power, thus are a measure of the power transmitted and reflected from a circuit component along a S-parameters also are measured with all circuits terminated in an actual line impedance of the system, S-parameters being vector and quantities, contain both magnitude and phase information. are ratios of the reflected and incident power, identical to the reflection coefficient commonly used on the Smith Chart. As such, for any two port device the input and output parameters of any two port device, as well as its corresponding characteristic impedance, may be extracted from

11

the polar display. A summary of the more commonly encountered Sparameters, usually reported in dB, appears in Table 2-2. References

2.1. 2.2

H. Hertz, "Electric Waves", MacMillan, London (1893) R.E. Collin, Foundation for Microwave Engineering, McGrawHill, New York, (1966) p 314

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CHAPTER 3

PLANAR WAVEGUIDES

Three parameters are of utmost importance to the transmission line are: characteristic impedance (Zo), line, or guide wavelength The following section discusses these and attenuation constant parameters and how they are affected by conductor shape, conductivity, field distribution, discontinuities and the nature of the dielectric. 3.1 Impedance. In free space a propagating sinusoidal electric field generates a magnetic field of equal amplitude so their ratios are always the same. While free space has no mechanical resistance to motion, it will impede any electromagnetic wave propagation. The ratio of the electric field strength E to the magnetic field strength H is known as the free space impedance (or wave impedance), In Standard International (SI) units, the electric field E is in volt/meter, and the the characteristic impedance of magnetic field H in ampere/meters. devices and transmission lines, for example, is expressed in ohms. For our purposes, impedance is the measure of total opposition to current flow in an alternating current or ultra high speed dc system which approaches the behavior of an ac system. This opposition is due to the linear resistance, and inductive and capacitive reactances. Impedance mismatches degrade circuit performance through unwanted power reflections within the circuit. Optimum circuit performance is obtained when design impedance values are maintained. Unwanted reflections result, as we have seen, result in diminished element performance.

The electric and magnetic field strengths are respectively related to the permittivity and permeability of the medium. The characteristic may be expressed as their ratio: impedance of free space,

14

However, transmission lines are comprised of metals and operate in or on dielectric media with properties very different than those in free space. An electromagnetic wave may travel unimpeded in free space, inside a substrate this is not the case. The impedance of these lines is dependent on their geometry and properties of the media in which they are located. A schematic of the distributed parameters of a transmission line is shown in Figure. 3-1. Lumped elements represent infinitesimal lengths of the physical transmission line. Inductance (L), Resistance (R), Capacitance (C) and Conductance (G), are expressed per unit length. In a planar transmission line configuration, L and R represent the series inductance and resistance of the metal conductor, while C represents the shunt capacitance to ground from the metal conductor and G represents the dielectric leakage resistance. The impedance for the structure shown in Figure. 3.1 is given by the ratio of the voltage to the current at point y, and time t. If the series resistance of the transmission line, R and dielectric losses are not small, the impedance is expressed as:

If the series resistance of the transmission line, R and dielectric losses, G are very small they may be ignored. Equation 3-2 then reduces to:

where L and C are respectively inductance and capacitance per unit length. A constant ratio of these two parameters maintains a constant characteristic impedance. This basic relationship explains why as the substrate dielectric constant changes, and thus C, the inductance L, of the conductor must also change if the characteristic impedance is to remain constant. In the early 50’s new forms of waveguide were developed that would allow the microwave industry to catch up with the general process of miniaturization taking place in the electronics industry. Heretofore, development of innovative and complex circuits using waveguide, coaxial cable and two-wire transmission systems was severely hindered by the high cost and other constraints of these systems. These new types of transmission lines were planar and employed conventional printed circuit techniques. These milestone developments provided the microwave

15

designer with new degrees of design freedom. The planar, transmission systems upon which the microwave printed-circuit technique is based, can be conceived as a progressive evolution of the coaxial and parallel line transmission systems. Also, monolithic integrated circuits are not well suited for high power applications. This is particularly true when high performance with high design flexibility is required As such, the use of the microwave integrated circuit, MIC, based on the planar waveguide technologies described below, are more cost effective when used in conjunction with active devices. Even with advances in design and yield improvements in active devices, the controversy still continues. The three major planar waveguide transmission configurations are microstrip, coplanar and stripline. In each of these there are a number of variations, but we shall concern ourselves in the next section with the basic structures.

3.2 Microstrip. Microstrip is one of the most widely used transmission media at microwave frequencies. Its open-ended configuration facilitates the integration and mounting of discrete monolithic components for ease in production, assembly, tuning and repair. A basic microstrip circuit, Figure 3.2, consists of a dielectric substrate of thickness h and relative dielectric constant coated on one side with a patterned line of width w and thickness t, and a metal ground plane on the other.

The microstrip design problem is one of finding the proper w/h ratio to satisfy impedance requirements, and the effective dielectric all of which are interdependent. From Figure. 3.2, it is constant apparent some of the electric field is in air, and the remaining As such the effective dielectric fraction (q) in the substrate,

16

constant, is some value in-between. The effective dielectric constant for microstrip is made up of the dielectric constant of air plus the dielectric constant of the substrate in excess of that of air times the filling fraction, q. This expression holds true for all microstrip media to be discussed.

The filling fraction, q, a measure of the amount of field in the substrate is Graphical methods were a quantity vital to the determination of once employed[3.1], (see appendix A), but CAD is now routinely used to determine w, h and Microstrip impedance, incorporating values of w, h and w/h is given by:

17

For a given substrate thickness, h, line width becomes particularly important in determining impedance, as inductance decreases with increasing cross-section, affecting field distribution. For a line, this effect is shown in Figure. 3.3, which plots the ratio of line width (w) to substrate thickness (h) as a function of substrate dielectric constant, Various substrate materials are annotated at appropriate values. A line on fused silica, is twice the line width on comparably thick One obtains a family of useful curves when, for example, line widths on 0.025” substrates with different dielectric constants are plotted line with against characteristic impedance, Figure 3.4. For a the line width is 0.025 inches. For the same line, when

the line broadens to .050 inches. Although more easily processed, space may not permit such wide lines, negating the use of lower dielectric constant materials. Further, a 0.025” substrate with an requires only a 0.0025 inch wide line. Widths of this magnitude demand high substrate surface quality, and special processing may be needed, particularly for some ferrites and titanates characterized by more porous bodies and rougher surfaces. It is readily apparent from Figures. 3.3 and

18

3.4 that for a given characteristic impedance, the w/h ratio decreases with increasing substrate dielectric constant, Accordingly, where minimum substrate area is the dominant factor, the line width w can be reduced by either using thinner substrates or higher dielectric constant substrates. Unfortunately, as we shall see later, other substrate and practical processing considerations may negate either approach. Conversely, where wide lines are permissible or desirable, lower dielectric constant materials provided by polymer based substrates can be used. Guide Wavelength When an electromagnetic field travels through free space, the environment does not interact with the electric or magnetic fields. However, inside other media, interactions occur between either the electric or magnetic field and the atoms within the medium. The wavelength inside a medium is related to the phase velocity by:

3.2.1

Again, for non-magnetic materials,

and 3-6 reduces to:

f = frequency in Hz

= effective dielectric constant

Figure 3.6 plots the effective dielectric constant, against impedance, with varying dielectric constant for. This figure illustrates with lower dielectric constant the effect of line widening on substrate showing less percentage change with increasing impedance. The curves for the higher dielectric constants were based on the assumption that the substrates were “pure” dielectrics. When using ferrites and must be included in the effective garnets, the effective permeability dielectric calculation. The effect is most pronounced in high k dielectrics as the fields are more constrained than in dielectrics of lower However, the line width changes with low materials are minimal with changes in impedance, since traces are wide to begin with. Figure 3.6 illustrates how using higher dielectric constant materials also reduces the guide length of a line for a given frequency of operation, achieving additional size reduction. Figure 3.5 shows that as the frequency increases for a circuit on a substrate of given dielectric constant, more of the field, a situation akin to widening the conductor line, penetrates the substrate. As a consequence, the resultant increase in

19

the effective dielectric constant also serves to reduce the guide length. However, since is used, at a given frequency the guide length changes less with increasing

Whenever possible, it is desirable to have complete ground coverage. Reductions in ground coverage reduce line shunt capacitance, and without simultaneously altering line inductance, reduce line impedance. Graphically, this is shown in Figure 3.6 where root capacitance per unit length and impedance of a 0.025 cm wide line on a is plotted against percent ground coverage. 0.5mm substrate The effect of changing the inductance-capacitance ratio on impedance is values, since from Eq. 3.3 the impedance is greatest at lower proportional to the reciprocal of the square root of the capacitance.

20

21

3.3 Coplanar Waveguide. Coplanar waveguide (CPW) configuration is shown in Figure 3.8. Visualize the ground plane in microstrip moving to the top surface and splitting, so the resultant pieces straddle the signal track. In contrast to microstrip, where the field is predominantly in the substrate, in CPW , the field is more evenly distributed between the substrate and air and confined, for the most part, between the slots (s) separating the signal trace (w) and ground planes (b). As a uniplanar technology, CPW possesses many well known advantages over microstrip These include, low dispersion, insensitivity to substrate thickness, easy connection to both shunt and series elements and reduction in the number of via holes. An attractive feature of CPW that is not often considered is the fact that the characteristic impedance is governed by the ground plane separation and signal conductor crosssection. The characteristic impedance will remain constant if the signal track inductance is changed while at the same time appropriately compensating the incremental capacitance by adjusting the gap width. As a result, variable geometry, constant impedance transmission lines can be easily fabricated, reducing discontinuities, and allowing low parasitic interconnections and transitions.

A comparison the field patterns between microstrip and CPW shows that the electric field in CPW is comprised almost entirely of fringing fields. In contrast, microstrip may exhibit a considerable amount of parallel plate capacitor electric field flux, depending on the signal trace width, w. CPW does have a small, but important, amount of parallel plate capacitance in the gap (s) between the signal trace and adjacent ground. This extra capacitance is attributed to the metallization sidewalls on each side of the gap As such, failure to consider the metal thickness

22

(t) when calculating impedance will lead to errors in the design value of Using 0.7 mil thick metallization and a substrate with an of 10.5, Bachert[3.3], Figure 3.9, plotted the calculated impedance of a circuit, with t = 0 against s & w values. The diminished values for Zo are attributed to the lower overall capacitance due to field distribution between the conductors. Nevertheless, at very low a/b ratios, significant impedance errors may arise. Giani and Naldi [3.4] showed that very small h/w + 2s ratios result in sharply higher impedance values than those calculated for Since fields are distributed more or less equally between substrate and air, the effective dielectric constant for circuits with thin conductors and thick substrates can be approximated as:

If the second medium is not air, then the effective dielectric constant can be determined from:

The basic problem in coplanar design is relating impedance to the w/s ratio and the conductor thickness, t. Impedance in coplanar waveguide is primarily a function ofw and s, as defined in Equations 1 and 2. Over the frequency range for which CPW is non-dispersive, the characteristic impedance is given by:

where K’(k) is the complete elliptical integral of the first kind, and K(k) is its complementary function, defined by:

For computation of ratio of the complete elliptical integrals, K/K’, the reader is directed to Hilberg[3.5]

23

For 0< k < 0.7, K/K’ may be very closely approximated by:

For 0.7< k < 1.0, K/K’ may be very closely approximated by:

Using Equations 3-14 to 3-18, Stegens[3-6] plotted impedance as a function of w/w + 2s, Figure 3-10, using as a variable, assuming metal thickness (t) = 0 and the normalized substrate thickness

24

3.4 Stripline. A typical centered stripline configuration is shown in Figure 3-11 Here the buried metal trace is equidistant from the two ground planes. As with microstrip and coplanar waveguide, there are variations to this geometry, but this section will concern itself only with the centered structure. The fields in stripline structures are confined entirely within the dielectric. As such, Characteristic impedance for structures where the strip width, w, is wide enough so fringing fields do not interact, i.e.; w/b greater to or equal to 0.35, is given by:

25

This approximation[3.7] is valid for t/h<0.1, w/t>2.5 and w/h>0.1, yielding Zo values, according to the authors, to be accurate to within 0.5%

26

From Figure 3.12, for a given w/b ratio the appropriate t/h ratio may be determined. Figure 3.12 also demonstrates that as w/h increases, the trace thickness effect on the impedance diminishes.

References 3.1 3.2

3.3 3.4 3.5 3.6 3.7

A. Presser, Microwaves, vol. 53, no. 5, March (1968) D. C. Howe and G. A. Senf, Proc. 1969 Electron. Comp Conf, Washington, DC, April-May 2, (1969) P S. Bachert, "A Coplanar Waveguide Primer" RF Design, vol 52, July (1988) G. Gione and C. Naldi, Analytical Formulas for Coplanar Lines in Hybrid and Monolithic MICs", Electron Lett, vol. 20, no 4, (1984) p 178 W. Hilberg, "From Approximations to Exact Relations for Characteristic Impedances", IEEE Trans. on Microwave Theory and Techn, MTT-17, no 12, (1969) p1087 Personal Comunication, R. E. Stegens, Veritech Microwave, South Plainfield, NJ B. Nauwelaers and A. van Capelle, “Characteristic Impedance of Stripline”, Electron Lett vol. 23, no. 18, August 27, (1987) pp. 930-1

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3.8

H. Howe, Jr., Stripline Circuit Design, Artech House, Dedham, MA (1974)

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CHAPTER 4

CURRENT FLOW AND LOSS CONSIDERATIONS

The current distribution in the various circuits determine the required conductor thickness. From a consideration of the RF magnetic fields tangential to the conductors, we see that most of the fields in the circuits shown in Figure 2.1 are in the dielectric and the currents lie on the conductor periphery. Only up to three skin depths of metal are needed. Because of non-uniform current distribution inductors typically require three times the thickness of ordinary transmission lines. Losses in MICs are generally divided into two parts: (1) that and caused by current flow in lossy conductors, the conducting loss (2) that contributed by the dielectric material through which the fields propagate, the dielectric loss The total loss is defined as:

Interestingly, for lumped elements, the relative contribution of each vary little with the integration figure but are very frequency dependent as will be described later. The total loss, or 1/Q does vary with for distributed circuits. We will direct our attention first to the dielectric and see how material selection and processing can affect circuit performance.

4.1 Dielectric Losses. Conductor losses greatly exceed dielectric losses in most circuits; nonetheless for good performance the dielectric should have the following characteristics: Low dissipation factor Be isotropic Be homogeneous Be constant over frequency and temperature ranges involved Be chemically stable Be dimensionally stable and easily handled For microstrip, in particular, high density alumina meets most of these requirements. Yet there are applications which successfully use, and in some cases, require other materials such as sapphire, beryllia, aluminum nitride, fused silica, clad substrates and selected high dielectrics.

4.1.1 Tan In an alternating electric field the total potential obtainable depends on the ability of the ions and electrons to reorient themselves as the polarity of the electric field changes. In a loss free dielectric, if the voltage changes sinusoidally, the current leads the voltage by 90°. For real materials there invariably is a delay in the

30

polarization, and the current leads the voltage by 90° - d', where d' is defined as the dielectric loss angle, and refers only to losses directly due to the dielectric. The dissipation factor (loss tangent) is defined as A schematic showing the vector diagram of current, voltage and loss factor is shown in Figure 4.1. For illustrative clarity a scalar diagram is presented. For high density aluminum oxide the dielectric loss angle is about 0.01°, and its tangent is

In general the dielectric constant and loss tangent of a given material do not vary much over the microwave range. The effect of dielectric loss, is basically the tan of the substrate media weighted by the effective dielectric constant. Dielectric loss is usually much less than, as will be shown, conductor loss. An approximation for the dielectric loss is given by:

while a more accurate expression, by Hammerstad and Bakkudal[3.1] is:

derived by making the assumption that On alumina with a 1­ 2µ” surface, is almost an order of magnitude less than the conductor loss

31

When considering a planar trace on a silicon substrate, the propagation characteristics of the Si-SiO2 base must be considered. The planar conductor is above a double layer substrate consisting of an oxide over bulk silicon. Due to the finite conductivity of the bulk, typically in both conduction and displacement currents the order of 0.01 to exist. As such, substrate resistive losses from these currents are generally significant. To illustrate the effect of substrate losses on the conductor losses, one has only to look at the effect of substituting air for silicon under coplanar traces. Milanovic [4.2] demonstrated how electrically isolating the trace from the lossy silicon resulted in significantly lower attenuation losses. They were able to reduce line attenuation at 40 GHz from 40dB to about 5dB by etching the silicon from under the transmission lines. The 5 dB loss was attributed to resistive loss of the aluminum conductor. In practice, hybrid substrates exhibit far less loss than does silicon, and usually gold or silver conductors are used, which also are even less lossy. Nevertheless, Figure 4.2 graphically illustrates the effect of high substrate electrical losses.

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4.1.2 Anisotropy Anisotropy in the dielectric arises from three major sources: 1. Crystallographic orientation in single crystals such as sapphire. 2. Matrix contributions in polycrystalline materials due to preferred orientation in processing. Ferrites and tape produced ceramics are prime examples. 3. Fillers in organic dielectrics used for clad substrates. An example of this is woven glass mat in clad PTFE substrates. This is important because in structures such as microstrip, anisotropy produces additional fringing capacitance. This largely affects narrow lines and in structures using edge coupling such as filters and couplers. Excessive anisotropy, if not corrected for, can alter circuit performance. In sapphire the anisotropy is well defined,

for a-axis and 11.55 for c-axis. By orienting the crystal during slicing

either axis may be obtained with no batch-to-batch variation.

High density polycrystalline alumina is composed of many grains of sapphire, which if perfectly randomly oriented, would yield a fired body with an of 10.08[4.3]. However, tape process substrates exhibit non-random, or preferred orientation. Values of 10.22 to 10.80 have been reported to 99.96% alumina suggesting preferred orientation with the C-axis perpendicular to the substrate surface. This condition appears to develop during the casting operation and is accentuated during the firing operation. Again, proper control during slurry preparation and processing is important for batch to batch consistency. Filled clad materials show the largest batch-to-batch variation in anisotropy. Also, the type of filler has an effect. Table 4-4 compares various filled and unfilled dielectrics showing how the filler changes other properties as well. Figure 4..3 plots the effect of increased dielectric for both woven and constant (more filler) on the anisotropy ratio random fiber filled PTFE. Increasing filler percentage increases the anisotropy, the random fiber filling exhibiting, as would be expected, lower anisotropy. Szentkuti[4.4] plotted the effects of dielectric on sapphire,

anisotropy on the effective dielectric constant Epsilam-10* and isotropic materials of comparable dielectric properties

as a function of w/h, Figure 4.4. With narrow lines there was a 3%

increase with sapphire over the isotropic materials and with the filled PTFE a 9% increase in There is, however, very little difference with large w/h ratios. This is explained by the fact that the fringing fields are larger for narrow strips, and it is only the horizontal

33

component, of the fringing field that is affected by the dielectric constant in the x direction.

Variations in dielectric constant are minimized to less than 1% in clad substrates. In ceramic materials, however, the higher substrate firing temperatures and differences in fabrication methods account for a wider range of dielectric constants even within the same part. Variations of as much as 1.5% were reported for a single 2” x 2” substrate. Improvements in recent years in ceramic fabrication have reduced the spread. Nevertheless, the user should be aware that variations do occur, and that critical designs based on “one-value,” may be off the target. For LTCC substrates, variation of 3% is not uncommon, particularly among suppliers and sometimes between lot to lot from the same vendor. One may expect a 1% impedance error from the substrate alone.

34

35

4.2. Conductor losses. Conductor losses are caused by the series resistance of the conducting medium. For minimum loss the ideal conductor should have: High conductivity, as near to bulk as possible.

Smooth upper and lower surfaces

Good adherence to the substrate, and should be:

Easily definable

Readily processable

Readily bondable

4.2.1 Guide Length Losses. As discussed earlier, the guide length is inversely proportional to the frequency and root effective dielectric losses at lower frequencies and constant. As such, guide length dielectric constants are higher than unit loss because of the longer guide wave length. Increasing the frequency and dielectric constant reduces the guide length and the guide losses. For a trace with a unit loss of 0.04 dB/cm, at 2 GHz the guide length for a trace on a substrate with a dielectric constant of 2 is 11.4 cm (4.5 inches), and the total guide loss is 0.456 dB. However, for the same unit loss and substrate dielectric constant, the guide length is 0.841 cm (0.33 inch), reducing the guide loss to 0.034 dB. This is illustrated in Figure 4.6, where losses per guide length are calculated for a microstrip conductor with a unit loss of 0.04 dB/cm (0.1 dB/inch) at various frequencies and dielectric constants. 4.2.2

Attenuation. Conductor losses,

arise from primarily from:

Current flow distribution

Conductor resistance

Surface roughness

Attenuation describes the difference between the power transmitted and the power received. In any signal path, conductor, radiation, dielectric and reflective losses combine to use energy, which saps signal power. The signal is thus attenuated. Losses measured in dB are usually normalized to per unit length. Figure 4.7 compares the attenuation per unit length of several transmission line structures. It is clear that stripline and microstrip exhibit higher losses per unit length. However, with relatively short conductor lengths overall losses are lower. 4.2.3 Return loss. When a signal traverses a conductor geometric or electrical discontinuities part of the signal is reflected. The reflected signal in principle "returns" down its original path and sums to the existing incident wave, where it may distort the wave form and intensity,and is a negative number (-30dB is better than -15dB) However,

36

37

losses are usually expressed as absolute values Return loss has two detrimental parts: a) attenuation, which reduces the magnitude of the incident signal degrading the signal. Return loss, as is insertion loss, is measured in dB and is a negative number (-30dB is better than -15dB) However, losses are usually expressed as absolute values Return loss has two detrimental parts: a) attenuation, which reduces the magnitude of the incident signal (energy), and (b) energy which may distort or cancel the inbound signal to an extent that it may be unrecognizable. This is expressed as VSWR in the next section.

4.2.4

VSWR, Voltage Standing Wave Ratio Two waves, traveling in opposite directions and interfering with each other, form a standing wave. In a transmission line, voltage and current standing waves may be formed. A useful expression for characterizing these standing waves is Standing Wave Ratio (SWR). Since voltage is usually the most important parameter which is measured, voltage standing wave ratio (VSWR) is generally used. In a circuit the voltage of the forward wave combines either constructively or unconstructively with the reflected wave. A detector that can measure

38

rms voltage, will detect a maximum rms value at some locations, a minimum at others and intermediate values at the remaining locations. The ratio of maximum rms voltage to minimum rms voltage is VSWR.

VSWR may be also be defined in terms of the absolute reflection coefficient, by

Power is proportional to rms voltage by:

A component with no reflections has a VSWR of 1. Reflections are manifested as positive values of VSWR greater than 1. An abbreviated comparison of VSWR, return loss and other conversions is shown in Table 4-1. Generally a return loss of -20dB, equivalent to a VSWR of 1.22 is considered acceptable.

39

4.2.5 Skin Depth. The formation of eddy currents is one consequence of Maxwell's 4th Law.:

where: E = Electric field intensity B = Magnetic flux intensity t = metal thickness Magnetic fields penetrate most materials, so when alternating current flows, the changing magnetic field generated by the oscillating current creates an opposing current. This inductive current itself creates an opposing magnetic field to cancel any changes. The resistivity and permeability of the metal determine the degree of opposition. Since most metals have a permeability of one, only the resistivity usually needs consideration. Also as the frequency increases, so does the rate of change of the magnetic field, and correspondingly, the magnitude of opposition. With increasing frequency, the field and thus the current, is concentrated closer to the conductor surface as shown schematically in Figure 4.9. Skin depth is defined as the distance from the metal surface beyond which the current density falls below 1/e (about 37%) of its original magnitude.

40

The thickness of the layer where the current density drops to 1/e of its value at the surface is defined as its skin depth calculated from:

= specific resistivity of the conductor in = permeability of free space, = 1 for non-ferromagnetic materials = operating frequency in hertz The skin depth for various conductors as a function of frequency is shown in Figure 4.9. Three skin depths handle about 98% of the total signal energy. It follows that to eliminate current crowding, the trace on thickness be at least three skin depths. The effect of skin depth ratios is shown the attenuation of sputtered copper films with various in Figure 4.10[4.5]. The two curves represent theoretical curves at 8 GHz for w/h = 0.5 and 2.0. Horton’s experimental results are in line with those of Levy's results with electroplated gold[4.6]. The empirical sputtered copper results are in good agreement with his theoretical plots. The attenuation of the electroplated gold plate is higher than expected for the 2 GHz difference. This data is consistent with the model that electroplated films are not as always as pure or as dense as vapor deposited. Thus one would expect higher losses. Note the decreasing minimum value of t/d value and the lower attenuation with increasing line widths. This suggests that to minimize conductor losses, narrow lines should be avoided. Wider lines of only 3-4 skin depths are preferable since thinner lines enjoy a processing advantage. Figure 4.10 also illustrates that additional line thickness is not only unnecessary but slightly detrimental from a performance point of view as well as impractical from process and cost. As skin depth is proportional to the conductor resistivity, thinner conductors may be used when higher conductivity materials are used since their skin depth is smaller.. The skin depth is also inversely proportional to the frequency so thinner layers may be used at higher frequencies as well. Table 4-2 lists the specific resistivities of various materials from which Figure 4.9, a plot of skin depth as a function of frequency was derived. Nickel exhibits pronounced ferromagnetic properties, and as , is greater than one. This accounts for such its relative permeability, its small skin depth relative to other metals shown in Figure 4.9, even though its resistivity may be higher. It should be noted that the exact value of permeability varies as a function of frequency. As such the location of the line denoting nickel is arbitrary. It becomes readily

41

apparent how conductor conductivity, surfaces and interfaces are critical in determining circuit performance.

Caution must be exercised when calculating skin depth from bulk resistivity values or assume resistivity is independent of process method. Evaporated films and quality electroplated films are nearer bulk than sputtered and higher resistivities are characteristic of older thick screened films. Earlier fired thick film conductors were generally characterized by a continuous array of metal particles through which ran a secondary network of glass[47]. This glass tended to concentrate, as shown in Figure 4.12, near the substrate, often to the extent of forming a continuous layer. In such a heterogeneous system, there is certain to be a resistivity gradient, with the lowest resistivity at the surface.

42

43

Developments in reactive (“fritless”) inks have produced more homogeneous and lower loss materials than either the frit or mixed bonded conductor inks[4.8]. The skin depth vs frequency of one such thick copper film is shown in Figure 4.9. The actual resistance of the material will vary depending on material, processing and surface. Similarly, electroplated metals can also have wide variations in conductivity, again depending on such factors as both composition and plating bath parameters. Electroplated copper films frequently exhibit columnar grain growth which results in undesirable porosity and surface texture. Values of resistivity as much as twice that of bulk have been measured[4.9]. The adherence of thick films relies on both a mechanical bond and the reaction between ink and substrate which is why lower purity, rougher ceramics are preferred[4.10]. Most thin film conductors on the other hand are deposited onto smooth surfaces, requiring a chemical bond. Low resistivity materials, with the exception of aluminum, do not readily react with the substrate, necessitating a thin glue layer, an additional source of conductor loss. Table 4-3 characterizes the prevalent thin film conductors for conductivity and substrate adhesion.

44

Table 4-4 lists some of the thin film multilayer systems. Many of the "glue" or adhesion , seed and plating layers are summarized. This list is by no means exhaustive but covers many of the more popular schemes. The effects of the the adhesion layer on conductor attenuation is discussed in the next section.

4.2.6 Adhesion layers. Since much of the dc current in microstrip and coplanar waveguide lies on the dielectric side of the conductor, the resistance of not only the conductor, but of the adhesion layer, barrier and in some cases a resistive layer directly affect the attenuation of the transmission line as well. For a two layer system with a Cr adhesion layer and Au conductor, Sobol and Caulton[4.11] showed that as the Cr thickness increased the line loss increased. At 2 GHz the loss increased by 3% as shown in Figure. 4.12, while at 50 GHz they predicted a 60% increase in loss with only half the chromium. Figure 4.13 shows the losses using a tri-layer Ti-Pd-Au system[4.11], where a few hundred angstroms of titanium are used as an adhesion layer and 0.2 - 0.4

45

46

µm of palladium as a angstroms of titanium are used as an adhesion layer and 0.2 - 0.4 µm of barrier layer. Up to X-band, this system will introduce losses as high as 10% more than monometallic gold, and 30­ 50% in the millimeter range. For millimeter wave systems, if miniaturization is unnecessary, high conductivity copper conductors bonded directly to soft substrates may be an attractive alternative.

47

It is important that high resistivity adherence layers be as thin as possible since the relative RF loss is directly related to both layer thickness and frequency. Since the typical adhesion layer is between 10 and 50 nm thick only negligible loss at frequencies well into the millimeter bands is expected. The adherence layer should be carefully chosen to minimize diffusion into the conductor, since excessive diffusion serves to increase the over-all conductor resistance and thus RF loss. A summary curve[4.12], Figure 4.14 illustrates the importance of

48

minimizing the number of conductor layers particularly at higher frequencies. Ramy et al [4.13] investigated the losses of a variety of etched material on several substrates. They first calculated the losses without considering the substrate contribution, and then allowed for substrate effects and compared the measured with the calculated values. Calculated and measured data for films on 99.5% at 10 GHz are shown in Figure 4.15. They found excellent agreement between calculated and measured values. They also found substrate surface smoothness and high conductivity of ground layer were important for high Q conductors. From Figure 4.15 it is apparent that the etched fritless golds closely approach thin film performance. Also, with increasing conductor resistivity, not only does the Q decrease but the substrate has less effect on the overall Q. For this reason, where high Q circuits are not required, thick film conductors on the rougher 96% alumina suffice.

49

4.2.7 Surface Roughness. Surface roughness is major source of conductor loss. Because current penetration into the trace surface is shallow, currents must follow all surface imperfections, effectively lengthening the current path and increasing the actual resistance. This effect was treated by Sobol[4.14] who applied Morgan’s theory[4.15] to microstrip. Sobol’s calculations for copper films are shown for various roughness values in Figure 4.16, where the increase in conductive loss against surface roughness is plotted, with frequency as a parameter. The agreement between the two approaches is excellent as shown by the superposition of empirical results at 4 GHz from Sobol[4.14].

50

A simplified curve-fitted formula for the effect of surface roughness on line attenuation by Hammerstad and Bekkadal[4.17] is :

where:

= = =

r.m.s surface roughness in µ inches skin depth at appropriate frequency uncorrected conductive loss

A plot of Equation 4-9 is shown in Figure 4.17 where the increase in surface resistivity due to roughness is plotted against substrate roughness normalized to skin depth.. The results of Bhasin et al[4.16], who investigated the effects of surface roughness of glass filled teflon on conductor loss, are included in Figure 4.17. Although the copper layer is between 12.5 and 25 µm thick, the roughness of the substrate, and to some extent the granularity of the copper, is reflected in higher losses than typically found with thin films on smother materials. Others who investigated the effect of roughness on increases in conductor resistance include Lending[4.17] and Benson[4.18]. Figure 4.18 summarizes the plotted data from all five investigators. The significant difference between Lending and Benson and the others results from differnces in roughness models

51

52

Screened thick film conductors with conventional particle distribution, shown in Figure 4.18, are characterized by irregular edges and textured surfaces. When deposited onto rough surfaces, such as 96% alumina with its inherent granular surface, typically such films may exhibit even higher losses, approximately 20% higher, than corresponding films on smoother substrates. This shows the conductor surface is strongly influenced by substrate texture in spite of the film thicknesses.

A summary set of curves for and specific substrate thicknesses developed by comparing conductor and dielectric losses up to 20 GHz is shown in Figure 4.19[4.21].

References 4.1.

Cited in T. C. Edwards, “Foundations for Microstrip Circuit Design,” John Wiley N.Y., (1981) p 91

53

4.2. 4.3 4.4. 4.5. 4.6

4.7.

4.8. 4.9. 4.10. 4.11. 4.12.

4.13

4.14. 4.15

4.16 4.17. 4.18. 4.19. 4.20.

M. Milanovic et. al., "Micro-machined Microwave Transmission Lines in CMOS Technology", IEEE Trans. on Microwave. Theory and Techn., vol. 45, #5, (May 1997) pp.630-35 V. Borase, Microwaves and R. F., (February 1983) pp. 83-7 B.T. Szentuki, Electron Lett. 12, (1976) pp. 672-3 R. Horton et. al., Electron Lett, Vol. 7, No. 17, (August 26, 1971).pp. 490-1 A. Levy., Manufacturing Technology for Microwave Integrated Circuits. Final Report May 1984, AFWAL-TR-84-4030 Contract #FO 8635-80-C-0243 Air Force Materials Laboratory, Wright Patterson AFB, OH 45433. J. Savage, Chap 5, “Handbook of Thick Film Technology”,: P J. Holmes and R. G. Loasby editors. Electrochemical Publications Limited, Ayr. Scotland , (1976) P. Sayers, Solid State Technol. (September 1974) pp. 66-9 F. Z. Keister, IEEE Trans. on Microwave Theory and Techniques, MTT-16, #7 (July 1968) pp. 469-75 M. V. Coleman and G. E. Gurnett, Electrocomponent Science and Technol. vol. 5 (1978) pp.55-9 H. Sobol and M. Caulton, "Technology and Design of Hybrid Microwave Integrated Circuits" in Advances in Microwaves vol. 8, Academic Press, NY (1974) pp. 12-64 B. F. Gunshinam et. al., “MIC Technology Short Course” ISHM Technical Monograph Series ISHM Reston, VA (1985). J. P. Ramy et. al., "Experimental and Theoretical Character­ ization of Thick and Thin Films for Microwave Uses on 99.% Alumina Substrates" Electrocomp Sci. and Technol., vol 10 (1983) pp l57-62 H. Sobol, Proc. IEEE, Vol. 59, No. 8, pp. 1200-11, August 1971. S. P. Morgan, "Effect of Surface Roughness on Eddy Current Losses at Microwave Frequencies" J. Appl. Phys., Vol. 20, No. 4 (April 1949) pp. 352-362 K. B. Bhasin et. al., "Interfacial Roughness in High Frequency Microelectronic Interconnections and Packaging" J. Vac. Sci. and Technol. A3(3) May/June (1985) pp778-9 E. O. Hammerstad et. al., ELAB Report, STF 44A 74169, University of Trondheim, Norway (1975) pp. 98-110 R. D. Lending, New Criteria for Microwave Component Surfaces", Proc. National Electronics Conf. vol. 11 (1955) pp391-401 F. A. Benson, "Waveguide Attenuation and its Correlation with Surface Roughness" Proc. Inst. Elect. Engrs. (London) Part 3, vol. 100 (1953) pp85-90 Cited in R. C. Gupta et. al., Micros trip Lines and Slotlines, Artech House, Dedham, MA (1979) p 70

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CHAPTER 5 SUBSTRATES Substrate properties, such as surface finish and the fabrication processes such as metallization and definition determine the accuracy of line width and gap width, and ultimately circuit performance. For optimum performance, microwave substrates should have: 1. Low loss tangent to reduce dielectric loss. A uniform, isotropic dielectric constant to minimize, for 2. example, impedance changes within the circuit. Constancy of dielectric constant within a manufacturing batch 3. and from batch to batch to allow for circuit production without compensation of circuit design. 4. A smooth surface finish to minimize conductor ohmic losses. 5. High thermal conductivity for power circuits. 6. Good thermal expansion compatibility with component and package requirements. 7. High chemical resistance. Moreover, the correct choice of a particular substrate material depends on factors such as: 1. Is the substrate cost justifiable for the application? 2. What technology is to be used? 3. What frequency and temperature ranges are involved? 4. Are the substrates available with sufficient area to realize the circuit design? 5. If necessary, can tight physical dimensions be maintained either initially or through secondary processing? The overwhelming number of substrates used for microwave circuits are “hard”, usually a polycrystalline ceramic, or “semi-rigid”, a metal clad, filled organic. Other substrate types are available and will be briefly mentioned, but first the “hard” substrates will be discussed. Their important characteristics are listed in Table 5-1

5.1

GLASS Uncrystallized glasses are only used for thin film work. They are generally produced by melting crushed glass (cullet) in a tank type furnace and withdrawing the molten glass in sheet form at the other end. Glass is the lowest in cost of all materials normally used for thin film substrates. Glasses, on the other hand, suffer from low mechanical strength and poor thermal conductivity, creating problems in handling and thermalcompression bonding. For microwave applications where superior chemical and electrical properties are necessary, fused silica has emerged virtually the only practical glass substrate. An extraordinary smooth surface, low dielectric constant and low loss tangent make fused silica an ideal candidate for microwave hybrid integrated circuits. Thin film circuits defined on fused silica are

56

characterized by precisely measured fine lines and the almost total absence of yield problems due to surface defects. Thus this substrate finds widespread application for millimeter wave circuits. Fused silica may be produced two ways. In the first, ground Brazilian quartz is first melted by flame fusion. A long, thick disc of silica is made by slowly pulling, while This boule, typically 72 inches in rotating, on the molten pool of diameter and 26 inches thick is later sliced and polished to thickness. This technique is similar to the thermal Flame Fusion process for making silicon.

The water content, which directly affects the adherence of deposited films and other properties, ranges in the 100-200 ppm range. Using an oxyhydrogen flame, may also be made by hydrolyzing silicon tetrachloride;

A disc, 5” to 6” thick and 30” to 50” in diameter is grown. Again, subsequent cutting and polishing creates substrates .010” to .020” thick. However, the water content typically 5 to 10 times higher, ~1000 ppm, than the material made by flame fusion, can adversely affect adherence

57

of deposited thin films by reducing the interfacial oxides necessary for good adhesion. Single crystals One single crystal substrate is uniquely desirable for microwave applications. From Table 5-1, note that sapphire has an excellent surface, low tan and high thermal conductivity. Sapphire substrates, are cut and polished from larger boules as are most single crystal materials. Both Verneuil (flame fusion) and Czochralski methods are used to fabricate the larger single crystals. As a single crystal, it suffers from somewhat lower mechanical strength than its polycrystalline counterparts and its properties are anisotropic. Further, as a single crystal material it is inherently expensive with substrate areas greater than are prohibitively expensive. As a result, sapphire’s polycrystalline fine grain analogs are used whenever possible. 5.2.

5.3

Polycrystaline ceramics

Fabrication. Polycrystalline substrates possess attributes of superior strength, high thermal conductivity, resistance to ion migration, chemical and thermal shock resistance. Before discussing the various substrate materials, let us review their fabrication methods. Usually the raw materials for ceramic substrates are available as purified oxide powders. The oxides are mixed, reground and then mixed with organic compounds functioning as plasticizers, binders, or lubricants. A flow chart indicating three established methods to form ceramic substrates is shown in (Figure 5.1) These techniques, their advantages and limitations, are briefly reviewed in the following paragraphs. 5.3.1

5.3.1.1 Powder Pressing. In powder pressing, dry or slightly dampened powder is packed into an abrasion resistant die under sufficiently high pressure (8,000 to 20,000 psi), to form a dense body. This process allows rapid or automatic production of parts with reasonably controlled tolerances since the shrinkage during the sintering process is lower than other ceramic substrate forming techniques. There are, however, limitations. Pressure variations from uneven filling of long or complex dies lead to defects with inhomogeneous properties. As a consequence, these materials are limited to those applications where lack of uniform properties does not adversely affect circuit performance. Holes cannot be located too close to an outside edge and the process limits the size of the substrate. These substrates are normally more porous, with higher surface roughness and lower mechanical strength than other ceramic forming methods. Nevertheless, substrates made in the manner are commonly used in the thick film industry and have limited

58

applications for thin films. When used for thin films, such substrates are usually mechanically polished, but in doing so, lose their cost advantage over other forming techniques, and still suffer from inhomogeneity problems. As a result, substrates made by powder pressing rarely meet the requirements for high frequency applications

59

5.3.1.2 Tape Casting. The most widely used method for producing substrates for thin film hybrid applications is tape casting. The manufacturing process consists of the following steps: Milling. Fine grained, high purity reactive oxides are the prime starting material. Wet grinding of the powder is carried out in ball mills using grinding media. The grinding mill is also charged with deflocculents, binders, plasticizers, lubricants, grain growth inhibitors, and mixtures of organic solvents. The selection of the solvent system and deflocculents is critical to the process. Complete dispersion is essential since any cluster of small particles has the same effect on surface roughness as equivalent large particles. Casting. At present, the doctor blade method of sheet or tape formulation offers the best potential for a smooth surface substrate which is relatively free of surface defects. The slurry is spread onto a suitable carrier film, (polyester or cellulose acetate), which moves at constant speed under a metal knife blade, (frequently called a doctor blade). This blade is positioned a short distance above the film. As the film and slurry move under the blade, a thin sheet of wet ceramic forms, Figure 5.2. The thickness of this sheet is controlled by adjusting the height of the blade over the carrier film.

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5.3.1.3 Roll Compaction. Continuous thin sheets of ceramic material may be formed by roll compaction. In this method a mixture of spray dried powder, binders and plasticizers are fed into a vibrating sieve to break up any agglomerates. The mixture is then fed between two rollers, whose rotational speed and separation determine the thickness of the resultant green ceramic. A polyester carrier tape, similar to that used for tape casting, engages the green ceramic as it leaves the rollers. The edges of the tape are trimmed and the ceramic surface is cleaned before being rolled onto a storage reel. Surfaces with between 2 and 4 µinch finishes, adequate for many microwave microcircuit applications are obtained with this process. Using roll compaction, shown schematically in Figure 4.3, claimed significantly improved surface quality, with a concomitant reduction in polishing costs.

The resultant ceramic sheet, usually referred to as “green tape” or “in the green state”, is air dried to remove the solvents. Typically, a 30 to 50% reduction in green tape thickness occurs during solvent evaporation. Shrinkage in the X-Y direction also occurs. Unfortunately, it not always predictable and uniform. As a result, shrinkage must be measured before holes and other artifacts are punched into the green tape. Frequently, elliptical holes are formed to compensate for tape

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shrinkage during firing. In tape cast ceramics, the substrate surface on one side approaches the characteristics of the carrier material, and the other surface is determined by the doctor blade, the temperature of the air, and the amount of air flow used in the tape casting machine. By choosing an ultrasmooth carrier, a fine surface finish is facilitated, and by careful attention to process, a similar, but not identical, finish is produced on the air side. Controlled raw materials, slurry properties, and properly designed drying or curing conditions help produce substrates with minimum warp and waviness. This process has been successfully applied for the manufacture of substrates for several decades. More recently, production runs of BeO and AlN have appeared. While the casting technology of these two materials is not as mature as that of substrates so formed show improved surface, mechanical and electrical characteristics compared to dry pressed parts. Tape cast BeO substrates are available up to 4.50” x 4.25” and 0.35” thick. AlN is available in substrate sizes up to 3.75 “ x 4.50” and 0.40” thick. 5.3.1.4 Lamination. Conventional uniaxial press lamination shown in Figure 5.4 is accomplished by aligning and stacking parts between two parallel plates. The two plates apply heat and pressure to accomplish fusion. Very uniform heating and pressure are difficult to maintain, especially in very large systems. As a result, the build-up may be slightly distorted after the lamination cycle, occasionaly requiring the scaling of new phototools for proper pattern generation.

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In isostatic pressing, Figure 5.5, parts to be laminated are enclosed in an elastic container which is inserted into a sealable cavity. The air in the cavity is first evacuated and the cavity then filled with a liquid, typically water, which surrounds the elastic container. The pressure and temperature applied to the cavity is uniformly distributed over the surface of the container yielding a relatively uniform compact piece. An important advantage of isostatic pressing is that it permits fabrication of pieces with relatively large length to width ratios. Over the past few years refinements in the isostatic process have led to its widespread adoption for the volume manufacture of LTCC and multi­ level, semirigid substrate assemblies.

5.3.1.5 Glazing. During the machining operations to obtain substrate parallelism and flatness, surface grains from polycrystalline ceramics are physically pulled out. The size and frequency of these defects, Figure 5.6, which interrupt otherwise flat, smooth surface depends upon other things, substrate grain size distribution, secondary phase and machining techniques. For thin film capacitors and components requiring fine lines such surface disruptions can significantly reduce yield. An appropriately smooth surface can be restored by glazing the surface. Glazes are glass

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frit in an organic binder. After application by screening or spinning onto the ceramic substrate, the parts are fired in air to typically between 750° and 1000°C. The organic binders burn out at 500°-600°C and as the temperature rises above the flow point of the glass, the particles of glass fuse together forming a continuous glassy layer with a smooth, albeit wavy surface. Figure 5.7 clearly demonstrates the glass-like smoothness attainable with this method. In addition to providing a smooth surface, the glaze must be chemical resistant, have good electrical properties and closely match the expansion of the parent ceramic.

5.3.2 Substrate characteristics. For the bulk of applications where low or moderate power dissipation is required, alumina is the preferred substrate. Currently, alumina represents about 90% of the ceramic substrate sales. For thick films, 96% alumina is generally used. These substrates are generally characterized by as-fired surfaces, typically 20-30 µinches average roughness. Such surfaces are ideal for good adhesion, but as will be seen later, limit the useful operating frequency of the circuits made on them. Note also from Table 5-1 that the dielectric losses, which also affect circuit performance, are as much as 3 times as lossy and slightly mechanically weaker than the higher purity alumina. Unpolished 96% alumina substrates find application where substrate surfaces and uniformity has little, if any, effect on yield or performance. For microwave work, where reproducible dimensions of conductors are important, an improved surface can be furnished by lapping from 10 to 50 µinches and decreasing the camber to between 0.3-

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0.5%. Such surfaces provide improved fine printing, better etch-back characteristics and firing distribution.

For thin film microwave hybrids where the substrate, as with thick film microwave hybrids, actively participates in the microwave circuit, the surface is even more critical. Thinner films are more sensitive to surface irregularities and consequently, most substrates for thin film microwave circuits are lapped and polished to about a l µinch finish. The large number of surface pullouts exhibited by polished 96% alumina requires that a higher density, smaller grain size alumina be used. Polished 99.6% alumina provides the surface amenable for precision photolithography (fine line and spaces), and the reproducible fabrication of circuit components such as couplers, interdigitated capacitors, coils and precision resistors. SEMs of the surfaces of as-fired 96% polished 99.6% and polished 99% BeO, which is discussed in the next paragraph, are compared in Figure 5-8a-c. The reason for the

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improved surface quality of the 99.6% alumina over 96% alumina is due primarily to the reduction in surface defect number and size. Fewer pullouts in the higher density material is attributed its intrinsic smaller average grain size. Even with polishing, pullouts of the larger beryllia grains preclude surfaces with the quality exhibited even by the 96% aluminas. The use of zirconia as a grain growth inhibitor in beryllia has been reported to reduce the average grain size by about 50% and improve electrical and mechanical properties of the body, at a slight expense in thermal conductivity however[5.2]. For power applications, beryllia (BeO) substrates have been extensively used. Its high thermal conductivity, about 8 times that of alumina, and low dielectric loss would appear to make it the ideal substrate. However, beryllia is a large grained material and cannot be machined to nearly as good a surface finish as alumina and generally the substrate surface is more porous, as shown earlier, than alumina. Whereas, such surfaces are good for thick films, they may cause processing problems when dealing with thin films. Unfortunately, the reproducibility on BeO is not as good as on particularly on dry pressed bodies. While the newer tape process offers improvement, the larger grains and porosity are still present. Of greater concern, but very manageable is the potential toxicity of BeO dust[5.3]. While the fired ceramic poses no health hazard, the powder can, in some individuals, cause severe lung disorders. Care must be exercised when handling this material to eliminate or minimize dust formation. At room temperature its thermal conductivity of aluminum nitride is about 75% that of BeO with the high purity version of the nitride approaching BeO at around 150°C. Its lower thermal expansion closely matches silicon making this material attractive for VHSIC packaging. Significant improvements have been made in reducing its dielectric losses, rough surfaces and film adhesion problems. Unprocessed, polished AlN is characterized by a relatively smooth surface with few pull-outs, as shown in Figure 5.9a. Small amounts are yttria are frequently used as sintering aids. The light areas in Figures 5.9a and b are yttria containing phases, exposed by the polishing operation. In boiling water, AlN decomposes forming a porous surface film of hydrated alumina. The surface etching as a result of exposing the surface to boiling DI water for 10 minutes is shown in Figure 5.9b. A1N is also affected by solution Chanchani[5.4] observed decomposition in range of 4.4 to 5.5, but not at 3.0 and below, nor at 8.2. He also the found the rougher surface of the nitride compared to alumina severely affected the definition of 76µm wide, thin resistor films creating opens. NiCr films[5.5] deposited onto AlN adhered well providing the existing surface oxide is continuous. Substantial improvements in surface quality have resulted from advances in the reduction of average body grain size and polishing techniques.

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Rapid oxidation of AlN occurs only above 1000°C. Excessive oxide, (2u), results in poor thick film adhesion by inhibiting chemical reaction between the paste and substrate[4.6]. The expansion of aluminum oxide is almost double that of the nitride, and in rapidly cooled substrates, thermal stresses induce cracks in the oxide causing flaking and poor adhesion in thin films. Polishing of AlN for microwave applications removes the surface oxide so that some sort of postoxidation treatment is necessary prior to deposition for good thin film adhesion. Improved adhesion may be obtained by the use of very thin, oxidized layers of metals typically used as adhesion layers. Part of the processing inconsistency for both thick and thin film circuits on AlN lies in differences in chemical composition of the respective bodies. In contrast to alumina, where there are only slight variations in chemical composition, the sintering aids used by some of the AlN manufacturers contribute to broader differences in substrate composition. Dettmar and Charles[5.7] surveyed the available nitride substrates and discussed their chemical and surface morphology differences. Differences in laser drilling of aluminum nitride were

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attributed to differences in substrate chemical composition[5.8]. The composition of the additive powder affected the amount of free aluminum formed during the high temperature decomposition of the aluminum nitride. The free aluminum can be removed by chemical etching, during which the substrate surface may also be attacked[5.5]. Film adhesion problems arise from the poor chemical resistance and in the case of thick film, by differences in CTE between the fired paste and substrate. Some resistor problems [5.9] arise from the fact that glasses containing lead oxide (PbO) can react with AlN during the firing process:

Ruthenium oxide used as the conductive phase in the resistor paste, may also react with AlN:

Polishing after laser processing will restore the substrate surface. Maintaining a nitrogen ambient during drilling insures the formation of aluminum nitride in the drilled area[5.10]. Theoretically, the thermal conductivity of aluminum nitride is about 340 W/cm-K, however, it is improbable that polycrystalline aluminum nitride will ever reach this value...The maximum thermal conductivity obtained for single crystal aluminum nitride by Harris et al was 275m-K[5.11]. They attributed the lower value to oxygen related lattice parameter changes and oxygen induced defects. The effect of oxygen concentration in both the powder and sintered polycrystalline aluminum nitride on its thermal conductivity is shown in Figure 5.10[5.12, 5.13, 5.14]. The rapid rise in thermal conductivity at oxygen concentrations below 0.85 weight percent is in close agreement with reported lattice changes[5.11]. Norton[5.15] correlated differences in thermal conductivity with the presence of lower thermal conductivity second phases between grains, crystal defects, oxygen impurities and poor sintering behavior. Feil[5.16] showed that differences in the choice of sintering aids and sintering process affected thermal conductivity and thick film adhesion. Conductor pastes show adhesive strengths within an order of magnitude of results on alumina. However, resistive pastes require adjustment in thermal coefficient of expansion for good adhesion. Here the chemical composition of the paste as well has to be compatible with the nitride. Considerable work is also underway to develop compatible thick film conductors and dielectrics since its nitride surface inhibits chemical to bonding. The increasing demand for smaller, lighter weight circuits has dielectric constant substrate spurred renewed interest in high

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materials. In the past, high dielectric losses, low density, poor surfaces and high temperature coefficient of dielectric constant have restricted the commercialization of these materials. Materials such as barium zirconium tin titanate (ZrSn) nanotitanate and barium magnesium tantalate have been produced by dry pressing with nearly bulk density. Polishing these substrates yields surfaces with between 2 and 5 µinch finishes, more than adequate for most microcircuit applications. However, the alkaline earth additives limit the use of process reagents such as mineral acids. Cleaning and pattern etching must be accomplished using precautions not usually practiced with more chemically inert substrates. Care must also be taken when heating many of the titanate based materials, since they are much more prone to thermal shock than, for example, alumina or beryllia. Figure 5-9 is an SEM of a polished zirconium tin titanate surface. It is characterized by a low incidence of pull-outs , but by slightly deeper polishing scratches than found on alumina or beryllia.

Silicon nitride, is a relatively new substrate material that occupies a specialty niche in the microelectronics arena. Its structure and some of its properties are similar to AlM. Its lower thermal conductivity, is stiffer, with typically 90 W/m-K is about one-half that of AlN. higher fracture toughness, which permits the use of thinner material in It is used, as of now, in some cases, reducing thermal resistance, applications which require rapid, high power thermal cycling, or where rapid power surges are encountered, such as radar. As a material, which

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has widely used in anti-friction bearing and spindle applications, it is apparent the material can be polished to a fine finish, although no actual values are available. Silicon Carbide (SiC) with 0.1 to 3.5 wt% BeO as a sintering aid is mentioned here for completeness only. It has the highest thermal conductivity of all substrate materials, slightly higher than Beryllia (270 w/m-K to 250 w/m-K) and its expansion value of 3.7 ppm/°C is even closer to silicon than aluminum nitride. Thus SiC will no doubt find widespread application in silicon power device packaging. However, its very high dielectric loss, compared with for high density alumina precludes its use as a microwave substrate. It would be imprudent not to mention the potential toxicity of silicon carbide whiskers. While the granular powder used for substrates appears safe, whiskers used for reinforcement of ceramics, in the absence of contradictory evidence from more relevant testing, indicate a potential carcinogenic hazard[5.17]. 5.4 Low Temperature Cofired Ceramic (LTCC). In the barely two decades since its introduction, [5.18] Low Temperature Cofired Ceramic (LTCC) has enjoyed considerable interest and explosive growth. Gupta [5.19] listed 26 different LTCC tape systems produced by a variety of manufacturers. As propagation delay is directly proportional to the square root of the dielectric constant, LTCC manufacturers have centered their efforts on developing materials with low dielectric constants. Rapid refinements in ceramic technology, via fabrication, compatible highly conductive inks and lamination have brought LTCC to a maturity level enabling high volume manufacturing. With conventional screen printing, paste transfer and via formation occur simultaneously. LTCC, in contrast, requires separate operations, enabling higher yields. Further, conventional screen printed multilayer circuits mainly involve sequential processing, so that yield and quality are only as good as the layer with the poorest yield or quality. Again, each individual LTCC tape layer can be fully inspected prior to collating and firing. LTCC substrates, as do conventional high temperature ceramics, begin with a dried, blanked and punched tape layer composed of a refractory combined with an organic vehicle as illustrated in Figure 5.1, The LTCC process uses multiple layers of thin ceramic patterned to create conductive, resistive and dielectric features. Interconnecting vias are filled with conductive paste. Prior to firing, the ceramic layer is flexible enough to be punched and formed to precise configurations, allowing for firing shrinkage. The individual layers are inspected, registered and then fused at sufficiently low temperature to slightly melt the organic binder. The laminate is then trimmed and fired into a rigid assembly. With all the conductors and dielectrics co-fired, fewer firing

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steps are employed compared to conventional screened thick film. The sintered product may be post-processed with additional metallization on the top and/or bottom faces. At this point any additional discreet passive and/or solid state components may be appliquéed. LTCC is a multilayer electronic manufacturing technology utilizing glass-ceramic composites. The vast majority of these materials have dielectric constants ranging from 4 to 9[5.20] although some development work has been reported on ceramics with dielectric constants in the 17 to 70 range[5.21]. An excellent review by Jones et. al., [5.22] compared the chemical. structural and mechanical properties of green and fired LTCC from various suppliers. There are two general classes of substrate materials: a composite refractory and glass system, or a system in which the glass crystallizes during high temperature processing. The degree of crystallization of the latter directly impacts the dielectric and mechanical properties of the substrate. This fact may used to tailor substrate properties for specific applications. A typical surface roughness value of about 10 µinches will increase the resistance compared to a smooth surface, of a silver conductor approximately 3% at 2 GHz, while at 10 GHz. the relative resistance increases about 14%. To post-process with thin film, a surface roughness of this magnitude requires a planarizing layer, usually using one of the polymers listed in Table 9-1. After polymer application, vias would be necessary to interconnect the top layers. Photodefinition of the uncured material, or in the case of cured polymer, RIE or laser etching would be employed. A comparison of some LTCC tapes is found in Table 5-2 An LTCC-M technology is described by Kumar et. al., [5.23] the M denoting a metal layer. The LTCC-M process is identical to the traditional LTCC process up to and including the lamination step to obtain the green ceramic. At this step the laminate is pressed onto a metal core specially prepared to promote good adhesion during the firing step This process was developed to overcome three shortcomings in the conventional LTCC process: "1) large shrinkage and distortion during sintering; 2) significantly lower thermal conductivity of compared to alumina ceramics, and 3) low rupture strengths that give rise to breakage during processing, assembly and use."

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Clad Materials. High frequency applications place many of the same demands on clad substrates as high and low temperature ceramics. These include such critical parameters as uniform dielectric thickness, reproducible dielectric constant and low loss tangent within the desired temperature and frequency range. Maximum moisture absorption should also be specified since absorbed moisture will change substrate electrical properties. A parameter, not a concern when dealing with hard substrates, critical to the performance of clad materials is their glass transition temperature. It would be appropriate at this point to briefly review this important property. 5.5

5.5.1 Glass Transition Temperature, Tg. The glass transition temperature is a fundamental thermodynamic phase transition, characteristic of an amorphous polymer, and depends on the both the starting material and its manufacturing process. The addition of fillers to neat resins generally increase moduli, permittivity and anisotropism, but do not impact Tg. Similarly, ionic contamination from the manufacturing process increases the substrate dissipation factor without affecting the transition temperature. Tg is the temperature at which a relatively brittle material with a small free molecular volume transforms into a material with a higher molecular free volume. With this transformation, individual molecules within the material have increased freedom to move. At Tg the specific volume continuously changes with temperature. One important consequence of this is a significant increase in the coefficient of thermal expansion (CTE), shown schematically in Figure 5.11. Tg essentially defines the upper operating and process range of polymer based materials, such as epoxy and cyanate-esters, since the changes experienced by the polymer base are non-reversible. PTFE, on the other hand, is best described as visco­ elastic. Variations in electrical properties are related to density changes in the substrate during heating 5.5.2 Material properties. For most communications systems operating at RF and low microwave frequencies, conventional printed wiring boards (PWB) are adequate. The mainstay laminate material for these applications is FR-4. These conventional epoxy based systems have historically been based on a dicyandiamide curing system. This is relatively stable, easy to process and available at reasonable cost. However, the cross-linked network obtained with this system readily degrades at higher temperatures. As such the low Tg of 170°C resulted in poorer thermal performance. For such systems, the PWB, with its relatively poor dielectric properties, acts merely as a mechanical support. Early substrates were often non-uniform and characterized by relatively high dielectric losses, poor dimensional stability and dielectric uniformity. These factors frequently contributed to excessive variations in line

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impedance and poor circuit performance. Since the early 1990s, when these materials were developed, thermal and electrical performance requirements have become more demanding. As circuits move into higher frequencies, the PWB, as do other substrate materials, requires higher performance materials. Newer, emerging laminate technologies are better suited for the demands of higher speed, interconnect density, better CTE matching in the z direction for via reliability and improved thermal performance. Other considerations for clad materials include dimensional stability, Tg, chemical resistance and low thermal conductivity.

Some of the many improvements include tightening the dimensional thickness of dielectric and cladding, providing uniform, low loss dielectrics with variations of dielectric constants of the order of in the range from 3 GHz to millimeter frequencies. The low loss of PTFE at microwave frequencies had led to its widespread use as a core material. Nevertheless, a number of improvements have been made in the epoxy based materials by reformulating the resin systems and curing agents to meet the increased thermal demands made by the use of higher temperature solders.. Changes that are made must be "drop-ins" for existing manufacturing process and equipment. Further the use of thicker boards requires materials with CTE's that more closely match that of copper to prevent via failure. Pure Teflon* and irradiated polyolefins are preferred as dielectrics since they exhibit isotropic dielectric and expansion properties and low loss over a wide frequency range. However, these materials suffer from two major, although not insurmountable, problems. As pure thermoplastics they suffer from cold flow, i.e., change in dimension or

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distortion caused by application of pressure and a higher coefficient of expansion than rigid or semi-rigid materials. Some manufacturers add fillers to these core materials to increase rigidity. Some of these additives are woven glass, glass fibers, fiberglass or ceramics, which affect the isotropic nature of the original material. This is shown in Figure 5.12, which illustrates the effect of adding about 40% filler to pure PTFE on substrate CTE in the Z direction. This is important for the manufacture of vias, where the expansion match is critical. The composite dielectric constant can be theoretically predicted using the relationship shown in equation 5.1

Woven fiberglass laminates begin with either fine, medium or coarse weaves of fiberglass cloth. The cloth, typically 0.002” thick, is impregnated with PTFE through immersion in a stable, aqueous dispersion of PTFE. Silanes are used, either by prior fabric coating or added to the dispersion to provide the necessary moisture resistance. The concentration of Teflon particles in the bath helps determine the dielectric constant of the final laminate. The thin layers are fused together to achieve the desired thickness. A copper layer is then fused to one or both surfaces. Non-woven fiberglass laminates are made in a process similar to paper making. Particles of E-glass (about 5µm in diameter and a 100X aspect ratio) are mixed with PTFE in a slurry. A screen raises a layer of the materials and the liquid is sucked away. The dried and pressed material is layered as with the woven glass process. Even with this process the glass fibers still exhibit considerable alignment. This process yields substrates with higher PTFE content than the woven. PTFE has a lower dielectric constant than the glass, and the result is a lower substrate dielectric constant. During this process, some of the glass fibers align. Consequently, some degree of anisotropy follows. Anisotropy is more important at high microwave frequencies than at the usual RF frequencies since the dielectric and thermal properties of the substrate will vary according to the anisotropy extent Improved forms of laminate combine layers of coated fiberglass interspersed with layers of PTFE to make a stronger and less expensive product. These products have more predictable dielectric constants and lower loss tangent than other laminate types. Mechanical stability is improved, however, at the expense of electrical performance and other properties such as machinability. The dissipation factor can increase by as much as a factor of 10, depending on the type and amount of additive. This is shown in Table 5-3 which

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compares the properties of some of the clad substrates. Table 5-3 also shows that moisture absorption can increase by as much as two orders of magnitude. Extreme care must be exercised when processing these materials to insure the moisture is baked out, particularly for hermetic packages. This is aided by that fact that the temperature limit for the PTFE/glass core increases from 170°C to about 260°C for the filled materials. However, copper etched circuit lines cannot withstand continuous exposure at these temperatures without bonded side oxidation. It is recommended that continuous operation of unprotected copper conductors should be less that 50°C.

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While mechanical stability is improved, there still remains a significant difference in thermal expansion between the plastic and cladding. This is most evident when copper is removed from one side of the substrate, causing warping. The degree of mismatch is maximized for pure, unfilled materials and minimized for woven fabric materials. Anisotropy in thermal expansion between the xy and z axis is caused by fiber and filler alignment in the core material. High Z expansion causes two major problems. First, the effective dielectric thickness increases with temperature, changing the impedance value. Secondly, and perhaps more importantly, the reliability of plated through holes (PTH) is directly related to excessive expansion differences in the Z direction. Mismatch between the copper in the barrel and the core material creates opens and flaking of the conductor. Recently, a ceramic filled PTFE was introduced which more closely matches the expansion in the Z direction to the expansion of copper, 17 ppm/°C. Table 5-4 summarizes properties of some of the dielectrics used for clad substrates.

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5.5.3 Fabrication. Another important consideration is the copper foil cladding. It is available in two basic forms: electrodeposited (ED) and rolled (sometimes called wrought or calendered). Schematically the two process are shown in Figures 5.13 and 5.14. The thickness of copper foil for cladding is designated in terms of ounces of copper per square foot. One ounce copper is equivalent to a thickness of approximately 1.4 mils. Half-ounce copper is equivalent to 0.7 mils thick, and so on. The ED foil is produced in continuous lengths by deposition onto a rotating, non-reactive, stainless steel drum. The drum is partially immersed in an electrolytic copper bath. After plating, the copper foil is continuously peeled from the drum and coiled. On one side the resultant foil replicates the relatively smooth surface of the drum. The other side, where copper growth occurs, typically has a rougher, nodular surface. This effect of having two disparate surfaces is similar to that found in tape cast ceramics, where the carrier surface is also smoother. The degree of roughness of the growing surface depends to a large extent on the foil manufacturers who may either roughen or smooth it to optimize subsequent bonding to the core material. Rolled copper is formed in a process similar to one used for aluminum foil. A raw ingot is hot rolled (calendered) to an intermediate gauge. It is alternately cold rolled and annealed to a thin foil. This process results in a tight grain structure with aligned, elongated copper particles, as opposed to the dendritic structure of the ED copper. Both surfaces are smoother than the ED copper. As a result, the bonding surface must be roughened for good bond adhesion. Rolled copper is more ductile. The manufacturing process limits rolled copper to 1/2 ounce thickness. ED copper is available down to 1/8 ounce. The initial bond strength of ED copper is higher than rolled, but degrades more quickly at about 260°C, to end up about the same. The copper foil is now laminated to the core resin. The copper may be bonded directly onto the pure core materials. In this process, as with the filled, the copper should be oxide free and a passivation layer may be employed. Immersion in dilute or benzotriole has been successful. During lamination, heat and pressure are applied. The core material, being thermoplastic, softens sufficiently to “wet” the roughened copper, providing mechanical anchoring of the copper. This is the simplest of the bonding processes. For reinforced core materials, the method used most is to employ a thin (0.001” - 0.002”) film of pure PTFE between the copper and core as a bonding layer. Alternatively, a thin layer of PFA or unsintered PTFE adhesive can be used as a bonding layer. The pure PTFE film beneath the foil, besides its use for bonding, serves other functions. It provides a smooth surface which enhances etching acuity. It also provides a moisture resistant barrier and protection for the glassy fillers

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against the hot caustics used for producing subsequent copper oxide bonding treatment.

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During lamination, the bonded copper surface is replicated in the melted bonding resin. Photographs of these resin surfaces after etching, Figure 5.16, clearly show the effects of copper processing on the corecopper interface quality.

The roughness of the ED Copper on both the top and substrate increases with increasing deposit thickness due to copper grain growth. Typically the interface roughness at the substrate for 1oz copper can reach 95 µinch (2.4 µm). The substrate surface, on the other hand, of the rolled copper, is fairly constant at about 55 µinches (about 1.4 µm). The high surface roughness will be shown in a later section to add to the RF losses, particularly as the frequency increases. It is generally preferable to use the rolled copper for microwave applications, where low losses demand smoother, more consistent surfaces. The large substrate areas available with soft substrate materials is illustrated by the microwave circuit shown in Figure 5-17 The panel size of this circuit, operating at about 1-2 GHz, is 11 by 5.6 inches. The 0 060” thick substrate is clad with 1 ounce copper on both sides, and the circuitry defined by etch back

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techniques, discussed in Sections 12 and 13. This commercial avionics circuit finds application in a cockpit environment.

A proprietary process developed by Holl Technologies for substrate manufacture and copper lamination results in forming a mirror finish on both. The substrate is formed by filling a proprietary polymer with "nano-particles" of dielectric. Another advantage of this substrate is that it's properties are isotropic. Depending on the filler materials and filler-polymer ratios, the company is able to tailor the dielectric constant from 25 up to 200, the thermal conductivity from 1 to 50 W/mK and CTE from 0 to +20 ppm/°C. Neither the substrate nor copper is roughened to enhance adhesion, and both feature very smooth, mirror surafces. Figure 5.16 graphically illustrates the mirror finish. These very smooth surfaces allow for improved pattern generation as well as lower signal losses and improved circuit performance. Substrate sizes up to 3 in. by 3 in. are presently available.

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5.5.4 Mechanical patterning. Most clad substrates are patterned using the standard lithographic methods of applying photoresist, exposing, and etching. The next section describe alternative techniques for obtaining circuits. Clad substrates may be patterned by selectively machining the copper with a computer driven router. This method is ideally suited not only for prototypes, but low volume applications and for circuit tuning. Boards up to 21.3" x 15" can be processed with larger features, typically 4 mil lines and 4 mil spaces. Once these larger features have been milled, a laser attached to the unit is capable of ablating the copper cladding for higher density features, forming 2.4 mil traces with 1.0 mil gaps. To prevent the organic substrate from carbonizing, requiring an additional step, the ablation process is prematurely stopped, leaving a thin layer of copper. This residual thin layer is removed by conventional etching, with minimal undercutting. SEMs of the routed traces are shown . These techniques enjoy the environmental advantages of using minimal etchant,

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avoiding significant pre-treatment and disposal into the waste stream or atmosphere. The machined copper dust, however, should be vacuumed during the process. Conductor losses using this approach are in the neighborhood of 0.01dB/mil. An SEM of a filter fabricated by the router method is shown in Figure 5.18. For example, Reinhardt et. al., automatically tuned LC circuits operating up to 12.4 GHz, by removing material from the shunt capacitor pads to achieve the desired performance[5.24].

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5.6 Cleaning. Nowhere is the old adage" cleanliness is next to godliness" more appropriate than in the microelectronics industry. Today's electronic components have lower tolerance for impurities. Good adhesion, the handmaiden to reliability, is interwoven with mandatory clean surfaces for metal, dielectric and photoresist deposition Yet, cleaning is often considered a "non-value added" process. Only disaster awaits those who embrace this oversimplification. Higher interconnection densities have created new challenges for manufacturing personnel. The choice of cleaning techniques depends upon the nature of the substrate, the type of contaminant and desired degree of cleanliness. When handling substrates some general rules include: (i) hold in non-critical areas such as edges, with little abrasion as possible; (ii) store in clean containers; (iii) operator handling should be done with tooling or "low lint" or "low extractable" gloves, finger cots and wiping materials. Low extractable means that solutions used in the cleaning should not extract material from the material being used. Vinyl gloves, for example, should never be used with alcohol, as alcohol extracts phthalates from vinyl. Latex products should always be ordered without powder. Even if latex gloves are being worn, if contaminated surfaces are being touched, polyethylene gloves should be worn over the latex and then discarded so as to protect the integrity of critical parts. Residues from manufacturing, polishing, fingerprints, oil and airborne particulate matter are examples of frequently encountered contaminants. Too often cleaning procedures are an amalgam of band-aids. Effective cleaning can only be accomplished after empirical identification of the problems. Once the

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cleaning requirements have been established, a process should be established and rigorously maintained. The following sections briefly reviews some of the basic techniques. The reader is directed to an early, but still appropriate, primer by this author on this subject[5.25].

5.6.1 Wet Processes. Wet etching is probably the most versatile all cleaning processes. It may be very selective, permitting the removal of only certain materials. Equipment varies from beaker size containers to elaborate , computerized tanks. Some substrate materials require special cleaning procedures due to undesirable side reactions with susceptible areas. As aluminum nitride is readily attacked by alkali and even boiling DI water, dilute acidic solutions such as phosphoric acid are usually used. Hot sulfuric acid and potassium dichromate has been used but has a tendency to leave residues. Chromerge®, a solution of chromium trioxide and sulfuric acid available from Fischer Chemicals, has also been successful. Disposal of these chromate based solutions is a problem. Titanates, readily attacked by strong acids should be cleaned in a benign alkaline solution. A cleaning standby for ceramic substrates such as alumina and beryllia is a modification of the "RCA Clean". This procedure, with its many variants, uses the following steps: at a ratio of 4:1 at 60°C Hot DI water rinse : DI water 1 : 1 : 5 at 60°C : DI water 1 : 1 . 5 at 60°C Hot DI rinse This cleaning is followed by a high temperature (900°C) bake. The substrates should be used as quickly as possible. Copper surfaces on clad substrates may be cleaned by mechanical scrubbing and/or slight etching Clad substrates should be rigorously rinsed with hot DI water to remove etching residues, and then scrupulously dried. 5.6.2 Dry Processes. In some cases, dry cleaning is preferable to confine the reaction to surface impurities. For example, a technique originally reported for cleaning silicon wafer surfaces may be applicable to hybrid substrates. In this technique, high purity liquid or gaseous is expanded in a special nozzle to form a high speed jet[5.26]. The jet contains numerous small diameter particles of solid which strike the surface. Upon impingement at the surface, this “snow” is reported to remove even sub-micron adherent particles, hydrocarbon stains such as fingerprints, and silicone greases. It has been this author’s experience that, under certain conditions, particles trapped in substrate surface pores can be removed also. One of the major advantages of this technique is its inertness. It is rare that will react with the substrate or circuitry.

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Another advantage is its “dry” nature, that is, the represents none of the environmental threats and occupational hazards associated with conventional chemical reagents and solvents. It spontaneously sublimes, leaving no disposable waste. Ozone used for cleaning, can be generated at atmospheric pressures and ambient temperatures by short wavelength ultraviolet radiation. The UV is produced by a mercury vapor lamp in a fused silica envelope at 185 and 254 nm. The short wavelength radiation breaks the hydrocarbon bonds and then generates ozone, which react with the fractured hydrocarbon to form volatile CO and Plasma cleaning or plasma treatment can be used as a separate cleaning procedure (ex vacuo cleaning) or performed in the vacuum chamber prior to the deposition process (in situ cleaning). Plasma cleaning is defined as when a partially ionized gas is used to remove loosely held, low-molecular weight material from the surface. Systems range from 2 inch diameter chamber to ten-foot walk in systems. The plasma may vary in charged particle density and particle energies, depending on the method used to form the plasma. Plasma cleaning is a high energy process, and the reader should be aware that the substrate surface may be chemically and/or physically altered. This is particularly true when dealing with polymer based and polymer materials. Here, when a plasma gas interacts with a polymer surface, four primary effects can occur: removal of organic materials, cross-linking, ablation or surface restructuring. Care must be taken in the selection of process parameters to ensure organics are completely removed. It is possible to modify the contamination instead of removing it, creating a surface barrier which will cause poor or no adhesion. The specific chemistry imparted to the new surfaces is determined by a number of plasma operating parameters, such as gas composition, flow rate, energy flux, electrode geometry and exposure time. Martin and Wong[5.27], showed that adhesion of metals deposited on epoxy after plasma cleaning in oxygen exhibited higher peel strengths than the same metals deposited after plasma cleaning in argon. They attributed this to the chemical adhesion mechanism of metal oxidation. It should be noted that their results are specific for the particular cleaning conditions and metal deposition system used. Their results may not necessarily translate directly to any other facility If the reaction product is volatile, it may be desorbed from the surface. This called reactive plasma etching. An example is the removal of hydrocarbon contamination by an oxygen plasma where the reaction These gases may be monitored with a mass products are CO and spectrometer to indicate the state of cleaning and determine the reaction end point. Plasma cleaning can be used to remove a variety of contaminants from substrate surfaces. It can also be used to condition

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vacuum surfaces by removing contaminants such as hydrocarbon pump oils water vapor which are difficult to remove by pumping alone. 5.7 Safety. This section, essentially common sense, is included primarily as a reminder. Many chemicals used for cleaning are hazardous and toxic. Even boiling water, for example, poses a threat. It is always prudent to use safety clothing, glasses, and when practical, safety shields and hoods when handling chemicals. Operators should be familiar with the threshold limit values (TLV), Permissible Exposure Limits (PEL) and Short Term Exposure Limits (STEL) of the chemicals they are in contact with. The Material Safety Data Sheet (MSDS), available from the supplier, should be available at each work station. Besides supplier information, the reader is directed to two, of many good sources [5.28, 5.29]. Of special note is hydrofluoric acid (HF). This is a particularly insidious reagent It causes burns which continue to attack the protein in the skin unless the chemical is neutralized or removed. Peroxide is generally a non-stabilized, commercial 30% solution. Compare this to the 2% stabilized peroxide available at the local drug store. When boiling, this strong oxidizing agent can cause severe burns When not in use, it should be refrigerated to slow its decomposition. Use with of hot sulfuric acid or hot ammonium hydroxide poses a substantial threat. When mixing concentrated acids with water, the rule is to always slowly add the acid to the water since the mixing reaction is very exothermic. Adding the water to acid may cause the water to boil and splatter. If the ozone concentration is low enough you can smell it, (it's the odor after a lightning storm), but in excess of l0ppm/volume it will damage the olfactory nerve inhibiting the sense of smell. Over l0ppm/v ozone becomes toxic. Exposure to UV radiation, particularly short wave, can be harmful to the eyes, and as everyone is aware from suntan ads, can promote skin cancer. Proper eye protection and protective clothing are essential. Pumping pure oxygen from a vacuum system presents its own safety problem. Explosions have occurred when pure oxygen is compressed with hydrocarbon pump oil. Using air as the plasma gas can negate this safety problem, but more often than not, nitrogen is bled into the exhausted oxygen before entering the oil-filled pump The properties of the more popular substrate materials have been discussed. Conductor and dielectric deposition methods will be reviewed to see how the deposited films are affected by various substrate properties. References

5.1.

Tolino, D, Personal Communication, Trans-Tech Corporation, Adamstown, MD

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5.2.

Dawe, A. J., et al., Proc. 1990 Intern. Symp Hybrid Microelectron., Chicago Oct. 15-17 (1990) p316 5.3. Foley E. and Rees G., Prog. 1980 Intern. Microelectron. Symp, October 20-22, (1980) New York.pp. 99-103, 5.4. Chanchani, R., IEEE Trans. Comp Hybrids and Manufact. Tech., vol. 11, #4 Dec. (1988) p427 5.5. Bostelaar, L. J. et al., Hybrid Circuits, #21, 14 Jan. (1990) 5.6. Kuromitsu, Y., et al., Proc. 7th European Hybrid Microelectronics Conf., Hamburg, (paper 4.3), (1989) 5.7. Dettmar, E. S. and Charles, H. K. Jr., "Hybrid Design and Processing Using Aluminum Nitride Substrates" Intern. J. Hybrid Microelectron.,10, #2, 9 (1987) 5.8. Kurihara, Y., et al., IEEE Trans. Comp Hybrids, and Manuf. Techn., 14,#1, March (1991) p204 5.9. C. Kretzschmar et. al., "A New Paste System for A1N", Proc. 2001 Intern. Symp on Microelectron. Oct. 7-9, IMAPS, Baltimore (2001) pp672-5 55.10. Lodge, K. J., et al., IEEE Trans. Comp, Hybrids and Manuf. Techn., 13, #4, Dec. (1960) p633 5.11. Harris, J. H. et al.,, "On the Nature of Oxygen-Related Defect in Aluminum Nitride" J. Mater. Res., 5, #8, Aug. (1990) p1763 5.12. Konsowski, S. G., et al., "Evaluation of Advanced Ceramics for High Power and Microwave Circuitry-Part II" Intern. J. Hybrid qMicroelectron., 10, #3, (1987) p13 5.13. Anzai K., et al, "Development of High Thermal Conductivity Aluminum Nitride Substrate Material by Pressureless Sintering" Proc. 1st IEEE CHMT SYMP,CHMT ., Tokyo (1984) 5.14. Kuramoto, N., et al., "Translucent A1N Substrate" Proc. 36th Electron. Comp Conf., Seattle, WA May 5-7 (1986) p424 5.15. Norton, M. G., "Characterization of Aluminum Nitride Ceramic Substrates" Hybrid Circuits, 18, #20, Sept. (1989) 5.16. Feil, M., Hybrid Circuits, 29, #18, Jan. (1989) 5.17. Birchall, J. D., et al., J. Materials Sci. Lett., 1, 350 (1988) 5.18. W.A. Vitriol and J. L. Steinberg, “Development of a Low Temperature Cofired Ceramic Technology”, Intern. J. Microelectron. and Electron. Pkg., (1983) pp593-8 5.19. T.K. Gupta, "In Search of Low Dielectric Constant Materials for Electronic Packages” Intern. J. Microelectron. and Electron. Pkg., vol. 17, #1, (1994) pp80-7 5.20. A. J. Piloto et. al., "Low Loss, Low Temperature Cofired Ceramic for Microwave Multichip Modules" Proc. 1994 Intern. Symp on Microelectron., ISHM, Boston MA, Nov. 15-17 (1994) pp318-23 5.21. G. Kniajer et. al., "Low Loss, Low Temperature Cofired Ceramics with Medium Dielectric Constants", Intern. J. Microcircuits and Electron. Pkg, vol. 20, #3, (1997) pp246-53.

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5.22. W. Kinzy Jones, et al., "Chemical, Structural and Mechanical Properies of LTCC Tapes" Intern. J. Microelectrn. and Electron. Pkg., vol. 23, #4, (2000) pp469-73 5.23. A. H. Kumar et. al., "Versatile, Low Cost, Multilayer Ceramic Board on Metal Core" Advancing Microelectronics, July/Aug (1995)pp30-37 5.24. Reinhardt, J. E., et. al., "Automatic Process Cuts Filter Tuning From Hours to Minutes", Microwaves and RF, June (2001) ppl03-4 5.25. Brown, R., in chapter 6, “Handbook of Thin Film Technology”, edited by Leon I. Maissel and Reinhard Glang, McGraw-Hill, New York (1970) 5.26. Sherman, R. and Whitlock, W., J. Vac. Sci. Techn., B. 8 (3), May/June (1990) p563 5.27. L. J. Martin and C. P. Wong, "Chemical and Mechanical Adhesion Mechanisms of Sputter Deposited Metal on Epoxy Dielectric for HDI PCBs" PC Fab, Jan. (2002) pp18-34 5.28. "Sax's Dangerous Properties of Industrial Materials" 10th Edition, R. J. Lewis and N. Irving, eds., John Wiley and Sons, (1999) 5.29. "CRC Handbook of Laboratory Safety", 5th Edition, A. K. Furr ed., CRC Press (2000)

CHAPTER 6

THICK FILM

6.1. Screen Printing. Screen printing, as a graphic art, has been practiced for almost two millennia. Adaptation of this technique has been a staple for forming thick film patterns for electronic applications for almost 70 years. Nevertheless, in just the past five decades screen printing has been transformed from, essentially a graphic art, to one capable of handling high density interconnects on a variety of substrate materials. The basis of screen printing lies in depositing a viscous paste through a mesh reinforced stencil. Because the pastes will, by themselves, not flow, they must be forced through the openings in the mesh by pressure, and onto the substrate surface. While the concept appears quite simple, over 50 printing variables have been identified[6.1] grouped into 5 specific categories: Ink Printer Squeegee Post print treatment Substrate In practice, a squeegee is traversed across the surface of the screen completely filling each aperture. The action of the squeegee on the screen also serves to bring the screen in close contact with the substrate, permitting the paste to wet the substrate surface. This contact permits accurate thickness control of the ink. Finally when the squeegee has passed over the screen, the mesh rapidly pulls away, leaving the ink behind, wetting the substrate in the form of small globules, which then coalesce to form a continuous pattern. This sequence is shown in Figure. 6.1 a-c[6.2]. All thick film inks have certain general characteristics in common: They are viscous paste like materials with a rheology suitable for screen printing. They are composed of two distinct phases; a functional phase that imparts the electrical properties to the finished film and a vehicle phase used to impart proper rheology. They are very processing sensitive and frequently designed for specific substrates. Thus, an ink suitable for might not be appropriate for Be0. Screen printed inks experience a wide range of shear during application to a substrate. In rheological terms, the ideal ink should be both shear thinning and thixotropic with a yield point. More simply,

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after being forced through the screen, the ink structure should be fast, but not instantaneous. For minimum ohmic loss it has been stated that the conductor should exhibit near bulk conductivity, be rectangular in cross-section and have smooth surfaces. Screened thick film conductors tend to have: Rougher, sintered surfaces, 5-10µ”

Rounded edges from ink slump

Mesh impressions on the edges

Shrinking circuits and interconnect density require a higher degree of resolution. To meet this criteria, the rheological properties of the ink must be tightly controlled[6.3]. Unfortunately, the advances in ink rheology have not always produced sufficient printing improvements to make a real impact in a production environment. Except for some isolated cases, 3 mil lines and spaces are still the best that can be routinely achieved in production with printing using conventional screens. By optimizing and combining methods, Bacher[6.4] was able to resolve 2 and 3 mil lines and spaces. He concluded: 1. Screens with 400 mesh, 19 µm (0.75 mil) wires and 10 µm (0.4 mil) emulsion can produce high resolution prints of 50 µm and 754 µm (2 and 3 mils) lines and spaces. The screens have a large open area, allow high shear rates to be used and deposit a low wet

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2.

3.

print thickness 28 cm long (11 in.) with 50 and 75 µm (2 and 3 mils) wide lines. To obtain high resolution, emulsion gasketing must occur before the hydraulic pressure applied to the composition by the squeegee is allowed to build up Emulsion thickness should be sufficient to provide proper gasketing, yet be limited to 8 to 15 µm (0.3 to 0.6 mils) to provide thin wet prints for minimal paste spreading. Bringing the point of maximum hydraulic pressure closer to the squeegee tip improves line and via resolution. This can be accomplished by using an appropriate pseudoplastic composition, printing at high speed with a high mesh screen and limiting the amount of composition in front of the squeegee tip

McCormick and Ruwe[6.5] claimed that using screens with greater than 40% open area, and using a 0.3-0.5 mil thick direct/indirect emulsion, they were routinely able to generate 2 mil lines and spaces. They tried a number of gold pastes and found that thinning the pastes was necessary to prevent clogging the screens.

Gaglani[6.6] also investigated various techniques to obtain thick film fine line geometries. He obtained 3 mil lines and spaces with gold ink. He tried several inks and he also concluded that a 400 mesh screen, 45° angle and 1 mil wire will produce fine lines. He also noted that in addition to the ink rheology, the mono-sphericity of the gold particles

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plays a major role in fine line printing. A number of thick film suppliers have developed mono-spherical inks for fine line printing. The resolution of fine lines is limited, however, not by the ink or screening parameters, but by the very nature of the screen itself. The problem is graphically demonstrated in Figure 6.2, a reproduction of a 400 mesh screen adapted from Stalnecker[6.7]. Here the same pattern is developed on four different mesh orientations. Note that at 90° mesh orientation, perfect alignment of the emulsion to the mesh is required for optimum line acuity in the vertical and horizontal directions. Very narrow spaces between and mesh will not develop out, restricting the deliverable pattern dimensions to certain multiples. The 45° mesh orientation is commonly used to eliminate the alignment requirement, being more forgiving of partial openings. There is a tendency to develop a saw tooth edge on the vertical and horizontal directions. Lines at 45° must now be parallel, otherwise a wash out problem arises and patterns such as those shown in Figure 6.3 occur. For fine line fabrication, then, secondary processing is required.

Improvements are continually being implemented to obtain better screen life and print quality. One of the more significant ones within the past decade has been the introduction of new wire alloys. The wire is still stainless steel, but the carbon composition has been increased

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along with retaining additional nitrogen within the metal lattice while reducing the nickel content at the same time. With higher tensile strength, smaller diameter wire can be fabricated with improved strength allowing increases in screen opening from 40% to near 60%. This enlarged opening, shown in Figure 6.4, permits more material passage through the screen and better line definition. Another innovation being used today to enhance fine line screening is calendering. About 20 years ago, the wire cloth weaving industry adopted the calendering process shown in Figure 6.5 as a means of creating a more uniform mesh thickness. The process relies on passing the wire cloth between two steel rollers to reduce its over-all thickness. With advances in mesh manufacturing, the uniformity of present day product far exceeds earlier product which required the calendering process. Today calendering is used to only to thin the mesh, further enhancing print resolution

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6.2 Metal foil screens. This technique uses etched foil masks, which do not possess the flexibility of a fabric screen. In this system, the mask remains in contact with the substrate during the printing operation and then is mechanically separated at the end of the squeegee stroke. Fine lines down to 50 µm (2 mils) are possible. Because the screens lack resiliency they are very susceptible to accidental damage. One improvement in metal foil screen technology was the epoxy mounting of the foil onto a stainless steel screen. This reduced the incidence of accidental damage, but the poor stability of the epoxies used resulted in low life expectancy[6.8]. The elimination of the epoxy greatly enhanced the screen life. In this technology, nickel foil is formed in a process very similar to that used to make the ED copper for the clad substrates. This foil is then clamped to a stainless steel mesh, and fused to the mesh by additional nickel plating. The nickel foil is then patterned and etched. SEMs of a conventional and metal foil screen are shown in Figures. 6.6 A and B. The metal foil is attached only the tops of the overlapping weave, while the emulsion penetrates into the stainless mesh. The emulsion is textured and shows surface undulations due to the stainless weave. Nevertheless, the defined edge is reasonably sharp The gasket surface of the nickel foil is flat and the pattern edges

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sharp The “bald” spots are where the nickel plating has been etched during the patterning exposing the stainless wire. Note the thickening of the wire diameter by the nickel plate. Control during this plating cycle is extremely important to maintain uniform hole-to-wire ratio over the entire pattern. This poses a particular problem for bends in conductors and for coils[6.9] Nevertheless, these screens do have some advantages such as: long life, robustness and immunity to most solvents. However, they do require more processing steps and are not as facile as conventional screens. As such they are more costly. For short runs, which are typical of most microwave hybrid circuits, they may not be cost effective. Alternate methods of defining narrow lines and spaces include laser and abrasive trimming. Rickard[6.10], for example, used laser trimming and etching to fabricate parallel line coupled filters. He found no differences in performance. The gap width tolerance was ±10%. He did find he could make 5-6 dB proximity couplers by this technique at 16 GHz, whereas with screened only patterns he could realize only 8 dB or higher performance. In the 4-6 GHz band, attempts were made to laser and abrasive trim the edges of printed microstrip lines[6.11]. The author concluded that more work is necessary before these become practical.

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Up to the mid-80s the base technology for the manufacture of thick film inks employed finely divided metal particles dispersed in a glass matrix. To produce finer lines, Gaglini attempted pattern etching blanket screened gold films[6.6] He was able to fabricate 2.5 mil lines, but the etch rate varied among the inks used. He attributed this to the various amounts of glass and non-gold constituents in the ink. One may infer that longer etch rates result in patterns with more ragged edges. Problems with glass at the interfaces of multi-layer printings were discussed by Anderson and Olesen[6.12]. They found that their gold etch did not penetrate the glass layers concentrated in the interface between successively printed layers. As a result of these investigation, other investigators looked at changing the particle shape and distribution and glass composition. In many cases they were able to improve on earlier works. Hsu[6.13] reported on etching a gold film made from a specially prepared gold powder containing both sphericals and flakes. He claimed better density, surface characteristics and conductivity. Etching a single layer, 10 µm thick, Hsu reported 2 mil lines and 1 mil spaces. Recent advances in powder metallurgy and developments in ink technology has led to the development of improved, finely dispersed and uniformly spherical powders. Figure 6.7 clearly illustrates the advances made in the powder metallurgy over a relatively short time period.

Early work by Kani and Endo[6.14] demonstrated production applications for etched silver thick films. They showed that thick film conductors could be routinely etched to 1 and 2 mil widths. They pattern

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printed their substrates with either gold or silver, using uniformly dispersed spherical powders. After drying and roller coating their substrates with resist, exposing and developing, they spray etched to define their narrow lines. An SEM of a 0.001” finger on a thermal print is shown in Figure. 6.8. Thickness is approximately 3-4 µm on 96% The film surface is slightly rough as one would expect from films on 96% Improved edge definition and surface smoothness would Eason[6.15] carefully evaluated have been realized on 99.5% etched silver films on 99.6% and 96% alumina substrates and showed that microwave losses at 18 GHz on 99.6% were less than 0.01 dB/cm, slightly less than for comparably etched gold thin films. Some of his results are shown in Figure 6.10. He also pointed out that the substrate surface roughness plays a critical role in determining conductor attenuation, as etched films on 96% showed higher losses.

6.3 Lithographically defined thick film. The advances in powder metallurgy described earlier, not only improve the quality of screened films, but allow for secondary processing, using photolithography, a

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technology once restricted to thin film circuits. Two techniques, both subtractive have emerged as major manufacturing candidates. They are described in the next two sections. 6.3.1. Photoengraveable. In this process, Figure 6.9, the substrate is either blanket coated, or selectively screened wider than the target dimensions The paste is dried and fired. A positive acting photoresist is applied to the fired pattern which is then photolithographically defined. Either positive or negative acting resists (cf Chapter 11) may be used, although positive acting resists are generally preferred. 25 to 30 µm lines are spaces are routinely obtainable by wet etching Figure 6.10. Losses have been measured as low as 0.03dB/cm at 60 GHz[6.16]. This technique is ideal for top layer metallization. It can not be used for cofired LTCC modules, where all the substrates, conductors and dielectrics are simultaneously fired. As photosensitve materials are sensitive to UV light, all processes should be carried out in a "yellow" or safe light room. Short exposures to normal or low-level room lighting will not affect the pre-exposed films. However, exposure to high intensity light, such as sunlight, will expose the photoresist, and prevent proper exposure.

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6.3.2. Photoimagable thick film. A process, Figure 6.11, well adapted for multi-level substrates is the use of photoimagable thick film. Metal particles, primarily silver and gold, are incorporated with a negative acting photosensitive resin, creating a photoprintable paste. The dried, screened film is patterned using conventional ultraviolet(UV) photolithography[6.17]. The screened area, when exposed to ultraviolet light polymerizes and is retained when the unexposed material is removed by aqueous washing. As such this is a subtractive technique. The same exposure precautions used for the photoengraveable paste above should be exercized for this process.

Standard thick film firng processes complete the fabrication cycle. For multilayer ceramics, vias may be incorporated. The process flow is shown schematically in Figure 6.11. On 96% line resolution of 2 mil (50µ) are attainable, with improved edge definition over screened patterns. Better resolution is expected on 99.6% bodies, providing adhesion is not a problem. Figure 6.12 shows the line quality. The conductor is characterized by a smooth top surface and good edge acuity, both necessary for low high-frequency losses. In summary, etching, either of blanket or patterned screened films, appears to be the most promising way to substantially increase thick film resolution. The lower cost of the printer compared to vapor deposition equipment is offset by the large number of variables in the printing process and inks. Tredinnick et. al.,[6.18] compared the

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advantages and disadvantages of the three major methods of thick film deposition. They concluded that the "cost per length of interconnect" is greatest for direct print and least for photoengravable films, while the unit area cost is inverse. They also concluded the photoengravable technique provided the highest quality features, but for less precise, 2 mil lines, photoimagable conductors provide an "excellent solution". Again, photoengravable conductors are limited to surface applications.

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6.4

Additive techniques

6.4.1 Metal-Organics. Metal-Organics provide “thin film” capability without the need for vacuum systems. In essence an organic-bound metal (ligand) in liquid form is applied to a substrate by screening, brushing, spinning, spraying or dipping. Base metals, also in ligand form, are frequently added as fluxes or glass formers and serve the same purposes as in conventional thick film technology, particularly in noble metal applications. In addition to coating the surface, the low viscosity liquid penetrates and coats any via openings. After drying to remove the solvent the organic portion is vaporized by heating, leaving a very thin, layer (~ 0.1-0.2µm) on the substrate. The substrate material determines the upper temperature at which the film is processed. Soft, organic based substrates are typically processed up to about 400°C, while 800°C is not uncommon for materials such as alumina. For conductors, photoresist is first applied to the metal coated substrate. Openings are then defined exposing the base metal and permitting electroplating of thick conductors. The electroplating solution must be compatible with the fired film as unwanted reactions may occur between the electrolyte and any base metal additive. After electroplating the unwanted seed metal is removed leaving thick conductors in the desired pattern. The number of suitable organic compounds is almost limitless, and ligand formulations are usually proprietary. A schematic of the basic spin-on spray pyrolysis system is shown in Figure 6.13. The ligand is deposited onto a substrate

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held down by vacuum on a spinning, heated substrate. The deposit is sufficiently dry after deposition to allow for handling. Copper and gold pyrolysis processes have been have been developed as alternatives to both screening and vapor deposition. Copper has the advantage of higher conductivity but it must be plated further with nickel and gold for bonding. An additive method reported by ICI has been applied to various substrates including polished, high density alumina[6.18]. After applying the seed layer the top surface is pattern plated with copper along with through holes and ground planes. These copper traces are then overplated for the appropriate bonding process. The seed layer between the patterns is then removed. Resolution of 2 mil lines and spaces is routine on 96% alumina. Better resolution is expected on polished, high density Air-fired resistors may be incorporated on 96% alumina substrates. For lower frequencies, requiring terminations, this extends the applications of this technology. The resistor is applied first, a technique similar to thin film resistor technology, and as such, better control can be exercised over dimension and value. An SEM of a plated line on 96% is shown in Figure. 6.14. As one would expect from a plated line, the cross-section is rectangular. The smooth uninterrupted, walls are typical of fine grained, monometallic systems. Such conductors are expected to have the low losses necessary for good microwave performance.

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6.4.2 Direct Write. Additive direct writing is an emerging technology which is expected to have a major impact on the generation of thick film circuits. A typical system has three key components: Internal pattern generator to interpret designs through a link to

an external CAD system. Some systems can be taught by

digitizing.

Precision positive displacement delivery system.

Precision X-Y table, or movable dispensing head.

An intriguing feature of one system is a contour following and sensing system that permits fabrication of multilevel circuits. Figure 6.12 is a functional block diagram of a direct writing system. A CAD system work station interfaces with the writing system controller. This controller synchronously drives the ink delivery system and substrate table. The advantages offered by the direct writing systems include: Elimination of artwork, screens and associated hardware Elimination of screen inventory and storage Rapid prototype turn around Rapid design change capability Efficient small volume production Disadvantages include: Only one substrate at a time can be processed - slower than printing

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Highly trained personnel are required.

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A gold microwave circuit made by direct writing is shown in Figure. 6.16. Note the absence of screen marks, providing a smoother surface and edge. The ability to make bends and curves without concern about screen alignment makes this technology very attractive. 6.4.3 Direct Bonded Copper (DBCu). Where high power and thermal management issues are a major concern and where wide lines, in the 15 mil wide range are tolerable, DBCu may be used. In the conventional process, oxygen-free, high conductivity copper (OFHC), electronic, tough pitch (ETP) or silver bearing copper foil, nominally 5 to 20 mils, direct is used. The foil is carefully oxidized and then placed against an oxide ceramic, where it is heated to about 1065°C, about 50°C below the melting point of copper, in a nitrogen furnace. At this temperature a Cu-O eutectic is formed, and the copper bonds to the cermic. The Cirqon Corporation has adapted this concept to form semiadditive, fine line, thick copper circuits. The ceramic substrate is first plated with a thin 25 µinch layer of electroless copper. Next the coated substrate is coated with photoresist, and patterned using conventional photolithography. The coated substrate is then electoplated with copper until the plated thickness reaches 3 to 5 mils. The remaining photoresist is the stripped, exposing the underlying electroless copper. The substrate is given a light etch to remove only the unwanted electroless copper. Fonally the board is fired ina controlled atmosphere over 1000°C to create the bond between the copper and substrate. Figure 6.17 shows the two mil line and space capability of this process

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We have discussed the importance of accurately defining high quality conductors on low loss substrates. Some of the thin film deposition and definition techniques will be reviewed to see how they relate to fabricating microwave integrated circuits.

References 6.1 6.2

6.3. 6.4. 6.5

6.6. 6.7. 6.8. 6.9. 6.10. 6.11.

6.12. 6.13.

C. Brown, Circuits Manufacturing, 72-4, Oct. (1984) J. Savage Chap 3, “Handbook of Thick Film Technology,” P J. Holmes and R. G. Loasby eds., Electrochemical Publications Ltd., Ayr, Scotland (1976). H Baudry and F. Franconville, "Rheology and Printing of High Definition Thick-Film Inks", Intern. J. Hybrid Microelectr., 6, #2, December (1983) pp. 15-23 R. Bacher, "High Resolution Thick Film Printing" Proc. 1986 Intern. Symp on Microelectr., October 6-8, Atlanta (1986) pp576-81 P. McCormick and V. Ruwe, "Fine Line Thick Film Hybrids for High Reliability Applications" Intern. J. Hybrid Microelectr., 4, #2, Oct. 1981) pp428 -9 J. A. Gaglani, "Obtaining Fine-Line Geometries in Today's Hybrids" Proc. 1986 Intern. Symp on Microelectr., Oct. 6-8, Atlanta (1986) pp819-25 S. G. Stalnecker Jr., "Stencil Screens for Fine Line Printing" Electrocomp S. and Technol., 7, (1980) p.47 R. A. Vogel, "Fine Line Printing for Consumer Electronics" Solid State Technology, vol. 51, May (1972) p.51-4 Funk, W., and Schilz, W., "Thick Film Technique for Hybrid Integrated Microwave Circuits", Radio and Electronic Engineering 44, #9, Sept. (197) pp 129-38 Rickard, D.C., "Thick Film MIC Components in the Range 10-20 GHz" 6th European Microwave Conf., Sept. 14-17, Rome, Italy, (1976) pp687-91 Gondek, J., "The Possibilities of Producing Thick Film Microwave Stripline Resonators with DuPont/USA/Compositions Operating Within A Band of 4-8GHz /Design and Manufacture/" Proc. 29th Electron. Comp Conf., May 14-16, Cherry Hill, NJ, (1979) pp407-20. Anderson, E. and Olesen, S. T., "An Evaluation of Materials and Processes for Thick Film Striplines at Microwave Frequencies," Danish Research Centre for Applied Electronics February (1972) Hsu, K. F., "Thin Print Etchable Gold - An Alternative to Thick and Thin Film" Proc. 1986 Intern. Symp on Microelectr., 149 Oct. 6-8, Atlanta (1986) pp149-53

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6.14. Kani, Y. and Endo, H., "Thick-Film Photoetching Technology : Materials, Process, Applications" Proc. 1988 Intern. Symp on Microelectr.,Oct. 17 19, Seattle (1988) pp 269-73 6.15 Easson, R. M., "Thick-Film Technology for Microwave Integrated Circuits" 7th European Microwave Conf., May (1989) 6.16 M. P. O'Neill and P.Barnwell, "High Density MCM-C Utilizing Tape Dielectric and Photopatterning Processes" Proc. 1988 IMAPS MCM Conf., Denver, April (1998) 6.17 M. Ehlert and P. Barnwell, "High Density LTCC Technology, Using Photo Patterned Conductors" Proc. 2001 Intern. Confp on High Density Intercon. and Systems Pkg., Apr. 17-20, Santa Clara (2001) pp 358-63 6.18. M. Tredinnick et. al.,."Thick Film Line Patterning - A Definitive Discussion of the Alternatives" 2001 International Symp on Microelectron., IMAPS, Baltimore Oct. 7-9 (2001) pp676-81 6.19. D. B. James and T. W Dekleva, "Novel High Density Copper-onCeramic Interconnects" 1988 8th Annual IEPS Conference, Dallas, TX Nov. (1988)

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CHAPTER 7 THIN FILM 7.1 Physical vapor deposition. Physical vapor deposition (PVD) processes are atomistic deposition processes in which material from a source, is transported in vapor form through a vacuum or low-pressure gaseous environment to the substrate. Here condensation takes place and subsequent film growth occurs. PVD processes are used to deposit unalloyed or compound materials. Compound materials may be deposited by either co-deposition or by reacting the depositing material with an ambient gas environment. There are five basic PVD techniques: evaporation in vacuum, sputter deposition, arc vapor deposition, laser ablation and ion plating. Only evaporation and sputter deposition will be considered here. 7.1.1 Evaporation. The process of evaporation is a phase change as familiar to us as melting and freezing. Evaporation in a vacuum is, however, not as familiar as the two preceding samples. Two major types of evaporation techniques will be covered here, filament and electron beam

7.1.1.1 Filament. The first, filament, is the simpler form of evaporation. As a pot is used to boil water, so too, a variety of containers, shown in Figure 6.1, are used to boil materials such as aluminum by the simple expedient of passing current through a container

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to heat it. The parts to be coated are placed in line-of-sight of the heated charge. The boat is then resistively heated until the material in the container (charge) evaporates, or in cases such as chromium, silicon dioxide or carbon, sublimes. The resultant vapor condenses onto the substrate. The deposit thickness varies from a few nanometers to a few microns Figure 6.1 shows some of the filaments used in this type of evaporation. Dielectric films, because of their high melting points are difficult to evaporate. As a result, this technique is usually restricted to metals such as copper, gold, chromium and silver. Compound metals may be achieved by simultaneously or sequentially evaporating from multiple sources.

7.1.1.2 Electron beam. The basic electron beam evaporation principle is the same as filament, only the system of heating the material differs. A schematic of an electron gun is shown in Figure. 6.2. A stream of electrons, from a thermionic filament (usually a bare tungsten wire), is accelerated by a positively polarized anode and impinge on the surface of the charge, stored in a water coo;ed cavity. Heat is essentially

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constrained to the metal surface permitting more power to be applied before spitting occurs. This higher allowable power allows for the evaporation of very high boiling point materials. It should be realized that when electrons are directed through the vapor above the evaporant, some will be positively ionized and will follow a path back to the electron gun. By deflecting the electron beam 270°, the number of metal ions hitting the electron gun is minimized. A further advantage of this design, is that it will keep the gun, with its closely toleranced parts, hidden from any falling debris, which cause shorts. Many metals can be converted into their refractory analogs by introducing a reactive gas, such as oxygen into the system during the evaporation cycle. The gas reacts with the evaporant converting it to, in the case of oxygen, its oxide. Caution must be exercised, however, to insure the thermionic filament does not react with the gas forming an oxide or other refractory and fail.

A comparison of the two types of evaporation is shown in Table 7-1. 7.1.2 Sputtering This is probably the most versatile vapor deposition technique. Numerous variations exist, each with their own peculiar assets and liabilities, and the configuration is usually product specific. Some of the more common sputtering techniques are discussed in the following sections.

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7.1.2.1 DC A schematic of the process is shown in Figure. 6.3. The target is brought to a negative voltage of 3 to 4 KV. A second electrode, kept at ground, or biased to collect electrons, acts as the substrate holder. A gas, usually argon, is bled into the system and ionized by the impressed electric field.

This ionization takes the form of a luminescent cloud located between the two electrodes, much like a neon tube. An electric current is established between the two electrodes since part of the gas is now a conductor. The positive ions are attracted to the negatively biased target and the faster electrons are attracted to the anode. The positive ions impinge on the target and, like the cue ball hitting a racked set of billiard balls, dislodges atoms from the target. These atoms migrate toward the substrate holder gradually coating the substrates. As a result of the mechanical nature of sputtering, refractory substances such as Ta, W, Mo and TiC can just as easily be sputtered as those with lower melting points. Alloys are sputtered with a composition often equal to that of the target material. NiCr films are readily deposited with predictable stoichiometry, in contrast to evaporation methods where the chromium first sublimes forming Cr-rich layers followed by Ni-rich layers. To overcome this problem, dielectric materials may be sputtered using an RF technique, discussed in 7.1.2.2.

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7.1.2.2

RF DC deposition is limited primarily to targets of essentially metallic composition. The deposition of insulating materials by conventional dc presents obvious issues. Insulating targets cannot quickly drain the positive charge and as a result, build up a surface charge of positive ions on the front surface of the target. This positive sheath repels most of the positive ions, preventing further bombardment and deposition. A high frequency (13.56 GHz) actuating voltage is applied across the two electrodes. The polarization of the target is reversed so as to attract, alternatively, the positive ions which do the sputtering and the electrons which neutralize the positive surface charge. The physical appearance of an RF sputtering system is similar to that of a dc system. One major difference between systems is that RF sputtering requires impedance matching between power supply and discharge chamber. This is similar to the impedance matching requirements described earlier for ac components.

Dielectric targets have been used for direct sputtering of the dielectric. These materials are, for the most part, relatively porous, with target density sometimes only 50% of bulk[7.1]. This porosity leads to entrapped gases which are released slowly as the target ablates, in essence, a virtual leak. These gases, mostly water and air, contaminate the films, usually degrading them. Often, to insure stoichiometry, reactive sputtering is used to insure the total conversion of the target material to

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its oxide or nitride. RF sputtering is used to deposit metals as well as dielectrics. Thus it is possible in a single pump down to deposit both conductive and dielectric films. Dielectric targets have been used for direct sputtering of the dielectric. These materials are, for the most part, relatively porous, with target density sometimes only 50% of bulk[7.1]. This porosity leads to entrapped gases which are released slowly as the target ablates, in essence, a virtual leak. These gases, mostly water and air, contaminate the films, usually degrading them. Often, to insure stoichiometry, reactive sputtering is used to insure the total conversion of the target material to its oxide or nitride. RF sputtering is used to deposit metals as well as dielectrics. Thus it is possible in a single pump down to deposit both conductive and dielectric films. However, both DC and RF diode methods are limited to thermally stable substrates because of substrate heating due to electron bombardment. Also, where high throughput is required, their low deposition rates are limiting. Magnetron sputtering eliminates both these limitations. 7.1.2.3 Magnetron sputtering. It is well known that if an ionized gas is subjected to a magnetic field, the ionic density is increased throughput the area covered by the field. The Helmholtz coil, an external magnet surrounding the sputtering system, uses this principal to enhance ionization of the sputtering gas. This is due to the fact that the electronic paths wind themselves around the field lines, increasing the probability of collision, ionization. This phenomenon is shown schematically in Figure. 6.4. If the applied field, DC or RF, is concentrated near the target, and oriented so that the field lines are parallel to the target surface, secondary electrons formed during ionic collision concentrate in front of the target and enhance the ion density. For a given voltage then, the number of ions available for target bombardment increases, resulting in more atoms being ejected from the target per unit time, another way of saying the deposition rate increases. Secondary electrons formed during diode sputtering are accelerated to the anode and bombard the substrate. In the magnetron system, these electrons are diverted to a nearby end shield or anode. An important consequence of the effect of containing the electrons in the neighborhood of the target during magnetron sputtering is the considerable reduction of substrate heating. Table 7-2 compares the deposition rates of some representative metals sputtered by both conventional and magnetron methods, and Table 7-3 summarizes the advantages of sputtering.

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7.1.2.4 Reactive sputtering. Changing the bulk properties of a material is frequent difficult. However, one of the unique properties of thin films is that no matter how they are deposited, their properties can be readily changed or modified. For many applications it is necessary to tailor the electrical, mechanical and optical properties of the film. As thin film deposition is essentially non-equilibrium in nature, the film's composition and microstructure may be widely varied.

Reactive sputtering, evaporation and ion plating are the more common methods of film property modification. In these processes, a reactive gas is introduced into the vacuum chamber, where it chemically combines with the depositing film to alter the material's composition or structure. Using this technique, it is possible to deposit, for example,

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stoichiometric oxides, carbides and nitrides. In addition to changing compostion, film structure can be modfied, as in the case of the structural from anatase to rutile, by varying the partial pressure of change of oxygen in the sputtering gas[7.1].

As a rule, any impurity will increase the resistivity of a pure metal. Bombardment of metallic targets in a reactive gas such as oxygen, nitrogen or methane will generally increase resistivity. Tantalum nitride is probably the prime illustration of the ability to tailor film properties. By altering the deposition conditions, either resistor or capacitor films may be routinely deposited. The effect of nitrogen on the and TCR of tantalum films, shown in Figure 7.5 is widely known[7.2]. The resistivity curve in Figure 7. 5 includes a plateau and levels out at about with a TCR in order of -75 ppm/°C. The exact shape and displacement of both TCR and resistivity will shift depending on a number of deposition factors, such as substrate temperature, pumping speed, gas ratios and internal sputtering configuration. Reactive sputtering has also been used to deposit ruthenium dioxide resistors, which are usually screened. Jia et. al.,[7.3] deposited resistive films with controlled resistivity and TCR by varying deposition temperature and oxygen partial pressure.

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References 7.1 7.2 7.3

W. T. Pawlewicz et. al., "Recent Developments in ReactivelySputtered Optical Thin Films", SPIE Proceedings 325, Optical Thin Films (1982) ppl05-l16 Gerstenberg, D. and C. J. Calbick, J. Appl. Phys.,. 35, 402, (1964) Jia, Q. X., K. L. Jiao, W. A. Anderson and F. M. Collins, “Development and Fabrication of RuO2 Thin Film Resistors”, Materials Science and Engineering, B18 (1970) pp. 220-5

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CHAPTER 8

DIELECTRIC DEPOSITION

In addition to sputtering and evaporation, listed in Table 8-1 other methods of depositing dielectric materials are tabulated.

8.1 PE LPCVD . Temperature considerations are the major reasons for using plasma promoted CVD. Unlike thermally activated CVD, highly reactive species are generated from gaseous reactants by an rf glow discharge. Because of this, processing temperatures are 200-400°, well below the 700-1000° range normally encountered in CVD. The basic Ammonia and Nitrogen combine reactant gases Silane to form Silicon Nitride, viz; The stoichiometric considerations in these films are the Si/N ratio (0.75 theoretical) and the amount of hydrogen in the film. With

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PE CVD the stoichiometry can vary from .8 to 1.0. The hydrogen content, very much a concern is dependent on a) the reaction temperature and b) the reactant gases. Most nitride is deposited at between 350°C and 380°C, since at 400° aluminum metallization, used in silicon device technology, upon which the nitride is deposited, is degraded. At the above temperatures, the film contains about 10-18% Eliminating the ammonia helps to reduce the hydrogen to about 2%[7.1]. Kern and Tracy[7.2], studied films deposited at 275°C to 300°C. They found they were stable to ~400°C. Heating beyond this temperature may cause local blistering characteristic of stress relief of films under compression. Further heating may cause openings of these blisters resulting in the formation of small circular holes. They concluded that stress relief with outgassing of hydrogen was responsible. While it is unlikely that most MICs will see the temperatures reported, the potential for reliability problems remain. Silicon dioxide films are formed at low temperature through the following established reactions:

However, such films are inferior as capacitor dielectrics because of particle entrapment and pin hole formation. Their primary function, by themselves, or in concert with silicon nitride, is for passivation. Nevertheless, PECVD plasma is widely used and as processing technology progresses toward lower temperatures and with better understanding of the mechanisms, additional improvements in film quality will be forthcoming. One such method, photochemically enhanced CVD films shows promise [7.3]. 8.2 Anodization. Anodization is the electrochemically conversion of the parent metal to its oxide This electrochemical method as the name implies, involves making the parent metal the anode in an electrolytic cell, as opposed to being the cathode in conventional electroplating systems. The dielectric is a thin film of oxide, formed on the surface of a certain class of metals by electrolytic oxidation in a suitable electrolyte. The only metals which demonstrate this and are commercially important are aluminum, tantalum and – to a slight extent at present – niobium, but this property is also exhibited by zirconium, titanium, bismuth, and silicon, among others. Of these, titanium offers some promise as a capacitor material. When one of these metals is made the anode in the

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proper electrolyte and a constant current is applied to the electrochemical cell, an insulating layer of oxide forms on the surface, and the applied potential must therefore be increased to keep the current constant. If the entire charge passed is used in forming oxide, the rise in voltage is linear. With reasonably close electrode spacing and moderately high electrolyte conductivity there is only a small, usually negligible, voltage drop in the cell, and the measured cell voltage may be considered to be entirely across

the anodic film. The voltage at which oxidation is terminated is the socalled formation voltage ( in Figure. 7.1a). Application of a constant voltage beyond the time required to attain causes the current flowing through the cell to decay, and before terminating the process the current is usually allowed to reach a value which is very low compared to the initial anodizing current. A typical current-time plot is shown in Figure. 7.1b. The particular current value observed under a given set of conditions is called the leakage current; it may vary widely depending on the temperature, voltage, time of formation, anode material and electrolyte.

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The basic equations that govern the process may be written as At anode: At cathode:

As the oxide grows on the metal hydrogen generates at the cathode. Anodization usually employs an aqueous electrolyte, thus implied in these equations is the presence of water. There is a limit to the number of elements which can be usefully converted to their oxide by anodization. Many elements which will anodize may not form electrically useful layers. The metals that can be anodized to give useful films are listed below[7.5]. The parent metal is usually a rectifying type and is characterized by a relatively high resistance. The thinned electrode will exhibit an even higher series resistance and resistor lengths should be kept to a minimum. Circuits employing anodized tantalum films have been widely used in both monolithic[7.6] and hybrid[7.7] structures. A major advantage of metals such as tantalum is that when reactively sputtered, for example in oxygen or nitrogen, they may also be used as resistive elements. The anodic

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layer serves to trim the resistor by decreasing the cross-section of the resistive layer while simultaneously sealing it. The anodizing properties of selected metals is shown in Table 8-3

The pH of the electrolyte is critical since parts of the oxide will dissolve in very alkaline solutions (<10). Such porous films are electrically useless. We have discussed the various methods of depositing films. Defining these films to form circuitry is covered in the next section. References

8.1. 8.2. 8.3. 8.4. 8.5. 8.6. 8.7.

E. D. Weiss, Semiconductor International, July 1983 pp. 89-94. W. Kern W. and C. E. Tracy, RCA Laboratories, Princeton, NJ., unpublished results. M. C. Collett, J. Electrochem. Soc., vol. 116 #1 (1969) p 110 J. W. Peters et. al.,. Intern. J. Hybrid Microelectr., Vol. 2, No. 2,, (1980) pp. 59-69 D. S. Campbell, Chapter 5 Handbook of Thin Film Technology, p 5-17, L. I. Maissel and R. Glang eds, McGraw-Hill, NY. V. S. Aramati et. al., IEEE Trans. Parts, Hybrids and Packaging, Vol. PHP-12, No. 4, (1976).pp. 309-316, M. Durschlag et. al., 1982 IEEE GaAs Symp, New Orleans, (November 9-11, 1982) pp. 146-149

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CHAPTER 9

POLYMERS

Organic polymers are playing increasingly important roles in the realization of miniaturized electronic components. For microwave hybrids, polymers function as interlayer dielectrics, encapsulants, capacitor dielectrics and, as the glazes described earlier, as smoothing or planarizing layers. The ideal material, in addition to being easy to process and having good dielectric properties, should be compliant, yet strong. These materials, available from a number of suppliers, can be applied by spin coating, spraying and screen printing. Spin-coated and sprayed formulations, through a two-step process, can be photolithographically defined and as such, are well suited for microcircuit applications. A family of spin-on bis-benzocyclobutenes replacements in some polyimide applications has been reported[9.1]. Polyphenyl­ quinoxalines have also been reported as spin-on dielectrics[9.2]. The quinoxalines are etchable only in the cured state. The typical properties of the various polymers are compared in Table 9-1. No attempt has been made to include all the variations and properties in specific product literature, and the actual properties may vary from the published values.

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9.1

Material properties

9.1.1 Moisture absorption. Water absorption is of concern with all insulating polymers because of its effect on polymer dielectric properties and processibility. Absorption of water, with a dielectric constant of 78, increases the overall polymer dielectric constant. An example[9.3] of this effect, where the polyimide dielectric constant increases from about 3.25 to near 5, is shown for a polyimide in Figure 9.1. Water absorption of "low-stress" polyimide is lower about 0.5%, and for most polyimides, about 1%. Higher water absorption of many polymers, compared to ceramics, is one of their major disadvantages. Cyclobutenes are characterized by slightly lower dielectric constants, but more importantly, lower dissipation factor and water absorption, as are polynorbornens, making these materials very promising for microwave applications. The properties of the quinoxalines are very similar to the cyclobutenes except their water absorption is higher, closer to that of some of the polyimides.

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9.1.2 Mechanical properties. When stresses are applied, any material will deform slightly. If the period of time is short enough or the stress is small enough the deformation will disappear when the stress is removed. In this case both the strain and stress are elastic. When the stress is excessive, permanent specimen displacement occurs. The mechanical properties of many materials, including polymers, are determined in part from stress-strain curves. A basic curve is illustrated in Figure 9.2. The actual shape of the curve will vary depending on the viscoelastic nature of the polymer. Stress is the force exerted per unit area on the material. Strain the resultant dimensional change from the applied stress, is obtained by finding the change in length of the original specimen, divided by its original length. Point 1 in Figure 9.2 is the yield point. It is that point on the stress strain curve where the relationship between stress and strain ceases to be linear and is a measure of the material's strength and resistance to deformation. Point 2 is the fracture point. Between points 1 and 2 is the region where the material undergoes plastic deformation. Ceramic materials do not exhibit a yield point. Plastic deformation is minimum because of their high moduli of elasticity The elastic modulus is defined a the ratio of stress to strain. This ratio is Young's Modulus, and defined by:

Where

E = Young's modulus = stress = strain

The greater the modulus the more force is needed for polymer deformation. In other words, the modulus is a measure of the hardness or stiffness of the material. Another important 9.1.3 Glass transition temperature (Tg). characteristic of polymers is their glass transition temperature. This property was covered in detail in Section 5.5.1. If processing is to occur at temperatures above the polymer Tg, the mechanical integrity of the structure may be compromised. 9.1.4 Planarization. One of the important functions of an insulating layer is to provide a flat focal plane during photolithigraohy for the next layer. Non-planar surface architecture can adversely impact the next step, by leading to poor metallization step coverage and localized variations in photo exposure. As such it is important the polymer coating smooth out local asperites. Figure 9.3 describes the planarization of a single feature. The degree of planarization (DOP) is

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dependent on the film thickness, feature width, height and spacing. From Figure 9.3 DOP is defined by:

The larger the DOP value the better coverage and palanarzation. Cyclotene 3022 exhibits values between 90 and 95, wheras for PI 2525 the values run around 30.

9.2

Deposition

9.2.1 Spin coating. Spin coating is generally used for applying polymer films. The thickness of the spin coating primarily depends on the spin speed, although solution viscosity and solids content (concentration) are also important. Typically, the thickness of 1-8 µm films of the wet polymer can be accurately controlled. Films, 15 µm and thicker, have been achieved by spin coating. The deposition of these thick films by spin coating however, requires high viscosity solutions, low angular spin speeds and short spin times. Such conditions do not generally promote coating thickness uniformity. Thickness vs spin-speed curves for polymers generally appear similar in shape to analogous curves for photoresist. Figure 9.4 shows this for selected polymerics. The percent solids is shown in the legend. Generally spin-speed curves for each polymer product are supplied by the vendor. Generally, these curves are generated on very smooth, flat silicon wafers. Each user should generate his or her own sets of curves, particularly when using irregularly shaped and/or rougher substrates. Thicker polymer films may be obtained by multiple coating, usually with

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a soft bake between coats. Frequently, soft bake conditions determine the adhesion of the subsequent coat and must be carefully controlled. Some polyimides do not readily lend themselves to multiple coating. Perturbations in film thickness are not uncommon around via holes and other substrate openings. 9.2.2 Spray coating. To circumvent the limitations of spin coating, thicker polyimide can be deposited by spray coating. This method has the additional advantages of high throughput and the ability to coat substrates with irregular shapes and non-planar topographies. Spray coating, then, is well suited for high volume. A spray coating process has been developed at Honeywell to deposit polyimide films from 2 to 15µm thick, to an accuracy of 1µm.[9.4]

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9.2.3 Screen printing. Screen printing has been used to deposit polyimide patterns.[9.5] As with any screening process, the pattern is formed directly, eliminating the need for photodefinition and the oxygen plasma clean-up, usually required to remove the thin layers of residue remaining after development. Uncoated areas are generally clean and ready for the next process step As expected, screen printing gives poorer resolution than does photolithography. Unfilled, screened polyimides tend to flow before curing, reducing the dimensions of the open areas. Heated platens which drive off some of the lower boiling solvents during screening may reduce this somewhat. In some cases, proprietary fillers, such as silica or insoluble polyimide particles[9.6], have been used with the polyimides in attempts to improve their print characteristics. In addition to increasing dielectric losses excessive amount of filler, which remain undissolved in the polyimde matrix, contribute to increased print defect density. Another disadvantage is their opacity which makes visual inspection difficult. The standard polyvinyl alcohol screen emulsions and urethane squeegee materials are slowly attacked by the diglyme and NMP solvents used in polyimide formulations. Silicone rubber or teflon squeegees and silicone rubber emulsions can give acceptable performance. Additionally, the very high viscosity of these screenable materials requires larger than normal snap-off distances. In practice, the high viscosity polyimide may have to be diluted to reduce the stretching of the screen resulting from the high adhesive forces between the screen and substrate. A different solvent system which does not attack the screen emulsion forms the basis of a screenable polyimides[9.6]. The lactone based solvent and polyimide binder significantly reduce pinhole density and swelling of the mask emulsion, leading to improved printing and longer screen life. As an alternative, etched foil masks may be used providing there is sufficient pattern webbing for structural integrity. Metal stenciles are solvent inert and are used in direct contact with the substrate resolving the snap-off problem. The metal emulsion screens, described in the thick film section, are also inert and provide mechanical rigidity regardless of pattern size. Isolated islands are feasible since the metal pattern is directly attached to the screen. The mechanical stability of this type of screen permits the user more flexibility in choice of materials and patterns. 9.2.4. Other deposition methods. In addition to the methods described above, techniques such as meniscus and roller coating, described in Section 11.1, Photolithography, have also been successfully applied to polymer application.

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9.2 Patterning. Polymer films can be patterned by a variety of techniques. Films can be defined by wet or dry etching through a photolithographically defined mask, by direct exposure of a photosensitive polyimide through a mask or, as discussed earlier, by screening. 9.3.1 Wet Etching. The earliest and simplest approach to polyimide definition was wet etching. This process, shown in Figure. 9.4 which compares the various patterning processes, typically involves using an organic photoresist as a template for transferring the image from the photomask to the polyimide. A pattern is first defined in a negative or positive resist deposited onto a partially cured polyimide precurser, sometimes referred to as the “B” stage. The alkaline developing solution used for positive resist also reacts with the polyamic acid, forming soluble salts while dissolving the unprotected precurser. The photoresist is then stripped. If a negative resist is used, its organic developer, such as xylene, is not a solvent for the precurser and an alkaline developer such as that used for positive photoresist developing must then be employed. This indirect method is complicated by the processing steps required for applying, drying, patterning and stripping the photoresist. Alkaline agents frequently leave residues that must be neutralized with dilute acids, such as acetic acid, followed by thorough water rinsing. The rinsing removes the salt-like neutralization products. If these were allowed to remain, they could generate conductive paths around the periphery of the patterned feature. The wet-etching rate of polymers is not necessarily linear with respect to etchant concentration. The etch rate, for polyimide as an example goes through a maximum when the concentration of the etchant is between 0.25 and 0.30 Normal. Coincidentally, a 1:1 dilution ratio of Shipley Metal-Ion-Free developer with water is 0.27N. One major limitation of wet-etching, not only of polyimides, is the low aspect ratios (thickness/width) of the patterned features. Another possible drawback of wet etching is that, with the exception of hydrazine based etchants and hot concentrated caustics such as sodium hydroxide, polyimide must be partially cured. This process is somewhat difficult to control. Since the degree of partial curing determines the etch rate, it follows that exact etch rates and pattern geometries are hard to reproduce. Lastly, film shrinkage, which may be as much as 50%, may cause further loss of resolution and/or localized cracking due to stress. 9.3.2 Dry Etching. Many of the limitations of wet etching are surmounted using dry processes such as oxygen plasma etching and reactive ion etching (RIE). In these processes, which will be described in more detail later, patterned, masked substrates are placed on an electrode and are bombarded by a beam of reactive ions such as or inert gas

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138

ions, such as The etching reactions are initiated by accelerated ions that perpendicularly bombard the film surface. These processes can produce features with nearly vertical side walls in fully cured polyimides. Dry-etching is more reproducible than wet etching as process parameters such as gas composition, flow rate, system power and pressure can be both varied to attain optimum etching characteristics and accurately monitored. Reactive ion etching is the most common dry-etching process for polyimide. The polyimide is usually etched in a mixture of oxygen and a fluorine containing gases such as or As with wet-etching, the etch rate is non-linear with respect to reactant concentration. Investigators have found the maximum at about 20% or 60% [9.9] The sidewall taper can also be adjusted by controlling the flourine concentration. Tapered sidewalls are desirable for good step coverage of second level metal. When standard positive photoresist acts as an etch mask for polyimide it etches in an oxygen or oxygen-fluorine plasma at approximately the same rate as the polyimide, (i.e., selectivity is 1:1). Because of this, control of feature definition is hard, and more importantly, high aspect etch ratios (height-to-width) are difficult to attain since the resist is usually thinner than the polyimide and is etched away before the opening is completely free of polyimide. The unprotected polyimide, as well as the material in the openings, is then etched. By applying additional photoresist and redefining as often as needed, higher aspect ratios can be achieved, but at additional time and expense. To circumvent this problem, inorganic masking layers that have significantly slower etch rates than the polyimide are used. These inorganic masks may be metallic, e.g., titanium, molybdenum or aluminum, or non-metallic, e.g., plasma deposited[9.9] or spin-on [9.10] silicon oxides or aluminum-chelate[9.10] compounds. 9.3 Photosensitive polymers. The process complexity of the indirect patterning methods can be greatly reduced using photoimagable polymides. In principle, polymer precursers can be directly patterned with conventional lithography, as shown in Figure. 9.5. Most of the commercially available photosensitive polyimides are negative acting. Exposure to UV light crosslinks the polymer limiting its solubility in the developer. This solubility differential forms the basis for patterning, akin to conventional negative working photoresist. Most of the materials on the market are based on Rubner’s work[9.12]. He and co-workers, in a series of papers beginning in 1976 described the preparation of thermally stable polymer precursors containing photoactive groups covalently bound to the polymer backbone . Their precursor was based on the PMDA-ODA chemistry described earlier in this section. Based on this work a number of licensees

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developed their own formulations and photoinitiators. Hitachi and Toray developed their own technologies. However, all these early attempts were plagued by short shelf life at ambient conditions (as short as two weeks), poor photospeed and cracking during development[9.13]. Since the mid-80’s improved properties including longer ambient stability and substantial increases in photospeed have resulted from better manufacturing control and improved backbone chemistry. Presently the main limitations of the negative acting polyimides are lower resolution and aspect ratio of the patterned features. Thermal stability of the cured polymers is poorer than that of the positive acting types. The pattern resolution for positive features, (mesas) is usually better than for negative features (vias). Fortunately, patterning of positive features such as crossovers and capacitor dielectrics is more prevalent with microwave hybrids. The resolution of negative features is limited by swelling during development, and in some cases, by a large amount of shrinkage which can occur during the high temperature final cure. The thickness that can be patterned in a single step is limited because the polyimide is strongly absorbing at 365 nm (I-line). This limits the depth of cross-linking and causes profile narrowing near the bottom of a positive feature. The underexposed regions of the film exhibit higher dissolution rate in the developer solution causing undercutting[9.14]. A positive sidewall taper is necessary for good metal step coverage. A negative sidewall taper can be expected to generate step coverage problems including opens. The magnitude of the attenuation of the UV radiation, particularly at 365nm, is strongly dependent on the film thickness. This problem may be mitigated somewhat by filtering the 365nm light using a yellow filter such as Corning CS-34. In a pertinent paper, Clatterbaugh and Charles[9.l5] focussed their evaluation on the use of polyimides on alumina substrates. They statistically determined the process conditions necessary for multi-level via structures, interdigitated capacitors and various transmission line structures. They concluded that additional process development was necessary to optimize the resolution of via-holes and more importantly, fine line geometries, particularly for thick (20-30 µm) film. For microwave hybrids, the thickness for most applications is under 6µm. This is well within the single layer exposure capability. Unfortunately, most of the reported effort has been directed toward the fabrication of via holes for multi-level, multi-chip applications. Hopefully, technologists will begin optimizing these materials as positive features. The preparation of a polyimide has been reported[9.16] that is intrinsically photosensitive, so that direct, positive photoimaging can be accomplished, even after complete thermal curing. In addition to being photosensitive after curing, which may turn out to be a liability, positive acting films do not normally exhibit the solvent swelling exhibited by negative acting polyimides, simplifying patterning. Positive working

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polyimides have been prepared from diamines and diacid chlorides[9.17]. They found that prolonged exposure to the developer (~2-4% KOH) did not change the thickness of the unexposed polyimide. This allows wider process latitude and suggests moderately concentrated alkali can be used for processing without concern for attack on the polyimide. Lines and spaces down to 6µm were demonstrated in a 2µm thick film.

References 9.1. 9.2. 9.3. 9.4.

9.5. 9.6. 9.7 9.8 9.9.

9.10. 9.11. 9.12. 9.13. 9.14. 9.15. 9.16. 9.17.

P. H. Townsend et al., Proc. 1989 Intern. Symp Hybrid Microelectron., Baltimore, MD, ISHM (1989) pp447-53 L. Verdet et al., Electronic Packaging and Techn., Jan. (1991) R. J. Jensen IEEE Trans. Components Hybrids Manuf. Techn., CHMT-7, #4, (1984) p384 JR. J. Jensen “Polymers for High Technology: Electronics and Photonics”, M. J. Bowden and S. J. Turner, eds., ACS Symp, Ser. 346 American Chemical Society, Washington DC (1987) chap 40. D. B. Powell Proc. 1985 Internat. Symp on Microelectron, ISHM, Nov. 11-14 Anaheim, CA,)1985) p308. K. Yamaguchi et. al., Proc. 36th IEEE Electronic Components Conf. (1986) pp 340-44 H. Nishizawa et. al., IEEE Trans. Comp Hybrids and Manuf. Techn., VOL. 13, #4 (1990) p775 M. J. Rutter, Microelectr. Mfg. and Testing, 29, February (1990). G. Turban and M. Rapeaux, J. Electrochem. Soc., vol. 130, (1983) p2231 C. H. Ting et. al, Semicond. Int., vol. 82, February (1985). J. Gobrecht and M. Rossinelli, extended abstr. Electrochem. Soc. Fall Meet., vol. 84-2, Electrochemical Society, Pennington, N J, (1984) p 374 R. Rubner, Siemens Forsh. u. Entwickl.-Ber., vol. 5, #2 (1976) p92 In English. T. E. Wood and W. R. Grodner, 1984 Kodak Microelectronics Seminar Interface (1984). K. K. Chakravorty, et. al., J. Electrocem. Soc., vol. 137 (1990) p961 G. V. Clatterbaugh and H. K. Charles Jr., Proc. 1988 Intern. Symp on Microelectronics ISHM, Seattle, WA, Oct. 17-19 (1988) p 320. J. A. Moore and A. N. Dasheff, Chem. of Materials, vol 1 (1989) p163 S. Kubotta et. al., J. Electrochem. Soc., vol. 138, #4 Apr. (1991) pl080

CHAPTER 10 PROCESSING STRATEGIES Fabrication of circuitry generally requires either the addition and/or the removal of one or more layers, by patterning and forming the desired circuitry. The four major techniques; subtractive, semisubtractive, additive and semi-additive are summarized in the Table 10-1.

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CHAPTER 11 PHOTOLITHlGRAPHY 11.1 Photoresist. For microelectronics hybrids UV sensitive resist is by far the most often used and it appears will continue this way in the foreseeable future. Exposure sources for these materials must be able to generate significant amounts of UV radiation. The most common lamp is the short-arc mercury. These lamps consist of two tungsten electrodes – an upper cathode and a lower anode - along with a small amount of mercury, all sealed in a fused silica envelop At ambient the mercury lamp has an internal pressure of about 0.3 atm., and 30 to 40 atm. when operational Obviously, it is important to handle these lamps with care, including keeping them scrupulously clean during installation.

In the mercury lamp shown in Figure 11.1 an arc is first created to vaporize the mercury. Electric current between the two electrodes then excites the electrons in the mercury vapor. Light over a wide spectrum is generated when the electrons relax from their excited state to the ground state. Emission occurs in distinct wavelengths specific to the substance involved, in this case mercury. Figure 11.2 is the intensity spectrum of the commonly used mercury arc lamp It encompasses the

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wavelength sensitivities of both positive (g-line) and negative (i-line) resists.

There are two types of photoresist; positive and negative acting. In principle, both types are uniformly applied to the substrate surface, Figure. 11.3a. The photomask with opaque and clear areas is brought into proximity with the photoresist surface, Figure. 11.3b. Substrate warp and surface asperities from laser slag or metallization defects, for example, do not permit contact. A 1/2 to 1 mil separation is usually sufficient to permit accurate resolution without damaging resist or mask. With the photomask in place, the photoresist is exposed to a UV source, Figure. 11.3c. It is at this point that the differences between negative and positive photoresists become apparent. For positive acting resist, the areas under the clear area on the mask undergo a chemical change that renders the resist soluble in the developer, usually an aqueous alkali. During developing, the exposed areas dissolve leaving the patterns shown in Figure. 11.3d. The opposite reaction occurs with negative resist. The resist below the clear areas in the mask, undergoes chemical change that render it insoluble. Thus, when immersed in a developer, usually an aromatic organic, the exposed areas remain, while the unexposed areas wash away, Figure. 11.3e. The circuits can then be plated or etched.

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There are a number of ways to apply photoresist. These include: Spin On

Spray

Laminate (Dry Film)

Roller Coat

Dip

Before discussing resist deposition methods, it would be of interest to compare liquid and dry-film types. Both types are used for many imaging applications in the hybrid arena. As with any product, there are advantages and disadvantages to each. Liquid resists are generally used where etch factor and edge acuity are more critical. Dry-film lamination is becoming more widely accepted for flat panel displays, large boards and increasingly, for inner-layer production. Table 11-1 compares the positive and negative attributes of each. In this table, the consumable costs have been deliberately ignored, as these are determined by production factors.

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Dry film resist is supplied between two protective layers, one of which remains on the film throughout the imaging process to protect the film from damage. As such, the UV radiation must pass through this film, typically, 0.001", increasing the separation between mask and substrate. The resist is supplied in thicknesses from 0.0004" to 0.004" to suit the fabricator's needs. 11.1.1 Spin coating. Spin coating is the prevalent method of applying photoresist. The photoresist is dispensed in liquid form onto the substrate held by a vacuum chuck. The chuck rotates at high rpm. (typically 2-5K rpm.), leaving a thin (1-7 µm) layer of resist on the substrate. The thickness is controlled by the viscosity, resin solids content and spin speed. Less than 10% of the applied resist remains on the substrate. As a result this technique, while possibly the simplest is the most costly from a materials usage point-of-view. When building up layers by electroplating that are thicker than the resist, there is a tendency of the plating to grow laterally as well as vertically. An example of this is shown in Figure 11.4a where the gold plating has begun to widen over the resist layer. When the resist is removed, an overhang or mushroom is created such as the one shown in Figure 11.4b. For best optimum microwave performance, the conductor should be rectangular, with slightly rounded edges at the top It is therefore important to use resist a thickness greater than the final conductor height, if this overhang or “shelf ” is to be avoided.

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Microwave circuits frequently require that transmission lines be brought out to the circuit edge. Spin-on resist methods frequently have a meniscus built up the circuit edge, Figure. 11.5 To completely develop out this thicker layer, the exposure time must be increased to compensate for the additional resist thickness by as much as a factor of two. This exposure increase affects the dimensions of other circuitry, resulting in unwanted pattern narrowing or widening, depending on the resist used (positive or negative). Maes, et al[11.1] investigated the influence of spun-on photoresist thickness on gap widening, on smooth and rough to 17µ”) substrates. As expected, the gap widening on optically polished surfaces is minimal, since the reflected beam is virtually collimated with little broadening. Underexposure with short overexposure of thicker resists result in wider line broadening than thinner resists. This was attributed to the longer length of travel between top and bottom resist surfaces of the reflected UV energy. The surface texture of the alumina surfaces diffusely reflects the incident wave resulting in broadening of the

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gap Their curves are reproduced as Figure. 11.6. They also concluded that overexposure is necessary when a meniscus is formed around the substrate perimeter.

Another problem encountered in using spun-on resist is edge coverage of the substrate with resist. This can effectively mask the edge during the electro-deposition of wrap-arounds or inhibit etching of the edge metallization, causing shorting to ground. 11.1.2 Spraying. Spraying has been used to some extent in microelectronic applications. Because the parts are static, no residual stresses in the coating are encountered as in spinning and the meniscus problem is significantly reduced. A uniform spray coating is produced by indexing the parts under an oscillating spray gun. The resist, either negative or positive, is delivered to the part by pressurizing the gun. Large and irregularly shaped parts are easily and uniformly coated. However, the carrier gas must be strictly monitored as excessively rapid evaporation of solvents from the resist can cause "orange peel" on the substrate surface. 11.1.3 Roller coating. Roller coating uses a conveyorized system shown schematically in Figure. 11.8. This system is similar in principal to the equipment used for tape cast ceramics, as both systems employ a doctor blade to determine the coating thickness. Adjustments are critical, however, to maintain coating uniformity. Changes in resist viscosity and

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ambient conditions rapidly effect thickness changes due to solvent evaporation. This system does have several advantages. Waste is minimized compared to losses in spin coating, which frequently reach 80­ 90% if the substrate is flooded, and 50% or more with many spray applications.

11.1.4 Meniscus coating. Meniscus coating is a variation of roller coating, described in section 11.1.3. When a coating material is forced under pressure through a curved and uniform permeable structure with a sloping surface, a downward laminar flow of the coating is established on the outside of the sloping surface. Menisci of the coating are established at both the leading and trailing edges of the coating in contact with the substrate. In practice the coating is applied to an inverted substrate from beneath. This arrangement reduces the deposition of dirt onto the wet resist.

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In practice, the resist is introduced into a tubular storage container with pores or a slot at the top of the tube. The resist, under pressure, is forced up against the substrate. In most systems, the substrate traverses over the applicator opening, but some work has shown that moving the applicator works as well[11.2].

11.1.5 Electrodeposited. Electrodeposited resists[11.3, 11.4] involves the migration of electrically charged polymers called micelles toward an oppositely charged electrode (metal coated substrate) at between 150 and 250 volts. Depending on the design polarity of the resist, they may be either cathodically or anodically deposited. The resist completely coats the entire conductive surface, including vias, scratches and other surface asperities. The process is self limiting. At some finite thickness the insulating resin becomes a barrier to further charge transport and the

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process stops. Resist thickness may be varied by changing bath temperature and application voltage. The nominal thickness of positiveacting resist is 10µ with an exposure resolution of 5µ, and negative-acting materials may be deposited between l0µ and 35µ capable of resolving of about 25µ . It is important to be aware of the fact that some copper dissolution from the substrate copper metallization occurs (similar to copper dissolving from copper anodes during electroplating). This dissolved copper can be chelated by the resist, forming a complex that is poorly soluble in the developer[11.4]. Variations in concentration of this chelated ion can cause problems in development rates. As such, very thin layers, typically 0.1µ thick, frequently used for semi-additive processes may be attacked and thinned. The preferred imaging wavelength range is less than 365nm, and iron doped, medium pressure mercury lamps are recommended for optimum imaging speed. 11.1.6 Dry film. There are two types of dry film and each deserves special mention. Both are applied the same way, although the equipment requirements vary slightly. Figure 11.9 is a schematic of a typical photoresist laminator. The heater is optional as is the use of the bottom roll. A comparison of negative (solvent and aqueous developing) and positive (aqueous developing) dry film resists is given in Table 11-1. From this comparison, positive types have better resolution, attained however, at the expense of exposure time and chemical and thermal stability. Dry film resists do not coat the substrate edge as do spun-on and are ideally suited for wrap-arounds and circuitry brought out to the substrate edge. Dry film resists, by design, “tent”. By this is meant the continuous covering of holes, such as vias by the resist during lamination. Dry film resists are applied as a continuous film, maintaining their integrity over holes up to 0.40 inches. The obverse side of the substrate must also be coated to prevent any reacting solution from entering the hole. In effect the hole is sealed off from further processing. However, when it is necessary to apply additional resist over thickly plated lines, closely spaced, or multi-level structures with sharp edges, these resists tent over, leaving either voids or very thin resist at the pattern edges which may develop out during the processing, leaving critical areas unprotected during subsequent processing. The laminating rollers also apply higher pressures to high points on the substrate, thinning both resists. Spun-on resists, on the other hand, coat the hole interior, precluding any plating or etching. The positive acting resists will cover holes such as vias preventing unwanted plating or etching.

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Dry film resist thickness for microwave electroplating is typically between 12 1/2 and 25 µm. This permits the processing of thick plated deposits with straight walls. A 10 µm wide slot in 12 1/2 µm positive acting resist is shown in Figure 11.11. While the resolution of negative acting dry film resists is not as good as the thinner, positive or negative spun-on types, they nevertheless retain sharp geometries. A 71/2 µm thick electroplated line, is shown in Figure 11.12. Note the sharp walls and square geometry. Conductors can be formed up to almost 12 µm with minimal loss of rectilinearity. To the best of this author’s knowledge the additive processes described in the thick film section all used dry film resists.

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11.1.7

Dip coating

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Dip coaters, Figure 11.10, operate in three general modes: Batch - a number of substrates are collected into a hanger arrangement, which is immersed in a resist reservoir and extracted in a controlled manner before drying. The hangers are then transferred through an air dry and optional heated dry cycles. The coated substrates are then unloaded and stored. Continuous - substrates are individually loaded onto a continuous chain drive, immersed in a resist reservoir, then transferred through air dry and optional heated dry cycles. The coated substrates are then unloaded and stored. Reel to reel - for flex materials, a reel to reel process,

instead of the continuous chain, may be used. The resist must

be dry before it loads onto the take-up reel. Further, the

tension on the take-up reel must be minimized to reduce resist abrasion during winding and storage. The viscosity of the resist in the reservoir must be closely monitored because of solvent evaporation

Once the photoresist is applied it must be exposed through a mask to obtain the desired pattern for subsequent processing. A comparison of photoresist application methods is shown in Table 11.2.

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156

11.2

Artwork and masks The process of forming an image invariably distorts the image to some degree. The amount of tolerable distortion depends on the image dimensions and geometry. For example, a half mil (12.5 µm) opening in a 10 mil (254µm line may be acceptable, but would be catastrophic on a 1 mil (25µm). Mask defects will be directly replicated in the photoresist. The phototool may not have sharp delineation between clear and opaque areas. Some of the image deterioration arises from other factors such as contamination between the mask and imaging surface which inhibits or prevents transmission of UV from the lamp to the imaging surface. Other factors include variable spacing between the phototool and imaging surface where reflections from the substrate surface may cause resist over-exposure A critical step then, in the manufacture of microwave circuits, is the fabrication of the artwork and masks. Regardless of the technology involved, thick or thin, additive or subtractive the artwork and masks ultimately determine circuit yield, performance and ultimately cost. Microwave engineers using CAD systems frequently find that difficulties are not so much with optimizing computer aided designs but with the realization of those designs into accurate, usable artwork. Poorly executed tooling cannot be compensated for with the skills of the process team. The techniques for fabricating artwork have involved from elementary cut and tape to sophisticated computer-assisted direct-write systems. An historical overview is presented in Table 11-3.

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Hand cutting and taping sufficed with the early circuits which operated at low RF frequencies. As circuit geometry became more complex and lines and spaces shrank, it became necessary that to reduce errors, more accuracy and magnification other than 1X were needed. One way around the problem of hand working is the use of the manual coordinatograph. This machine was developed by the Swiss for cartography about 60 years before the electronics industry adopted it for artwork generation. Manual coordinatographs are very precise X-Y positioning systems, usually a flat bed with backlighted glass surfaces. Many are rotatable permitting the drafting of angles and polar coordinates. The cut and peeled artwork master, usually 10X or 20X, is mounted onto a back lit platen. The lighted areas are focused through a reduction lens, exposing a halide emulsion on the mask. The mask is then developed into either positive or negative tone.

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The automation of the coordinatograph was a major advance in artwork generation. These are essentially motorized versions of the manual type with a sophisticated controller that aids in the drafting, and more importantly, editing the pattern information. They can either stand alone or be interfaced with larger CAD systems. Present day microwave hybrids frequently include resistors, capacitors and crossovers each requiring its own mask level. Accurate alignment of each level is important and must be checked in the layout stage; CAD systems fulfill this requirement. Entire circuits or parts can be reviewed and revised before any artwork is committed. Once the layout has been approved, the CAD system can be used to drive a coordinatograph, photoplotter or direct exposure system. Photoplotters are precision devices which move a flashing light source exposing the film under it. The beam of light is projected through any of a series of computer designated apertures to attain the desired pattern. Special apertures can be made up for repetitive components, such as inductors or couplers, reducing system run time. Large areas are “painted” in with a large aperture. After developing the exposed film, the resultant pattern is reduced, or if already at 1X magnification, used as is. An adaptation of the IC pattern generator is the direct write system. These machines, like photoplotters, work by flashing, either a rectangular or circular shape, directly onto a glass mask or a resist coated substrate. The exposure illumination may be either UV or laser deep UV. Like photoplotters, the database is transferred from a CAD system. Economic considerations, price/performance ratio, circuit needs and the availability of contact services determine the system choice. Table 11-2 compares the various artwork generating systems. Once the artwork is completed, mask fabrication is the next critical step The type of mask used will be determined by substrate size and type, aligner capacity, length of run and number of circuit levels. Masks should meet the following criteria for maximum performance: Dimensional stability

High contrast at critical exposure wavelengths

Low defect count

Long print life

Physical resistance to mechanical abrasion

Resistance to cleaning agents

Most hybrid aligners are limited to 5x7 masks but some can accept 8x10 masks. Exposure units for clad substrates can typically accept masks for 18 x 24 inch substrates. Hard substrates for microwave applications rarely exceed 6 x 6 inches so comparably smaller masks are

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adequate. Film masks are generally used for clad substrates and screens.

For the major fraction of hybrid work, either glass or polyester film masks may be used. Figure 11.13 shows the percent transmission in the UV range for polyester, glass and fused silica. All the materials are suitable , with the polyester base starting to absorb wavelengths slightly under 365 nm. Fused silica, sometimes called quartz, maintains its high transmission characteristics into the deep UV and is well suited for KrF laser imaging at 248 nm. Pin registration mask fixtures have been available for many years. This equipment uses spring or hinge mounted systems as shown in Figure 11.14. Either glass or film masks may be used. Ceramic substrates are aligned to three fixed pins and either pre-drilled glass masks or prepunched film masks are placed over placed over fixed or adjustable pins. The masks are then aligned to the substrate. Alignment of PWBs involves first precision punching the boards. Alignment holes in prepunched film masks or drilled glass masks line up with the pre-punched holes in the PWB substrates. The mask and substrate are aligned by placing board and mask over pre-aligned pins in the mask frame. The pin positions are used to register sequential substrates. Registration accuracy depends on overall drilling tolerances. Front-to-back alignment tolerance for clad substrates and/or multilayer boards is typically

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For short runs, emulsion masks, both glass and film, suffice. From Table 11-3 which compares the various mask types, note that these are extremely difficult to clean. Chrome masks, are easier to maintain and should be used for longer runs. Aluminum masks are used for laser exposure since the chrome is ablated at the laser wavelengths, while aluminum is not. For thin film multilevel circuits, where alignment to the previous level is important, “see-through” iron-oxide masks are most practical. These are normally supplied as blanks coated with thin positive photoresist. Contact prints are easily made by photoexposure and etching the iron oxide.

11.3

Exposure Microwave structures, as we have seen, frequently require thick, narrow conductors with rectangular cross-sections. The conductor edge and the top surface are important as well. This reduces to the fact that photo definition of the circuit is inextricably related to the resolution and stability of the photoresist used to delineate the pattern. This applies to thick as well as thin films since one technique for improving the definition of screened films is the photoetch process. Two types of exposure units are in general use; collimated and non-collimated.

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11.3.1

Non-Collimated In these systems light is generated in a flood mode. Noncollimated systems, in contrast to collimated light, use contact printing to mitigate variations in illumination angle. The type of reflector employed determines the imaging system classification. The flood reflectors described below are also called scattered light.

11.3.2 Large flood These sources, Figure 11.15 make use of a reflector which is approximately the size of the exposure area and extends almost to the imaging surface. Their primary purpose is to maximize the light intensity over the exposure plane while allowing for a high degree of intensity uniformity. 11.3.3 Short flood These sources also called point sources, Figure 11.16, use a reflector significantly smaller than the exposure area, and are located approximately two feet from the image plane. While less costly than larger flood types, the point source is less efficient in illuminating the

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image area. By improving the reflector design in conjunction with changes in lamp design, 1 mil lines and spaces have been reported.

11.3.4

Collimated For years the PWB industry has relied on contact printing to provide circuits with the required line and space definition. With increasing demand for higher interconnection density and improved line quality, laser direct imaging is emerging as an alternative to phototooling for fine-line applications. This combined with thinner copper layers and resists is providing lines and spaces of 1/2 mil(12.5µ). Collimated light, using laser or mercury lamp sources produce very high resolution images. Patterns requiring accurate and precise dimensions less than two mils (50µ), such as thin films, photo-etched thick films and high density PWB's generally require the use of Collimated light. Figure 11.17 is a schematic of a collimated source. The reasons for using collimated light include: High intensity increases accuracy Short exposures translate to higher throughput and lower operating costs Uniform declination angle results in more accurate pattern replication Controlling collimation maximizes resolution by minimizing undercutting in photoresist

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More precise process control is expected because of excellent exposure uniformity over entire exposure area. The mask may be eliminated entirely by rastering the laser beam over the photoresist, directly patterning the substrate. Some of the limitations to this process include: higher capital expense, lower power and higher sensitivity to dirt particles. The various exposure systems are compared in Table 11-4 [11­ 4]

11.3.5

Laser exposure In recent years laser direct-write (LDI or maskless) imaging has been used to eliminate some of the traditional limitations of exposure masks. These newer systems typically employ a raster driven focused laser beam, which directly exposes the photoresist one pixel at a time. In order to take advantage of the spectral sensitivity of common photoresists, an argon-ion laser source is employed. Recently systems using UV lasers which expose conventional resists in the 350 to 370 nm range have appeared. In principle, a computer driven, virtual phototool is created, directly transferring the desired pattern onto the photoresist on a circuit board. A schematic of a system is shown in Figure 11-18.

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Besides replacing the conventional mask exposure and development systems with the laser direct-write system, other processing steps remain the same. An alternative approach utilizes the laser to ablate previously exposed resist in selected areas. This permits the production of fine line features, as narrow as l0mµ , after conventional mask exposure of larger features.

Laser projection imaging (LPI) systems combine the advantages of high resolution and batch imaging made possible with optical projection. Laser projection systems are capable of simultaneously exposing millions of pixels allowing for higher throughput compared to LDI. Figure 11.19 represents an LPI system[11.6] where the panel and mask are congruently mounted. Eximer laser illumination illuminates the mask from below in a hexagon-shaped pattern by an all refractive projection system. With the mask and panel locked with respect to each other, the stage executes a serpentine scanning motion, transferring the mask image onto the photoresist coated substrate. Consecutive

165

hexagonal scans are partially overlapped to provide a seamless and uniform exposure over the panel. With only one moving part (the stage), the system is reliable and robust. Figure 11.20 shows exposures made with and LPI system in dry film and liquid resists. 11.21a are 36µm (1.5 mil) lines and spaces imaged in 30µm (1.2 mil) thick MacDermid MI 112™ negative dry film resist. 11.21b are 10µm (0.4 mil) lines and spaces imaged in 13µm (0.5 mil) thick AZ Clariant 9620™ positive liquid resist. The system used was an Anvik HexScan 2100 SPE™.

166

167

References 11.1. J. J. Maes et. al., "Thick Photoresist Patterns for Selective Electroplating" Microelectronics and Reliability, vol. 17, (1978) pp. 325-332 11.2 A Krause and E. Kamen, "Meniscus Coating for Packaging Substrates" Advanced Packaging, May (1998) pp40-3 H. Nakahara, "Electrodeposition of Primary Resists" Electron. 11.3 Pkg. and Prod. Feb. (1992) pp66-8 11.4 C. F. Kahle et. al., A Unique Positive-Acting Electrodeposited Resist for Advanced Packaging Applications", CircuiTree Aug. (1996) pp28-35 11.5. B. Ohlig, “Lighting Equipment and Fine-line Production ”, Printed Circuit Fabrication, vol. 19, #1, Jan. (1996) pp. 32-3 11.6. K.Jain, "Large Area, High Throughput, High Resolution, Lithography System for Flat Panel Displays", Proc. SPIE, vol. 3331, (1998) p197

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CHAPTER 12 ELECTROPLATING 12.1. General. Certain chemical reactions are spontaneous producing electrical energy under proper conditions. An everyday example is that of the storage battery. Other reactions require the addition of electrical energy to proceed. When electric current is used to generate chemical change, the process is called electrolysis. One such example that quickly comes to mind is the separation of water into its component parts with the application of electric current. For hybrid circuit fabrication a more practical application of electrolysis is electroplating. The shaded areas in the periodic table, Figure 12.1 show which metals have been electrodeposited from aqueous solution. The circled elements are those most frequently used for microwave hybrid technology. The cross­ hatched areas show those elements which may be anodized in aqueous solution. Of these only tantalum, and much less frequently Al, are commercially important. Under proper conditions, electroplating can provide high aspect ratios, dense packing and faithful pattern reproduction.

In addition to the requisites for electroplating discussed in chapter microwave circuits demand: 1, A conductive surface Good resist adhesion – to insure sharp edge definition at the substrate-conductor interface Through resist development and wash-out Plating solution must have easy access to recesses including vias Compatibility of plating solution with resist - to minimize bath and deposit contamination Uniform land and void areas – to maximize uniform current distribution.

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In its most basic form, an electroplating cell, Figure 12.2, consists of an anode, a cathode, metal ions in a conductive solution and an external source of electricity. The electrochemical deposition of a metal onto a conductive substrate involves passage of electricity through the conductive solution to provide sufficient energy to cause an otherwise non-spontaneous oxidation-reduction reaction to occur. The electrochemical deposition of a metal onto a conductive substrate involves passage of electricity through the conductive solution to provide sufficient energy to cause an otherwise non spontaneous oxidationreduction reaction to occur. Metal ions in solution receive these electrons and become neutral metal atoms which then leave the solution and deposit as metal onto the cathode. The relationship between the weight of material deposited and the various plating parameters can be stated by: 1. The weight of the deposit is proportional to the amount of current passed. 2. The weight of material deposited by the same quantity of electricity is proportional to the electrochemical equivalent, E.

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Gold, for example, is 2.043 mg/C, Copper 0.329 mg/C and Nickel 0.304 mg/C, where C = Coulomb Expressed as an equation: where: T t J E

= = = = = =

thickness of the deposit, mg time, seconds current density electrochemical equivalent current efficiency – ratio of actual/theoretical weight deposited density of deposit,

The plating bath generally consists of the basic electrolyte plus additives. Each component has a specific function in controlling the nature of the deposit. Electrolytes for electronics’ plating generally consist of a metal plating salt in an aqueous conducting solvent. There are generally three types of additives included in most plating baths, divided into three categories - suppressers, brighteners and leveling components. Unless carefully controlled, additives generally result in undesirable effects. Certain materials, used in small amounts and carefully monitored, lead to smoother, brighter, leveled or lower stressed deposits. There are several general classes of electrolytes used for electrolytic copper deposition, defined by the predominant copper counter ion, including: cyanide, fluoroborate, pyrophosphate and sulfate based systems. Sulfate based systems are most commonly used in several industries owing to their low cost, convenient operation, safety and ease of waste treatment. In semiconductor applications, acid copper sulfate systems are among the first examined for interconnect deposition. The acid copper sulfate system typically consists of copper sulfate, sulfuric acid, chloride ions and proprietary organic additive(s).

12.2 Inorganic additives. Copper sulfate is the initial source of copper ions in solution. The copper content in solution is maintained by a coulombic equilibrium set up between the cathode, where plating occurs, and the anode. The anode is typically made of the same metal as is being plated, in this case copper and acts as an ion source. During the course of the reaction, copper atoms at the anode are oxidized to cupric ions and dissolved into the bath, while copper ions are being reduced to copper metal at the cathode surface being plated. (100% coulometrically efficient anodic dissolution of the copper anodes.) The cupric ions from the copper sulfate contribute to solution conductivity. The copper anodes must contain phosphorus (0.02 - 0.08% by weight) and are oxide free.

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Phosphorus acts to retard the undesirable dissolution of the anode, and is necessary to maintain controlled anode corrosion. Sulfuric acid also contributes to the overall solution conductivity, reducing anode and cathode polarization. Insufficient sulfuric acid concentration can adversely affect deposition uniformity and throwing power, which is. A system without sulfuric acid would yield quality deposits only at very low current densities, much lower than would be acceptable in a production environment. At higher current densities, this lack of free acid would yield spongy deposits due to an increase in pH at the cathode film. The reduced efficiency at the cathode interface create conditions conducive to hydrogen embrittlement where occluded gas molecules adhere to the metallic surface and contribute to reduced electrical and physical properties. Chloride ions reduce anode polarization and help refine the deposit morphology. When consumable (copper) anodes are used, chloride ions aid anode corrosion, setting up a uniform and adherent anode film. Excess chloride can result in increased anode polarization, thereby inhibiting proper anode dissolution. Additionally, Cl ions interact with carriers (see Organic Components) to suppress the plating reaction. In general, increasing the acid to copper ratio will improve throwing power and uniformity, although the operating current density may have to be reduced. Excessive concentrations of sulfuric acid can reduce cathode efficiency. 12.3 Organic Additives. Proprietary additives are used to further refine deposit characteristics. An acid copper sulfate system operated without additives typically yield deposits of poor physical properties. Organic additives are employed to improve grain refinement, throwing power, leveling and brightening of the deposit. Generally there are three basic types of additives used in acid copper plating. These include carriers, brighteners and levelers. Carriers, also called suppressers, are large molecular weight polymers that in the presence of Cl ions slow down the rate of copper plating by adsorbing onto the substrate surface. This results in more plating nuclei per unit area which cause the deposit grain size to be smaller than that obtained without carrier. Smaller grains give a more uniform plating quality and denser copper structures as plated, but it does not have a bright surface quality. Brighteners are typically small molecular weight sulfur containing compounds that increase the plating reaction by displacing adsorbed carrier. The adsorption of the anodic brightener occurs preferentially at points of low charge density, typically occurring in surface recesses, through-holes and bottoms of vias or trenches. Current density in recesses increase during plating until planarity of the surface and uniform current densities are achieved. Brightener compounds may exist in

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several forms in electrolytic working baths, including both active and inactive species. Levelers are heterocyclic or non-heterocyclic aromatic compounds that act by displacing unwanted brightener in high current density sites (protrusions). The plating effectively slows down at these protrusions while continuing at accelerating rates in recesses where brightener is adsorbed. Not all plating systems contain leveling agents. Proper operation of an acid sulfate copper plating system requires the careful control of these additives, both in concentration and ratio. The carrier is typically operated in concentrations well above the minimum amount required to achieve suppressed plating, and unlike brightener and leveler, is able to tolerate wide swings in concentration with little impact on suppressing performance. Brighteners and levelers are sensitive to both concentration and ratio. These compounds are effective at low concentrations, several ppm or less. Detection and control of these additives are crucial to proper bath operation. Several analytical techniques are available for the semi-quantitative detection of these compounds. Suppressers are generally large molecular weight organic molecules adsorbed at the cathode surface, increasing the coefficient of diffusion without changing the I-V curve. However, in an acid copper electrolyte, the addition of up to 60ppm of chloride ion, in combination with the organic additive, significantly reduces the cathodic current. This combination increases the polarization resistance of the system, reducing “burning” by influencing the deposit habit. For copper baths, brighteners act to enhance the current. As such, the brightener response mitigates the action of the suppresser. Brighteners are used for grain refinement, and are critical in determining the grain structure, tensile strength and elongation, which in turn affect the physical properties of the deposit. Levelers are a class of compounds which usually contain an aromatic nitrogen atom. These atoms have a single pair of electrons which partially neutralize the charge at areas of high current density. Frequently, such situations occur when plating thick, narrow conductors or small openings in photoresist. Amplification of substrate other surface irregularities has been shown to appear when deposition is carried out at low concentrations of simple ions in solutions[12.1]. In this case levelers assist in reducing overall surface irregularities. Excessive inclusion of these organics in the electroplated films increases ohmic losses and causes problems in subsequent bonding operations. Thus adequate metal ions must be available for high purity deposits with high conductivity and smooth surfaces. It is necessary to carefully control the plating conditions to maximize the density and purity of the electroplated film to minimize ohmic losses. The maintenance of metal ion concentration in the electrolyte is critical. For plating baths with expendable anodes, that is anodes which slowly dissolve saturating the

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bath with metal ions, the metal ion concentration remains relatively stable. When the anode is insoluble, as in gold plating the gold ion concentration is depleted with use, must be continually monitored and replenished. If the plating parameters remain unchanged, the deposition rate will increase proportionally with current density. For this to occur, no secondary reactions must take place. Too often this is not the case. As a consequence, competing reactions caused by the presence of addition agents, impurities or hydrogen evolution reduce the efficiency of the plating process, and affect electrodeposit morphology. The morphology of a given electrodeposition system, thus, may depend on: The current density,

The presence of addition agents or impurities,

The nature of the anions in solution,

The nature of the cations being deposited in solution,

The type of power supply – is the current continuous or pulsed

D.C. or A.C., symmetric or asymmetric?

Orientation and texture of the substrate

Solution concentration

Temperature

12.4 Waveforms. In general, conventional galvanostatic DC is the most widespread plating technique and its current-time curve shown, along with other rectification schemes, in Figure 12.2. In conventional dc, when the current is turned on, all the metal ions immediately adjacent to the cathode will deposit. The rate at which nearby ions deposit is greater than the diffusion rate of the metal ions. To enhance arrival rates, and thus have a high metal ion content continually available, techniques such as bath agitation, high speed pumping of electrolyte and oscillation of the substrates in the bath. The rate of arrival of metal ions is a function of their diffusion coefficient, electrode-to-part spacing and electrolyte agitation are important factors. To minimize porosity, contamination and surface roughness other plating waveforms have been used to widen the latitude of plating conditions. These methods use interrupted plating cycles, which attempt to alter grain growth, enhance leveling and improve deposit density. 12.4.1 Asymmetric dc. In asymmetric dc the polarity is reversed for a fraction of the cycle, intentionally removing some material, exposing a clean, fresh surface, and to some extent leveling the surface by removing high points on the deposit. This occurs because this part of the cycle is essentially d.c., and high fields generated at surface high points selectively deplate material in those areas. A less frequently employed method is asymmetric a.c. and is similar to its D.C. counterpart in its plate/deplate

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action. Most rectifiers operate at 60 Hz with about 10:1 forward-reverse plate ratio. Rehrig [12.2] related the porosity to the thickness of gold films deposited by various plating methods. He concluded that porosity differences were indeterminate above deposit thicknesses of about 2.5µ. Below that thickness, he found the porosity of dc plating > asymmetric > dc pulse plating, and ascribed these results to differences in intergranular growth, such growth reducing grain boundry discontinuities. 12.4.2 Pulse. The most popular alternative to conventional dc plating is pulsed dc. DC pulse plating, in the context used herein, strictly refers to an on/off dc, accomplished by switching a conventional dc power supply on and off. In conventional dc pulse plating three parameters can be individually varied: the pulse current (pc) density (Jp or Ip), the pulse time and the off-time, The total cycle period is given by some authors as Ø, and is usually in the low millisecond range. During the “on” cycle, a square wave current pulse is applied for a calculated instant, sufficient to deposit all the metal ions adjacent to the cathode. During the “off” portions of the plating cycle, the already deposited lattice relaxes before the next current pulse and further deposition. During this quiescent time the metal-depleted electrolyte adjacent to the workpiece plating surface is replenished with additional ions and the cycle begins again. It is difficult to predict a priori the specific influence each variable has on a given system. A number of authors have studied the advantages of dc pulse plating over conventional dc plating[12.3 12.4, 12.5]. Their conclusions relating to the deposit are summarized as follows: Decreased porosity and increased density due to reduction in grain size Improved adhesion since the peak voltage can be several times greater than dc voltage Improved deposit distribution since localized high current density “burning” associated with dc is significantly reduced Reduced stress in the electrodeposit since the lattice imperfection impurities, voids and nodules usually found with dc plating are generally reduced with pulse plating. The effect of anion concentration in the bath on cathode efficiency is illustrated by Morrissey[12-6] in Figure 12.4 who showed the effect of gold content on current efficiency as a function of current density. Decreasing the gold content results in a marked loss of current efficiency particularly at lower current densities. To maintain good quality films at low current density, it is important to maintain high gold concentration as well. Morrissey[12.6] compared plating efficiency vs. current density of both direct and pulsed dc plated current from the same

176

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gold bath. He found pulse plating efficiency was lower than direct current efficiency. The difference was greater at lower current densities and longer off-times. The slopes of the pulsed current curves in Figure. 12.5 are shallower than those obtained with conventional dc and become less substantial with increasing off time. It appears that increasing off time provides an effect similar to increasing agitation. This reduced current efficiency may also contribute to a leveling effect by inhibiting the formation of high current density areas around surface asperities. Bahr and Lam[12.7] reported on pulsed dc plating of gold to manufacture thin film chokes and antenna circuitry. They were able to fabricate conductor lines 18µm thick and 12µm wide with good geometrical control. They reported the amplitude and duty cycle of the pulse did not affect the gold thickness over the range tested. Chang[12.8] fabricated fine lines with improved conductivity for stripline applications. It was shown earlier that the Q of the various components depends directly on the conductor conductivity. It is important to recognize that the conductivity of electroplated films also depends on the purity of the deposit, which in turn depends heavily on the purity of the bath.. Small amounts of bath contamination can drastically increase the deposit resistivity. Using as the bulk resistivity for gold, Weisberg [12.9] measured the effect on the gold resistivity of only 1%

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impurity. From his results in Table 12-1 very small amounts of unwanted material, even high conductivity metals such as silver and copper, can drastically increase the resistivity. Parts for example, preplated with copper and nickel, must be assiduously rinsed before gold plating to reduce contamination of the gold bath. Deposit purity and current density are generally related. Current densities below or above an optimum value may result in an increase of most of the bath’s cation constituents as illustrated in Figure. 12.6a. This particular cyanide gold bath used a thallium salt as a grain refiner. Plots such as this emphasize the importance of using accurate current densities and maintaining good bath control. Excessive plating rates, usually in the interest of saving time, a) deplete the grain refiner and lead to rough, large grain, porous deposits and b) alter the intended composition of the film. A plot for copper, Figure 12.6b shows that reducing the current density in this simple acid-copper bath below the recommended value of results in almost one order of magnitude increase in some impurities. The impurity level in this case, however, is still almost 2 orders of magnitude lower than the gold deposit. The Q of electrodeposited gold is related to the current density as shown in Figure. 12.7. Q was determined from measurements on resonators substrates. The values are compared to the on polished 99.6%

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results for evaporated copper, normally a very high purity and highly conductive deposit. It is readily obvious that films plated at rates higher than recommended, show rapidly decreasing Q. This is attributed to a combination of impurities, porosity and grain habit, which affects rsurface roughness, and graphically illustrates the necessity for plating process control.

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12.5 Field density. Microwave structures, as we have seen, frequently require thick, narrow conductors with rectangular crosssections. The conductor edge and the top surface are important as well. This reduces to the fact that photo patterning of the circuit is inextricably related to the resolution and stability of the photoresist used to delineate the pattern. Thickness uniformity is a prime concern. Ideally, the current distribution should be uniform over the entire surface as shown in Figure: 12.8. Realistically, however, thickness distribution depends not only on anode-cathode configuration, bath properties and deposition conditions, but on the distribution of openings in the resist pattern . It is not unusual for circuitry to be denser in some areas than in others, with concomitant variation in resist opening density. Schematically, this is shown in Figure. 12.9. Krongelb[12.10] and Mehdizadeh[12.11] modeled this phenomena defining two current densities. They assign a superficial current density, i which applies Ohm’s law and the field equations everywhere in the system except the close vicinity of the patterned surface. Here the lines of current squeeze into those areas not covered by resist. It is this higher surface current density, which enters the to idepends entirely on the resist plating kinetics The ratio of

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density, q. As a result, plating in narrow, isolated resist openings tends to be thicker. This problem may be somewhat ameliorated using lower cathode efficiency processes such as pulse plating or lower anion concentration. Using pulse reverse current (PRC) plating Taylor et. al., [12.12] compared the thickness of the hydrodynamic diffusion layer to the thickness of the surface asperities. The ascribed the term “macroprofile” when diffusion layer thickness approximated the substrate surface texture dimensions. The term “microprofile” was used when the diffusion layer thickness >> plated surface. Typically, the diffusion layer thickness is of the order of 75µ.

Another problem attributable to the photoresist coating during electrodeposition; plating blockout. Reagan and Qutub[12.13] define this phenomena as “the formation of a blocking layer that prevents electroplating deposits from forming on the target material”. They ascribe the source of this layer to solid impurities such as dirt particles, gas bubbles or residual contamination such as finger oils or unremoved resist. Entrapped gas usually results from the decomposition of water forming at the cathode due to low bath conductivity or excessive current density. The gas tends to collect in narrow photoresist openings and effectively isolates that area of the substrate from the electroplating solution. Gas sparging used for agitation may also contribute. This

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problem can be minimized by mechanical movement of the substrate in the bath.

12.6 Electroless plating. Electroless plating may be emerging as a viable adjunct to conventional thick and thin film process technologies. In this process a colloidal, conductive layer (usually Pd) is catalytically deposited onto a non-metallic surface. Copper salts are then reduced on the Pd seed to form a continuous copper film. originally two separate steps were used, first the sensitizer, then a catalyzer. Most systems use a combined palladium chloride-stannous chloride type catalyst/accelerator. The reaction proceeds by first by hydrolyzing the surface absorbed species, so that:

The tin is converted into water soluble compounds and removed by reaction between the hydrated tin and selective acids and bases. Once the tin has for the most part, been removed, electroless deposition of

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copper can take place. This reaction proceeds by reducing the copper salt to copper metal with formaldehyde. In an alkaline environment (pH 11-13), formaldehyde is oxidized, viz: Copper (II) is reduced to copper metal by: The formaldehyde only functions at the catalyzed surface and does not spontaneously reduce all the cupric ions in solution providing the bath is properly maintained. The high pH of the electroless bath precludes the use of positive acting resists which are readily attacked by concentrated caustics.

In the electronics industry, electroless plating has historically been relegated to PC boards and clad substrates, particularly for plated through holes. This has been due, in part, to the favorable surface structure of these materials which allows for good mechanical bonding. The surfaces of ceramic substrates, suitable for microwave applications, are characteristically ill-suited for electroless plating because of their dense, tight-knit grain structure. In order to use electroless plating on ceramic surfaces, two options are available. Either roughen the surface, or chemically modify it The first will most certainly increase the high

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frequency losses to the extent of surface roughening. The alternative is preferable and a number of proprietary schemes have been proposed. Microwave measurements of transmission lines on gallium arsenide show that the attenuation properties of electroplated microstrip and coplanar lines over electrolessly plated adhesion layers are comparable to transmission lines fabricated by evaporation lift-off techniques[12.14]. The results combined in Figure 12.9 show the equivalence in attenuation properties of the two deposition methods. Figure 12.9 also illustrates the lower characteristic losses of microstrip compared to coplanar wave guide.

References

12.1. A. R. Despic et. al., J. Electrochem. Soc. vol. 115 (1968) p 507 12.2 D. L Rehrig, "Effect of Deposition Method on Porosity in Gold Thin Films", Plating, Jan. (1974) 12.3. C. L. Faust et al, Plating, vol. 48 (1961) p605 12.4 N. Ibl, "Some Theoretical Aspects of Pulse Plating" Surface Technology, vol 10, (1980) pp81-104 12.5. C. J. Raub and A. Knodler, Gold Bulletin, vol.10, April (1977) 12.6 R. Morrisey, Plating and Surface Finishing, vol. 78, #4, (1991) p80 12.7 T. K. Bahr and G. M. Lamb, "Effect of Processing Parameters on the Electroplated Au Coating" J. Electrochem. Soc., vol. 126, #9, Sept. (1979) p1514 12.8 W. H. Chang, "Application of Pulse Plating to Microwave Integrated Circuit Fabrication" Proc. AES 2nd Internal. Symp on Pulse Plating, Rosemount IL., (October 6-7, 1981) 12.9. A.M. Weisberg, "Gold Plating Technology", F. H. Reid and W. Goldie eds., p 14, Electrochemical Publications Ltd., Ayr, Scotland, (1974). 12.10. S. Krongelb et al., "The Application of Electrodeposition Processes to Advanced Package Fabrication" SPIE Intern. Conf. on Advances in Intercon. and Pkg, vol.1389 (1990) pp249-56 12.11. S. Mehdizadeh et al., "The Influence of Lithographic Patterning on Current Distribution: A Model for Microfabrication by Electrodeposition" J. Electrochem. Soc., vol.139, #1 Jan. 1992) pp78-91 12.12. E. J. Taylor et. al., "Electrically Mediated Plating of PTHs and Vias", PCFAB Vol 24, No. 3 (March 2001) pp60-64 12.13. J. Regan and O. Qutub, "Plating Blockout During Gold Electroplating of Hybrid Microwave Integrated Circuits "Plating and Surface Finishing, vol. 78, #1 (1991) p29 12.14. D. Choudhury, et al., IEEE Trans. Semicond. Manuf.,vol. 4, #1 Feb. (1991) p 69

CHAPTER 13 ETCHING 13.1 Wet. Probably the most widely used method for material removal is wet etching. Wet etching can be made very selective and etch rates can be very high. For applications involving wide lines (>.010”) this method will probably suffice. For narrow lines, coupler, inductor or interdigitated capacitor structures, where the gap (s) dimension between adjacent lines is critical, under-cutting frequently leads to excessive losses and poor performance. A schematic of wet etching, Figure. 10.1a, clearly illustrates this problem. A thin, photoresist layer is readily defined on top of a thick blanket metal coating. Ideally the chemical etch will isotropically remove the unprotected metal so that the pattern edge approaches 45°. While the bottom of etched metal approaches the design dimension, the top of the metal pattern is narrowed then by twice the conductor thickness. For a 5 µm thick line, the line width is decreased by 10 µm (0.4 mils), or the top of the metal is the original dimension less twice the conductor thickness. After etching the adhesion layer, which is also reduced in width, the remaining width under the conductor is generally less than the design value reducing the w/h ratio. An alternative approach is to blanket deposit a seed layer and using thick resist, electroplate the conductor. Note, however, the slope of the photoresist in Figure. 10.1b. The plating will follow the wall contours. This results in an inverted trapezoidal shaped conductor, wider at the top than at the bottom. Wet etching the seed and adhesion layers reduces further the underlying line widths affecting even more severely the w/h ratio. Wet etching of films on substrates with porous surfaces such as rutile, ferrites beryllia and some aluminum nitrides frequently lead to long term reliability problems as well as immediate problems in etch uniformity. Solution retained in microscopic pores continue to attack the metal layer closest to the surface. In time, the pattern “rusts out,” and the film lifts. In addition, excessive undercutting causes lifting of the conductor edge and in some cases loss of an entire pattern. Any high resolution pattern transfer process should be able to faithfully transfer a given masking pattern onto the underlying substrate. This may be more readily accomplished using dry etching techniques. After plating up the conductor and resist removal, the dry etched pattern is shown at the bottom of Figure 10.1. Here the inverted trapezoid remains, but the width of the seed and adhesion layers, as defined by the width of the top of the conductor is retained by the use of anisotropic dry etching, described in the next section. These dimensions can be carefully controlled by mask compensation and prudent plating techniques. An example of an etched chrome-copper-gold line on unpolished 99.5% Alumina is shown in Figure. 13.1. Note how the substrate surface

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roughness is replicated in the gold surface and edge. The underlying chrome and copper conductor layers, not visible in this picture, have been over-etched. Ganguli and Berk[13.1] reported the etching characteristics of metal films are influenced as well by substrate surface roughness

Table 13-1 lists some of the more common metals and their etchants. This list is by no means exhaustive and the author makes no warranties, either expressed or implied as to their effectiveness or safety. The reader is direct to an excellent review by Vossen and Kern[13.2] for a more complete compendium of metal etchants. 13.2

Dry etching

13.2.1 Sputtering. Sputter etching and ion beam milling in an inert gas are two examples. The erosion of the surface is due only to momentum transfer from the generated ions to surface atoms on the substrate. For sputter etching, equipment used for conventional RF sputtering is used. The substrate is bombarded as before by energetic ions, such as Argon. These ions follow the electrical field lines and, therefore, impinge on the substrate at a right angle. Highly anisotropic etching results. The use of an RF potential causes charge neutralization permitting the etching of

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dielectric materials. The substrate is bombarded, as well by high-energy ions, electrons and UV, all of which may degrade radiation sensitive devices. Substrate heating is also a problem and materials such as resists may be difficult, if not impossible, to remove. Secondary reactions can cause unwanted alloying by redeposition. Ion beam milling circumvents some of the above problems.

13.2.2 Ion Beam Milling. In this method the plasma is generated outside the main vacuum chamber, and the ions are accelerated towards the substrate by a series of grids, see Figure 13.2. In contrast to the

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above RF methods, there is not independent control of the ion energy and ion current. The substrate may be oriented so that bombardment is possible between 0 and 90 degrees. These advantages are obtained at the cost of lower throughput and higher equipment cost. Sputtering of the grids may also lead to contamination. In principle, any solid material can be etched and resolution will not be sacrificed if shallow or thin structures have to be removed. In this respect, the additive process had a distinct advantage. The thin seed layer, etching at 100Å/min, will be ablated in 10-15 minutes. Table 13-3 lists the etch rates of some typical materials found in MIC manufacture. The actual rates will vary depending on such factors as gun design and milling parameters.

If the process is self-masking, that is, the thicker patterns are used as an ablative mask, the top surface may be roughened increasing conductor loss. It may be necessary to add a slower etching thin layer on the top, removing it later by wet etching. Care must be taken to insure that the subsequent wet etch does not remove anything else on the circuit.

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*

Argon ions at normal incidence Ion Energy 0.6 KeV Current Density Torr Target chamber pressure Compare the conductor edge and surface quality of the ion beam milled conductor in Figure. 13.3 to the wet etched pattern in Figure. 13.1. There is some texturing of the surface due to ion bombardment. The

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edge quality of the ion milled sample is superior. The retention of the dimensional integrity of the seed layer during ion milling is apparent in Figure 13.3.

Etching conductors on clad, organic substrates present a separate set of problems. The etched edge and substrate surface of conventionally wet etched conductor is shown in Figure 13.4. The conductor edge demonstrates a typical etching angle, and the substrate surface is not demonstrably attacked. In Figure 13.5, where the conductor was ion milled, significant substrate attack has occured, while the conductor edge remains orthoganal. 13.2.3 Reactive Techniques. During reactive etching the substrate is exposed both to the generated reactive chemical species and plasma with its ions, electrons and UV, as well. The surface is etched by a number of complex, interacting physical and chemical effects. If the gas used in the plasmas is inert, the reactive species are generated only if the gas is activated in a discharge. This is an advantage in that the etching stops immediately after the discharge has been turned off.

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As with wet etching, the reactants may be chosen to selectively attack a particular material. However, the non-directionality of the plasmas etches isotropically, although with better control than with wet methods. In dry etching systems, the plasma is always positive with respect to any powered or grounded surface. These surfaces are continually being bombarded, so that material sputtered from these surfaces may be a source of contamination. In general, for MIC applications, reactive plasma etching is restricted to patterning dielectrics including polyimides.

13.3 Etching effects on impedance. Circuits are generally designed under the assumption that the traces will be orthogonal. Both additive and subtractive processes impact the cross-sectional geometry of the conductor line by forming trapezoidal traces. As such where critical dimensions are required, such as the narrow spaces in coplanar waveguide and interdigitated structures, it is imperative to maintain as much orthogonality as possible. In microstrip, when dealing with wide traces, thickness and edge effects will be small as the fringe capacitance is relatively small and the cross-section may be ignored. With narrow

192

traces where w/h is small, the cross-section and edge geometry assume more significance. Wadell [13..3]cites a number of authors addressing this problem. Barsotti et al [13.4] and Rizzoli [13.5] in particular determined the effects of cross-sectional deviation on impedance. Figure 13-6 is a general schematic relating trapezoidal cross-section to impedance. As the etch angle decreases from 90°, impedance increases as the incremental inductance increases. As the etch angle increases, the parallel capacitance between the trace and ground decreases faster than the incremental inductance, resulting in an impedance increase. The actual slope of the lines will vary depending on trace thickness, width, original impedance and dielectric constant. It should also be mentioned that, for microstrip, the effective dielectric constant, will also be

effected, generally rising with decreasing etch angle and decreasing with increasing etch angle. Schroeder et al., [13.6] plotted changes in normalized Zo and propagation velocity, Figure 13.7, as a function of etch angle for coupled coplanar waveguide with trapeziodal traces. Generally, however, empirical data from processing experience is used to compensate for cross-sectional deviation. The materials and techniques used to attain proper trace geometries will be discussed in the next sections

193

References

13.1. S. N. Ganguli. and D. Berk, J. Vac. Sci. Technol. A6(6), Nov./Dec. (1988) pp3068-73 13.2 “ Thin Film Processes”. ed by J. L Vossen and W. Kern, Academic Press, New York (1978) 13.3 B. C. Wadell, Brian C., Transmission Line Design Handbook, Artech House, Boston, 1991 13.4 Barsotti, Edward L., et al., “A Simple Method to Account for Edge Shape in the Conductor Loss in Microstrip,” IEEE Transactions on Microwave Theory and Techniques, Vol. MTT­ 39, No. 1, Jan. 1991 pp. 98-106 13.5 Rizzoli, Vittorio, “Highly Efficient Calculation of Shielded Microstrip Structures in the Presence of Undercutting,” IEEE Transactions on Microwave Theory and Techniques, Vol. MTT­ 27, No. 2, Feb. 1979 pp. 150-7 13.6 Schroeder, W., and I. Wolff, “A New Hybrid Mode Boundry Integral Method for the Analysis of of MMIC Waveguides with Complicated Crosssection,” 1989 IEEE MTT-S Symposium Digest, pp. 711-14

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CHAPTER 14 COMPONENTS 14.1 Passive components. Every component on a board exhibits three characteristic properties; resistance, capacitance and inductance. 14.1.1 Resistors. Resistance, R, is that property in a conductor which resists current flow, but is unaffected by other circuit elements, in contrast to capacitors and inductors which are. Sheet resistance is a material parameter when the material is a slab of uniform thickness. It is defined as the ratio of the DC voltage drop per unit length to the current per unit width flowing across the surface. The sheet resistance is the resistance between opposite sides of a square, and is independent of the size of the square, as long as the size is much greater than the slab thickness Sheet resistance is expressed in terms of ohms/square, Resistivity, is the ratio of the DC voltage drop per unit thickness, to the amount of current per unit area, passing through the material. It is generally expressed as micro-ohm-cm

Resistors are primarily used in high frequency circuits to terminate lines and attenuate signals. High purity, pyrolyticallydeposited carbon was one of the earliest materials employed for high frequency applications. Because this material is difficult to etch and pattern it was primarily consigned to coaxial applications. Here the resistors could be trimmed to value by mechanically ablating the film. Since the substrate surface was pre-roughened to provide sufficient film adhesion, carbon resistors were limited to those microwave frequencies, where the increased surface roughness does not have as great an impact on conductor losses. Refinements in planar resistor technology now permit resistor integration into multi-level as well as single level circuitry. This has resulted in higher packaging densities, improved performance and lower costs. However, increasing frequency incurs the cost of increased parasitics, and the resistor becomes a lossy transmission

196

line. This is apparent from the a schematic of a planar resistor on an insulating substrate, Figure. 14.1, where: R = Resistance in Ohms L = Lead inductance in Henries C = Shunt capacitance in Farads Resistors are commonly defined by the normalized parameter, sheet resistance, equal to may be thought of as a material property since the resistor is essentially two- dimensional. A resistor consisting of a rectangularly shaped section as shown in Figure 14.2 with length l (parallel to the direction of current) and width, w has a resistance of

if l = w, then equation 14.1 reduces to

Resistivity,

is defined as

The ratio l/w is an equivalent, dimensionless series square resistor element, referred to as a Total resistance is arrived at by value by the number of squares. Thus, the resistance multiplying the of a film resistor is directly proportional to the resistivity, and inversely proportional to its thickness, t.

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Figure 14.3 illustrates the effect of varying on resistor length. In this Figure. 14.3a, a resistor is realized by utilizing 2 squares of film, while in Figure, 14.3b the resistor needs 4 squares of material. On the surface this should not make any difference. However, if the load length is increased by decreasing the sheet resistance, the load may exhibit the behavior of a very lossy transmission line, instead of the pure resistance of a lumped resistor. Figure. 14.4 shows how the VSWR increases as the length of the load, due to low values of sheet resistance, becomes too large. These limitations place some constraints on resistor configuration. Low power resistors are designed as short as possible, while still maintaining tight (±5% or better tolerances in value). While resistor materials can range from a few ohms to megohms, RF and microwave resistors are typically or less to

When laying out an MIC resistor the following rules would be followed: To make the resistor lumped, the largest dimension should be at preferably least To reduce noise the substrate should be as smooth as possible since resistors exhibit higher noise values on rougher surfaces. Thick film artwork should compensate for spill-over and firing shrinkage. Thin film artwork should allow for etching tolerances. Resistors should be as short as possible to minimize inductance and VSWR. The resistor, as deposited, should be as close to value as possible to minimize trimming. In some cases thin film resistors can be etched trimmed without changing their planar dimensions. Thick films are usually air-abrasive or laser trimmed.

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This both increases the signal path and reduces the power handling capability, degrading resistor performance at high frequency. Thick and thin resistors are both used in high frequency applications for termination and isolation and should meet the same criteria: Good stability - particularly important for hi-rel applications, a

major MIC market.

A reproducible TCR (Temperature coefficient of resistance) ­

important when compensation is necessary.

Good power handling capability

Minimum parasitics

The process sequence of thin and thick film resistors differs. Resistor fabrication may be considered subtractive or additive. In the former, on ceramic substrates, thin film resistive layers are vapor deposited first. For very high frequency applications where highly resistive layers underneath conductors are undesirable, the resistive pattern only may be preferentially retained, then the contacts deposited and defined. Photodefinition of contact and resistor pattern results in

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sharp, accurate definition of both minimizing discontinuities and reflections, Figure 14.5a,c. In conventional thick film or polymer thick film (PTF) the resistor pattern is screened over predeposited conductors, resulting in what Ho refers to as spill-over[14.1], Figure 14.5b,d. This spill-over results in additional resistor losses which must first be measured and then compensated for in the design stage. Termination effects[14.2] influence the performance of thin film resistors as well. Termination resistance, as expected, can affect the practical resistor values. For resistor lengths shorter than 10 mils (250µ), termination effects can be considerable. The authors added that termination resistance has almost no effect on TCR.

For clad substrates a multi-etch process may be employed. In this process, Figure. 14.6a, an electroless Ni-P resistive layer, typically, 50 to is first plated onto a thin copper sheet. The plated copper is then laminated between two clad copper layers, Figure. 14.6b. The terminations and resistor area are sequentially patterned and etched through the top copper layer Figure. 14.6c-f. The copper on one face of a clad substrate is removed. The assembly is then co-laminated with other layers, the resistor layer facing the dielectric.

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Table 14-1 lists some of the thin film resistor materials in general use. Most resistors higher at frequency applications are thin film, while thick film are found more often in lower frequency (S band) or associated D.C. circuits.

Resistor value, geometry and contacts alignment must be tightly termination, the controlled. As an example, if, as is the case for a tolerance is careful attention must be paid to all aspects of the

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fabrication process. A 20 mil wide resistor, 40 mils long is 2.0 squares. If the end result is However, if the width ends up 19 the ink is mils, or 5% narrow, the number of squares increases to 2.1, resulting in a resistor that is now just in tolerance. It should also be pointed out that while low value thin film resistors are homogeneous and purely resistive, higher value thin and thick film resistors are not. In low resistivity materials, charge transport through the conductive particles dominates the conduction process and the temperature dependence is similar to that of the metal. In a typical high resistivity resistor, metal and metal-oxide agglomerates are surrounded by a glassy phase graphically shown in Figure 14.7. The density of these agglomerates in the glassy matrix and composition of the glass, which may change within a resistor series, define the high frequency parameters of the resistor. In high resistivity materials, tunneling of charge carriers through the glass barriers is important. The temperature dependence is that of a degenerative semiconductor with activation energies of a few MEVs.[14.3] Above 1 GHz, they found capacitive effects of the glass dominated the conduction. They modeled this capacitance in parallel with the series resistance of the glass barrier. It was also determined[14.4] that the barrier resistance has an ac component which drops rapidly with frequency. The frequency and magnitude at which this drop begins, depend on the glass composition and metal-oxide density in the resistor film[14.5], is roughly inversely proportional to the angular frequency. The impedance of ruthenium dioxide and lead ruthenate thick film resistors was measured over a wide frequency range up to 18 GHz. The authors also observed their thick film resistors usually fired out with rough surfaces adding to the noise value.

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Thick films 1/8” long by 1/4” wide (0.5 squares), have been and power terminations. The successfully used on BeO as large area reduces fabrication tolerances so that a variation of in the length results in less than 1% change in resistance and in the width, only 0.4%. The resistors are brought to value by air abrading. Post glazing for protection can shift the resistance slightly. A simple series resistance will naturally attenuate signals, but may be impractical where return loss is important. Figure 14.8 [14.6] shows the return loss vs. attenuation for a single-series lumped element resistor. While a single-series resistor may be acceptable below 1 dB attenuation where low levels of return loss are required (typically 20 dB or better), the return loss quickly degrades to approximately 10 dB at 3 dB attenuation. 14.1.2 Attenuators. By configuring resistors and terminations together, passive attenuators can achieve a fixed reduction in power as the signal passes through them.

These attenuators are three-port devices with input, output and ground. They are used whenever a reduction in RF power is needed and are designed to maintain the impedance value as presented by the source and load. Traditionally, matched attenuators are configured in a T or Pi network as shown in Figure 14.9. In each case, the values of both series

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and shunt resistors are determined by the required attenuation. In both examples the metallization is restricted to the attenuator surface. Alternatively it may be configured as a wrap-around to provide direct contact to signal and ground One of the major problems facing the hybrid technologist is providing close access to ground. This is accomplished either by via holes through the substrate or wrap-arounds. The former is convenient when only a few vias are needed. Large numbers of vias significantly add to the substrate cost and may weaken the substrate. During drilling, using pulsed and Q-switched YAG lasers, high energy pulses, typically

are absorbed by the substrate. This leads to intense local heating. Huge thermal gradients are generated, vaporizing some of the material and changing composition, grain size and flaw distribution. While the affected total volume of material is small, the edge of the hole greatly affects the residual substrate strength, and holes should be minimized. In addition, molten material remains around the hole lip This can create discontinuities in narrow lines and damage photomasks which frequently come in contact with the surface. As a consequence, if polished pieces are used, holes should be put in prior to polishing. Holes put in later may require secondary finishing operations adding to the cost. For high volume, holes can be put in the green state, however, location tolerance due to shrinkage variations may be excessive. Holes may also be put in by ultrasonic material removal, however, this practice is limited to short run, experimental pieces.

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An example of a thin film wrap-around structure is shown in Figure. 14.10. This drawing[14.7] of a thin film resistor on a ceramic substrate illustrates one approach to fabricating wrap-arounds. The resistor material is blanket coated on the substrate surface and temperature stabilized if necessary. The top and bottom of the substrate are then metallized. Sputtering substrate top and bottom enhances edge coverage. The substrate is then selectively electroplated, covering ground, edge and bond pad. The unwanted conductor areas are first etched away and then the resistor is defined. The resistor is then chemically or laser trimmed to value. The substrate is then sliced to provide a number of discrete terminations or circuits, the major drawback is that only the outside edges of the substrate can be used. In those cases where only a portion of the edge is to be metallized, mechanical masks can be used. Sputtering or ion plating are preferred deposition methods. Evaporation may be used providing the substrate is angled into the vapor stream. Two evaporation cycles are needed and special precautions taken to avoid unwanted coating. Design of the termination conductor is important. The shunt capacitance and inductance leading to the via or wrap-around directly affect resistor return loss.

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14.1.3 Capacitors

The basic component for storing electric charge is the capacitor. Its capacitance is a measure of its ability to store electric charge caused by the application of an electric field. This stored charge can be delivered when desired. When an electric bias is placed across the capacitor no current flows. Internal polarization of ions and electrons in the dielectric occurs instead. Electrical charge is converted to mechanical energy by the displacement of these electrons and ions from their equilibrium positions within the dielectric material’s lattice. When the bias is removed, the stored charge is dissipated into the circuit. Generally capacitors occupy the major fraction of available circuit real estate. An equivalent schematic of a capacitor is shown in Figure 14.11 where R is the lead and electrode resistance, L is the electrode inductance, C and G are respectively the capacitance and conductance and C1,C2 are shunt capacitance. Capacitors serve several functions in the analog arena. They are used in RC and RCL tuning circuits, they usually block DC signals, but may also block unwanted frequencies and may act as bypass capacitors, to decouple unwanted signals. In addition to the shunt capacitance from trace to ground, two of the more common types of capacitors, available for RF/MICs are shown in Figure. 14.13. Conceptually, the design of the planar plate capacitor is simpler than that of the resistor, since the layers of different materials naturally produce a parallel plate structure. The choice of materials and how each relates to capacitor performance are part of the many subtleties which affect capacitor design. The parallel plate structure consists of a dielectric layer sandwiched between two conductive electrodes, sometimes

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referred to as a metal-insulator-metal (MIM) capacitor, Figure 14-12b. The amount of charge storage is directly proportional to the area of the smaller of the two electrodes and to the relative dielectric constant. The dielectric constant is a measure of how much charge storage is possible. The higher the dielectric constant the more potential charge storage (capacitance). For parallel plate (overlay) capacitors the value of the capacitance, C, is determined by the overlapping electrode area, A, the thickness of the dielectric, t, and the permittivity or dielectric constant Capacitance is inversely proportional to the of the dielectric material, dielectric thickness. These relationships are shown in Equation 14-4, where capacitance is normalized to electrode area, C/A. This is a precise relation since fringing effects at the edges are negligible. For a given material, the film thickness determines the capacitance density, which in turn determines the area needed for a particular capacitance value.

Where:

C/A = = = t = if unit area is in if unit area is in

Capacitance per unit area Permittivity of free space Relative dielectric constant Unit thickness

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208

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For multilayer capacitors, equation 14.4 is multiplied by (N-1), where N is the total number of layers in the capacitor stack. In a simple two layer capacitor, this factor equals 1. Equation 14.4 was used to generate figures 14.13 and 14.14, plots of capacitance per unit area against dielectric thickness. The values in figure 14.13 are more appropriate for thin film technology. As a consequence, the dielectric thickness is plotted in microns (µm), and capacitance density values, typical for these processes, are in Figure 14.14 on the other hand is more suitable for thick film and clad substrate technology. Here, since the British System is widespread, the dielectric thickness is measured in mils and the capacitance density is in It is apparent from these plots that certain capacitance values are attainable only with certain materials. Both figures are annotated with selected dielectric constant values. As the slopes of all the plots are the same, to obtain values for other dielectrics, calculate and plot a single value and translate the slope. Thin film capacitors are limited in capacitance density and require base conductors with smooth surfaces. Screened thick film materials are routinely deposited on rough substrates and over textured conductors, but their manufacturing tolerances are poor, so that they are restricted to low frequency (up to 5 GHz) applications. Photodefinable dielectrics may be made with much better accuracy, and are routinely employed in LTCC technology. Although the dielectric constant range in thick films is very wide, the ferroelectric materials used to raise the dielectric constant frequently exhibit “K shifts” in dielectric constant at the Curie temperature. Double printing is usually required to reduce pin holes. Dielectric porosity, particularly of the medium and high k materials, frequently causes poor humidity stability, requiring some type of encapsulation when capacitors are used on the surface. Surface planar thin film capacitors are generally made using or dielectrics. Thick film capacitors are sputtered made by screening the dielectric. To eliminate pin holes, a double print and dry process is standard.. Several approaches are being investigated for embedded capacitors. Problems using thick film on alumina have been described by Wu et. al. [14.8]. They found that repeated firing of the Barium Titanate paste raised the capacitance value by densifying the dielectric. They also found Silver (Ag) diffusion from the electrodes and subsequent reaction with the dielectric also reduced the dielectric thickness, further increasing capacitance for a total increase of 30% for an 8pF capacitor. One of the simplest methods for multi-level clad substrates involves sandwiching a bare dielectric, i.e., without any cladding, between patterned copper conductors. For clad materials the limiting dielectric constant is about 10. However, with the drive toward higher capacitance densities, work has been reported using ceramic loaded polymers. Early work at the

210

Georgia Institute of Technology [14.9] illustrated the potential of loading photodefinable epoxies with high K ceramic powders up to a dielectric constant of 50 Higher dielectric constant ferroelectrics generally require processing at temperatures which exceed the limitation of most clad substrates. Stauf et. al., [14.10] deposited BST (BaSrTi) films by MOCVD onto silicon wafers. They obtained capacitance densities up to with Q as high as 500 after annealing in the 550 to 650°C range. To use similar ferroelectrics on clad substrates, dielectric films are processed on a separate substrate capable of withstanding the necessary processing temperatures and atmospheres. The finished capacitor assemblies are then embedded into multi-level substrates with conventional lamination methods. High dielectric materials have been deposited by MOCVD onto a conductive layer, after which they are lithographically defined. Kingon et. al[14.11] deposited 0.6µ PLZT (PbLa-Zr-Ti) films onto Ni coated 50µ Cu foil. After crystallization at 600°C, counter electrodes were applied. A capacitance density of about of 0.04 were measured after lamination. 350nF/cm2 and High dielectric materials in both paste and tape are being developed as well for LTCC applications. In 1977, Knaijer et. al.,[14.12] described the formulation of a series of perovskite materials for use as capacitor dielectrics. Dielectric constants from 17 to 75 were evaluated over a wide frequency range. They found increased in some cases from 5x10-4 at 3.5Ghz to 1x10-3 at 10 GHz. Lead free, ferrite tapes, about 4 mils (100µ) thick, with dielectric constants ranging from 50 to 250 were buried in an LTCC structural tape{14.13]. They obtained dielectric constants ranging from 88 to 273 with ranging from Zhang et. al., 0.003 to 0.015 and capacitance densities up to employed a BZN (Bi-Zn-Nb) pyrochlore dielectric to obtain capacitance densities from 0.45 nF/cm2 to 0.40 µ f/cm2. The dielectric constant of their BZN material decreased from 110 at 10 KHz to 81 at 4 GHz. at Similarly, capacitor Q decreased with increasing frequency, from 10 KHz to only 87 at 4 GHz. The three principal sources of capacitor loss (power dissipation) in planar capacitors are dielectric loss, electrode resistance and lead resistance. The planar geometry of the capacitor makes the electrode and lead resistance important considerations in capacitor design and performance. The dielectric loss, on the other hand, is an intrinsic material property, and must be considered when dealing with substrate Capacitor losses are generally materials and capacitor dielectrics. (see section 4.) It is evaluated in terms of the dissipation factor, vital to separately consider the total contribution the dielectric makes to capacitor loss. is defined as the dielectric loss alone, and is independent of dielectric area and frequency. At first approximation, most dielectrics used for planar capacitors are independent of frequency.

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The high frequency performance, then, of capacitors of interest is not normally limited by the properties of the dielectric. Because the electrode and lead resistance R are, in effect, in series with the dielectric the dissipation factor may be written as:

where

is the angular frequency The equivalent series resistance (ESR) R in equation 14-5 used to represent all losses, is not a simple ohmic resistance since it includes dielectric losses. These losses can be separated by rewriting 14-5:

where is the dielectric loss and R' is the ohmic resistance that represents the total effective series resistance provided by of the electrodes and leads. Thus, as frequency increases, becomes the dominant source of loss. Equations 14-5 and 14-6 can be combined to show the two distinct parts of R. Thus,

Recall that is independent of frequency; therefore the portion of R that represents the dielectric loss is frequency dependent. For multilayer substrates, as those from semi-rigid boards where the copper thickness and purity is such that ESR is of little consequence. However, in thin film, especially when using high resistance base electrodes, such as the case with tantalum, and with screened layers, where the electrodes may have higher than bulk resistivity, ESR will increase capacitor losses and diminish their Q. There are other differences as well, and these are listed in Table 14-3. 14.1.3.1 Parallel plate. An MIM capacitor acts as a lossy transmission line. The inductance and resistance of the base and counter electrodes and the conductance and capacitance of the dielectric all determine the capacitor Q. If the metal thickness of the electrodes exceeds the skin depth, the series resistance is determined by the skin resistance. If the metal thickness is less than the skin depth, the bulk resistance is the determining value. Usually the bottom electrode is kept thin to maintain a smooth surface, and is typically less than a skin depth, while the top electrode is usually built up by electroplating to several microns.

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The total Q of parallel plate capacitors is:

where: QC = the electrode resistance QD = the dielectric loss, and

In those cases where the conductor losses far exceed those of the dielectric, the capacitor Q may be expressed as:

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For well designed overlay capacitors, the length and width are small, compared to the wavelength in the dielectric film. From transmission line theory, a reasonable equivalent circuit for the capacitor is shown in Figure. 14-8 When skin losses prevail, the is given by the expression

Where:

= surface skin resistance l = electrode length

The salient point of this expression is the strong dependence of on conductor length and to a lesser, but important degree, on the unit capacitance, skin resistance and frequency. An increase in any of these elements will reduce However, by significantly increasing the size of the bottom electrode, the conductor Q may be almost doubled. The importance of using low loss dielectric is illustrated in Figure 14.15, where capacitor Q is shown to decrease with increasing capacitance values and higher dielectric losses. The increased capacitance values reflect increased values in the electrode aspect ratio, l/w. At lower frequencies capacitor Q-factor is dominated by the properties of the dielectric while at high frequencies, conductor losses dominate, assuming a frequency independent loss tangent. The fabrication of small, high Q capacitors requires rigid control over conductor purity and thickness, and dielectric thickness and loss.

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For a given design frequency and capacitance, the electrode resistance, R, must be kept as low as possible to maximize Q. Within limits, the high frequency performance of thin film capacitors can be improved by using thicker and highly conductive films for the capacitor electrodes. In the case of tantalum, part of the bottom electrode is thinned as it is anodically converted to its oxide, which serves only to increase the electrode resistance. An underlay of a more conductive metal, like aluminum, has been suggested[14.15]. Aluminum has the advantage that it is itself anodizable and permits oxidation at pinholes in the tantalum layer during the anodization process, healing an otherwise defective dielectric. The rough surfaces of thick film capacitor electrodes also increase conductor resistance, and these capacitors, too, suffer from reduced Q. It is generally inadvisable to wire-bond thin film capacitors as thin dielectrics have a tendency to crack during the bonding operation. Sometimes the top electrode is extended to provide a bonding area adjacent to the capacitor. The capacitor dielectric in this structure is also extended over the base electrode serving as an insulator between the two conductors. Thin film MIM capacitors fabricated this way, Figure. 14.16a, have a tendency to short when thin dielectrics are used as insulation. The thin dielectric, typically 0.2 to 1.0 µm, may be stressed

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over the sharp edge of the bottom conductor and develop hairline cracks. When the top electrode is deposited it shorts through these cracks to the bottom conductor. An alternative is to bring the capacitor dielectric to the end of the bottom conductor, and interpose a thicker, flowable secondary insulator such as polyimide. The top electrode may then be processed, isolated from the base electrode by this redundant insulation, Figure 14.16c. This technique has the advantage of not having to process and perturb the bottom electrode until after the capacitor dielectric has been deposited and defined, maintaining the bottom electrode in an “as-deposited” state.

The screening and firing of thick film dielectrics usually results in a tapered edge. The dielectric is also thick enough to cover any small defects in the base metallization so that the top conductor can safely bridge the bottom conductor without shorting, Figure. 14.16b. At some point, as the bias on a parallel plate capacitor is increased, the capacitor loses its ability to store charge. Above this maximum bias point the capacitor breaks down and the electric current is rapidly transferred between conductor electrodes. The maximum possible voltage that can be applied across the capacitor is called the dielectric strength of the capacitor, given as volts per unit dielectric thickness. A capacitor with 1.0 µm of silicon nitride, breaking down at 400V would have a breakdown voltage of 4MV/cm.

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Breakdown is usually a consequence of stress, thin spots, cracks and impurities within the dielectric, rather than an inherent property of the dielectric material. It reflects more on the processing and quality of the material. As a consequence, larger area capacitors are more prone to breakdown than smaller ones. The fraction of capacitors without defects vs. the area of the capacitor[14.16]. is shown in Figure 14-17. The data agree well with:

where:

P = the probability of a capacitor without defects

= defect per A = capacitor area Since the capacitor is usually the most sensitive component to processing, circuit yield is generally dependent on capacitor yield. This shown in Figure 14.12 where circuit yield in percent is plotted against number of capacitors in a circuit. 12pf capacitors, 14 mil square with one micron silicon nitride as the dielectric were used for these tests. In effect, circuit yield decreases with increasing capacitor area. High capacitor

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yields are imperative if high circuit yields are to be realized. Capacitor redundancy is frequently employed to insure circuit survival. Summarizing, the dielectric for the multilayered structure should: Be reproducible – Trimming is difficult Have a high breakdown voltage – particularly important for thin dielectrics Have low dielectric loss – for high Q Have low stress – to reduce the sites available for low breakdown Have a dielectric constant independent of frequency, voltage and humidity 14.1.3.2 Interdigitated Capacitors. Of the two structures in, Figure 14.12a, the interdigitated is simpler. This capacitor is fabricated in a single layer on the substrate, and if unencapsulated, uses air as the dielectric This structure is functional only in a planar configuration. As such it is not applicable to stripline or in other multilevel configurations. Because of low frequency resonance problems due to coupling between long lengths of line, only small capacitors (less than 2 pF) are practical at the higher frequencies, for a gap (s) = 2 mils. For thick films with a gap (s) = 0 4 mils, the capacitance value is less. Alley[14.17] analyzed the tolerance in line width and gap variations on capacitance values. His curve relating the percentage error in capacitance to the width/gap ratio for capacitors fabricated on 99.5% alumina is shown in Figure. 14.7. Under the condition, the sum of line is width and space is again a constant, a capacitor tolerance of achievable by controlling the line width of a capacitor with nominal 2 mil pitch to mil, reasonable tolerances for thin film processing. In their paper, Taylor and Williams[14.18] show that for miniaturization, large capacitance values are impractical in the interdigitated form. A 2.5 pF capacitor occupies, for example, an area exceeding 12,000 sq. mils, while 0.25 pF capacitors used only 1,600 sq. mils. Parallel plate capacitors are more suited for larger value capacitors, as they occupy significantly less area. The capacitance in this interdigitated structure arises from fringing fields both through the air and dielectric and by direct fields through the conductor. It is important then, that the dielectric be uniform and isotropic, the gap(s) between lines uniform and metal conductivity, high. The latter is particularly important since the Q for this type of capacitor is given by:

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where:

X N C

= = = =

cell width number of fingers capacitance in pF sheet resistance in

Q decreases with increasing frequency and capacitance values limiting this structure to low values. 14.1.4 Inductorss

There are two basic inductor types used in MICs, a) wire and b) printed. Wire, both round and strip, are used for tuning and assembly and will be covered in the packaging section. Printed inductors will be covered in this section. The configuration of a flat spiral strip conductor and non-planar inductors are shown in Figure. 14.18[14.19]. This type is used where inductances larger than 2-3 µH are required. As much as planar spiral and meander inductors are limited to the low 100s of nHs, larger areas are necessary to provide higher values. The inductance value increases with increasing number of spirals. There has been an increasing trend to incorporate 3-D inductors in mutilevel packages. These structures offer more space for energy storage, hence will have improved performance over the planar geometries. An additional advantage of 3-D inductors is the relative ease in connecting the internal contact point. Pieters et. al., [14.20] compared inductors fabricated by different processes and on various materials. They concluded that "thin film inductors cover the broadest application range (up to 84nH) and provide the largest quality factor (25 to 140). LTCC provides fairly good quality

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(30-60) up to 17 nH, but at lower frequencies 9a few GHz). CMOS and MEMS inductors have inductance values from 2nH up to 34 nH for frequencies up to 10GHz, but have only small quality factors (below 18)" For maximum Q, inductors usually designed as follows: 1. The spiral should have the widest conductor width possible, while keeping the overall diameter small. This infers that the separation between turns should be as small as possible within process limitations and without introducing unnecessary distributed capacitance. The conductor walls should be clean and straight to provide accurate gap dimensions. 2. There should be some space at the center of the spiral to allow the flux lines to span through, increasing the stored energy per unit length. The accepted value is further decreasing s and w if is fixed. 3. The surface resistance and Q increase as the However, it has been found experimentally[14.21] that the conductor Q increases only up to about 6 GHz and then fails off rapidly. This is probably due to current crowding. It is very important then, to minimize inductor ac resistance, written as: where k' = correction factor which accounts for current crowding. It ranges between 1.3 and 2 for w/t between 2 and 100. To minimize current crowding, conductor thickness of 5 to 10 skin depths are used. = n number of turns a

= =

(average radius) surface resistance

4. The current flows within a skin depth on the top and bottom surfaces and the inner vertical face of the inner turn and the outer vertical face of the outside turn. Thus, smoothness of these surfaces is important, as well, to minimize conductor losses. The realization of high Q printed conductors is somewhat limited by conflicting process requirements. Summarizing planar inductor requirements, it is necessary to use: 1) Wide conductors (within practical limits) for higher but width-to-spacing ratio should approach unity. Conductor thickness should be greater than 5 skin depths for low 2) w/t. 3) Conductors should have low resistance and high volume conductivity. Gap dimensions are very important. Clean straight conductor 4) walls are necessary for reproducible results.

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14.2

Transmission line components

14.2.1 Reciprocal dividers/combiners. A reciprocal divider is used to split power either equally or non-equally between two or more interconnects. As a reciprocal device, it can also be used to combine the power of, for example, oscillators and amplifiers at a single port. Dividers and combiners are used in feed networks for antenna arrays, mixers, and balanced amplifiers. The most important characteristics of these dividers/combiners are the power division ratio, matching and phase balance, isolation and insertion loss. The power division ratio, as the name implies, is determined by the power ratio at the output ports, when all ports are terminated with reflectionless terminations. Isolation is determined by the ratio, in dB, of the power between divider output ports or combiner input ports, again when all ports are terminated with reflectionless terminations.

As these networks employ transmission lines of finite wavelengths, their performance is determined, by among other things, manufacturing tolerances, termination mismatching, conductor losses and device structure. Probably the simplest example of a printed three-port divider is the T-junction. It is either configured in series or parallel connections of one input or two outputs. Power division ratios are varied by adjusting the appropriate impedance. T-junctions, however, suffer from two main drawbacks: the first, simultaneous matching at all three ports of a lossless

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three-port reciprocal network is impossible, and secondly, there is no isolation between input and output ports. Other configurations of dividers/combiners, which do not have these limitations will be discussed in the next sections. Wilkinson divider/combiner[14.22], in contrast to the Tjunction, does permit matching at all three ports and high isolation between the output ports. The basic structure is shown in Figure 14.18. Two transmission lines, in length, relative to the mid-band frequency provide equal power distribution. A resistor, R, connected between the outputs provides the necessary isolation. The resistance value is not critical, and may diverge from design value by as much as The impedance match of the transmission lines is critical to obtain the proper power split. Manufacturing tolerances must be kept tight.

Couplers generally serve as power combiners or splitters. The type discussed in this section are generally four terminal (port) devices shown schematically in Figure. 14.20a. They consist of two or more closely spaced lines, usually of equal width (w) precisely separated by a gap (s). Varying w and s will determine the ratio of energy transferred from one line (leg) to the other. The line length determines the operating frequency. The signal is introduced into port #1. Part of the signal is then transferred through the substrate and dielectric (usually air) between the lines to the adjacent leg, where it exits from port #2. The remaining

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signal then continues out through port #3, Port #4 is usually terminated with a resistor. This value is used since the impedance of the port metallization is normally For other impedance values, the resistor value is adjusted accordingly . Figure 14.20b shows the basic structure of the proximity coupler, comprised of two parallel-coupled microstrip lines. This coupler structure is of special interest for the following reasons: i. It can be made relatively broadband ii. Matching and directivity are frequency independent The power splitting ratio can be varied over a wide range. The iii. coupling to the two output arms is determined mainly by the distance between the two microstrip lines in the coupling region. High coupling requires very uniform, narrow gaps, typically 0.2 to 0.5 mils. Even for thin film hybrids this poses a reproducibility problem. As a result, 3 dB couplers (equal power at both output ports) cannot easily be realized in a pure planar technique. One way to overcome this difficulty is to apply overlay techniques, i.e., to increase the coupling by a partial overlapping of the two microstrip lines separated by a thin insulating layer in the coupling region. Overlay couplers have been successfully used in multi­ level circuits using clad substrates. Extreme care must be used in the alignment of the various layers. Nevertheless, coupling ratios of 6dB may be routinely obtained with a precision of Couplers of this kind are made by applying 3 subsequent printing processes. In the first step one microstrip is printed, then the coupling region is covered with a dielectric paste, and finally the second microstrip is printed on the dielectric, overlapping the first conductor. The coupling ratio can easily be controlled by varying the degree of overlapping. 10 dB couplers have been fabricated also in thick film by overlapping the conductors with a thick dielectric, the same as the substrate[14.23]. By concentrating the field nearer to the substrate, the gaps are narrowed and increase the coupling coefficient. Interdigitated couplers shown in Figure 14.20c are easier to make particularly photolithographically, since the gaps are at least 0.8 mils. While wider than the two line geometry configuration, gap dimensions nevertheless still dominate. Presser[14..24] has shown that changing the gap dimension while keeping the line width constant, changes the coupling coefficient by as much as 3 times compared to the same line width change at a constant gap dimension. Line width is, nevertheless important, as variations in width change line impedance creating a mismatch with port impedance. In practice, gap and line width dimensions are interrelated. A wider line results in a narrower gap and vice versa. One can immediately

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see that the gap plays a dominant role in coupler performance. The results of Levy [14.25] are plotted in Figure. 14.21, where the % coupling change is plotted against gap change for 1 mil lines and spaces. In this Figure both theoretical and actual measurements are plotted. For a 0.25 mil (6.35 µm) increase in gap, a 5% increase in coupling, in excellent agreement with Presser’s results, attests to the strict control over artwork, masks and processes necessary to maintain reproducibility. Others[14.26] calculated the fabrication tolerances on coupler sensitivity. The complete calculation is beyond the scope of this text. However, for coupled microstrip on alumina, a 4% change in coupling factor will generally result from the following:

Accordingly, besides maintaining close control over the gap dimension, comparatively large variations in substrate thickness should be avoided; flat, polished substrates are most desirable. Care must also be taken to monitor the substrate density and dielectric constant since large variations can occur, in particular between vendors.

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Another type is the two branch directional combiner/divider (sometimes referred to as quadrature couplers), shown in Figure 14.21 These are preferred over the Wilkinson type, described above, since they improve the individual amplifier performance by shunting some of the mismatch reflections to the associated termination, thus protecting the input of the next amplifier stage. This configuration is appropriate for planar fabrication since the network output ports are located on the same side

14.2.2 Filters. Two types of microstrip filters are generally made in microstrip: a) end coupled and b) parallel or edge coupled; Figure 14.23. The problems of dimensional tolerancing and sensitivity are unduly severe for end coupled geometries, so that edge-coupled filters, Figure. 14.23b are generally preferred. The w dimension ranges near the line width to slightly less. In the center element, the step is sometimes too narrow to be considered. The step near the ports may be about 5 mils. The gaps are also relatively wide, typically ranging from 5 mils at the outside to 25 mils in the center. These multi-element filters are easily fabricated in both thin and thick film form. Filters are generally situated near the input to the receiver and any losses in the filter will significantly impact the noise level of the receiver assembly. An example of how insertion losses due to affect component performance is graphically depicted in Figure 14.24. Here the effect of s on the degradation on insertion loss is illustrated using a 30GHz microstrip coupled line filter[14.27]. Increasing the loss tangent a decade from 1 x 10-4, where the loss is insignificant, to 1 x 10-3 results only in equal to 8 x 10-3, an increase of 0.05 dB in filter loss. At a

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however, the authors determined the loss approaches 3dB, a significant increase, and one which severely increases receiver noise figure. While the authors were concerned only with LTCC , their results are universally applicable. They also showed the effects of surface roughness on filter loss, and concluded that the filter insertion loss increased about 0.5dB from 2dB as the surface roughness increased from 8 to 24 µinches.

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There are several methods of realizing microwave circuits. Each technology has its own advantages and disadvantages with respect to cost, reliability, circuit functionality, Q or other special requirements. The following sections review the more common deposition and definition technologies for applicability to given requirements.

References

14.1. C. Y. Ho, "VSWR, Power Dissipation: Keys to Film Resistors" Microwaves December (1981) pp. 69-78 14.2. P DeGroot, "The Influence of Termination Effects on the Behaviour of Thin-Film Resistors" Hybrid Circuits, No. 14 September (1988) pp30-3 14.3. T. Pfieffer and R. J. Bouchard 'Modeling of Thick Film Resistors", Ceram. Trans., vol. 33 (1992) pp405-18 14.4. M. Prudenziati et al., “Recent Developments in Condensed Matter”, vol. 2 (1981) pp. 399-407 14.5. M. A. Jupina et. al., "Characterization of Thick Film Resistors up to 18 GHz for Wireless and RF circuit Applications", Proc. 1999 Intern. Symp on Microelectron., Chicago, IMAPS, Oct. 26-8, (1999) pp94-9 14.6. C. Wilson and J. Gipprich, "Integrated Resistor Networks for High Frequency Multi-layer PCB"s Microwave J., Feb. (1998) pp68-82 14.7 M. Caulton, Sarnoff Laboratories, Princeton N.J.. Private communication 14.8. R. Wu et. al., "Buried Passives With Thick-Film Processes on Alumina for High Frequency Applications" 2001 Proc. Intern. Conf. on High-Density Intercon. and Systems Pkg., Santa Clara, IMAPS April 17-21 (2001) pp245-50 14.9. S. K. Bhattacharya et. al., "MCM-L Compatible Integrated Resistors and Capacitors" 1998 Intern. Symp on Advanced Packaging Matls., IMAPS, IEEE-CPMT, Chateau Elan, Georgia, Mar. 15-18 (1998)pp295-9 14.10. G. T. Stauf et. al., "Thin Film High K Dielectrics for Integrated Passive Devices" 1996 Proc. Symp on Microelectron., Minneapolis, IMAPS (Oct 8-10 1996) pp349-51 14.11. A. I. Kingon et. al., "Thin Film Capacitors Embedded into High Density Printed Circuit Boards" Proc. 2001 Intern. Symp on Microelectron., Baltimore, IMAPS Oct. 7-9 (2001) pp448-51 14.12. G. Kniajer et. al., "Low Loss, Low Temperature Cofired Ceramics with Medium Dielectric Constants", Intern. J. Microcircuits and Electron. Pkg., Vol 20, No. 3 (1997) pps 246-53

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14.13. A. H. Feingold et. al., "Lead Free Dielectric Tape System for High Frequency Applications", 2001 Proc. Intern. Symp on Microelectron., Baltimore, IMAPS Oct. 7-9 (2001) pp133-7 14.14. Zhang et. al., "Higher K Low Loss Dielectric Ceramic Cofireable with a Commercial LTCC Tape System" Proc. 2001 Intern. Symp on Microelectron., Baltimore, IMAPS Oct. 7-9 (2001) pp448-51 14.15. D. A. McLean, IEEE Intern. Conv. Record, pt .7, Electron Devices, Materials and Microwave Components, (1967) p108 14.16. S. Asai, et al., Extended Abstracts, Vol. 80-2, Electrochem Soc.,Fall Meeting, Hollywood, FL, Oct. 5-10 (1980) Abstract # 349 14.17. G. D. Alley, IEEE Trans. on Microwave Theory and Techniques, Vol. MTT-18, No. 12, December (1970) pp. 1028-32 14.18. T. H. Taylor and M. R. Williams, 27th Electron. Comp Conf., Arlinton, VA May 16-18 (1977) pp.48-55 14.19. J. Muller et. al., "RF-Design Considerations for Passive Elements in LTCC" Proc. 1994 Intern. Symp on Microelectron., Boston, ISHM Nov. 15-17 (1994) pp.357-62 14.20. P Pieters et. al.,"High-Q Inductors for High Performance Integrated RF Front-End Sub-Systems" Intern. J. of Microcircuits and Electron. Pkg., Vol. 23, #4, (2000) pp.442-50 14.21. H. Sobol and M. Caulton, Advances in Microwaves, vol 8, Academic Press, NY pp11-66 14.22. E. Wilkinson, "An N-Way Hybrid Power Divider", IEEE Trans. on Microwave Theory and Techniques vol. MTT-8, No. 1, Jan. (1969) pp. 166-8 14.23. W. Funk and W. Schilz, Radio and Electronic Engineering, 44, #9, September (1965) pp. 129-138 14.24. A. Presser, IEEE Trans. on Microwave Theory and Techniques, Vol. MTT-26, No. 10 October (1978) pp. 801-5 14.25. A. Levy, Final Report AFWAL-TR-84-4030, Contract #FO 863580-C-0243, May (1984) Air Force Materials Laboratory - Wright Patterson AFB OH 45433. 14.26. T. C. Edwards, “Foundations for Microwave Design”, p 155, John Wiley & Sons, New York (1981). 14.27. Z. Tian et. al., "The Influence of Materials Properties on the Performance of Microwave Planar Components", Proc. 2001 Intern. Symp on Microelectron., Baltimore, Oct. 9-11, (2001) pp. 161-6.

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16.20. F. K. Shokoohi et al., Appl. Phys. Lett., vol. 55 (25), (18 Dec.

(1989) p 2661-3

16.21. A. Mogro-Camparo et al., Superconducting Sci. Technol. vol. 3,

(1990) p537

16.22. K. B. Bhasin et al., NASA Technical Memorandum 103235 p185

16.23. S. Matsui et al., "Reactive Ion Beam Etching of Y-Ba-Cu-O

Superconductors" Appl. Phys. Lett., vol. 52, (1) (4 Jan. 1988)

pp69-71,

16.24. Y. Nishi et al., "Rapid Rate Ion Milling for the High Tc

System" J. Matl. Sci. Lett., vol. 7 (1988) pp281-2

16.25. A. Inam et al., "Pulsed Laser Etching of High Tc Superconducting

Films" Appl. Phys. Lett., vol. 51 (10), (5 Oct. 1987) pp1112-14

16.26. D. Kalokitis et al., J. Electron. Matl., vol. 19, #1 (1990) p117

16.27. G.-C. Liang et al., 1994 IEEE MTT-S Digest, IEEE (1994) p183

CHAPTER 15 PACKAGING The three major packaging levels or divisions are: (1) device and carrier; (2) mother board or interconnect board; and (3) enclosure. In some circuits, levels 1 and 2 may be combined, as in passive or some multilevel circuits. The ultimate goal of all levels is to insure signal integrity and impedance matching with a minimum of reflection and distortion, low thermal resistance, good electrical isolation and protection of the component elements. The mechanical, thermal and electrical designs of the carrier and/or enclosure are interdependent because of the short wave lengths involved. Before deciding on a package strategy, a number of issues must be addressed: Electrical requirements, (insertion loss, etc.)

Level of integration

Substrate attachment

Interconnection strategy

Connector requirements

Enclosure/Carrier material selection

Cost

An overview of those concerns within the scope of this test will be given the succeeding sections. For an excellent monograph on packaging design guidelines the reader is directed to Pecht[15.1] Materials selection impacts performance, reliability and cost. In some cases, conventional monometallics as shown in Table 15-1, are being supplanted by a variety of advanced composites with superior properties which provide improved dimensional stability and thermal management of RF/microwave packaging, including: extremely high thermal conductivities (over three times that of copper) low, tailorable coefficients of thermal expansion extremely high strength and stiffness lower density lower cost, net shape fabrication processes The payoffs are:

reduced thermal stress and warpage

simplified thermal design and lower junction temperature

possible elimination of heat pipes

weight and size reduction

increased reliability

potential cost reduction

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These advanced materials are now being used in numerous parts, with annual production rates in the millions. One of the more successful of the metal matrix composites is silicon carbide particle-reinforced aluminum (Al/SiC), which was first used in microelectronic and optoelectronic packaging in the early 1980s[15.9]. Some Al/SiC parts reportedly are now selling for the same price as that of the machined copper they replace.

15.1 Level of integration. Why integrate? Current packaging technology is directed mainly towards packaging specific active devices with limited I/O ports or the integration of a number of components in a metal housing with many RF connectors and feedthroughs which may or may not be hermetically sealed. This technology generally suffers from a high parts count, large numbers of wire interconnects, limited frequency range and chip area, high manual labor content and thus high cost.

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The lowest possible cost for a complete functional module, then, depends on the optimization and integration of a large number of interactive components and technologies. Cost reductions in packaging cannot be successfully addressed without taking into account individual chip properties and testing requirements. MMIC yield is the largest cost driving factor, but significantly, interconnect failures account for about 1/3 of all circuit failures. Aside from the foregoing yield losses, there are also losses due to handling, mounting and interconnecting the relatively large, fragile MMIC chips. At any given state of the technology there is probably a particular chip size of certain complexity that will give the optimum performance, handling, testing and interconnect yields. The object is to properly integrate components without introducing parasitic reactances resulting from the connections or package. If the physical size of components such as resistors and inductors is small, compared to the wave length, they will not be overwhelmed by parasitic reactances. If they are too large, they will resonate and become ineffective. Table 15-1 compares some of the advantages and disadvantages of integration vs. discrete packaging.

Package integration is a multi-disciplinary field, requiring innovative inputs from materials, mechanical, electrical and process engineers. It is imperative to: Define advantages

Set goals

Do not overintegrate.

15.2 Interconnects. An area of vital importance for the packaging of MMIC chips is the interconnection between chips and from chips to the outside world. They may be categorized by; post assembly interconnections such as wire and ribbon bonds and integrated systems where the interconnection is an integral part, such as traces on boards and

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solder bumps for chip scale packaging. Wire and ribbon bonds will be discussed first. 15.2.1 Round wire. The most common method of chip interconnection is wire bonding. While wire inductors are universally used to advantage in tuning, as interconnections they are limited by high parasitic inductance. From Terman[15.2] the free-space inductance, independent of frequency, of a wire of diameter (d) and length (1) is: where all dimensions are given in mils. The inductance increases commensurably with length. The inductance per 100 mils (L/1) is plotted in Figure 15.1, as a function of the l/d ratio. Thus, every attempt should be made to keep the wires as short as possible. The diameter of the wire should be as wide as possible since the Q of round wire with resistivity is:

In practice, however, the wire diameter is limited by the size and spacing of the bonding pads on the active devices. These frequently range about 1-2 mils so that it is often necessary to use 0.7 mil wire. vs. wire length illustrates two important Figure 15.2, a plot of points. First, for a given wire length the Q/L ratio increases with increasing frequencies, due to the shallower skin depth reducing the

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surface resistance. Secondly, this advantage rapidly diminishes as the length of bonding wire is increased.

Inductance, L, may be defined as the ratio of magnetic flux to the current I that created it. In bond wires, inductance exists both internally and externally, as shown in Figure 15.3. It was pointed out in the section on skin effect that at DC the internal current I, flows uniformly through the conductor and with increasing frequency the current, I, is forced closer to the surface. A wire’s internal inductance decreases as the square root of the frequency, or –10dB/decade. Increased current crowding results in less current flow, with reduced Tsai, et. al.,[15.3] measured the self and mutual inductance of adjacent wires bonded as shown in Figure 15.4. The mutual inductance of the 2nd to 5th bond wires are relatively low, about 0.03 nH, and essentially converge below 2mm of wire length. For simplicity the data points are combined in this region. As expected, the mutual inductances decrease with distance from the reference wire and increase with frequency. Their contribution to the self-inductance of the reference wire is also a function of distance and frequency.

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The height of the wire above the ground plane also has some effect. For short lengths of wire, there are very little differences with height changes, but increasing wire length and increasing height above ground can increase the inductance by as much as 35%. The additional inductance introduced by looped wirebond self-inductance must be considered. This inductance is proportional to the radius of the wire loop by

permeability of free space, r = radius of wire bond

15.2.2 Strip ribbon. Higher frequency applications, from Ku band into millimeter place even higher demands on the interconnections Wire bonds, have been shown to behave as parasitic inductance, increasingly degrading signal integrity at the higher frequencies. Ribbon bonding is the most traditional way to reduce parasitic inductance between active devices and the board interconnection. Ribbon bonding is frequently used to interconnect substrates, as wrap-arounds and to connect substrates to the outside world through RF connectors (launchers). Ribbon behaves much like wire as shown in Figure 15.6 which plots the ribbon inductance against the l/w ratio.

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The type of lead and its attachment method directly affect microwave device performance. For example, Kent and Ingalls[15.5] studied the effect of type of attachment on capacitor performance by varying the location and type of lead. They obtained the best performance using a ribbon lead, the worst using a simple wire. They reported only marginal improvement using three wires to try and minimize the inductance effects. Performance curves for single wire and ribbon are shown in Figure 15.6. The lower return and insertion losses exhibited by the devices using ribbon leads are directly attributable to the lower inductive parasitics exhibited by this type of lead. Whenever possible wire bonds should be planarized. Summarizing wire and ribbon bonding: High conductivity is important for high Q Use as wide a ribbon and wire as possible Keep interconnect as close to ground as possible Keep interconnect as short as possible Use more than 1 ribbon or wire in parallel to reduce inductance.

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Figure 15.6 illustrates performance differences, not only between wire and ribbon bonding, but between types of wire bonds as well[15.5]. MMICs were bonded to lines by ball, wedge and ribbon bonding. In terms of losses, 1 mil gold wire ball bonded> 1 mil gold wire wedge bonded> 2 mil x 1 mil gold ribbon bonded. Using a criteria of -15dB as maximum return loss, the author concluded that even ribbon bonding was applicable to no higher than 40GHz. Generally ball bonding is preferred since it is much faster than wedge bonding on a similar machine platform. Ball bonding requires only three axes of movement (XYZ), while wedge bonding requires four (XYZØ). The theta motion increases bonding time, and lowers productivity. Nevertheless, as crowded lower frequencies drive designs to higher frequencies, the use of ribbon bonding to reduce interconnection losses will also increase. To offset the frequency limitations imposed by bonding parasitics, Huang [15.6] described the intentional addition of metallization in the substrate bond pad which creates a specific distributed shunt capacitance. This combination of "capacitance" and wire bond inductance, establishes a predetermined characteristic impedance. In production, wire lengths are maintained between 10 and 14 mils and Using this technique, the author metallization dimensions to

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was able to achieve a return loss of -15dB at 50 GHz for ball bonded wires and, for ribbon bonds, similar losses over 100 GHz.

15.2.3 Modified TAB. Tyler[15.7] has described a controlled impedance, multilevel structure for GaAs MIMIC packaging, separating the signal and ground planes with a thin layer of polyimide. In this method metal fingers were etched and plated and windows in the polyimide were opened by laser ablation. He compared the microwave performance of these structures to interconnects formed with conventional gold wire bonds up to 20 GHz. His data are presented in Table 15-3 and clearly show the improvement in attenuation losses of the TAB interconnect relative to wire and ribbon bonds at higher frequencies. S-parameter comparisons reinforce these conclusions and that controlled impedance structures would demonstrate even lower losses with a MMIC optimized (designed) for TAB instead of wire bonds.

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A similar interconnect technology[15.8] that also overcomes the drawbacks of wire bonds is illustrated in Figure 15.7.

The individual fingers have good plated bumps to facilitate bonding to the device bond pads. A polymer ring, photolithographically defined to exacting dimensions keeps the fingers in place and insulates the fingers from the device preventing shorting. This also facilitates bonding to internal pads without the looping associated with bond wires. Bond contact areas of 1 x 1 mil with spacing of 1 mil or less can be routinely achieved with this technology. By shaping the width and general geometry, the interconnect medium can become part of a tightly controlled transmission line or matching network; something difficult to maintain with wire bonds. Pretesting of devices can also be accomplished with this technology. The relatively large cross-section of this interconnect can also act as a

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thermal conductor in cases where high power dissipation is not of key importance. 15.2.4 Integrated Wiring. Wires are also used to interconnect components such as couplers, as shown in Figure. 15.8a. Parasitics introduced by the looped wires frequently create performance shortfalls in these critical components. One alternative is the use of air-insulated crossovers in which the interconnect is electroplated over a sacrificial conductive layer. Once the conductive support is removed, the resultant air gap separates and insulates the interconnect from the underlying metallization. This structure has the lowest capacitance since the dielectric constant of air is 1. However, such structures are subject to shorting out and frequently a drop of polyimide, is put under the bridge as a mechanical support. Another cost effective approach is to fabricate the interconnect over an accurately defined polymer insulator. An example of this, developed at the David Sarnoff Research Center, Princeton NJ, is shown in Figure 15.8b.

15.2.5 Enclosures. It was pointed out at the beginning of the is section how material selection impacts performance, reliability and cost. In addition, Table 15-4 lists the problems which must be addressed prior to any final packaging decision.

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15.2.6 Thermal Expansion. Microelectronics' assemblies are necessarily constructed from materials with a wide range of thermal expansion coefficients. During the assembly and packaging of fabricated devices different expansion coefficients between constituent parts introduce the potential for stresses and attendant changes in electrical and mechanical properties. As the system cycles between ambient temperature and thermal equilibrium of its active state, further stresses will be introduced. The compatibility between the device and carrier becomes important. Clad substrates, for example, are complex, composite structures of polymers, refractories and/or glasses. These materials are generally not symmetric around their mid-plane. Their electrical and mechanical anisotropy has already been discussed. As the board temperature changes, the differences in thermal expansion between carrier and mounted devices will give rise to stresses in solder joints and leads connecting the device to the carrier. Additionally, their planar form and large area-to-thickness ratio make clad substrate materials susceptible to deformation. Stresses then, large enough to deflect the board or attached components, can be generated during high temperature processes such as soldering. Examples of temperatures which may be encountered are illustrated in Table 15-5, which lists typical temperatures of some common assembly processes. Assembly usually proceeds in descending of thermal order. The problem in matching the thermal expansion the various materials used in microwave packaging can be appreciated from Figure 15.9, where % linear expansion is plotted against temperature in °C.

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Clad substrates are not included in Figure 15.9 since their thermal expansion is variable, depending on the cladding thickness and amount of cladding remaining after pattern etching. Further, as pointed out earlier, expansion values in the planar and Z directions differ. From Figure 15.9, it is apparent that many of the metals used for enclosures/carriers and interconnects expand about 2-3 times as much as the ceramic substrates and active devices, an undesirable condition requiring expert package design. Substrate attachment to the metal enclosure is complicated by the large difference in expansion coefficient between the metal enclosure and the ceramic substrate. This, and other issues relative to substrate attachment, are covered in the next section. 15.2.7 Substrate Attachment. Substrate attachment is one of the critical steps that is beginning to receive the attention it deserves. At this step the substrate is populated (expensive), ready to be inserted into the finished enclosure/carrier (expensive). To enable the substrate to withstand thermal cycling without cracking solders are generally used. These are compliant, and have high thermal and electrical conductivities. In Table 15-6, are listed some representative packaging solders used in solders used for substrate attachment. The temperature range is where the solder flows, and is usually at least 30°C higher than the alloy melting point The solder is usually chosen based on the metallurgies of the substrate ground, the enclosure/carrier and the temperature of preceding and next process. The increased emphasis on no-clean solder flux raises new issues regarding residual flux properties. Duffy et. al.,[15.10] found up to an 11% increase in effective dielectric constant and smaller changes were measured on boards where residues were produced during reflow of no-solder pastes, resulting in line impedance changes of up to 2.8%.

242

243

Capacitance introduced by the additional dielectric between traces may contribute to additional parasitics. With increasing demand for impedance tolerance levels of less than 5%, little room is left for processing errors which impact line impedance. 15.2.8 Grounding. With increasingly higher frequency requirements, mechanical packaging concerns are affected in ways that are not altogether obvious, even to experienced microwave designers. All dimensions become smaller, resulting in tighter tolerance and alignment requirements. Excellent ground continuity is critical to good high frequency performance, for without proper ground, performance seriously degenerates. The causes of improper grounding are numerous. Any abrupt discontinuity in the ground connection disturbs the field, and power will be redirected in undesirable directions. The importance of good ground continuity cannot be overemphasized. Figures 15.10a, b and c illustrate situations, where, during substrate mounting, discontinuities exist. Such discontinuities should be avoided or compensated for. Even so, compensation can introduce other problems, as excessive inductance due to the long ribbon in 15.10c Another assembly strategy which introduces ground discontinuities is where two substrates are attached to a common center ground with wire or ribbon. Inductance varies from bond to bond introducing undesirable parasitics and variability. 15.2.9 Vias. Vias in both hard and clad substrates are generally used to provide close access for the device to ground. Two basic problems face the circuit fabricator and designer. First the added inductance is a function of the diameter to height ratio (d/h) of the via[15.11], and decreases with increased d/h values. In addition to reducing the inductance, larger d/h ratios facilitate coating inside the via. The data is

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based on the assumption that the hole is totally filled with a dense, lowresistive material.

Electroless deposition of copper poses severe environmental problems. Treatment of noxious fumes such as formaldehyde and effluent into the waste stream is expensive and an environmental concern. Many companies have considered replacing the electroless process with alternative dry metallization by sputtering. Ion plating[15.12] may be used. In this technique the material to be deposited is conventionally evaporated. A separate glow discharge is maintained near the substrate at a pressure somewhere between and Torr. The evaporant atoms enter the plasma where they lose much of their directionality and coat the interior of substrate artifacts such as holes. The conditions have to be properly chosen so that the rate of deposition is higher than the backsputtering rate.

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If the hole is totally filled with a dense, low-resistive material, it may be treated as a short piece of round wire, its inductance closely approximated by equation 15-1. Gipprich and Grice [15.13] investigated the ground circuit problem and network equivalent circuits for single and multiple vias. Their table on the effects of via inductance on insertion loss has been plotted in Figure 15.11. At zero inductance the via insertion loss is infinite, and the loss for both 20 and 40 dB attenuators are 20 and 40 dB respectively. As the via inductance increases, the losses for the 40 dB attenuator and via increase far more rapidly than for the 20dB attenuator. The authors went on to show that use of multiple vias (as with multiple wires) reduced circuit losses. They arrived at a set of via design guidelines: Small Bond Pads: Use large diameter vias Extend the bond pad beyond chip boundaries and add more vias Medium Bond Pads: Fill the entire pad with vias Smaller vias, closely spaced, are generally more effective than larger vias Large Bond Pads: Locate via arrays at I/Os A 5x5 via array is generally adequate

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Much of the above work assumes the vias are completely filled. This is not always the case. Tubular inductors described by Grover[15.14] closely approximate the configuration of a plated through hole or via.

where, l,

and

are in cm.

The value of ln is also in Grover, Table 4. provides a polynomial for convenience:

Waddel[15.15]

Many companies have considered replacing the electroless process with an alternative dry metallization. Vapor deposition techniques usually infer the use of some type of sputtering as a preferred method of depositing seed metal inside the via for subsequent electroplating and via filling. The random nature of the process reduces shadowing, symptomatic of line-of-sight evaporative methods. Even here, sputtering onto both sides of the substrate is usually required to ensure good hole coverage. Pargellis[15.16]presented data which suggests that for holes with aspect ratios (d/l <3) the electroless process may be replaced by sputtering. With holes where d/l>3, only the seeding part of the electroless process may be replaced since the required deposition time becomes excessive for deposition of a functional film. His data is presented in Figure 15.12. At the inside corner near the top of a hole with an aspect ratio of 1, the thickness only approaches 50%. Sputtering onto both sides of the substrate is usually required to ensure good hole coverage. When evaporation is used, the substrate is angled and rotated to provide better access of the evaporant into the via openings. Partially or overfilled vias may be problematic when spinning on resist and other polymers. It is a fact that with vias present, striations in the polymer (localized areas of reduced thickness) appear, Besser and Louris[15.17]. Other methods must be used to provide uniform, liquid polymer films. These include spray coating[15.18], dip coating[15.19], meniscus coating[15.20]. Screening has also been used for via fill. Controversy still abounds regarding the necessity of post-processing laser drilled holes in

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96% aluminum oxide to insure reliable film-ceramic and ceramic-ceramic adhesion. In their incisive article, Gianni et. al., [15.21] observe that although the use of screen printing for via metallization is a common practice in the hybrid industry, “published information on this topic is scant, at times contradictory, and, because of proprietary restraints, generally of little use.” While the authors were concerned with the reliability of only the metallization of the via wall, their comments are even more applicable to fully filled vias, especially in aluminum nitride, where thick film adhesion may pose a problem. They also concluded that, from their literature survey, the best approach is one of trial-anderror, tailored to one’s facility, materials and expertise. Vacuum is generally employed to assist in pulling the screened paste into the via. This method is particularly successful with LTCC, where substrate thickness typically don't exceed 0.010 inches. As a result

248

l/d ratios rarely exceed 5. Incomplete filling may result from improper screening technique as Figure 15.13, a partially filled 0.015” wide via in 0.025” aluminum oxide illustrates. The via was only partially filled as the print has not been completely forced through the via. In addition, trapped particulates are almost impossible to clean out. Continued application of vacuum is ineffective as the hole is now sealed. As a consequence, opens may be created if metal from the second side screening does not make contact. A proprietary technique uses metal composites for via fill[15.22]. By varying the composite ratio, the expansion coefficient of the via material can be tailored to match the substrate. An fracture graph of a 0.010” via in 0.025” high density alumina is shown in Figure 15.14. The taper is typical of laser drilled holes. The via opening appears to have been completely filled with dense metal. As a result, via parasitics are expected to be low and thermal transfer high. Two level, thin film metallization appears on the substrate surface. A novel approach to the grounding problem has been described by Sechi et. al.,[15.23]. This approach uses a more sophisticated technology than standard via based hybrids by laminating ceramic blocks with thin metal foils. These sandwiches are sliced into thin substrates with veins of metal running the substrate length. The technique is the outcome of attempting to find a solution to several requirements: A substrate material which can be batch-processed; Good RF grounds having low resistance and low inductance; A substrate material offering high thermal conductivity; A technique which uses thin film deposition of high Q lumped inductors and capacitors; A medium which enables active devices to be mounted onto the circuit without wire bonds; and A medium offering small size, low weight and potentially low cost. Either selectively glazed alumina and beryllia are used so that high Q lumped components can be defined using thin film techniques. Many of the processes applicable to MMICs have been adopted such as overlay capacitors, thin film resistors and airbridge interconnections. Figure 15.17 shows a cross-section of the technique. Ground septa are provided wherever the circuit topology requires low inductance ground returns. The FETs are flip mounted onto the substrate to provide good heat conduction and low parasitic interconnections to the RF circuit. Xband and Ku-band power amplifiers have been manufactured. The size of the circuits produced is quite competitive with GaAs MMICs, being about 5 mm x 5 mm. Such a technique is seen as being particularly attractive for power applications at a relatively simple circuit complexity level. Multiple-grounded areas can be envisaged using such a construction.

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Perko et. al. [15.24] describe a process where Corning Glass Code 7070 sealing glass, approximately 200µ thick is bonded to a 75mm silicon carrier. Passive components, interconnections and via metallization are provided by thin film circuitry on the smooth glass surface. Etched holes in the glass provide the die with a direct, low inductance connection to the Silicon carrier. The wafer form factor is a significant advantage in batch manufacturing. Automated cassette-tocassette handling may be used without modification. Amplifiers up to 18GHz were successfully batch processed and tested. The use of the integrated metal ground(s) eliminates many of the problems associated with substrate-to-substrate and circuit-to-ground connections. Significant cost savings are accrued by eliminating wiring since the miniature ceramic circuits can be directly bonded to the enclosure/carrier. 15.2.10 Platability. Plating of the enclosure is needed to convert an otherwise inert surface such as aluminum oxide/aluminum into one which is conductive. Examples are shown in Table 15-8.

250

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15.2.11 Time Domain Reflectometry (TDR). Modeling of the bulk of high frequency circuit applications involves design and fabrication prior to packaging. As such the parasitic effects of the package are very difficult to predict. S-parameters, described earlier, yield an overview of the total device-under-test (DUT) and for simple systems, standing wave ratios (SWR) it is important to be able to analyze signal integrity through interconnection paths. The difficulty in measuring the attributes of high frequency packages is increasing as interconnect structure becomes denser and more complex. Isolation, not only of the effects of discontinuities in the interconnection scheme on package performance, but of the effects of launchers themselves, is difficult. The most common method for evaluating a transmission line and its load has traditionally involved applying a sine wave to a system and measuring waves resulting from discontinuities on the line. From these measurements, the standing wave ratio (SWR) is calculated and used as a figure of merit for the transmission system. When the system includes several discontinuities, however, the standing wave ratio measurement fails system is to be determined, SWR measurements must be made at many frequencies. This method soon becomes very time consuming and tedious. Time Domain Reflectometry (TDR) is a useful tool, for design and test, to understand how circuits and interconnects, either on the board or in the package behave. In this case, a signal generator produces a sinusoidal signal whose frequency is swept to stimulate the device under test (DUT). The network analyzer measures the reflected and transmitted signal from the DUT. The reflected wave form can be displayed in various formats, including SWR and reflection coefficient. An equivalent TDR format can be displayed only if the network analyzer is equipped with the proper software to perform an Inverse Fast Fourier Transform (IFFT). This method works well if the user is comfortable working with S-parameters in the frequency domain. However, if the user is not familiar with these microwave-oriented tools, the learning curve is quite steep Furthermore, most designers prefer working in the time domain with logic analyzers and high-speed oscilloscopes. When compared to other measurement techniques, time domain reflectometry provides a more intuitive and direct look at the DUT’s characteristics. Using a step generator and an oscilloscope, a fast edge is launched into the transmission line under investigation. The incident and reflected voltage waves are monitored by the oscilloscope at a particular point on the line. This technique essentially introduces a fast edge step to a transmission system, and then observing the size and location of the reflected energy from that incident step In essence, the effects of electrical discontinuities and design errors leading to impedance mismatch, may be observed as the signal propagates along the interconnect. Additionally,

252

TDR may be used to obtain S-parameters of the interconnect and network.

A software library containing circuit parasitics and lossless interconnect components is first developed and then applied to development of an equivalent circuit model. The experimental wave form is then compared to the simulated wave form. Iterative modeling results in optimization. Figure 15.15 shows the responses from a short, load and open circuit. The real power of TDR is being able to spatially resolve different parts of DUT in terms of impedance and reflections and the relative simplicity of the necessary equipment. An input step is created in one channel of a sampling oscilloscope and reflections are observed on the same channel. The TDR is calibrated against a standard short and load to reference voltages and time. Figure 15.16 is a simplified block diagram of a time domain reflectometer.

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Narrowing of the trace width result in a an increase in inductance while broadening results in a capacitive discontinuity, Figure 15.17.. Reflections due to the substrate connection illustrate how this technique can be used to differentiate attachment methods. For example, wire bonds and TAB yield different inductive responses and as expected, wire bonds exhibit higher inductive responses than TAB.

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References 15.1. M. Pecht, "Integrated Circuit, Hybrid and Multichip Module Package Design Guidelines", John Wiley and Sons, Inc., New York (1994) 15.2. F. E. Terman, Radio Engineers Handbook, McGraw-Hill, NY, (1943). 15.3. C-T Tsai et. al., J. Microelectron. and Pkg., ISHM vol. 18, #3, (1995) 15.4. G. Kent and M Ingalls, “Hybrid Circuit Technol., Nov. (1988) 15.5. R. Huang, "Novel Interconnection Structure for High Volume Millimeter Wave Products", HEI, Inc. Victoria, MN to be published 15.6. R. G. Huang et. al., United States Patent 6, 294, 966 Sept. 25, 2001 assigned to HEI, Inc. Victoria, MN 15.7. J. R. Tyler, 1990 Proc. Intern. Symp Microelectr., Oct. 15-17, Chicago, IL (1990) pp 468-473 15.8. Brown, R., Connection Technology July (1988) 15.9. J. Thaw et. al., "Metal-Matrix Composite Microwave Packaging", SAMPE J., vol. 23, #6 (1992) 15.10. M. Duffy et. al., "R.F. Characterization of No-clean Solder Flux Residues", 2001 Internat. Symp on Microelectron., Baltimore, Oct. 9-11, (2001) pp. 138-43 15.11. M. E. Goldfarb and R. A. Pucel., IEEE Microwave and Guided Wave Lett., 1, #6, June (1991) pp. 135 15.12. G. M. Mattox, Electrochem. Tech., vol 2, (1964) p295 15.13. J. Gipprich and S. Grice, "The Analysis and Modeling of Ground Circuit Interconnects for Multilayer Microwave Circuits", 1995 Intern. Symp on Microelectron. ISHM Los Angeles (1995) pp. 436-40 15.14. F. W. Grover, "Inductance Calculations", Van Nostrand, Princeton NJ. 1946. Reprinted by Dover Publications, (1962) 15.15. B. C. Waddel, "Transmission Line Design Handbook", Artech House, Norwood, MA 1991 15.16. A. Pargallis "Distribution of Copper Deposited Inside Holes by Sputtering", J. Vac. Sci. and Technol. A5 (6) Nov/Dec (1987 )pp. 3412-16 15.17. R. S. Besser and P. J. Louris, "Development of a Spray Photo­ lithographic Process for Selective Electroplating of Microwave Hybrids by Using DoE and SPC Methods" 1993 Intern. Symp on Microelectron. ISHM, Dallas (1993) pp.114-9 15.18. C. J. Brinker et. al., Proc. MRS Symp. vol. 284 (1993) p.469 15.19. H. Bok and H. S. Tong, SPIE Proceedings, vol. 1815 Display Technologies (1992) p.86

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15.20. M. Vijan, United States Patent 4, 696, 885 Sept. 29, 1987 assigned to Energy Conversion Devices, Inc., Troy, MI 15.21. E. Giani et. al., Hybrid Circuits, no. 24, 11 Jan. (1991) 15.22 R. Panniker, "Thermal Substrates: A New Microwave Substrate Technology for Thermal Management and Low Parasitic Elements", Microwave J. October (1990) pp. 99-105 15.23 F. N. Sechi, et. al., RCA Review vol. 43, June (1982) pp. 363-74 15.24. R. J. Perko et. al., "MMIC vs. Hybrid: Glass Microwave ICs Rewrite the Rules", Microwave J. vol. 11, Nov. (1988) pp. 67-78

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CHAPTER 16 SUPERCONDUCTIVITY The application of high temperature superconductivity for microwave circuitry is based on the belief that these new materials will form the foundation of a new technological era. This optimism and enthusiasm not withstanding, the preparation of these materials suitable for practical applications still remains challenging. The more critical areas are reproducibility, quality synthesis and processing, particularly over large substrate areas. In a very alluring area, integration with cooled semiconductor devices and semiconductor processes and MCMs, a wide range of problems exist in deposition strategies, insulating materials, patterning and etching. The general requirements for microwave superconducting thin films are listed in Table 16-1.

The earlier development of planar structures such as microstrip provided significantly improved design flexibility over bulky waveguide. However, the surface resistance of even the best normal conductors, such as copper and gold, may have unacceptable high propagation loss. Therefore, among the wide variety of possible applications, those based on the greatly reduced loss properties of superconducting materials have the earliest impact in the form of passive microwave devices. The application of these devices can be grouped into three categories:

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Higher Q: Performance characteristics vastly superior to conventional components (e.g. ultra high-Q values) Miniaturization: Performance comparable to conventional components, but at greatly reduced volume and weight and with significantly lower power dissipation. Unique Properties: Providing features not available by standard devices (e.g. switching from resistive to highly conductive state due to small change in temperature, critical current or magnetic field).

Unfortunately, the specific physical and electronic properties of the known cuprate oxides, which all crystallize in layered perovskites, may limit their design and performance. As such, progress in superconductive applications is materials and process driven. Nevertheless, significant strides have been made in applying superconductor thin films over a wide range of frequencies. This is illustrated in Table 16-2 which summarizes some of the commercial and military applications of superconductor thin films. At present the applications range over two decades of frequency, from less than 100 MHz to 11 GHz. (lanthanum aluminate) substrates and YBCO (yttrium barium cuprate) films are the materials used almost exclusively. The following sections describe the factors which influence the properties of these complex oxides, deposited on substrates of different materials and some of the results on passive devices. First, however, a brief comparison of the differences between normal and superconducting films.

259

16.1 Properties of High-Tc materials. Superconductivity is characterized by the fact that the dc resistance sharply drops to zero below some transition point. For the dc resistance to become zero, only about 30% of the total electrons have to be superconducting since the current will always take the path of least resistance. Below this transition temperature once current is induced into a superconducting loop, it will circulate almost indefinitely. In regular metals the penetration of RF fields is governed by the well-known skin depth relationship given in equation 16-1. The surface resistance is given by:

It directly follows that losses in TEM transmission lines may be expressed as

where K is a geometric factor. For regular conductors, losses increase proportionately as When conventional metals are cooled their surface resistance also decreases, but moderately. For example, the surface resistance of a copper conductor may decrease by a factor of 3, (depending on material purity) between room temperature and 5-10K. This relatively small improvement in performance hardly justifies the cooling expense. Superconductors are fundamentally different. Field penetration is not governed by skin depth, but rather the London penetration depth a measure of the distance a magnetic field can penetrate the superconducting material. is typically 100-200nm and, most importantly, independent of frequency. At low frequencies, the thickness of a superconductor can remain thin and still exhibit very low RF losses. Unfortunately, this behavior does not totally apply to the RF resistance, an important microwave property of a superconducting film. In a superconductor the oscillating motion of the superconducting electrons generates a reactive voltage. RF losses are induced when this reactive voltage acts on the non-superconducting electrons (normal electrons). At higher frequencies the electrons oscillate faster, increasing dependence of with frequency. the RF losses. This accounts for the Fortunately, losses are reduced as the temperature is lowered below because of the increasing ratio of super-conducting to normal electrons with decreasing temperature. For this reason it is desirable to have the operating temperature as low as possible below the transition

260

temperature. This makes materials with higher transition temperatures, such as thallium based superconductors, more attractive for microwave applications. At typical microwave frequencies the surface resistance, is so small that its strong frequency dependence has little effect. However, at some frequency, even the best high-Tc material will become lossier than regular metals whose surface resistance increases only as the square root of the frequency. For practical microwave applications with losses well below those of copper, the operating frequency must not be too high and the operating temperature, as discussed above, should be as low as possible below the superconducting transition temperature. The for patterned superconducting film at 77K is at least one order of magnitude lower at 10Ghz than even copper at 4K, but still about one order of magnitude higher than theoretical.

The absence of conductor restraints allows for the use of thinner substrates and increased circuit density with minimum losses. This is shown by the size comparison in Figure 16.1 between standard and superconductor circuit geometries. High dielectric constant substrates reduce both line width and conductor guide length The result is to markedly shrink the overall circuit volume, Table 16-3. The identical dimensions for conventional and superconducting circuits on .010" thick rutile clearly demonstrates that superconducting films by themselves do not generate a size advantage. It is the ability to use very narrow lines that permits the use of thinner, higher dielectric constant substrates. However, in the microstrip configuration even extremely narrow, thin superconductor lines on very thin dielectrics can be subject to excessive losses. To reduce losses other structures such as suspended stripline may be employed. The advantage of superconducting circuits for applications such as filters is lack of dispersion and not necessarily size reduction.

261

16.2

Materials Considerations

We have seen with conventional metals and substrates how the choice of materials and processes intimately affects circuit performance using relatively simple, well established materials and processes. Three additional factors critically influence the properties of complex superconducting oxide films deposited on various substrate materials: film

262

and substrate crystal structure, film-substrate interactions and film composition. Substrate interactions can be further sub-divided into: lattice matching, coefficient of thermal expansion matching and interdiffusion between film and substrate. These are summarized in Table 16-4 Annealing considerations have not been included since generically this process is part of film formation. 16.3 Substrate materials. Low loss (high Q) substrates must be used in order that circuit performance based on the low surface resistance of the superconductor is not offset by substrate dielectric losses. At 10 GHz, there is almost a 4-fold increase in for as increases from to [16.1]. The desired substrate properties for superconductors, are not totally dissimilar than those for conventional circuits

The substrate plays an active role in the formation of the superconducting film as well as providing mechanical and electrical support. The important substrate properties identified so far that are most critical in achieving high quality superconducting films are the crystal structure, lattice and thermal expansion match and chemical inertness. These substrate properties influence film growth primarily in three ways: lattice matching encourages the proper crystallographic orientation since the electrical properties are anisotropic, good thermal expansion matching inhibits microcracking in the film, and chemical stability reduces film-substrate interdiffusion and reactions which degrade the superconducting properties of the film. The preparation of high-Tc films involves the deposition of a number of constituents in a reasonably controlled manner and their crystallization in the correct structure, as well as the ensuring the proper oxygen content for hole doping. The

263

starting point for any deposition, thus, is the proper substrate and surface to obtain the desired film structure. A summary of the important parameters for substrates suitable for microwave and millimeter wave high-Tc components is listed in Table 16-5. 16.4 Expansion coefficient. High superconducting oxides have higher coefficients of thermal expansion (CTE) than many of the substrates upon which they are deposited. The thermal expansion of YBCO material abruptly changes at about 350°C and 650°C, which reflect changes in oxygen concentration and phase transition, respectively. Mismatch of thermal expansion coefficients between film and substrate are known to cause cracks in deposited films[16.2]. This fact has been one of the major obstacles to the preparation of superconductor films and integration with dielectrics and semiconductors. Ideally, both expansion and cell dimensions of the film and substrate should be very close. In reality the substrate used, as in conventional circuitry, is a compromise. 16.5 Buffer (barrier) layers. Unfortunately the substrate surface is not always amenable for generating the proper film orientation, and high processing and annealing temperatures promote some interdiffusion between film and substrate. A number of materials have been used between substrate and film to encourage proper orientation or to suppress chemical interactions. These buffer layers should have, at a minimum, the following properties: Be passivating, preventing interdiffusion Be itself unreactive Grow epitaxially and promote film epitaxy 16.6 Film formation. To obtain the proper stoichiometry, a variety of deposition techniques have been used. The general details of these deposition methods were covered earlier. The basic differences involve providing precise stoichiometry, proper phase and the ability to deposit onto both sides of the substrate. Vacuum based processes are more amenable to in situ oxidation which encourages the formation of the superconducting phases(s) at lower temperatures. The special requirements of the superconducting films may require some modification of thin film deposition techniques. In other cases, new deposition methods have been developed. These will be briefly described in the next section. 16.6.1 Off-axis sputtering. During the sputtering process using onaxis deposition, energetic ions stripped of their electrons in the plasma, or more often neutrals bombard the growing film[16.3]. The film

264

composition is modified by the resultant resputtering of selective components. Secondly, the film quality is further degraded by differences in angular distribution of sputtering yield. Finally, for the on-axis case, the composition of the film rarely matches that of the target, greatly complicating the process of determining and maintaining the correct target composition. In the off-axis case the substrate is positioned sufficiently far away from the target axis so that the sputtered material is deposited outside the region of direct on-axis negative ion flux, but still within the outer edge of the plasma region[16.4] Atoms that do impinge on the substrate are almost exclusively low energy sputtered neutral atoms that reach the substrate by diffusion. Even with reduced substrate bombardment, slight adjustments to target composition may be necessary to attain proper film stoichiometry. Sputtering rates using off-axis geometries are significantly lower than with on-axis sputtering, typically under 10nm/minute. Long sputtering times are somewhat offset by the fact that most films deposited in this manner may be annealed in-situ. Off-axis sputtering has been reported to improve the surface resistance of YBCO films on buffered sapphire. values as low as at 10 GHz and 77K were reported[16.5]. YBCO sputtered onto heated MgO substrates mounted off-axis at 45° reportedly had significantly lower of only 200 The Q of coplanar resonators made from these films were approximately one order of magnitude higher than comparable copper circuits. The authors report also that the microwave performance of their films was equivalent to high quality films deposited by laser ablation. YBCO ring and stripline resonators fabricated on lanthanum aluminate also showed superior performance compared to copper. Rs values of 300 were reported, the authors[16.7] also suggesting that improvements in performance could be expected with use of superconducting ground planes instead of the silver they used. 16.6.2 Pulsed Laser Deposition. The use of high energy lasers to irradiate and evaporate metals and dielectrics in vacuum is the basis of a technique called pulsed laser deposition. The interaction of high powered nanosecond eximer laser UV pulses with bulk targets results in evaporation and plasma formation of the target species followed by an isotropic plasma expansion and deposition onto the substrate. Although there is some slight spacial compositional variation if multicomponent targets are used, basically the stoichiometry of the target is preserved in the film. In principal, the laser is focused to about 0.5 mm to 1 cm onto a bulk sample of the material to be deposited. The irradiated target is oriented about 30° to the heated, receiving substrate. For maximum compositional uniformity, the laser beam can be rastered over the target[16.8}, or the target can be rotated or both. The substrate can also

265

be rotated. The alkaline earth composition of BSCCO films could be tailored using successive depositions from a multi-target system[16.9]. Some of the variables which must be controlled include power to the laser, angle between substrate and target, background atmospheric pressure and composition, substrate to target distance and substrate temperature. Film area coverage is dependent on spot size and depends on source material quality, in both purity and uniformity. For YBCO and BSCCO, in situ annealing in oxygen generally follows deposition. Researchers coated both sides of a 5cm substrate with YBCO films using direct radiative heating[16.10]. By exploiting the directed nature of the laser plume, they maintained good stoichiometry and thickness control. The slight degradation in properties of the first side were attributed to the extra time at temperature during processing of the second side. Laser ablated YBCO films with low surface resistance have been used by a number of investigators to fabricate passive microwave devices. Filters with excellent band pass features and low insertion loss and Qs at up to 10GHz at least an order of magnitude better than comparable circuits of copper or gold have been reported[16.11, 16.12]. From ring resonators[16.8] it was determined that at some point film thickness becomes a dominant factor in determining the microstrip losses, just as in normal metals due to increased current density. 16.6.3 Evaporation. One method combines the thermal evaporation of one of the components with a tungsten filament or boat, and the remaining components by electron beam. Ex situ annealed, evaporated films usually use as sources, copper and yttrium metals and barium fluoride as the barium source. The other method involves the use of electron beam evaporation only. One investigation reported on the electron gun evaporation of either YBCO, YbBCO, EBCO or BSCCO from a single sintered source[16.13] with oxygen directed at the substrate. It was necessary to compensate the sintered charges to allow for differences in vapor pressures. More often, films are deposited in layers, where each component is sequentially deposited as a separate layer forming a basic three layer stack. Copper is usually put down first because of its lower affinity for oxygen. Multiple stacks are then formed by repeating the basic stack, which coalesce during annealing. 16.6.4 Metalorganic. Metalorganic chemical vapor deposition (MOCVD) is an extremely useful and versatile technique that has been successfully employed in the growth of many materials such as III/V compounds, optoelectronic materials and magnetic bubble memory material. Source materials for MOCVD are metalorganic compounds with high melting points and low vapor pressures. Examples are ß-diketonates and acetylacetonates. Both may be flourinated and combined with a

266

variety of cations such as the alkaline earths, yttrium, copper etc. The lack of volatility of the source materials is a problem though, and these compounds tend to be unstable and decompose at temperatures very close to those needed to vaporize the material[16.14], As a result, run-to-run reproducibility may be difficult to attain if the source material first decomposes. One of the advantages of MOCVD is the almost infinite number of potential organic materials available as MOCVD sources, providing a degree of flexibility unmatched with any other technique[16.15]. Improvements in source chelates are expected improve film reproducibility. In the MOCVD process, the source materials are first volatilized and transported in a hot carrier gas into a reaction chamber. A heterogeneous reaction takes place among the vapor phase precursers in close proximity to the heated substrate, forming the desired compound and unidentified volatile fragments. When flourinated metal chelate compounds are used, the decomposition of the fluorinated ligand leaves a residual amount of fluoride ion which must, as with the barium fluoride evaporation, be removed by treating the film with water vapor and oxygen at high temperatures. Spray pyrolysis, sometimes referred to as metalorganic deposition (MOD), has been successfully applied to high temperature superconducting films, using many of the same ligands as MOCVD. Substrates are flooded with prepared solutions, spin drying at room temperature and then rapidly heating at 500°C to pyrolyze the metalorganics to their oxides. It was necessary to use rapid thermal annealing to attain 90K YBCO and YbBCO films with relatively sharp since conventional furnace annealing resulted in substantial interdiffusion with zero resistance only near 37K. Films on MgO and microwave detectors subsequently fabricated from YBCO and BSCCO films were considered suitable for operation at 77K in the submillimeter (terahertz) range[16.17] 16.7

Patterning

16.7.1 Wet Etching. This technique is the most direct patterning method. The simplest in principle, it is complicated by the fact that dilute aqueous based mineral acids can attack the unprotected portions of the film. The reaction of water with Barium (Ba) and Barium Oxide (Ba0) releases oxygen, which promotes the formation of and CuO[16.18]. readily reacts with Ba and BaO to To overcome these problems, Barium Fluoride form stable as mentioned earlier, is frequently substituted for Barium (Ba) or Barium Oxide (BaO) during the evaporation process, or barium alloys which are more environmentally stable are used as sputtering targets. As a result, films are more inert and can be processed and stored for long

267

periods of time without degradation. If the stability of the film is questionable it is advisable to pattern films before annealing as many of the reactions with and are reversible. Aqueous etchants for YBCO include dilute (~1:100) phosphoric acid, [16.19]. Ethylene-diamine tetra-acetic acid, (EDTA)[16.20] and dilute nitric, [16.21] were used for patterning. Microwave circuits have been successfully fabricated using wet etchants. YBCO ring resonators operating at 35 GHz were fabricated using conventional photoresist and dilute phosphoric acid[16.8]. Resonators were also fabricated using Br/EtOH and dil. [16.22]. 16.7.2 Dry Etching. Dry etching has been reported to effectively remove YBCO material with good resolution while eliminating the potential of moisture interaction and subsequent degradation of the film. Reactive ion beam etching (RIBE)[16.23], ion beam milling[16.24] and laser ablation[16.25] have all been reported to successfully achieve good resolution without degradation of film properties.

An excellent example of an application of ion milling is the meander line shown in Figure 16.2. This line[16.26], only 1 mil(0.025mm) wide and 3.3 inches(84mm) long provides a wide-band delay up to 12 GHz of 1.2 nanoseconds with a maximum loss of only 0.03 dB at 79K. The extraordinary length to width ratio of 3400:1

268

demands not only continuity, but dimensional accuracy over its entire length. Filters also demand tight processing tolerances. Copper filters fabricated[16.12] on 20 mil thick substrate using 5 mil wide lines typically exhibits losses in the range of 18dB. In contrast, superconducting filters typically exhibits losses under 4 dB, almost 20 times better.

References 16.1. T. E. Van Deventer et al., 1990 IEEE MTS-S Digest, IEEE (1990) p285 16.2. T. Hashimoto et al., Japan J. Appl. Phys. vol. 27, #2, (February 1988) p2821 16.3. R. L. Sandstrom et al., Appl. Phys. Lett., vol. 53 (5), (1 Aug. 1988) p444 16.4. M. Muroi, et al., J. Mater. Res., vol. 4, #4, (July/Aug 1989) p781 16.5. K. Char et al., "Microwave Surface Resistance of YBCO Films on Sapphire" Appl Phys. Lett., vol. 57 (4), (23 July 1990) pp409-11 16.6. B. B. G. Klopman et al., IEEE Trans. Mag.,vol. 27, #2, (Mar. 1991) p2821 16.7. G-C. Liang et al., IEEE Trans Supercond., 1, #1, (Mar. (1991) p58 16.8. C. M. Chorey et al., IEEE Trans. Mag., vo. 27, #2, (Mar. 1991) p2940 16.9. H. Tabata et al., Japan. J. Appl. Phys., vo. 28, #5, (May 1989) pL823 16.10. R. Meunchausen, Superconductor Week, 5, (Apr. 8, 1991) 16.11. H. S. Newman et al., IEEE Trans. Magn., vol. 27. #2, (Mar. 1991) p2540 16.12. D. Kalokitis et al., Appl. Phys. Lett., vol. 58 (5) (4 Feb. 1991) p537 16.13. K. Yoshikawa et al., 5th Intern. Workshop on Future Electron Devices, High-Temperature Superconducting Electron Devices, Miyagi-Zao, (June 2-4) p51 16.14. A. C. Greenwald, Microelectron. Manufact. Techn. (25 May 1991) 16.15. P. E. Norris and G. W. Orlando, Supercond. Ind., Spring (1990) p14 16.16. Y.L.Chen et al., J. Mater. Res., vol.4, #5 (Sept/Oct. 1989) p1065 16.17. R. Sobolewski et al., IEEE Trans. Magn., vol. 25, (1989) 16.18. P. M. Mankewich et al., Appl. Phys. Lett.,_vol 51 (21) (23 Nov. 1987) pp 1753-4 16.19. Y. Yoshikazu et al., "Chemical Etching of High-Tc Supercon­ ducting Y-Ba-Cu-O Films in Phosphoric acid Solution" Japan. J. Appl. Phys., vol. 26, #9 (Sept. 1987) ppL1533-4

CHAPTER 17 MICROELECTROMECHNICALSYSTEMSMEMS MEMS no longer quite a laboratory curiosity, are expected to impact the cellular phone segment about 2003 or 2004. The explosion in wireless technology with its requirements for low weight, low power and small volume has created an ideal venue for the potential application of this IC based, planar fabrication technology. RF MEMS will have the greatest impact on the cell phone segment, where the technology will enable the design of next generation products with more functionality and increased energy efficiency. Other MEMS devices, such as inductors, capacitors and filters, will be used in conjunction with MEMS switches and relays to improve the tunability range of wireless circuits. MEMS are combinations of mechanical and electrical miniature devices, either as discrete components or an array of devices batch fabricated by conventional IC techniques and compatible with existing MMICs. Since MEMS devices are manufactured using batch fabrication techniques, unprecedented levels of functionality, reliability and sophistication can be placed on small substrates at low cost. The most prevalent fabrication method is surface micro-machining utilizing combinations of thin film deposition and photolithographic techniques [17.1]. Many of these techniques are covered in Chapters 6 through 13. Examples of interest include switches, spiral inductors[17.2], passive resonant filters[17.3] and microwave transmission lines[17.4]

270

Most of the losses ascribed to transmission lines, such as dispersion, and as shown earlier, insertion loss, are due in part to the substrate material and/or environment on which they are defined. One of the main functions of passive components in wireless is to filter out all unwanted frequencies, with subsequent filtration isolating the desired frequencies. Currently surface acoustic wave (SAW) devices do the sorting. MEMS technology has been successfully exploited, according to Richards and De Los Santos[17.5] to diminish substrate influences in four types of transmission lines on silicon substrates. They include membrane supported microstrip, coplanar microshield transmission line, top-side etched coplanar waveguide and micromachined waveguide. Note that buried geometries are excluded; only surface waveguide is being developed. At present the switch is perhaps the most widely used RF/ Microwave device. Switches have been realized which deform when subjected to electrostatic actuation, and include cantilevers, membranes and shape-memory alloy. A miniature SPST RF switch on GaAs[17.6] shown in figure 17.1, has been tested at 4 GHz and provides usable performance up to 8 GHz. It consists of a cantilever, and embedded planar coil, a permanent magnet and electrical contacts. It measures 1.5 x 1.25 mm, and future versions, with improvements in design and fabrication are expected to be a fraction of that size. Insertion loss through 4 GHz is 0.22 dB, with approximately 40 dB isolation.

References 17.1 C. Nguyen et. al., "Micromachined Devices for Wireless Communications", Proc. IEEE, vol 86, no.8 (1998) 17.2 J. Y-C Chang et. al., "Large Suspended Inductors on Silicon and Their Use in a 2-µm CMOS RF Amplifier" IEEE Electronic Device Lett., vol. 14, no. 5, (May 1993) pp246-8 17.3 M. Ozgur et. al., "Micromachined 28 GHz Power divider in CMOS Technology" IEEE Microwave and Guided Lett.., vol. 10, no. 3, (March 2000) pp99-101 17.4 V. Milanovic et. al., "Micromachined Microwave Transmission Lines in CMOS Technology" IEEE Trans. on Microwave Theory and Techn., vol. 45, no. 5, (May 1997) pp630-5 17.5 R. J. Richards and H. J. De Los Santos “MEMS for RF/Microwave Wireless Applications: The Next Wave”, Microwave J., Vol. 44, #3, March 2001, pp20-41 17.6 The Dow-Key Company, Ventura CA, with permission

APPENDIX A: DEFINITION of SYMBOLS = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =

capacitance, in farads frequency in hertz angular frequency = thickness of the dielectric substrate, in units of length square root of - 1 plating current density, current/unit area thermal conductivity in W-m/K inductance per unit length, in henrys per unit length trace length, in units of length quality factor conductor Q dielectric Q Resistance, in ohms surface resistance, ohms/square high frequency resistance, sqrt trace thickness, in units of length trace width, in units of length dielectric thickness, in units of length effective width of the trace, in units of length effective dielectric height, in units of length characteristic impedance, in ohms attenuation due to conductor loss, in dB attenuation due to dielectric loss, in dB propagation velocity in a medium = skin depth, in units of length dielectric loss angle, tan free space permittivity,

relative dielectric constant

permeability of free space,

Henry's/meter

relative permeability real part of the permittivity imaginary part of the permittivity free space wavelength, guide wavelength in units of length trace resistivity in micro-ohm-cm conductivity of metal film conductivity of trace in micro-ohm-cm

272

=

conductivity of ground plane in micro-ohm-cm

APPENDIX B: COMPANY DIRCTORY

Note: the www and .com must be added to the addresses in the web site column, unless otherwise included in the body PRODUCT

COMPANY

PHONE

WEB SITE (www.)...(.com)

Arlon General Electric GIL Gore Isola

800 635-9333 740 622-5310 800 537-1306 800 445-4673 608 707-6070

Nelco Polyflon Rogers Taconic Substrates, ceramic Consol. Beryllia Brush-Wellman CeramTek Coors Saint Gobain NTK Toshiba Wesgo Substrates, LTCC DuPont

714 634-3665 203 840-7555 602 961-1382 518 658-3202

arlonmed gep.ge gilam gore isolalaminate systems parknelco polyflon rogers-corp taconic-add

212 599-3425 800 626-5351 508 339-1911 303 277-4750 716 731-9200 no central # 508 303-5041 650-592-9440

brushwellman ceramtek coorstek hithermaln ntktech.com taec.toshiba.com wesgo

Substrates, clad

Electroscience Ferro Hereaus Exposure Units, frames C. A. Picard Multline Exposure Units, optical Douthitt NuArk OLEC Oriel ASML Tamarack Exposure Units, laser Anvek

800 243-2143

usa.dupont.com/ mem/

760 305-1017 610 825-6050

ferro 4hcd

949 757-1005 631 249-8300

capicard multiline

800 368-8848 800 962-8883 800 832-6325 203 377-8282 203 761-4000 909 817-3700

douthittcorp nuarc olec oriel asml tamsci

914 345-2442

anvik

274

Orbotech Photoresist, dry film DuPont Kolon MacDermid Shipley Photoresist, liquid Genesis Hoechst Kodak OCG Mac Dermid PPG Shipley Toray UCB-JSR Photoresist, electrophoretic Mac Dermid PPG

800 995-2502

orbotech

800 243-2143 82 2 3677 3900 203 575-5617 800 832-6200

dupont.usa kolon.co.kr macprintedcircuits shipley

203 575-7915 724 274-4500 800 832-6200

macprintedcircuits ppg shipley

203 575-7915 724 274-4500

macprintedcircuits ppg

503 454-4202 800 370-1530

lpkfcadcam t-tech

215 215 760 610

electroscience nstarch ferro 4hcd

Pattern routing LPKF T-Tech Thick film Inks Electroscience EMCA Ferro Heraeus

272-8000 855-1000 305-1017 825-6050

APPENDIX C: CONVERSION TABLE

Dimensions meters (m) =

meters (m) =

meters (m) =

centimeters (cm) =

meters (m) =

1 meter (m) =

1 micron (µm) =

1 inch (in) =

1 inch (in) =

Electrical 1 decibel (dB) = Electrochemical 1 amp/sq. foot = 1 amp/sq. foot =

1 angstrom (Å) 1 nanometer (nm) 1 centimeter (cm) 1 micron (µm) 1 micron (µm) 39.4 inches (in) 39.4 microinches (µ-in) 2.54 centimeters (cm) 25.4 milimeters (mm) or 27.3 nepers (n) 6.94 ma/sq inches 0.109 amp/sq decimeter

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APPENDIX D: GRAPHIC EVALUATION of W/H and Eeff for

MICROSTRIP

The filling fraction, q, is a quantity vital to the determination of The vertical axis shows the w/h ratio where w is the microstrip line width and h the substrate thickness, q and w/h are both related to the air-spaced characteristic impedance making the graph universal. To use the graph: First make an initial assumption that A. Next calculate the air spaced characteristic impedance continuing B. to assume from the following

278

where C. D.

is the desired characteristic impedance, for example 50

Move now across to the “q” curve and find the corresponding value for the filling fraction Use the “q” value to approximate the effective dielectric constant from Replace in B with and repeat steps B through D, with the progressively more accurate values of Rapid convergence is generally obtained here and only two or three iterations are usually necessary. Using and for alumina, only two iterations are necessary to reach a w/h value very close to 1, the established w/h ratio for an

Index

A Additive techniques, 105–110 direct bonded copper, 109–110 direct write, 107–109 metal-organics, 105–107 Adhesion layers, 44–49

Alumina, etching rate, 189

Aluminum, resistivity, 42

Anisotropy, 32–34

Anodization, 124–127

Anvek, 273

Arlon, 273

ASML, 273

Attenuation, 35

Az 1350 photo resist, etching rate, 189

B Brush-Wellman, 273

C C.A. Picard, 273

Cadmium, resistivity, 179

CeramTek, 273

Chromium

etching rate, 189

resistivity, 42

wet etchant, 187

Circuit design goals, 2

Clad materials, 72–87

fabrication, 81–85

glass transition temperature, 72

material properties, 72–80

mechanical patterning, 85–87

properties of, 77, 78–80

Cleaning, 87–90

dry processes, 88–90

wet processes, 88

Cobalt, resistivity, 179

Company directory, 273–274

Components, 195–228

pasive components, capacitor dielectrics,

properties of, 212

passive components, 195–219

attenuators, 202–204

capacitors, 205–218

inductorss, 218–219

interdigitated capacitors, 217–218

parallel plate, 211–217

resistors, 195–202

transmission line components, 220–226 filters, 224–226 reciprocal dividers/combiners, 220–224 Conductor losses, 35–52

attenuation, 35

conductor losses

adhesion layers, 44–49 suface roughness, 49–52

guide length losses, 35

microwave multi-layer metallization

systems, 44

return loss, 35–37

skin depth, 39–44

thin film conductor characteristics, 44

voltage standing wave ratio, 37–38

Consol. Beryllia, 273

Conversion table, 275

Coors, 273

Coplanar waveguide, 21–24

Copper

etching rate, 189

resistivity, 42, 179

wet etchant, 187

Current flow, 29–53 conductor losses, 35–52

attenuation, 35

conductor losses

adhesion layers, 44–49 suface roughness, 49–52

guide length losses, 35

microwave multi-layer metallization

systems, 44

return loss, 35–37

skin depth, 39–44

thin film conductor characteristics, 44

voltage standing wave ratio, 37–38

dielectric losses, 39–34

280 anisotropy, 32–34

Tan, 29–31

resistivity, 42

D DC, 116

Decibal scales, 9

Decibel scale, 9

Definition of symbols, 271–272

Deposition, 132–135

other depostion methods, 134–135

screen printing, 134

spin coating, 132–133

spray coating, 133

Dielectric depostion, 123–127 anodization, 124–127 PE LPCVD, 123–124 Dielectric losses, 39–34 anisotropy, 32–34 Tan, 29–31 Direct bonded copper, 109–110

Direct write, 107–109

Douthitt, 273

Dry processes, cleaning, 88–90

DuPont, 273

E Electron beam, 114–115 Electroplating, 169–184 elecroless plating, 182–184 field density, 180–182 waveforms asymmetric dc, 174–175 pulse, 175–180 Electroplating 1, 169–184 inorganic additives, 171–172 organic additives, 172–174 waveforms, 174–180 Electroscience, 273

EMCA, 273

Erching, reactive techniques, 190–191

Etching, 185–193

dry etching, 186–191

selected wet, etchants, 187

sputtering, 186–187

effects on impedance, 191

ion Beam Milling, 187–190

wet, 185–186

Evaporation, 113–115 electron beam, 114–115 filament, 113–114

Index F Fabrication, 57–63, 81–85

Faraday's Law, 6

Ferro, 273

Filament, 113–114

Free space wavelength, 7–8

G General Electric, 273

Genesis, 273

GIL, 273

Glass, 55–57

Glass transition temperature, 72

Glazing, 62–63

Gold

etching rate, 189

resistivity, 42

wet etchant, 187

Gore, 273

Graphic evaluation, W/H and Eeff for

Microstrip, 277–278

Guide length losses, 35

H Hard substrate materials, properties of, 56

Heraeus, 273

Hereaus, 273

Hoechst, 273

Hybrid microwave integrated circuits,

attributes, 4

Hybrid monolithic microwave integrated

circuits, 1–4

comparison of, 3

I

Impedance, 13–15

Indium, resistivity, 179

Ion beam milling etching rates, 189

Iron, resistivity, 179

Isola, 273

K Kodak, 273

Kolon, 273

L Lamination, 61–62 Lithographically defined thick film, 101–105

Index photoengraveable, 102 photoimagable thick film, 103–105 Low temperature cofired ceramic, 70–72 Low temperature cofired ceramic (LTCC), 70–72 LPKF, 273 M MacDermid, 273 Magnetron sputtering, 118 Material properties, 72–80, 130–132 glass transition temperature, 131

mechanical properties, 131

moisture absorption, 130–132

planarization, 131–132

Maxwell's laws, 5–6 electric field, 5 rate of change, 6 magnetic field, 6 Mechanical patterning, 85–87 Metal foil screens, 98–101 Metal-organics, 105–107 Microelectromechanical systems, 269–270 Microstrip, 15–20 guide wavelength, 18–20 Microwave integrated circuits hybrid

attributes, 4

attributes of, 4

monolithic, hybrid, comparison of, 3 Microwave multi-layer metallization systems, 44 MICs. See Microwave integrated circuits MMICs. See Monolithic microwave integrated circuits Molybdenum etching rate, 189 resistivity, 42 wet etchant, 187 Monel, resistivity, 42 Monolithic microwave integrated circuits, 1–4 hybrid, comparison of, 3 Multline, 273 N Nelco, 273 Nickel, resistivity, 42, 179 Niobium, wet etchant, 187 NTK, 273 NuArk, 273

281 O OCG, 273 OLEC, 273 Orbotech, 273 Oriel, 273 P Packaging, 229–255 interconnects, 231–253

enclosures, 239–240

grounding, 243

integrated wiring, 239

modified TAB, 237–239

platability, 249–250

round wire, 232–234

strip ribbon, 234–237

substrate attachment, 241–243

thermal expansion, 240–241

time domain reflectometry (TDR),

251–253 vias, 243–249

level of integration, 230–231

packaging material, properties, 230

Palladium, resistivity, 179 Palladium-80 silver, resistivity, 42 Palladium-83.5 gold, resistivity, 42 Patterning, 136–138 dry etching, 136–138 wet etching, 136 PE LPCVD, 123–124 Permeability, 6–7 Permittivity, 6–7 Photoengravable thick film, resistivity, 42 Photoengraveable lithographically defined thick film, 102 Photoimagable thick film, 103–105 resistivity, 42 Photolithigraphy, 143–167 Photosensitive polymers, 138–140 Physical vapor deposition, 113–120 evaporation, 113–115

electron beam, 114–115

filament, 113–114

sputtering, 115–120

DC, 116

magnetron sputtering, 118

reactive sputtering, 119–120

RF, 117

Planar waveguides, 13–28 coplanar waveguide, 21–24 impedance, 13–15 microstrip, 15–20

282 guide wavelength, 18–20

planar waveguides, structures of,

comparison, 26

stripline, 24–26

structures of, comparison, 26

Platinum

etching rate, 189

resistivity, 42, 179

Platinum-60 gold, resistivity, 42

Platinum-76 silver, resistivity, 42

Polycrystaline ceramics, 57–70

fabrication, 57–63

glazing, 62–63

lamination, 61–62

powder pressing, 57–58

roll compaction, 60–61

tape casting, 59

Polyflon, 273

Polymers, 129–140

properties, comparison of, 135

Powder pressing, 57–58

Power ratios, 9

PPG, 273

Processing strategies, 141–142

photolithigraphy, 143–167 artwork, 156–160

aluminum on glass, 160

artwork generating equipment, 157

chrome on glass, 160

halide on glass, 160

halide on polyester, 160

iron oxide on glass, 160

exposure, 160–167

collimated, 162–163

large flood, 161

laser exposure, 163–167

non-collimated, 161

short flood, 161–162

photoresist, 143–155

dip coating, 153–155

dry film, 151–152

electrodeposited, 150–151

meniscus coating, 147–150

roller coating, 148–149

spin coating, 146–148, 148

Propagation velocity, 8–9

Q Q measurements, 9–10

Index R Reactive sputtering, 119–120

Resistivity, 42

Return loss, 35–37

RF, 117

Rogers, 273

Roll compaction, 60–61

S Safety, 90

Saint Gobain, 273

Screen printing, 93–98

Shipley, 273

Silicon dioxide (Thermal), etching rate, 189

Silicon nitride, etching rate, 189

Silver, resistivity, 42, 179

Single crystals, 67–60

Skin depth, 39–44

Small signal s-parameters, 10–11

S-parameters

small signal, 10–11

summary of, 10

Sputtered metal deposition rates, compared,

119

Sputtering, advantages of, 119

Stripline, 24–26

Structures of planar waveguides,

comparison of, 26

Substrate characteristics, 63–70

Substrates, 55–92

clad materials, 72–87

fabrication, 81–85

glass transition temperature, 72

material properties, 72–80

mechanical patterning, 85–87

properties of, 77, 78–80

cleaning, 87–90

dry processes, 88–90

wet processes, 88

dry processes, cleaning, 88–90

fabrication, 57–63, 81–85

glass, 55–57

glass transition temperature, 72

glazing, 62–63

lamination, 61–62

low temperature cofired ceramic, 70–72

low temperature cofired ceramic (LTCC),

70–72

material properties, 72–80

mechanical patterning, 85–87

polycrystaline ceramics, 57–70

fabrication, 57–63

Index glazing, 62–63 lamination, 61–62 powder pressing, 57–58 roll compaction, 60–61 tape casting, 59 powder pressing, 57–58 roll compaction, 60–61 safety, 90 single crystals, 67–60 substrate characteristics, 63–70 tape casting, 59 wet processes, cleaning, 88 Suface roughness, 49–52 Superconductivity, 257–263 buffer layers, 263 expansion coefficient, 263 film formation, 263–266 evaporation, 265 metalorganic, 265–266 off-axis sputtering, 262–264 pulsed laser depostion, 264–265 materials considerations, 261–262 patterning, 260–268 dry etching, 267–268 wet etching, 266–267 properties of high-Tc materials, 259–261 substrate materials, 262–263 T Tactonic, 273 Tamarack, 273 Tantalum, resistivity, 42 Tantalum nitride, wet etchant, 187 Tape casting, 59 Thick film, 93–111 additive techniques, 105–110 direct bonded copper, 109–110 direct write, 107–109 metal-organics, 105–107 lithographically defined thick film, 101–105 photoengraveable, 102 photoimagable thick film, 103–105 metal foil screens, 98–101 screen printing, 93–98 Thin film, 113–121 electron beam, 114–115 evaporation, 113–115 electron beam, 114–115 filament, 113–114

283 filament, 113–114 magnetron sputtering, 118 physical vapor deposition, 113–120 evaporation, 113–115 electron beam, 114–115 filament, 113–114 sputtering, 115–120 DC, 116 magnetron sputtering, 118 reactive sputtering, 119–120 RF, 117 reactive sputtering, 119–120 sputtered metal deposition rates, compared, 119 sputtering, 115–120 advantages of, 119 DC, 116 magnetron sputtering, 118 reactive sputtering, 119–120 RF, 117 Thin film conductor characteristics, 44 Tin, resistivity, 179 Titanium etching rate, 189 wet etchant, 187 Titanium-tungsten etching rate, 189 wet etchant, 187 Toray, 273 Toshiba, 273 T-Tech, 273 Tungsten etching rate, 189 resistivity, 42 U UCB-JSR, 273

V Voltage standing wave ratio, 37–38 W Wesgo, 273 Wet processes, cleaning, 88 Z Zinc, resistivity, 179