U8110 Schematics

9. CIRCUIT DIAGRAM

1

2

3

5

4

6

7

9

8

10

12

11

A

A

G4 G3

TX

RX

G2 G1

WCDMA_TX

ANT

C1012 22p

WCDMA_RX

N1002 DFYK61G95LBNCB

B C1013

GSM_TX DCS_TX WCDMA

GSM900_TX

GSM900_RX GSM1800_1900_TX

GSM1900_RX

N1000 LMSP54MA-213

8 ANT

VC2

VDD

R1006

NA

0

R1005 0

R1004

ANTSW1

i b 0

ANTSW0

R1003 0

D C1007 0.01u

C1001 10p

C1009 10p

C1002 0.01u

C1008 10p

o M

VDD_A VDD_B

5

NA

R1800

N1800 LP2985AIBP-2.8

4

NA

VBATI

C1003 0.01u

C1004 0.01u

ON_OFF

GND

BYPASS VIN

NA

VOUT

G2 G1

C1000 6.8p

ANTPAD

ANT

L1001 12nH

L1002 5.6nH

C DCS_RX GSM_RX

D

C1005 10p

R1810

VCCB

0 C1802 10u 2012

C1811 4.7u

1 2

F

R1801

3

C1800 0.1u

NA C1801 1000p

R1825

V_wivi_A

0

R1851 1 R1850

2

0 C1850 0.1u

C1852 10u 2012

3

N1850 VOUT

LP3981ILD-2.8 6 VEN

VIN

BYPASS

VOUT_SE

7 GND2

0

G

E

VCCA

0

R1811

C1810 10u 2012

R1804

EXTLDO F

11

RF

h lc

51

R1001

9 10

1

C1011 22p

R1007

ANTSW2

E

GND4

GND3

6

VC1

16 4 2

5

1

ANTSW3

GND1

GND5

14

GSM1800_RX

3

R1002 NA

2

C1010 1000p

4

V1001 RN47A4

VCCB C

GND2

VCG

12 15 13 5 7 3

B

W1001 KMS-507

s ip

22p

R1826

V_wivi_B

0

5

G

4 GND1

C1851 0.033u

H

Engineer:

Drawn by:

SG Kang

R&D CHK:

TITLE:

DOC CTRL CHK:

1

2

3

4

5

6

7

- 235 -

Schematics & manuals on www.mobilchips.com ___Mobilchips__

8

9

Date Changed:

Tuesday, September 04, 2003

10

Time Changed:

5:01:55 pm

QA CHK:

REV:

11

3G HANDSETS LAB. DEVELOPMENT GROUP 1

Size: A2

ANT SW to ANT

12 1 8 A

U8100 PT V1.3 Staggered AMD

MFG ENGR CHK: Changed by:

SG Kang

H

LG ELECTRONICS INC.

SG Kang

Drawing Number:

Page:

12

1

9. CIRCUIT DIAGRAM

1

2

3

4

5

6

7

8

9

11

10

12

A

A

Z1420 TMX-M453 6

IN-

5 4

C1441 2200p

IN+

SHIELD

GND

OUT+

OUT-

C1443 1.2p

B

1 2 3

C1442 2200p

B

L1441 100nH 1608

C1454

0.01u C1422 27p R1410 0

R1401 0

0

C

0.01u

C1423 27p

C1451 C1452

0.01u

0.01u

C1421

R1440

C1403 22p

C1425 2200p

C1404 C1414 0.01u 22p

L1760 1uH

6.8nH

o M C1407 22p

G3

O1

O2

1 2 3

IN

LK20A

G1

Z1400

E

G2

6

5 4

C1413 1.2p

IFOUT GNDMIX VCCIF IFINA IFINB VCCLF QRA QRB IRA IRB CDQ CDI GNDLF MCLK

L1402 NA

TP1401 TP1402 TP1403

WDAT WCLK WSTR

10

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 C4 C5 C6 C7

L1411

C1412 1.2p

N1400 LZT-108-5323

VCCREF XOIA XOIB VCCBUS IFLOA IFLOB GNDRFLO RFLOOA XOOA XOOB GNDREF GNDBUS REFON GNDVCO

INDBYP RFOUT VCCPLL VCCPHD PHDOUT VTUNE VCCVCO VCCRFLO RFLOOB XOOON RXON GNDPLL GNDPHD GNDTUNE

L1401 2.2nH

C1402 1000p

IFOUTB VCCMIX MIXINA MIXINB GNDBIAS GNDEME RFIN GNDBYP VCCRF GNDIF DATA CLK STROBE GLNA

C1776 4.7p

B10 C10 D10 E10 F10 G10 H10 J10 C8 D8 E8 F8 G8 H8

MCLK

C1761 82p

C

47p

B1770 TSX-8A

3 HOT2

2 GND1

GND2

C1773 4.7p

4

HOT1 1

13MHz

R1771

330p

10K

V1770

BBY58-02W

VCCB

R1770 C1770 0.01u

1K

VCXOCONT

C1778 56p

D R1772 10K

IFLO IFLOBAR RFLO RFLOBAR XOOA XOOB

R1740 C1740 0.01u

C1741 22p

C1730 0.01u

C1731 22p

E

VCCB

10

R1730

0

C1721 390p

C1772

C1751 22p

R1721 R1720 5.6K

C1777

C1750 22p

R1505 NA

K2 K3 K4 K5 K6 K7 K8 K9 K10 H3 H4 H5 H6 H7

22p

C1400 NA

h lc

i b B1 C1 D1 E1 F1 G1 H1 J1 K1 C3 D3 E3 F3 G3

C1401

WCDMA_RX

RXIB

R1430

C1431 22p

C1444 22p

D

RXIA

C1760 0.01u

C1448 C1447 0.01u 0.01u

R1411 3.3K

1608

C1424 22p

RXQB

0

1608

L1421 68nH

RXQA

R1760

NA

L1422 68nH

F

s ip

C1453

VCCB

C1722 NA

10

R1723

WRFLOOP

0

F

C1720 5600p R1431

GPRFCTRL

0

R2108

CLKREQ

100

FROM MARITA SIDE FOR POWER SAVING

G

G

H

Engineer:

Drawn by:

SG Kang

R&D CHK:

TITLE:

DOC CTRL CHK:

1

2

3

4

5

6

7

- 236 -

8

9

Date Changed:

Tuesday, September 04, 2003

Time Changed:

10

12:50:11 pm

REV:

QA CHK:

11

3G HANDSETS LAB. DEVELOPMENT GROUP 1

UMTS RX (WOPY)

Size: A2

12 1 8 A

U8100 PT V1.3 Staggered AMD

MFG ENGR CHK: Changed by:

SG Kang

H

LG ELECTRONICS INC.

SG Kang

Drawing Number:

Page:

12

2

9. CIRCUIT DIAGRAM

1

2

3

5

4

6

7

9

8

10

12

11

A

A

WCDMA_TX

GND2

GND4 GND3

R1633

IN

GND1

OUT

N1650 CE0401G95DCB000-TT1

R1629

0 N1630 9

VCC_BIAS2

VCC22

VCC_BIAS1 GND1 VCTRL2

VCC12

VCTRL1

20

GND9

VCC11

6

C1626 330p

0

4

h lc

3 2 1

R1632

R1617

WPAREF

0

0 C1635 NA

RFLO

RFLOBAR

i b

V_wivi_A

L1507 75

D

C1514 0.01u

B1501

V_wivi_A

4 5

V+

VO

3

RTEMP

GND1 2 GND2 NC 1

o M 1 2 3

R1605 0

LM20BIM7X

R1606 NA

L1506 NA

R1604 NA

Z1500 SX-S205B G1

S_OUT

G2

B_IN2 G3

B_IN1

6

5 4

C1513 0.01u

0

C1501 47p

BLM15BB750SN1J

C1511 10p

R1503 0

C1512 10p

L1503 5.6nH

L1505 10nH

C1510 0.01u

SYNC

COMP

_SHDN

OUT

BATT

REF

LX

GND

C1622 22p

PGND

B1 C1

3838 L1621

C3

C4

C1623 10u

C1715 100p

VCCWPA

C2

C1624 4.7u

R1627

4.7uH C1627 4.7u

C1507 4p

C1505 22p

R1502 680 L1501 15nH

J2 J3 J4 J5 J6 J7 J8 J9 J10 H3 H4 H5 H6 H7

OUT OUTBAR GNDRF MIXOUT MIXOUTBAR VCCIF IFBP IFBPBAR VTUNERF GNDRFLO2 GNDRF1 GNDRF2 GNDRF3 GNDIF

WPOWERSENSE

39K R1628 100K

L1602

C1628 1000p

C

L1603 L1604 NA

L1605 NA

IFLOBAR IFLO

C1714 100p

NA

C1716 4.7p

R1701 C1702 22p

C1701 0.01u

C1602 22p

C1601 0.01u

N1700

LZT-108-5322

V_wivi_A

0

TP1701 TP1702

XOOA XOOB

TP1504 TP1503 TP1502 TP1501

QINBAR QIN INBAR IN VCCBB VCCIFPHD PHDIFOUT VCCIFPLL GNDIFVCO1 VCCIFVCO CLK GNDIFPHD GNDIFPLL WON

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 C4 C5 C6 C7

C1502 4p

D

V_wivi_B

10

R1603

C1504 10p

2.2p

L1601

L1720

C1509 10p

L1504 8.2nH

E TXQB TXQA TXIB TXIA

C1503 22p R1702 10

C1704 22p

V_wivi_B WDAT

C1703 0.01u

WCLK WSTR F

L1502 15nH

R1710

R1711

R1504 680

0

C1712 NA

R1703

V_wivi_B

B4

R1510 0

C1508

R1501

V_wivi_A

s ip

C1636 NA

R1631

5

A4

R1626 33K

_SKIP

G3 F3 E3 D3 C3 J1 I1 H1 G1 F1 E1 D1 C1 B1

11

10

VCC21

0

VBATI

7

A3

GNDRFLO1 GNDIFLO DATA GNDBUS GNDBB VCCRF RFLOBAR RFLO VCCIFLO IFLOBAR IFLO VCCBUS XOOC XOOB

19 C1631 10p

GND2

GND8

A1

A2

GNDRFVCO2 STROBE GNDRFPLL TXON GNDRFPHD GNDRFVCO1 GNDTUNERF VCCRFVCO VCCRFPLL PHDRFOUT VCCRFPHD GNDIFVCO2 GNDTUIF VTUNEIF

17 18

0

R1997

8

N1620 MAX1820ZEBC

H8 G8 F8 E8 D8 C8 I10 H10 G10 F10 E10 D10 C10 B10

16

GND3

GND4 C1632 0.01u

GND7

RFIN

C

VCC_DET

22 GND10 23 GND11

14 15

R1623 0

VDETECT

GND6

21

13

GND5

0

R1621

WDCDCREF RFOUT

RF9266

12

F

B

R1630

VCCWPA

E

NA

VBATI

B

0

C1710 150p

4.7K

C1711 3300p

G

G

H

Engineer:

Drawn by:

SG Kang

R&D CHK:

TITLE:

DOC CTRL CHK: MFG ENGR CHK: Changed by:

1

2

3

4

5

6

7

- 237 -

8

SG Kang

9

Date Changed:

Tuesday, September 04, 2003

10

Time Changed:

5:04:02 pm

H

LG ELECTRONICS INC.

SG Kang

UMTS TX (WIVI) to ISOLATOR

U8100 PT V1.3 Staggered AMD

REV:

QA CHK:

11

3G HANDSETS LAB. DEVELOPMENT GROUP 1

Drawing Number:

Size: A2

12 1 8 A

Page:

12

3

9. CIRCUIT DIAGRAM

1

2

4

3

6

5

10

9

8

7

11

12

A

A

VBATI BLM31PG601SN1

B

R1301 0

L1300

C1315 C1311 10u 10u 2012 2012

VDDBUF

C1312 0.01u

0 C1326 NA

C1320 470p

C1323 1200p

R1323 NA

BGND0

GND1

BGND1

C1334

22p

22p

22p

C1327 33p

BSEL0

NC

GND1

GND2

6

5

2

R1335

1 18

L1332 75

BLM15BB750SN1J

R1342 560

1

B2

UB

R1340 560

4

N1331 LDB211G8020C

3

L1331 15nH

C1333 10p

L1230

0

R1213 R1212 R1211

MODC

R1210

MODD

C1230 NA

100

100

100

K2 K3 K4 K5 K6 K7 K8 K9 K10 H3 H4 H5 H6 H7

L1200 100

VCCA

C1205 22p

C1201 0.01u C1271

XOOB

R1272 NA

F XOOA

1000p L1201 5.6nH 1608

C1270 1000p

NC5 MODA MODB MODC MODD VCCPLL XOOB XOOC NC6 GNDBUF NC3 PS GNDPLL XOOLA

N1100 LZT-108-5325

B7714

C1102

4 6

10p

L1100 3.9nH

O1

IN

G1 G2 G3

R1250

D5 QDAT A4 IDAT C5 DCLK

A1 B1 C4 E8 F4 F7 G3 G4 H8

REXT VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

QDATA IDATA DCLK

H4 AUXO2 G5 BEARP H5 BEARN G7 PCMUL E6 GPDAT E5 GPCLK

AUXI1 CCO MICIP MICIN DAC01 DAC02 GPA0 GPA1 DAC03 GPA2 N1101 GPA3 LZT-108-5321 DACCLK GPA4 DACDAT GPA5 GPA6 DACSTR GPA7 DEC1 H7 PCMDL DEC2 F6 PCMCLK DEC3 G6 PCMSYN DEC4 E7 DEC5 ADSTR

R1140 100K

DCS_RX

L1101 3.3nH

C1115 NA

C3 B3 A3

33p L1110 18nH

Z1110 B7705

R1150 0

VDIG_HERTA C1150 0.01u

C1151 NA

C1153 NA

C1155 NA

C2 C1 D4 E2 H2 H3 B2 E1

A2 VDD1 B5 VDD2 B7 VDD3 F5 VDD4 F8 VDD5 H6 VDD6

D

C1140 C1143 0.068u 0.068u

C1144 C1142 0.068u C1141 0.068u 0.068u

VDIG_HERTA

G2 NC1 H1 NC2

E 3 2 O1 G1 IN

O2 G2

C1111

4

C1110

1

5

GSM_RX

33p L1111 10nH

L1120 C1104 0.01u

VCCA

C1103 22p

R1103

R1104

0

0

R1105 0

F

R1106 0

R1240 C1240 NA

0 C1250 NA

GPRFCTRL

0

RADCLK

TP1201 L1220

G VLOOP

R1220

0

560

C1221 0.01u

C1225 C1220 NA

120 C1224 1200p

L1202

R1223 390 C1222 560p

C1203 22p

C1223 330p

VCCA

C1202 0.01u

H

Engineer:

Drawn by:

JS Joo

R&D CHK:

TITLE:

DOC CTRL CHK:

2

3

4

5

6

7

- 238 -

8

9

Date Changed:

Tuesday, September 04, 2003

10

Time Changed:

7:25:06 pm

QA CHK:

REV:

11

3G HANDSETS LAB. DEVELOPMENT GROUP 1

Size: A2

GSM/DCS (INGELA)

12 1 8 A

U8100 PT V1.3 Staggered AMD

MFG ENGR CHK: Changed by:

JS Joo

H

LG ELECTRONICS INC.

JS Joo

1

G

RADSTR

TP1203 R1222

1800p

RADDAT

TP1202

2012

100uH R1224

C

VDIG

C1112

R1121 NA

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 C4 C5 C6 C7

10p

10p

33p

RFHD RFHC GNDRF RFLB RFLA VCCRF QRB QRA IRB IRA REON CLK DATA STROBE

C1100

2

C1101

E4 F2 F3 G1 B8 B6 C6 C7 C8 D6 D8 D7

E3

C1114 7p

Z1100

O2

TP1143

TP1142

AVDD

A8 IRA A7 IRB A6 QRA A5 QRB B4 RXSTR

VCCA

0

H8 G8 F8 E8 D8 C8 J10 H10 G10 F10 E10 D10 C10 B10

R1273 NA

C1231 NA

G3 F3 E3 D3 C3 K1 J1 H1 G1 F1 E1 D1 C1 B1

MODB

PULSESKIP

B1

C1330 22p

o M

C1331 22p

R1113

R1334

PCTL MODA

i b

4 3

PCTL BSEL RXON TXON GNDPLANE TXOHA TXOHB VCCBUF TXOLA TXOLB GNDRF2 RFHB RFHA GNDRF1

RXON

L1330 33nH

NC4 GNDVAR GNDVCO5 GNDVCO4 GNDVCO3 GNDVCO2 PHDOUT VTUNE VCCVCO GNDVCO6 GNDSILENT NC2 NC1 GNDVCO1

0

3

2

10

75

C1336 NA

R1333

TXON E

C1113

5

TP1151 TP1152

h lc

4

R1332 0

19

R1341

L1333 C1335

B1

NC

GND2

GND1

7

8

6

GND3

DCS_PCS_IN

GND7

BGND5

BGND2 EGSM_IN

N1300 CX77304-16

DCS_PCS_OUT

R1337 NA C1332

17

GND6

VCC1

VCC2

EGSM_OUT

GND4

GND5

16

22

BGND3

20 13

C1350 NA

BGND4

14

C1351 NA

11 12

B2

UB

33p

BS

9 10

GND8

L1350 2.2nH

10p

21

APC

C1340 NA

1.8nH

33p C1352

R1339 NA

15

C1342 NA L1340

C1343 NA C1341

DCS_TX

1

0

TP1141 F1

D3 I2CDAT D1 I2CCLK G8 MCLK D2 RESETB

RXON

N1330 LDB21897M15C R1338 C1324 100p

C1156 0.01u

I2CDAT I2CCLK SYSCLK2 RESOUT3n

C1321 470p

C1300 0.068u

GSM_TX

0

R1324 NA

GND2

VSSPA

R1151

C1325 100p

5

VDDPA

NA

VDIG

0.05

V1330 2SD2216J NA

2

0

0 R1321 1K

R1328 NA

150p

R1302

R1322

6

IOUT FF_IN

R1320

0

1 3 5

R1329 1K

C1322

EXPOUT

D

R1326

R1325

PAREG

VDIG

s ip

R1327

PASENSE-

C

B

C1313 22p

PASENSE+

Drawing Number:

Page:

12

4

9. CIRCUIT DIAGRAM

1

3

5

4

6

7

8

9

10

12

11

DCIN_3

2

A

A

R3378 3.3K E

VDIG

Q3203 DTA114EETL

B C

0.1u

C2212

0.1u

C2213 C2214 0.1u 0.1u R3019

3

C3246

C7 M10 L10 K10 L11 K11 J11 J10 J9 D9

RTEMP

R3384

VLOOP WPOWERSENSE WRFLOOP GPA6 VBACKUP

NA

DCIN_3

C2280

Q2201 Si5441DC 1 8 D1 D6 2 7 D2 D5 3 6 D3 D4 4 5 G S

NA 1608

R2214

R2215

0.1

0.05

DCIN_2

E

2012

R3379

R3382

MOTOR_BATT

0

24

DACDAT DACSTR DACCLK

PT1 47K 1%

R3041

100K

R3042 100K

F

100K

F12

VDIG 100K

R3046 100K

R3047

R3049

100K

C3272 47p

100K

VBAT_B

VDDBUCK

VBAT_C

PBUCK

VBAT_D

NBUCK

MOD1

SWBUCK VBUCK VDD_IO

N2000 VINCENNE

NA

FGSENSE+ FGSENSE-

D4

TEST

B11 BDATA B3 VIBR

VSSPA VDDPA_DAC VDDBUF PASENSE+ PASENSEPAREG IOUT

K1 PCMSYN J1 PCMCLK K2 PCMO J2 PCMI

R2218

M5

0

C2209 0.1u

C2210 0.1u

R2217 0 C2207

G

0.1u

M3 M9

VDDCODEC VDDBEAR VDDADC

K8 VSSADC K5 VSSCODEC K4 VSSBEAR

0

B12 A11

A4

EXTLDO

C2203 1u

h lc

1608

A5

DACO1 DACO2 DACO3

TXON EXPOUT FF_IN

BEARP

BEARN

AUXO1 CCO

MIC1P

MIC1N AUXI1 MIC2P MIC2N AUXI2

GPA5 AUXO2 VSSTH31 VSSTH30 VSSTH29 VSSTH28 VSSTH27 VSSTH26 VSSTH25 VSSTH24 VSSTH23 VSSTH22 VSSTH21 VSSTH20 VSSTH19 VSSTH18 VSSTH17 VSSTH1 VSSTH2 VSSTH3 VSSTH4 VSSTH5 VSSTH6 VSSTH7 VSSTH8 VSSTH9 VSSTH10 VSSTH11 VSSTH12 VSSTH13 VSSTH14 VSSTH15 VSSTH16

B5 G11 H11

A8 G10 F10 M4 L3

L9

M8 L8

M6 M7 L7 L6

K12 J4 E4 F4 G4 H4 J5 J6 J7 J8 H9 G9 F9 E9 D8 D7 D6 F7 G7 G6 E5 E6 E7 E8 F8 G8 H8 H7 H6 H5 G5 F5 D5

G2 5

1

D1 6

C2608 1u 1608

22p C2614

22K R2617

22p C2618

C2612

0.068u

HOOK C2611 100u

IO1

0.22

L2200

V2201 RB521S-30

22uH

R2210

ELL5GM220M CHOKE COIL

C2206

10u

VCORE

WDCDCREF WPAREF VCXOCONT

2012 C3248

IO4

REF2

3

1608

VBATI

D4 AFMS_R_INT C1 CCO

C2615 10 0.068u

D2

C2617 0.068u

D1 D3

C2610 22p

C2 D5

C2609 0.01u

MICN

MICP_INT

ATMS

MICN_INT

ATMS_CAP

ATMS_INT

AFMS_R

ATMS_AD

AFMS_L

AFMS_L_INT

B1 GND1 B2 GND2 B3 GND3

D2016 RB521S-30

MICP

VDD

A1 A3 A4 B4 A5 B5

C3273

NA

R2606

33K

N2601

B1

1608

C1

R2608

A1 C2

VDD

VO2

IN-

VO1

IN+

BYPASS

33K

L2603 BLM15BB750SN1J L2608 BLM15BB750SN1J X2603 SUMY0005601

C2616 22p

R2619

0

R2618

0

C3221 C2630 22p

OBG-15S44-C2KU NA

N2204

C2278

VOUT

4

LP2985IM5X-3.3

0

C3274 NA

D

R2610 100K

TP3318

EARP

TP3319

EARM

E

C2613 0.033u C3266 10p

C3268 47p

5 2 3 4 6 1

C3269 47p

X2602

C3278 100p

VDIG

VEXT15

N2203 2 1

0.1u D2015 R3381 RB521S-30 47K

GPA6

C3275 NA

R3303 100K

VIN

VSS

VOUT NC

F

3

C2272

4

1u 1608

S-817A15ANB-CUE-T2

1.5V REGULATOR

R3386 NA

GPIO05 C2276 100p

IRDA_REG_CTRL

VBATI

3 2 1

R2232 10K

USBSENSE

R2233 51K

C3046 100p

N3000

VUSB

5 C2277 4.7u

2.2u 2012

22p

C3270 NA

R3397

C3277 NA 4.7uF, 2012

GND VIN

C3051 2.2u 2012

ON_OFF BYPASS

VIN

VOUT

LP2985IM5X-2.8

G

4

GND

VIRDA

R3050 0

5 C3052 4.7u

IRDA REGULATOR

USB REGULATOR H

Engineer:

TAE-SUNG, HA

TITLE:

DOC CTRL CHK: MFG ENGR CHK: Changed by:

2

3

4

5

6

7

- 239 -

8

mentor

9

Date Changed:

Tuesday, September 04, 2003

10

Time Changed:

7:25:29 pm

QA CHK:

REV:

11

H

LG ELECTRONICS INC.

TAE-SUNG, HA

Drawn by: R&D CHK:

1

SPKM

C2632

C2631 22p

22p

3.3V REG ON_OFF BYPASS

SPKP

0.1u

0

1

C2606

0.33u 1608

SPKMUTE

C2604

R3395

3

R2620 0

AMPCTRL

1 6 D VDD 2 5 S NC 3 4 GND IN

R3385 NA

2

R2621 0

L2605

R2609

C2274

VBUS

A2 B2 B3

GND

L2606

LM4898ITL

3.9K

C

22p

A3

SD_SEL SD_MODE

VDIG

PWRRSTn

C2633

C3

N2603 ADG702

C3 GND4 C4 GND5 C5 GND6

TJATTE2

C3267 NA

1u

3.9K C2605 0.1u

R2607

TGBUZZ

NA

AUDIO AMP

VDIG

0.22

A2

C2603

VDIG

VCORE

0.1u

IP4025CX20

C2634

NA

C2635

VBATI

10u 2012

0

R2213

TXON EXPOUT FF_IN

N2602

R2615

NA

10u 2012

L2202

NA NA

R2613

R2614

NA

0

C2200

BLM18PG121SN1 1608 120 OHM BEAD

C2205

FB4

KPD9D-8S-2.54SF

R2200

VMEM

0

X2300 5 P1 P5 6 P6 P2 7 P3 P7 8 P4 P8 9 GND3 GND1 10 GND4 GND2

4

IO3

R2201

6 5

REF1

IO2

4.7u

VBACKUP

R2208 0.1u

4

SI1555DL

C2638 C2637

C2619 100u

L4

S2

2 G1

V2300 DALC208SC6

C2202

BACKUP BATTERY

BA3000

C3247

3 D2

S1

0

VRTC

Q2200

R3031 0

R2235

VBAT_C

R2202 0 R2203 1K 1608

R3345 0.51 2125

A1 B2 C3

1

2

VDD_B

C11 M11 L12 L2

A2

s ip

RB521S-30

R2306 47

VDD_A

i b

ADSTR GPA0 GPA1 GPA2 GPA3 GPA4 GPA6 GPA7 GPA12 GPA13

H10 VSS_A G3 VSS_B C6 VSS_C E3 VSS_D D10 SUB B1 VSSBUCK

E10 G12 C12 E12 E11 D11 D12

PCMSYN PCMCLK PCMDATB PCMDATA R3045

VBAT_A

C9 DACDAT B10 DACSTR A10 DACCLK

R3043

VSSPA VDDPA VDDBUF PASENSE+ PASENSEPAREG IOUT

VDD_D VDD_E VDDLP

o M F11

C2607

R3327 180K 1%

VDD_B EXTLDO

E2 DCIO D1 CHREG D3 CHSENSE+ D2 CHSENSE-

C3271 47p

VBAT

VBATI

R3328 8.2K 1%

B4

0.1u

ADCSTR

R3396

U3106 NA

0

E1

0.05

VO

A3

R2216

V+

A12

R2212

100K

R3026 1 GND2 NC 2 GND1

0

4

D

LM20BIM7X

J12 VREF L5 DEC0 K6 DEC1 K7 DEC2 H12 IREF

M12

0

VBAT_C

5

100K

0

R2205 VDIG

R2220

R2313

FB3

0

100K

C2211

4.7u

VDD_A

1 2 3 4 11 12

V3202

R2305

15K

R3248

R3051

100K

R2101

VBATI

C2281

4.7u C3013

CDCDB

1608 C2301 1u H3 G1 G2 F3 C2300 NA F2

C2312

K9 MCLK C8 SDA B9 SCL K3 CLK_REQ C10 SLEEP

VDIG

C

SIMDAT SIMCLK SIMRST CDCDA

C2303

MCLK I2CDAT I2CCLK CLKREQ PWRREQn

H1 SDAT J3 SCLK H2 SRST

B

SIM HOLDER

22p

10K

TP3316 INDICATOR LED

C2302

R2312

C2302 & C2303 CLOSER TO SIM SOCKET

1u

0

VDIG

B6 L1 C2 F1

1000p

TP2310

RESOUT0n IRQ0n PWRRSTn

NA R3376 0

A6

1

TP2311

R2107

A9 C1 B8

2

TP3000

SIMDAT0 SIMCLK0 SIMRST0

LED2 32KHZ SIMOFF SIMVCC

EN_LED_TC

0

R3002

LED1

NA

RTCCLK

RESETB IRQ PWRRST

INTLCKB

R3294

B7

M1 XTAL1 M2 XTAL2

EN_LED_R

1SS388

R2314

C4 ONSWA C5 ONSWB A7 ONSWC

ONSWAn ONSWBn ONSWC

B

ROP-101-3029_2C

100K

0.1u

R2106

D2010 C2621

TP3004

3G HANDSETS LAB. DEVELOPMENT GROUP 1

Size:

A2 BB MAIN PCB 12 1 8 A VINCENNE U8100 PT V1.3 Staggered AMD

Drawing Number:

Page:

12

5

9. CIRCUIT DIAGRAM

1

2

3

5

4

6

7

8

9

10

11

12

* MEMORY CHANGE HISTORY

ADR(17) ADR(19) ADR(20) ADR(21) ADR(22) ADR(23)

ADR(24)

DAT(0:15)

DAT(0) DAT(1) DAT(2) DAT(3) DAT(4) DAT(5) DAT(6) DAT(7)

GND

IrDA

VCC SD 8

SHIELD

RXD TXD

LEDK LEDA

H

7

C3137

6

0.47u

5

1608

4 3 2

100K

E5 B2 B4

MEM_WAIT_N MEM_ADV_N MEM_CLK

H3 C6

MEM_OE_N MEM_WE_N

D4 C4

MEM_BE1_N MEM_BE0_N

_CE1S CE2S_ZZ _RESET _WP

VCCS

_OE _WE

_UB _LB

ADR(13) ADR(12) ADR(11) ADR(10) ADR(9) ADR(8) ADR(7) ADR(6) ADR(5) ADR(4) ADR(3) ADR(2) ADR(1)

VMEM

C

C3133

C3135 C3134

0.1u

0.1u

0.1u

D

VPPFLASH

V2203

DAT(15)

R3321

MEM_WAIT_N

E ADDRESS X DATA = 2^23 X 2^4 = 2^27 = 128MBIT

LCD I/F

1

A1 A2 A7 A8 B1 B2 B7 B8 C1 C8 E8 H7

Rout track on inner layer DAT(0:15)

VDIG

J7 H6 J6 H5 J4 H4 J3 H3 G6 K6 G5 K5 K4 G4 K3 G3

DAT(15) DAT(14) DAT(13) DAT(12) DAT(11) DAT(10)

I2CDAT CIPCLK CIVSYNC CIHSYNC CIRES_N CID0 CID1 CID2 CID3 CID4 CID5 CID6 CID7

DAT(9) DAT(8) DAT(7) DAT(6) DAT(5)

VMEM

DAT(3) DAT(2) DAT(1)

CS2

NA

DAT(0)

CAMERA I/F

VDIG

DAT(4)

R3337

VCORE

H2

MEM_CS2_N

I2CCLK

MEM_WAIT_N MEM_ADV_N MEM_CLK MEM_OE_N MEM_WE_N

R3333 NA

U3104 AM29BDS128HD9VKI

FLASH _CE

50V 1608

A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

A22 = 128MBIT

ADR(1:24) D8 E5 F4 F5 E4 D3 G7 F7 E7 C7 D7 F6 E6 C6 D6 C3 E3 F3 D2 C2 E2 F2 G2

ADR(23) ADR(22) ADR(21) ADR(20) ADR(19) ADR(18) ADR(17) ADR(16) ADR(15) ADR(14) ADR(13)

F

ADR(12) ADR(11) ADR(10) ADR(9) ADR(8) ADR(7) ADR(6) ADR(5) ADR(4) ADR(3)

VMEM

ADR(2) ADR(1)

D1 VCC1 J5 VCC2

C4 RDY G1 _AVD E1 CLK

F8 VIO1 H1 VIO2

J2 _OE C5 _WE

G8 VSS1 J1 VSS2 K2 VSS3 K7 VSS4

D4 C3225 0.22u

I2CCLK_CAMERA

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

D5 _RESET F1 _WP

RESOUT0n

Q3202 PMST3904

TP3344

ADR(24)

NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12

NA

NA

R3320

LCDRESX LCDCSX_SUB LCDWRX LCDRS LCDCSX_MAIN LCDRDX PDID0 PDID1 PDID2 PDID3 PDID4 PDID5 PDID6 PDID7

ADR(1:24) VMEM

3.3K

D19 C19 D18 C20 C21 E18 B18 D17 C18 B19 A20 H13 G14 B20 Y2 W3 H18 H15 G21 E19 E20 E21 H14 F19 F20 G18 G19 G20

MEM_CS0_N MEM_CS1_N MEM_CS2_N MEM_CS3_N MEM_WE_N MEM_OE_N MEM_BE0_N MEM_BE1_N MEM_ADV_N MEM_CLK

1K

J8 H7 B10 D9 C8 D8 C1 D3 B9 G8 D2

ACC

G C3276 0.1u

C3222 0.1u

VPPFLASH

1

Engineer:

SUNG-JU, YOU

TITLE:

DOC CTRL CHK: MFG ENGR CHK: Changed by:

4

5

6

7

- 240 -

8

mentor

9

Date Changed:

Tuesday, September 04, 2003

10

Time Changed:

9:42:54 am

REV:

QA CHK:

11

H

LG ELECTRONICS INC.

SUNG-JU, YOU

Drawn by: R&D CHK:

LOW POWER MODE : LEDA VCC

3

ADR(15) ADR(14)

J6

G3 VSS1 J9 VSS2 L4 VSS3

ACC

SIR TRANCEIVER

2

ADR(17) ADR(16)

J5 VCCF1 L5 VCCF2

RDY _ADV CLK

SD(L:ACTIVE, H:SHUTDOWN)

1

TP3103

TP3102

MCP

B

ADR(18)

DAT(14)

PCM I/F

KEY I/F

A1 A10 B3 B6 B7 B8 B9 C9 F5 F6 G5 G6 G8 D5 C5

RB521S-30

TP3117 TP3118

TP3115 TP3116

RESOUT0n

_CEF1 _CEF2

ADR(20) ADR(19)

DAT(13)

R2303 R2622

RTC_GND

J2 D6

U3103 S71WS256HC0BAW00

ADR(23) ADR(22) ADR(21)

DAT(12)

VDIG

VIRDA N3100 CIM-80S7B-T

TP3111 TP3112 TP3113 TP3114

DAT(9)

DAT(11)

MEM_CS3_N

C2 C3136 0.22u 50V 1608

DAT(8)

DAT(10)

MEM_CS0_N MEM_CS1_N

VMEM

R3319

K20 E1 J21 AA11 Y12 AA13 R14 VDDMC VDDDM VDDUSB VDDRTC VDDA0 VDDA1 VDDA2

PDIRES_N PDIC0 PDIC1 PDIC2 PDIC3 PDIC4 PDID0 PDID1 PDID2 PDID3 PDID4 PDID5 PDID6 PDID7 I2CSCL I2CSDA CIPCLK CIVSYNC CIHSYNC CIRES_N CID0 CID1 CID2 CID3 CID4 CID5 CID6 CID7

A7 B7 C7 D7 C6 B5 C5 D6 B4 C4 D5 B3 D4 C3 B2 A1

ADR(18)

H2 B5

F9 E9 E6 D7 E4 F4 G9 D9 F8 E8 D8 C8 F7 E7 C7 C3 D3 E3 F3 D2 E2 F2 G2

NC3 NC4

ADR(16)

DAT(1) DAT(0)

ADR(1:24) A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

M1 M10

ADR(15)

DAT(2)

H9 K2 K6 K9 L2 L3 L6 L7 L8 L9

ADR(14)

R3323

ADR(13)

NA

ADR(12)

R3338

ADR(11)

100K P_MODE

ADR(10)

DAT(3)

CS 0,1,3

NC1 NC2 RFU1 RFU2 RFU3 RFU4 RFU5 RFU6 RFU7 RFU8 RFU9 RFU10 RFU11

0

ADR(9)

DAT(4)

VMEM

RFU12 RFU13 RFU14 RFU15 RFU16 RFU17 RFU18 RFU19 RFU20 RFU21

0

0

R3103

0

R2222

0

R2221

0

0

R2241

R2237 ADR(8)

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24

R3110

R2403

R3325

E2 J7 F3 F2 K4 K3 L7 G3 G2 K8 H4 G1 H3 K7 J2 J4 J3 J1 L8

AA19 N1 R12 Y14 M20 D20 B12 R1 Y1 AA7 H20 A15 L21 A17 B1 K2 A9 B6 R20 M2 N2 Y10 C2 B16 A13 A11 B8 A5 A3 H2 U1 AA1 AA3 Y6 Y18 V20 N21 B21 A19

VDDC00 VDDC01 VDDC02 VDDC03 VDDC04 VDDC05 VDDC06 VDDC07 VDDC08 VDDC09 VDDC10 VDDC11 VDDC12 VDDC13 VDDC14 VDDC15 VDDC16 VDDC17 VDDC18 VDDE00 VDDE01 VDDE02 VDDE101 VDDE102 VDDE104 VDDE106 VDDE108 VDDE110 VDDE112 VDDE200 VDDE201 VDDE202 VDDE203 VDDE204 VDDE205 VDDE206 VDDE207 VDDE208 VDDE209

CS0_N CS1_N CS2_N CS3_N WE_N OE_N MEMBE0_N MEMBE1_N MEMADV_N MEMCLK MEMWAIT_N

470

R2121 NA

R2122 3.3K

MARITATCK MARITATMS MARITATDI MARITATDO MARITATRST MARITARTCK MARITATEMU0 MARITATEMU1

R3126

JTAG I/F

G

NC0 NC

W8 R10 Y9 AA9 V9 Y8 P11 V10 P20 P19 M15 L19 J14 J19 K19 K14 K15 N18 N19 N20 M19 L15 M18 P14 AA17 Y17 W17 V16 W18 AA15 Y15 W15 V15 W16 V3 W1 W2 V4 R13 V13 W14 Y13

TP2401 TP2402 TP2403

HSSLRXCLK HSSLRX HSSLTXCLK HSSLTX

ADR(7)

100K for Intel

L14 E5

TP2404 TP2405

USBDP USBDM USBPUEN

ADR(6)

DAT(5)

100K

N3 N8 N4 N7

ADR(5)

DAT(7) DAT(6)

R3322

J15 J20 H19

USBDP USBDM USBPUEN HSSLRXCLK HSSLRX HSSLTXCLK HSSLTX

o M

DACCLK DACDAT DACSTR ADCSTR

ADR(4)

R2304

P3 P2 P4 P7

MARITA

D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

i b

D2000 ROP-101-3035_1

ADR(3)

h lc

ISSYNC_N ISEVENT_N IRQ0_N GPIO00 GPIO01 GPIO02 GPIO03 GPIO04 GPIO05 GPIO06 GPIO07 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO30 GPIO31 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47

ADR(2)

3.3K R3330

1SS388

DACCLK DACDAT DACSTR ADCSTR

HSSL

H8 K8 H7 J7 K5 J4 H4 K3 J8 G7 K7 H6 H5 K4 G4 J3

DAT(8)

s ip

ADR(1)

2

USBSENSE

F

DAT(0:15)

3

LCDVSYNCI SPKMUTE

MCLK SYSCLK0 SYSCLK1 SYSCLK2 SERVICE_N RESPOW_N RESOUT0_N RESOUT1_N RESOUT2_N RESOUT3_N RESOUT4_N CLKREQ PWRREQ_N

C17 B17 G13 C16 C15 B15 H12 D14 B14 C14 G12 B13 C13 H11 D12 C12 G11 D11 C11 H10 C10 D10 H9 C9

A

A22 = 128MBIT, A21 = 64MBIT

ADR(1:24)

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24

0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4

.8 PITCH 9 X 12 X 1.25 0.8 PITCH 9 X 11.5 X 1.0

ADDRESS X DATA = 2^23 X 2^4 = 2^27 = 128MBIT

Rout track on inner layer

DAT(14)

4.7K

KEY_LED_ONOFF

USB

0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4

DAT(15)

KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 KEYOUT5 KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4 PCMCLK PCMSYN PCMDATA PCMDATB

NA

R2301

CAM_FLASH_SHOT

DAC

128/128/64 128

0.1u C2261

4.7K R3329

UARTRX1 UARTTX1 UARTRTS1 UARTCTS1 CAM_REG_EN CAM_FLASH_ON

UART1

D2012

0.1u C2259

VSSMC VSSDM VSSUSB VSSRTC VSSA0 VSSA1 VSSA2

CAMERA_DET GPIO05 AMPCTRL TGBUZZ UARTRX0 UARTTX0

BL_EN FOLDER_DET EN_LED_R EN_LED_G EN_LED_B IRDA_REG_CTRL

0.1u C2251

0.1u C2258

0.1u C2260

K18 E3 J18 R11 V12 W13 V14

M14 P18 R21 R8 P9 AA2 Y3 W4 V5 Y4 V6 W5 Y5 AA5 W6 V7 W7 Y7 P10 P15 N14 W20 V19 W21 U18 T18 U19 U20 N15 U21 T19 T20 R19 R18 V17 AA21 Y19 AA20 W19 Y20

BL_PWL 7C_LED_VDD_EN

E

0.1u C2219

0.1u C2262 0.1u C2263

0.1u C2252

VSSE00 VSSE01 VSSE02 VSSE100 VSSE102 VSSE104 VSSE106 VSSE108 VSSE110 VSSE112 VSSE200 VSSE201 VSSE202 VSSE203 VSSE204 VSSE205 VSSE206 VSSE207 VSSE208 VSSE209 VSSE210 VSSE211

M3 M4 V2

ISSYNCn ISEVENTn

TP2125

PULSESKIP

0.1u C2253

0.1u C2257

0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4

128/128/64 0 128

0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4

DAT(10)

100K

VDIG

0.1u C2245

0.1u C2250

0.1u C2255 0.1u C2256

L4 M7 W9 E4 D15 D13 G10 G9 H8 A2 G4 R4 U4 R9 V8 Y16 V18 Y21 F18 A21 D16 L18

PWRREQn

P13 R3 T2 T3 L3 R2 F4 L1 P8 U2 U3 M8 T4

100K

IRQ0n

0.1u C2242

0.1u C2247

0.1u C2246

128/128/64 128

DAT(11)

R3127

100K

TP2102

UART0

0.1u C2216

0.1u C2244

0.1u C2243

64/64/16 64/64/16

128/128/64 128

U8100 PT V1.1 Staggered AMD

DAT(12)

SIMDAT0 SIMRST0 SIMCLK0

TP3313

0.1u C2223

0.1u C2222

0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4

OPTION

U8100 PT V1.0 NMBI TOSHIBA

0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4

27

R2102

CLKREQ

47

RESOUT3n

100K

C2104 1000p

330p

RESOUT0n RESOUT1n

130K

C

R2105

R2104

PWRRSTn

D

100

0 C2102 R2109

0.1u C2220

R2238

MODA MODB MODC MODD DCLK IDATA QDATA TXON RXON RADCLK RADSTR RADDAT BSEL0 GPRFCTRL ANTSW0 ANTSW1 ANTSW2 ANTSW3 PCTL 1

TP2101

TP3126

SYSCLK1 SYSCLK2

0.1u C2217

DIRMOD0 DIRMOD1 DIRMOD2 DIRMOD3 DCLK IDATA QDATA TXON RXON RFCLK RFSTR RFDAT BANDSEL0 BANDSEL1 ANTSW0 ANTSW1 ANTSW2 ANTSW3 PCTL

TP2100

MCLK

E

R3346

B

OPTION

64/64/16 64/64/16 64D/64D/16PS 128L/128L

128/128/64 128 128/128

U8100 PT V1.0 Staggered TOSHIBA

DAT(9)

W10 RTCBDIS_N V11 RTCIN W11 RTCOUT P12 RTCDCON W12 RTCCLK

120K

U8100 WS01-5

U8100 ES01-3 TOSHIBA 0.1u C2221

TCK TMS TDI TDO TRST_N RTCK TEMU0_N TEMU1_N IRRX IRTX IRCTRL MMCCLK MMCCMD MMCDAT MSSCLK MSBS MSSDIO SIMDAT0 SIMRST0_N SIMCLK0 SIMDAT1 SIMRST1_N SIMCLK1 KEYOUT0_N KEYOUT1_N KEYOUT2_N KEYOUT3_N KEYOUT4_N KEYOUT5_N KEYIN0_N KEYIN1_N KEYIN2_N KEYIN3_N KEYIN4_N PCMCLK PCMSYN PCMDATA PCMDATB TSYP TSYM TSXP TSXM

R2123

VPPFLASH

R3100 NA Q2100 RN1107

1.5V

1.5V

VRTC VEXT15

DAT(13)

RTC_GND

TP2106

C

3.3V

VUSB

U8100 ES01-2

0.1u C2218

C2101 22p

1.8V

VMEM

VDIG

NA

B

2

TP3317

4 MC-146 B2100

22p

32.768KHz

C2100

3

C2100 and C2101 close to B2100

32.768KHz

R2223

47

ONSWC

2.75V

U8100 ES01-1 DEFAULT

RF I/F

R2100

RTCCLK

1.8V

VCORE VMEM

U8100 ES01-6 TOSHIBA

H8 J8 K1 K8 L1 L2 L7 L8 M1 M2 M7 M8

VDDE 1.5V

VCORE

0.8 PITCH 14 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4

TP3100

VDDC 1.5V

VDDC 1.5V VEXT15

A

MCP 64/08. 64/64/16 64/64/16 64/64/16 64/64/16 64/64/16 64/64/16

TP3101

U8100 WS01-1 U8100 WS01-2 U8100 WS01-3 U8100 WS01-4 2002.09.13

3G HANDSETS LAB DEVELOPMENT GROUP1

Size:

A2 BB MAIN PCB 12 1 8 A MARITA U8100 PT V1.3 Staggered AMD

Page:

Drawing Number:

12

6

9. CIRCUIT DIAGRAM

X3201

PDM : ENBY0017602

10

11

FB2

9

12

1608

8

13

R3364

51

7

14

R3365

51

6

15

5

16

R3366

4

17

R3367

3

18

2

19

1

20

G1

G2

H

R3389

100

R3390

100

EMX18 Q3200

1

2

3

KEYPAD BACKLIGHT BLUE LED I/F

C3260

C3259

20p

NA

R3210 3

4

NA

1

5

NA

2

E

VBACKUP

TP3338 TP3339

TP3343 TP3340

PCMCLK PCMSYN

HF MIC

TP3202

PCMDATA

NA

PDM : ENEY0003301 GT059-24P-3BL-P800

NA 0 NA

R3220 R3249 R3222 R3223

0

R3225

NA

R3227 R3228

0 0

X3203 25 VBAT_GND_1 26 VBAT_GND_2 1 BATT_ID 2 HF_MODE 3 DSR 4 PWR_+5V_1 5 PWR_+5V_2 6 ON_SW1 7 PCM_RXA_IN 8 PCM_CLK 9 PCM_SYNC 10 USB_RX 11 PCM_TXA_OUT 12 PWR_GND_1 13 RXD 14 TXD 15 USB_TX 16 USB_PWR 17 DCD 18 RI_TMS 19 PWR_GND_2 20 RFR_RTS 21 PWR_+4_2V_1 22 PWR_+4_2V_2 23 CTS 24 DTR TP3307 27 V_BAT_1 5V 28 V_BAT_2 29 V_BAT_3 30 GND1 31 GND2

BLM18PG121SN1 L2201

HF SPK P TP3204

R2502 0

V2500

UARTRTS1

RB521S-30 NA

PCMDATB

0 0

R2319

1K

R3232 R3233

0 NA

NA

R3229 R3230

VBAT 0

R3341

R3237

C3215

0

33u

1

3

4

G R3235 NA

2.75V

5

DTC SENSE TP3205

C2208 1u

1608

D1

D2

NA

V3201

5

D4

CRS08 V3200

2

USB FILTER

3216 D3

R2504

NA

6

USBUF01W6

F

NA

A1 A2 A3 A4 A5 B1 B5

100K

DTMS_e DFMS_e CTMS_e CFMS_e VPPFLASH_e CTS_ON_e DCIO_e

R3252

IP4022CX20

Engineer: Drawn by: R&D CHK:

S .Y SEOK

7

6

- 241 -

8

mentor

9

Date Changed:

Tuesday, September 04, 2003

10

Time Changed:

2:11:39 pm

QA CHK:

TITLE:

REV:

11

H

LG ELECTRONICS INC.

S .Y SEOK

DOC CTRL CHK:

4

B

EN_LED_TC

C

MFG ENGR CHK:

3

7C_LED_VDD_EN

CURRENT LIMIT

Changed by:

2

D2014 1SS388

15mA x 16 = 240mA

I/O CONNECTOR

1

D2013 1SS388

2.7K

4

R3209

C3261

C3258

20p

C3

20p

C1

ESD4

20p

A3

ESD3

CSPESD304

A1

ESD2 GND

B2

5

12

GND

UARTTX1

C3201 1u 1608

6

UMC4N

L2500 1 6 D1 D4 2 5 3_3V GND 3 4 D2 D3 R2501

CAMERA ROTATION DETECTOR

USBPUEN

6

R3208

D5

USBDM

EN

KEY_LED_ONOFF 12

SMF05C

C3205 10p

FID1

9 8 7

R3236

R2500 NA

USBDP

CF2-

R3207

SP3205 SP3200 SP3206 SP3207 SP3201 SP3208 SP3202 SP3209 SP3203 SP3210 SP3211 SP3204 SP3212

N3200 A3212ELH 1 VDD 3 GND OUT 2

C3204 0.1u

FID0

10

KEY_LED-

Q3201

NA NA NA NA

C3220 0.1u

R2503

UARTRX1

GND

VDIG

R3347

DTMS_i DFMS_i CTMS_i CFMS_i VPPFLASH_i CTS_ON_i DCIO_i

VBATI

CAMERA_DET

CF1-

VIN

D

HF SPK N TP3203 Q2300 RN1107

VCAM

100K

CF2+

CF1+

SUB LCD BACKLIGHT 4.5V

I2CDAT

R3211

R3353 R3352 R3351 R3350

VBUS

R3206

SC600B

SC600BIMSTR

VOUT

CHARGE PUMP

C3203 1u 1608

FB1

TP3200

C B

E

G

C3

C3

B2

D2 D3 C3 D4 TP3337 D5 TP3336 D1 C5

UARTRX1 UARTTX1 UARTRX0 UARTTX0 VPPFLASH ONSWBn DCIN_3

NA

UARTCTS1

CIHSYNC

51

5

1608

N3201

VDIG

R2505

TP3306

2

1608

100K 0.1u 0.1u 0.01u

CAMERA REGULATOR

s ip 51

HF DETECTION

N2300

VBAT

TP3342 TP3341

F

ESD1

C1

ESD4

D2009

A3

ESD3

B2

o M

CIRES_N

C3212 1000p C3213 1000p C3219 1000p

R3332

C3245 10u

1

C3202 10u 2012

R3398 C2304 C2500 C2279

300K

C3243 470p

R3331

100K

R3344

MIC5219BM5

C3244 2.2u 2012

240K

VCAM

4.7

I2CCLK_CAMERA

DCIN_2

KNATTE

C4

E

i b

R3263

0

1u

CID7

CAMERA I/F

B'd to B'd CONNECTOR I/F

R3388

4

h lc

EN_LED_R EN_LED_G EN_LED_B KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 KEYOUT5 MARITATEMU1 MARITATEMU0 MARITARTCK MARITATRST MARITATDO MARITATDI MARITATMS MARITATCK

7C_LED_VDD

CID6

CSPESD304

A1

ESD2

C3 ESD4

B2

GND

C1 ESD3

ESD1

A3 ESD2

CSPESD304 D2008

A1 ESD1

C3255

C3249

C3252

51

GND

R3363

D2007

CID3 SYSCLK1

C1

CID0

LCDCSX_SUB LCDRESX LCDVSYNCI LCDWRX LCDRS LCDCSX_MAIN LCDRDX PDID0 PDID1 PDID2 PDID3 PDID4 PDID5 PDID6 PDID7

CSPESD304 D2018

51

A3

R3360

CIPCLK

A1

CID2

ESD4

EARM EARP BL_EN MOTOR_BATT SPKP SPKM

ESD3

51

CID1

ESD2

R3357

CIVSYNC

G4

ESD1

CID5

KEY_LED-

CAM_REG_EN

A

3

G3

GND

CID4

BL_PWL FOLDER_DET

U3102 1 5 IN OUT 2 GND 3 4 EN ADJ

VCAM

AXK7L80225

7C_LED_VDD CAM_FLASH_ON CAM_FLASH_SHOT

VBATI

12

11

10

C3200

GND5 C2 GND4 C1 GND3 B4 GND2 B3 GND1 B2

D

9

VBATI

ONSWAn KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4

20p

C

8

7

VBATI

20p

B

6

5

VCC

VDIG

CONN_10_5087_060_920_829 X3200 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

4

3

20p

A

2

NA

1

3G HANDSETS LAB. DEVELOPMENT GROUP1

Size:

A2 BB MAIN PCB MULTIMEDIA INTERFACE 12 1 8 A U8100 PT V1.3 Staggered AMD

Drawing Number:

Page:

12

7

9. CIRCUIT DIAGRAM

5

4

A

6

7

1.5V

1.5V

1.5V

R2224

10

11

12

A

VEXT15 WANDAVDDA

1.5V

VCORE VRTC VEXT15

VCORE

9

8

VCORE WANDAVDDD

0

3

0

2

R2236

1

B

B C2227 0.1u

C2229 0.1u

C2234 0.1u

C2236 0.1u

C2241 0.1u

C2240 0.1u

C2239 0.1u

C2230 0.1u

C2232 0.1u

C2224 0.1u

B1 D2 G1 K2 M1 R1 T2 U5 R13 U16 R16 N17 K17 H17 F17 D16 A17 B14 A12 B8 A6 A3 L15 R12 T17 U6 U10 R11

D

RXIA RXIB RXQA RXQB C2400

ADCSTR

D4 ID_BALL A13 IS_SYNC_N B12 IS_EVENT_N U12 APLL_ATEST1

TP2116

1%

C2215 0.1u

C2 C1 F5 E3 G5 E1 F2 F1 G3 G2 H5 H1 H2 J2 J3 J5 K3 K5 K1 L1 L3 M2 L5 N1 M3 M5 P2 P3 R2 T1 N5 U1

D

E

N6 CPU_IACK R5 CPU_XF N7 CPU_IRQ1 R6 CPU_IRQ0 M17 CPU_CLKOUT

F

TP2120

R2120 NA

TP2117

TP2321

G

TP2320

TP2322

R2400 43K

C

N12 EXT_MEM_UBUS10 T14 EXT_MEM_UBUS11 R14 EXT_MEM_UBUS12 E17 EXT_FRAME_STROBE

VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSSA_CS_APLL VSSA_RX VSSA_TX VSSA_BG

E12 UART_TX C13 UART_RX

TP2119

C2225 0.1u

U3 EMIF_AWE_N T3 EMIF_ARE_N U2 EMIF_AREADY

U13 MCLK T16 CLK32 R15 HCLK T15 CLKRQ N13 RESET_N

N15 DAC_CLK L13 DAC_DAT M15 DAC_STR

DACCLK DACDAT DACSTR

C2235 0.1u

C2228 0.1u

D3 F3 H3 L2 N3 R3 R4 T4 U15 U17 P16 L16 J16 H16 F15 C16 B15 C12 B11 B10 B7 C5 C3 T6 T12 N11 T8 R8 T11

VINCENNE INTERFACE F

C2103 330p

MCLK RTCCLK CLKREQ RESOUT1n

GPO0 GPO1 GPO2 GPO3 GPO4 GPO5 GPO6 GPO7

ISSYNCn ISEVENTn

CLK INTERFACE

o M B16 HSSLRX_D A16 HSSLTX_CLK A15 HSSLTX_D C14 HSSLRX_CLK

HSSLTX HSSLRXCLK HSSLRX HSSLTXCLK

D2006

ROP-101-3033_1

L17 K13 K15 K16 J15 J13 H15 H13

HSSL LINK (MARITA)

N8 DAC_I_OUT U8 DAC_I_OUT_INV U7 DAC_Q_OUT R7 DAC_Q_OUT_INV T7 DAC_TXEXTRES

TXIA TXIB TXQA TXQB

EMIF_D0 EMIF_D1 EMIF_D2 EMIF_D3 EMIF_D4 EMIF_D5 EMIF_D6 EMIF_D7 EMIF_D8 EMIF_D9 EMIF_D10 EMIF_D11 EMIF_D12 EMIF_D13 EMIF_D14 EMIF_D15 EMIF_D16 EMIF_D17 EMIF_D18 EMIF_D19 EMIF_D20 EMIF_D21 EMIF_D22 EMIF_D23 EMIF_D24 EMIF_D25 EMIF_D26 EMIF_D27 EMIF_D28 EMIF_D29 EMIF_D30 EMIF_D31

C2226 0.1u

C2231 0.1u

C2237 0.1u

TP2118

E

i b

ADC_I_IN ADC_I_IN_INV ADC_Q_IN ADC_Q_IN_INV ADC_RXEXTREF_P ADC_RXEXTREF_N AD_STR

C17 BOOTMODE0 B17 BOOTMODE1 E13 BOOTMODE2 C15 BOOTMODE3

RF TX DATA

R10 N10 R9 T9 T10 N9 0.1u M16

BG_REF

NA

R17 RADIO_CLK P15 RADIO_DAT M13 RADIO_STR

WCLK WDAT

U11

RF RX DATA

PMST3904

D15 TESTMODE E11 ANALOG_ENABLE C11 APLL_BYPASS A11 CS_BYPASS

2

R3326

1

Q3204

WSTR

3

RF CONTROL

JTAG_TRSTN JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO EMU1 EMU0

VDD21 VDD20 VDD19 VDD18 VDD17 VDD16 VDD15 VDD14 VDD13 VDD12 VDD11 VDD10 VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0 VDD_DPLL VDDA_CS_APLL VDD_CLK32 VDDA_TX VDDA_RX VDDA_BG

G16 G17 G15 F16 G13 E15 F13

47p

C3265

3.3K

R3380

VCORE

2.7K

R3383

VDIG

B2 EMIF_A23 E5 EMIF_A22 A1 EMIF_A21 A2 EMIF_A20 B3 EMIF_A19 C4 EMIF_A18 B4 EMIF_A17 E6 EMIF_A16 C6 EMIF_A15 A5 EMIF_A14 E7 EMIF_A13 B6 EMIF_A12 C7 EMIF_A11 A7 EMIF_A10 A8 EMIF_A9 E8 EMIF_A8 C8 EMIF_A7 E9 EMIF_A6 C9 EMIF_A5 B9 EMIF_A4 C10 EMIF_A3 A10 EMIF_A2 E10 EMIF_A1

h lc

100K

R2402

100K

R2401

C

C2233 0.1u

s ip

C2238 0.1u

G

H

Engineer:

MYUNG-LAE, CHO

TITLE:

DOC CTRL CHK: MFG ENGR CHK: Changed by:

1

2

3

4

5

7

6

- 242 -

8

mentor

9

Date Changed:

Tuesday, September 04, 2003

10

Time Changed:

9:42:54 am

QA CHK:

REV:

11

H

LG ELECTRONICS INC.

MYUNG-LAE, CHO

Drawn by: R&D CHK:

3G HANDSETS LAB. DEVELOPMENT GROUP 1

Size:

A2 BB MAIN PCB 12 1 8 A WANDA U8100 PT V1.3 Staggered AMD

Drawing Number:

Page:

12

8

9. CIRCUIT DIAGRAM

1

2

3

8

4

10

9

12

11

A A

R1145 R1140 R1141 R1142 R1143 R1144

LCDCSX_MAIN LCDRESX LCDVSYNCI LCDCSX_SUB LCDRS LCDRDX

100 100 100 100 100 100 C35

C36 C37

30p 30p 30p

EN_LED_R EN_LED_G EN_LED_B KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 KEYOUT5

R1146 R1147 R1148 R1149 R1150 R1153

PDID6 PDID4 PDID2 PDID0 BL_EN EN_LED_G

C43

C44 C45

C46 C41

C42

i b

30p 30p 47p

5

3

4

6 D5

D4

D3

D2

1

SPKM SPKP MOTOR_BATT CAM_FLASH_SHOT

BOARD TO BOARD CONECTOR

2

D2

2003.11.18

U8100 KEY PT V1.1

2004.01.14 ESD EMI FILTER -> RC Filter

TOSHIBA LCD I/F

o M

E

U8100 KEY V0.8

NA

SMF05C

LCDRESX PULL DOWN R MOVE TVS VDIG

F

VBATI_4.2V

KB2

2

KEYIN4

KEYIN3

KEYIN2

SIDE3

4

7

KB7

KB12

KB17

5

8

0

KB8

KB13

KB18

6

9

#

KB9

KB14

KB19

KEYOUT0

KB21

C

TVS1

KEYOUT1

UP

*

INSTPAR

470 C23 C24 C22 470p 470p 470p

KB11

B

470

470

R1104

KB16

KB6

R1154

UCLAMP0501H

KEYIN1

s ip 1

h lc

C40

30p 30p 30p

100 100 100 100 100 270

30p 30p 30p

MARITATEMU1 MARITATEMU0 MARITARTCK MARITATRST MARITATDO MARITATDI MARITATMS MARITATCK

C38 C39

KB1

470

R1102

VA1

TVS2

NA

LCDRESX

END

CN964 1 2 3 4

R1103

VA2

C34

30p 30p 30p

INSTPAR

LCDCSX_SUB

C32 C33

SIDE2

VA3

C30 C31

30p 30p 30p

U8100_SIDEKEY_PAD

SIDE1

D1 1SS388

AVL14K02200

C29

KB26

AVL14K02200

EARM EARP BL_EN MOTOR_BATT SPKP SPKM

100 100 100 100 100 0

AVL14K02200

R1134 R1135 R1136 R1137 R1138 R1139

BL_PWL PDID1 PDID3 PDID5 PDID7 LCDWRX

KEY_LED-

UCLAMP0501H

BL_PWL FOLDER_DET

LCDVSYNCI LCDWRX LCDRS LCDCSX_MAIN LCDRDX PDID0 PDID1 PDID2 PDID3 PDID4 PDID5 PDID6 PDID7

40 39 38 VBATI_4.2V 37 36 35 34 33 32 31 30 29 28 VDIG_2.8V 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 7C_LED_VDD 10 9 8 7 6 5 4 3 2 1 CN963

C28

47p 47p

KEYIN0

CONN_40_AXK840145J

270 270 C27

GND

D

R1152 R1151

CAM_FLASH_ON CAM_FLASH_SHOT

D1

C

CAM_FLASH_ON EARP EARM EN_LED_R EN_LED_B

R1097

B

ONSWAn KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4

ONSWAn

VBATI_4.2V

64 63 62 61 60 59 58 7C_LED_VDD 57 56 55 54 53 52 51 VDIG_2.8V 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CN962

KB22

KEYOUT2

DOWN

D KB3

3 KB4

KB23

KEYOUT3

RIGHT KB24

E KEYOUT4

SEND

MENU

BACK

CLEAER

KB5

KB10

GAME

MULTI

SEARCH

LEFT KB25

KB20

KB15

KEYOUT5

OK

CAM

F

KEYPAD VDIG_2.8V

U1 A3212ELH 1 VDD 3 GND OUT 2

QSMR-C138 LD17

QSMR-C138 LD14

QSMR-C138 LD16

QSMR-C138 LD13

FOLDER_DET

100K

C26 0.1u

C25 0.1u

G

C21 10p

36

R1131

QSMR-C138 LD12

QSMR-C138 LD11

QSMR-C138 LD9

QSMR-C138 LD10 36

R1100

QSMR-C138 LD8

QSMR-C138 LD7

QSMR-C138 LD5

QSMR-C138 LD6 36

R1099

QSMR-C138 LD3

QSMR-C138 LD4

QSMR-C138 LD2 36

QSMR-C138 LD1

R1130

R1098

QSMR-C138 LD20

QSMR-C138 LD19 R1133

47

QSMR-C138 LD18

HSMR-C191

G

FOLDER OPEN DETECTOR

KEY_LED-

H

Engineer:

KEYPAD BACKLIGHT BLUE LED

TITLE:

DOC CTRL CHK:

1

2

3

4

5

7

6

- 243 -

8

9

Date Changed:

FEB,17,2003

Time Changed:

10

QA CHK:

REV:

11

3G HANDSETS LAB. DEVELOPMENT GROUP 1

U8100 KEY PT V1.3

Size: A2

BB KEY PAD PCB 2004.02.09

MFG ENGR CHK: Changed by:

mentor

H

LG ELECTRONICS INC.

Drawn by: R&D CHK:

12 1 8 A

Drawing Number:

Page:

12

1

10. PCB LAYOUT

h lc

i b

o M

s ip

- 244 -

10. PCB LAYOUT

s ip

h lc

o M

i b

- 245 -

10. PCB LAYOUT

h lc

i b

o M

s ip

- 246 -

10. PCB LAYOUT

s ip

h lc

o M

i b

- 247 -