Node List Tolerance Analysis Enhancing SPICE Capabilities with Mathcad
Other Related Titles of Interest Include: Tole...

Author:
Robert R. Boyd

This content was uploaded by our users and we assume good faith they have the permission to share this book. If you own the copyright to this book and it is wrongfully on our website, we offer a simple DMCA procedure to remove your content from our site. Start by pressing the button below!

Node List Tolerance Analysis Enhancing SPICE Capabilities with Mathcad

Other Related Titles of Interest Include: Tolerance Analysis of Electronic Circuits Using MATLAB Robert R. Boyd, University of California, Irvine, California ISBN: 0849322766 Tolerance Analysis of Electronic Circuits Using MATHCAD Robert R. Boyd, University of California, Irvine, California ISBN: 0849323398 The Electronics Handbook, Second Edition Jerry Whitaker, Technical Press, Morgan Hill, California ISBN: 0849318890 PSPICE and MATLAB for Electronics: An Integrated Approach John O. Attia, Prairie View A&M University, Texas ISBN: 0849312639 Electronics and Circuit Analysis Using MATLAB, Second Edition John O. Attia, Prairie View A&M University, Texas ISBN: 0849318920

Node List Tolerance Analysis Enhancing SPICE Capabilities with Mathcad

Robert R. Boyd

Boca Raton London New York

A CRC title, part of the Taylor & Francis imprint, a member of the Taylor & Francis Group, the academic division of T&F Informa plc.

Published in 2006 by CRC Press Taylor & Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca Raton, FL 33487-2742 © 2006 by Taylor & Francis Group, LLC CRC Press is an imprint of Taylor & Francis Group No claim to original U.S. Government works Printed in the United States of America on acid-free paper 10 9 8 7 6 5 4 3 2 1 International Standard Book Number-10: 0-8493-7028-0 (Hardcover) International Standard Book Number-13: 978-0-8493-7028-1 (Hardcover) Library of Congress Card Number 2005052136 This book contains information obtained from authentic and highly regarded sources. Reprinted material is quoted with permission, and sources are indicated. A wide variety of references are listed. Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the consequences of their use. No part of this book may be reprinted, reproduced, transmitted, or utilized in any form by any electronic, mechanical, or other means, now known or hereafter invented, including photocopying, microfilming, and recording, or in any information storage or retrieval system, without written permission from the publishers. For permission to photocopy or use material electronically from this work, please access www.copyright.com (http://www.copyright.com/) or contact the Copyright Clearance Center, Inc. (CCC) 222 Rosewood Drive, Danvers, MA 01923, 978-750-8400. CCC is a not-for-profit organization that provides licenses and registration for a variety of users. For organizations that have been granted a photocopy license by the CCC, a separate system of payment has been arranged. Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe.

Library of Congress Cataloging-in-Publication Data Boyd, Robert (Robert R.) Node list tolerance analysis : enhancing SPICE capabilities with Mathcad/ Robert R. Boyd. p. cm. Includes bibliographical references and index. ISBN 0-8493-7028-0 (alk. paper) 1. Electric circuits, Linear. 2. Analog electronic systems. 3. Electric circuit analysis. 4. Tolerance (Engineering) 5. Mathcad. 6. SPICE (Computer file) TK454.B66 2006 621.3815--dc22

2005052136

Visit the Taylor & Francis Web site at http://www.taylorandfrancis.com Taylor & Francis Group is the Academic Division of Informa plc.

and the CRC Press Web site at http://www.crcpress.com

Preface The purpose of this book is to provide an improved SPICE-like, worst-case analysis (WCA) capability using Mathcad. To achieve more accurate WCA methods, a SPICE-like netlist or node list method of nominal circuit analysis was developed first. Subprogram routines were then added to perform tolerance analyses using Root-Sum-Square (RSS), Extreme Value Analysis (EVA), and Monte Carlo Analysis (MCA) in the DC, frequency, and time domains. Note that “SPICE” is a generic term referring to the public domain software developed by the University of California–Berkeley in the early 1980s. Several companies were started after converting the Fortran code to C and adding a graphics interface. These commercial versions are very capable in nominal circuit analysis and, correspondingly, expensive. There are many areas in SPICE WCA that range from nonexistent or weak capability to erroneous analyses. Most if not all of these deficiencies still exist in many commercial versions. These areas are: • • • • • • • •

A 400-sample Monte Carlo limitation — not nearly enough for adequate statistical confidence levels No RSS capability No direct method of handling asymmetric component tolerances, e.g., +2%, 4% No Fast Monte Carlo Analysis (FMCA) capability* No single-run method of tolerancing inputs No direct method of detecting nonmonotonic components, which cause erroneous WCA outputs No AC frequency sweep sensitivity capability No predefined beta (skewed) or bimodal (gapped) distributions available for MCA

In addition, the SPICE random number generator used for MCA repeatedly supplies the same set of random numbers with each analysis run. To correct this, a new seed must be supplied before each new run. (This is equivalent to having the same 20 numbers come up every time in a Las Vegas keno game.) Some commercial versions may have improved a few of these areas, as most companies want to make a good product better. All of these deficiencies have been addressed and corrected in the supplied Mathcad software on the CD and demonstrated using many examples in this book. For example, the number of Monte Carlo samples is now limited only by the amount * Boyd, R., Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 87.

of memory on the computer platform used. Those readers knowledgeable in statistics know that in Monte Carlo analysis, more is better. It is the author’s hope that this book will provide a much less expensive and more accurate method of performing tolerance analysis of electronic circuits.

The Author Robert R. Boyd was a technical instructor in the United States Air Force for 19 years. Upon his retirement in 1971, he enrolled at the University of New Mexico and received a B.S.E.E. degree with honors in 1974. He was subsequently employed in the aerospace industry, including 8 years with Hughes Aircraft Co., in analog circuit design until 1993 and as a consultant until 2002. He taught courses in tolerance analysis at the University of California Extension, Irvine, in 1998 and 1999. He has authored two books, Tolerance Analysis of Electronic Circuits Using MATLAB and Tolerance Analysis of Electronic Circuits Using Mathcad, both published by CRC Press in 1999.

This page intentionally left blank

Acknowledgments I would like to give my thanks and credit to the following people at Taylor & Francis/CRC Press: Engineering Editor, Nora Konopka – for her successful presentation of my manuscript to the publishing committee and for pleasant email “conversation.” Editorial Project Development Manager, Helena Redshaw – for her patience and diligence in guiding me and the book material through to production. Associate Editor, Allison Taub – for smoothing out the rough spots and helping with the reviews. Project Editor, Amber Stein – for putting up with my frequent changes to the manuscript. They have all been easy to communicate with and helped make the work of writing this book less painful than it would have otherwise been; and all this in spite of several hurricanes! Robert Boyd Placerville, CA

This page intentionally left blank

Table of Contents PART I Chapter 1 1.1

1.2

Nominal Analysis Introduction ........................................................................................3

Nominal Analysis.............................................................................................3 1.1.1 Introduction ..........................................................................................3 1.1.2 The NDS Method of Nominal Circuit Analysis..................................4 1.1.3 General Guidelines...............................................................................5 Introduction to Node List Circuit Analysis .....................................................6 1.2.1 Rules and Definitions...........................................................................6

Chapter 2

Passive Circuits...................................................................................9

2.1 Introduction to Node List Circuit Analysis (Part One)...................................9 2.2 Introduction to Node List Circuit Analysis (Part Two).................................16 2.3 All-Capacitive Circuit ....................................................................................21 2.4 All-Inductive Circuit ......................................................................................23 2.5 Twin-T RC Network ......................................................................................24 2.6 Broadband Pulse Transformer Model............................................................27 2.7 All-Capacitive Loops (ACL)..........................................................................30 2.8 All-Inductive Cutsets (ICS) ...........................................................................31 2.9 All-Capacitive Loop Example .......................................................................32 References................................................................................................................34 Chapter 3 3.1

3.2 3.3 3.4 3.5 3.6

Controlled Sources ...........................................................................35

Controlled (Dependent) Sources....................................................................35 3.1.1 Voltage-Controlled Current Source (VCCS) .....................................35 3.1.2 Current-Controlled Current Source (CCCS) .....................................35 3.1.3 Voltage-Controlled Voltage Source (VCVS) .....................................35 3.1.4 Current-Controlled Voltage Source (CCVS) .....................................36 3.1.5 CCVS to VCVS .................................................................................36 3.1.6 CCCS to VCCS..................................................................................36 3.1.7 Four Rules that Must be Observed....................................................37 Floating VCVS...............................................................................................38 Circuits with M > 1 .......................................................................................41 First-Order MOSFET Model .........................................................................44 VCVS and CCCS Example ...........................................................................46 Two Inputs, Three Outputs ............................................................................50

3.7 3.8 3.9 3.10 3.11 3.12

Third-Order Opamp Model............................................................................54 A Subcircuit Scheme .....................................................................................56 Subcircuit Opamp Model...............................................................................58 Fifth-Order Active Filter ................................................................................59 State Variable Filter........................................................................................60 Seventh-Order Elliptical Low-Pass Filter......................................................63 3.12.1 Stepping One Resistor Value .............................................................68 3.12.2 Stepping All Seven Capacitor Values ................................................71 3.13 Square Root of Frequency (+10 dB/decade) Circuit ....................................74 3.14 HV (200 V) Shunt MOSFET Regulator........................................................76 3.15 LTC 1562 Band-Pass Filter IC in a Quad IC................................................78 3.16 LTC 1562 Quad Band Filter IC.....................................................................79 3.17 BJT Constant Current Source — A Simple Linear Model Using the NDS Method ..................................................................................................87 3.18 uA733 Video Amplifier..................................................................................89 References................................................................................................................95 Chapter 4

Leverrier’s Algorithm ......................................................................97

4.1 4.2

Numerical Transfer Function [1] ...................................................................97 Transfer Function Using Leverrier’s Algorithm for Twin-T RC Network ..................................................................................................100 References..............................................................................................................101 Chapter 5 5.1 5.2 5.3

Stability Analysis ............................................................................103

Unity Gain Differential Amplifiers..............................................................103 Stability of LM158 Opamp Model..............................................................106 High-Voltage Shunt Regulator — Stability Analysis..................................109

Chapter 6

Transient Analysis ..........................................................................115

6.1 Introduction ..................................................................................................115 6.2 Switched Transient Analysis........................................................................118 6.3 N = 2 Switched Circuit Transient Response ...............................................120 6.4 Comparator 100-Hz Oscillator.....................................................................123 6.5 Transient Analysis of Pulse Transformer ....................................................127 6.6 Passive RCL Circuit Transient Analysis......................................................131 6.7 Mathcad’s Differential Equation Solvers.....................................................133 6.8 A Mathematical Pulse Width Modulator (PWM) .......................................135 6.9 Switching Power Supply Output Stage — Buck Regulator .......................137 6.10 State Space Averaging..................................................................................140 6.11 Simple Triangular Waveform Generator......................................................143 6.12 Quadrature Oscillator...................................................................................145 6.13 Wein Bridge Oscillator ................................................................................148 References..............................................................................................................149

Chapter 7 7.1 7.2

7.3 7.4 7.5 7.6 7.7

DC Circuit Analysis .......................................................................151

Resistance Temperature Detector (RTD) Circuit ........................................151 An Undergraduate EE Textbook Problem ...................................................152 7.2.1 Matrix Solution To Demonstrate the Utility of the NDS Method ....................................................................................153 DC Test Circuit ............................................................................................154 Stacking VCVS’s and Paralleling VCCS’s..................................................158 DC Voltage Sweep (RTD Circuit) ...............................................................159 RTD Circuit — Step Resistor Value............................................................161 Floating 5-V Input Source ...........................................................................164

Chapter 8

Three-Phase Circuits .....................................................................167

Convert ∆ Floating Voltage Inputs to Single-Ended Y Inputs ....................167 Three-Phase NDS Solution..........................................................................170 8.2.1 Unbalanced Delta Load — Single-Ended Inputs on A and B ............................................................................................170 8.2.2 Unbalanced Delta Load — Single-Ended Inputs on A and C ............................................................................................172 8.3 Three-Phase Y — Unbalanced Load ...........................................................174 8.4 Three-Phase Y-Connected Unbalanced Load — Floating Delta Input....................................................................................................177 8.5 Balanced Y- Load.........................................................................................181 References..............................................................................................................186 8.1 8.2

Appendix I ............................................................................................................187 Background Theory of NDS Method....................................................................187 A-I.1 Theory of NDS Method...............................................................................196 A-I.1.1 An AC Floating VCVS ..................................................................199 A-I.1.2 VCVS and CCCS...........................................................................203

PART II Chapter 9 9.1

9.2

Tolerance Analysis Introduction ....................................................................................211

Introduction ..................................................................................................211 9.1.1 Tolerance Analysis of Circuits with Discrete Components ............211 9.1.2 Analysis Methods.............................................................................212 Some Facts about Tolerance Analysis .........................................................212 9.2.1 DC Analysis .....................................................................................212 9.2.1.1 Monte Carlo Analysis .......................................................213 9.2.2 AC Analysis .....................................................................................213 9.2.3 Transient Analysis ............................................................................217

9.2.4 Asymmetric Tolerances....................................................................217 References..............................................................................................................217

Chapter 10 DC Circuits .....................................................................................219 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 10.10 10.11

Resistance Temperature Detector (RTD) Circuit......................................219 A Note on Asymmetric Tolerances...........................................................221 Centered Difference Approximation — Sensitivities ...............................222 RTD Circuit Monte Carlo Analysis (MCA) .............................................224 RTD MCA with R4 Tolerance = 10%......................................................226 RTD Circuit Fast Monte Carlo Analysis (FMCA) ...................................227 A CASE FMCA Greater than EVA......................................................... 228 Tolerancing Inputs.....................................................................................231 Beta Distributions [4–6]............................................................................232 RTD MCA — Beta (Skewed) Distribution ..............................................234 MCA of RTD Circuit using Bimodal (Gapped) Distribution Inputs.....................................................................................236 References..............................................................................................................239 Chapter 11 AC Circuits .....................................................................................241 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 11.9 11.10 11.11 11.12 11.13 11.14 11.15 11.16 11.17

11.18 11.19 11.20 11.21

Circuit Output vs. Component Value........................................................241 Exact Values of C1 Sensitivity .................................................................247 Multiple-Output EVA................................................................................248 Butterworth Low-Pass Filter Circuit.........................................................250 Butterworth Low-Pass Filter MCA...........................................................251 Butterworth Low-Pass Filter EVA ............................................................253 Butterworth Low-Pass Filter FMCA ........................................................254 Multiple-Feedback Band-Pass Filter (BPF) Circuit ................................255 Multiple-Feedback BPF MCA..................................................................256 Multiple-Feedback BPF EVA ...................................................................257 Multiple-Feedback BPF FMCA................................................................259 Switching Power Supply Compensation Circuit .....................................260 Switching Power Supply Compensation MCA ........................................261 Switching Power Supply Compensation EVA..........................................262 Switching Power Supply Compensation FMCA ......................................264 Sallen and Key Band-Pass Filter (BPF) Circuit.......................................265 Sallen and Key BPF MCA........................................................................266 11.17.1 Sallen and Key BPF — MCA with both Common and Precision Tolerances ...................................................................267 Sallen and Key BPF EVA .........................................................................268 Sallen and Key BPF FMCA .....................................................................270 State Variable Filter Circuit .....................................................................271 State Variable Filter MCA ........................................................................272

11.22 State Variable Filter EVA..........................................................................273 11.23 State Variable Filter FMCA and MCA Combined...................................275 11.24 High-Q Hum Notch Filter Circuit ...........................................................276 11.25 High-Q Hum Notch Filter MCA ..............................................................278 11.26 High-Q Hum Notch Filter EVA................................................................279 11.27 High-Q Hum Notch Filter FMCA ............................................................280 11.28 LTC 1562 MCA ........................................................................................281 11.29 LTC 1562 EVA..........................................................................................282 References..............................................................................................................284 Chapter 12 Transient Tolerance Analysis ........................................................285 12.1 12.2 12.3 12.4

Transient MCA — Twin-T RC Network ...................................................285 Transient MCA — Multiple Feedback BPF ...............................................286 AC and Transient MCA — Bessel HPF .....................................................288 Transient MCA — State Variable Filter......................................................291

Chapter 13 Three-Phase Circuits ....................................................................295 13.1 Three-Phase Y-Connected Unbalanced Load MCA ....................................295 13.2 Three-Phase Y-Connected Unbalanced Load EVA .....................................297 13.3 Three-Phase Y-Connected Unbalanced Load FMCA..................................300 Chapter 14 Miscellaneous Topics......................................................................303 14.1 14.2 14.3 14.4 14.5

Components Nominally Zero.......................................................................303 Tolerance Analysis of Opamp Offsets .........................................................305 Best-Fit Resistor Ratios ...............................................................................309 Truncated Gaussian Distribution .................................................................311 LTC1060 Switched Capacitor Filter............................................................313 14.5.1 Design Procedure from the Data Sheet ...........................................313

Appendix II...........................................................................................................319 Summary of Tolerance Analysis Methods ............................................................319 DC ................................................................................................................319 AC.................................................................................................................319 Transient .......................................................................................................319 Table of Subprograms............................................................................................320 Part I Nominal Analysis Subprograms .......................................................320 Part II Tolerance Analysis Subprograms (Used with Part I Subprograms) ..................................................................................320 In Case of Difficulty..............................................................................................320 Abbreviations .........................................................................................................321 Index......................................................................................................................323

This page intentionally left blank

TO MY WIFE LINDA Forever and Always

This page intentionally left blank

Part I Nominal Analysis

This page intentionally left blank

1

Introduction

1.1 NOMINAL ANALYSIS The features of this analysis are: • • •

• • •

Loop or nodal analysis math is not required. It uses SPICE-like node lists. All four types of controlled (dependent) sources can be used. It has DC and AC multiple-input-multiple-output (MIMO) capability. • Maximum number of inputs: 10 • Maximum number of outputs: No limit (all circuit nodes) Transient (time-domain) analysis. Three-phase circuit analysis. DC, AC, three-phase, and transient tolerance analysis methods (discussed in Part II).

1.1.1 INTRODUCTION Using state space methods, the circuit DC, AC, and transient response can all be obtained from the same initial analysis. Hence, there is an economy of effort that makes it worthwhile to learn state space techniques. However, conventional state space methods require an inordinate amount of circuit analysis algebra. This book shows a SPICE-like method for creating state space arrays with minimal effort. The numerical transfer function can also be a part of the solution using Leverrier’s algorithm. Hence, this method eliminates the algebra required for conventional circuit analysis techniques as taught in some undergraduate electrical engineering curriculums. The simple procedure entails creating node lists directly from the schematic, very much similar to early commercial versions of SPICE. This original method is called node list DC superposition (NDS). The purpose of presenting this material in Part I is to provide easy SPICE-like analysis methods for the working engineer if SPICE is not available owing to network downtime, network queuing (owing to limited site licenses), or, as sometimes happens in smaller companies, simply has not been purchased. Circuits of at least medium complexity can be simulated. (See Section 3.15 for a circuit with a component count of 68.) The primary goal, however, is to demonstrate correct tolerance analysis methods (Part II). The prerequisite nominal circuit analysis NDS method along with numerous examples is covered in Part I.

3

4

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1.1.2 THE NDS METHOD

OF

NOMINAL CIRCUIT ANALYSIS

It is assumed that electrical engineers are somewhat familiar with matrix analysis and state space methods; hence, the introductory material is not extensive. Familiarity with these subjects and Mathcad is necessary. As previously stated, a big advantage of state space analysis is that the DC output, AC frequency response, transient response, and circuit transfer function (using Leverrier’s algorithm) can all be obtained from one initial analysis. Another advantage is that state space matrices or arrays are real, not complex. Complex matrices obtained from loop or nodal analysis require a real array twice the size of a complex array to obtain a solution. Hence, state space methods decrease execution time for large arrays and increase solution accuracy. This becomes apparent when it is recalled that the number of arithmetic operations required to find a determinant is directly proportional to N!, where N is the dimension of the square array. The matrix equations used in state space analysis are dx dx = Ax + Bu, y = Dx + Eu + G dt dt where A, B, D, E, and G are arrays; x, a column vector of the state variables; u, a column vector of inputs; and y, the output. In most analyses, array G is a null (zero) array. (For an example using the G array, see Section 12.3.) Taking the Laplace transform of the first equation and substituting in the second gives the following with G = 0: y = D(sI – A)–1 Bu + Eu where I is an identity matrix. In the NDS method, the input u is included in B and E so that y = D(sI – A)–1 B + E The “state variables” are the capacitor voltages and inductor currents. Using N as the order of the circuit (number of L’s and/or C’s), M as the number of inputs, and K as the number of outputs, the arrays have the following dimensions (in {row column} format): Array A B D E G x u I

Rows N N K K K N M N

Columns N M N M N 1 1 N

Introduction

5

Using dimensional notation, {row col}, y is {K N}{N N}{N M} + {K M} = {K M}. Then, y is a transfer matrix with the dimensions {K M} or {output input} Note that in multiplying matrices, the inner dimensions in {row col} order must be the same. That is, if A is {N N} and B is {N M}, they cannot be multiplied as BA because {N M}{N N}, the inner dimensions, do not match. But they can be multiplied as AB = {N N}{N M}. The dimension of the product is the outside dimensions of both, i.e., {N M}. Hence, the dimension of the product {K N}{N N}{N M} is {K M}, which can be added to E = {K M} (The two arrays are then said to be “conformable” for multiplication if the inner dimensions are the same, and they are conformable for addition if the dimensions are equal.)

1.1.3 GENERAL GUIDELINES The SPICE node list text format is Ref Desig From node To node Component value. An example would be R3 6 9 10K. The node lists used in the NDS method are arrays of the form [From node To node Ref Desig], the component value having been specified prior to node list creation. Node numbering must start with 1 and be in numerical sequence up to 89. Nodes 99, 98, …, 91, 90 are reserved for inputs, and node 0 is for ground. There is no requirement for the resistor node list as to node sequence. That is, [4 5 R1] and [5 4 R1] are both accepted. For the capacitor node list and the inductor node list, however, the sequence must correspond to Kirchoff’s current law (KCL): current flow from left to right and from top to bottom. Hence, [3 6 C1] will work, but [6 3 C1] may give the wrong phase angle output and incorrect output polarity in DC and transient analyses. The open loop gain of opamps is set at 106 V/V or 120 dab. In the majority of circuit examples, no opamp frequency rolloff is used. However an example is given on how to create an opamp with rolloff using voltage-controlled voltage sources (VCVSs) (see Section 3.7 and Section 3.8). The Mathcad file in Section 3.18 demonstrates how to embed the opamp rolloff models into circuits, much like subcircuits in SPICE. Component values should generally be kept within the bounds of 1E+12 and 1E–12. Numbers outside this range run the risk of excessively increasing the A matrix condition number. This will cause solution accuracy to diminish. A guideline that can be used is the number of decimal places of accuracy, which is 15 – log10 × (condition number). If a solution appears incorrect or unreasonable, the condition number of matrix A should be checked using the Mathcad statement floor(15log(conde(A))). The reference paths for the subprogram files are localized for the author’s computer. In creating new files, the user must click on Insert, then on Reference, and then enter the correct local path or go to Browse. Two of the most important Mathcad subprogram files are named as follows: For DC: dccomm42.mcd (creates A1 and B2 arrays) For AC: comm42.mcd (creates A, B, D, and E arrays)

6

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

All of the necessary Mathcad subprograms are contained in the included CD. There is no error trapping. Users must ensure that the node lists correctly represent the circuit being analyzed and that all required input arrays are included. The version of the software used is Mathcad 11.0. (Note that due to internal bugs in Mathcad 8.0, some files will not run on that version. Intermediate versions have not been tested.) Some mathematical ability will be helpful for some advanced subjects such as the theory of the NDS method (Appendix I), stability analysis, Leverrier’s algorithm, and transient analysis.

1.2 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS The passive RCL circuit used to demonstrate the procedure is shown in the following figure: L3 R1

V1

C1

V2

R2

V3

Ein R4

1.2.1 RULES

AND

R3

C2

L4

DEFINITIONS

Calculated using the Mathcad subprogram file comm42.mcd: Ncap = number of capacitors Nind = number of inductors N = Ncap + Nind M = number of independent inputs (= 1 here, but can be up to 10) K = number of outputs (= 1, but can be up to U) User input: U = number of unknown nodes (= 3 here). Y = output node (can be any or all of the three nodes V1, V2, or V3). Number nodes sequentially from 1 to U (V1, V2, V3,…); 0 is ground. Maximum value of U = 89. Independent voltage input nodes are numbered from 99, 98, …, 90. (Note that if only one input source is present, use 99 as the node number; if two inputs, use 99, 98; if three inputs, use 99, 98, 97, etc.) Component reference designator sequence is optional. It can be R1, L2, Ra, Cx, R301, etc. A sequential numbering has been used for convenience.

Introduction

7

For AC analysis, log frequency sweep: BF = Beginning log frequency = 10BF Hz ND = Number of decades from BF PD = Points per decade Total number of frequency points NP = ND·PD + 1 Linear frequency sweep BF = Beginning frequency in Hz LF = Last frequency in Hz DF = Frequency increment LF − BF +1 DF Using the RCL circuit, creating the node lists is just as easy as in early versions of SPICE. For the resistors, we create the array RR: Total number of frequency points NP =

99 1 RR = 2 3

1 2 3 0

R1 R 4 R2 R3

The first column is one of the two nodes that the resistor is connected to, whereas the second column is the other node. The last column is the reference designator for the resistor, the value of which has been given previously. For the capacitors, we create the array CC: 1 CC = 3

2 0

C1 C2

For the inductors, we similarly create the array LL: 1 LL = 3

2 0

L3 L 4

The inputs are listed in the array Ein as Ein = (99 1). The first number indicates the node and the second, the amplitude in volts, which is usually set to 1. All independent inputs are referenced to ground. Because this circuit is passive with no controlled sources, this must be shown for VCVSs as EE = 0. No Voltage-Controlled-Current (VCCS) is shown as GG = 0.

8

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

REFERENCES 1. Seminal information for the method was obtained from DeRusso, P.M., Roy, R.J., and Close, C.M., State Variables for Engineers, John Wiley, NY, 1965.

2

Passive Circuits

2.1 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS (PART ONE) Analysis with output plots. Unit suffixes: K := 103

u := 10–6

m := 10–3

L3 R1

V1

C1

V2

R2

V3

Ein R3

R4

C2

L4

Component values: R1 := 10 C1 := 0.1·u

R2 := 100 C2 := C1

R3 := 50·K f1 := 10·K

R4 := 10·K f2 := 100·K

f1 and f2 are resonant frequencies for the values of L3 and L4. Calculate L3 and L4: L 3 :=

1

( 2 ⋅ π ⋅ f1) ⋅ C1 2

L 4 :=

1

( 2 ⋅ π ⋅ f 2 ) ⋅ C2 2

The eight inputs required for the subprogram comm42.mcd are: U, Y, EE, GG, RR, CC, LL, and Ein (see previous definitions). U := 3 Three unknown nodes. Y := 3 Take the output from node 3, V3.

9

10

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Set up node list arrays: Ein := (99 1) 99 1 RR : = 2 3

1 2 3 0

R1 R4 R2 R 3

(Ein = 1 V at node 99)

1 CC : = 3

EE := 0 (No VCVSs)

2 0

C1 C2

1 LL : = 3

2 0

L 3 L 4

GG := 0 (No VCCSs)

Insert reference for subprogram file comm42 to get state space arrays A, B, D, and E: → Reference:C:\mcadckts\CaNL11\comm42.mcd Display arrays: −91909.09 −90909.09 A= 394.78 0

−90909.09 −91109.009 0 39478.42

−1 × 10 7 0 0 0

0 −1 × 10 7 0 0

90909.09 90909.09 B= 0 0 D = (0

1

0)

0

E = (0) DC Analysis dx dx = Ax + B, the DC value is obtained by setting = 0. Then AX = −B and dt dt X = −A−1⋅B where the uppercase X is used for DC. Mathcad’s lsolve function provides the solution. When B has more than one column, the explicit solution form X = −A−1⋅B must be used. In

X : = 1solve(− A, B) VC1 VC 2 XT = ( 0

0

IL 3 9.091

IL 4 9.091) m

That is, IL3 = IL4 = 9.091 mA. The capacitors are short-circuited by the inductor.

Passive Circuits

11

DC output voltage at node Y: Y = 3 Vodc := D·X + E Vodc = (0) DC node voltages (inductors open-circuited) Vdc := 1solve(A11, A14) VdcT = (1 0.833 0.832) Ein1,2 ⋅ R 3 = 0.832 R1 + R 2 + R 3 + R 4

Confirming the last entry in vector Vdc: AC Analysis BF := 3

ND := 3

Li := BF +

i −1 PD

PD := 40

NP := ND·PD + 1

s := 2·π·10L· −1

i := 1..NP

cvi := D(si·I – A)–1·B + E

180 ·arg(cvi) π Note the two resonant frequency cusps at f1 and f2. Voi := db(cvi)

Vai :=

Output magnitude at node Y

0

Y=3

dBV

−20 Voi

−40 −60 −80

3

3.5

4

4.5

5

5.5

6

Li Log freq(Hz)

Phase angle at node Y

180 150 120 Degrees

90 (Vai)1

60 30 0 −30 −60 −90

3

3.5

4

4.5 Li Log freq(Hz)

5

5.5

6

12

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

2 Now take the output from both nodes 2 (V2) and 3 (V3): Y := 3 Call the subprogram comm42 again to get the new D and E arrays. → Reference:C:\mcadckts\CaNL11\comm42.mcd

−91909.091 −90909.091 A= 394.784 0

−90909.091 −91109.091 0 39478.418

0 −1 × 10 7 0 0

−1 × 10 7 0 0 0

90909.091 90909.091 B= 0 0 −0.909 D= 0

0.091 1

0 0

0 0

0.909 E= 0

Note that only D and E have changed. Sample of cv (complex value) for one output: cv10 = (0.001 + 0.002i) Dimension = {K M} = {1 1} Get the new AC outputs and plot: cvi = D·(si·I – A)–1·B + E 0.855 − 0.213i Sample of cv for two outputs: cv10 = 0.001 + 0.002 i Dimension = {K M} = {2 1} Plot both: Vo 2 i : = db ( cvi )1 Vo 3i : = db ( cvi )2

Passive Circuits

13 Output magnitude at node Y

0

2 Y = ( 3)

dBV

−20 Vo2i Vo3i

−40 −60 −80

3

3.5

4

V2 V3

4.5 Li

5

5.5

6

Log freq(Hz)

We can plot the ratio of V3 to V2 as follows: ( cvi )2 Vo 32 i : = db ( cvi )1

Va 32 i : =

( cvi )2 180 ⋅ arg π ( cvi )1

Magnitude of V3/V2

0

dBV

−20 Vo32i −40 −60 −80

3

3.5

4

4.5 Li

5

5.5

6

5

5.5

6

Log freq(Hz) Phase of V3/V2

180 120

Deg

60 Va32i

0 −60 −120 −180

3

3.5

4

4.5 Li Log freq(Hz)

14

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Introduction to NDS Method — SPICE Verification VEin 99 0 AC 1 R1 99 1 10 R4 1 2 10K R2 2 3 100 R3 3 0 50K * C1 1 2 0.1u C2 3 0 0.1u * L3 1 2 2.533m L4 3 0 25.33u * .PRINT AC V(2) V(3) VP(3) V(3,2) VP(3,2) .AC DEC 50 1E3 1E6 .OPTIONS NOMOD NOECHO NOPAGE .END Extracting the data from the SPICE *.out file and plotting: Fnom := READPRN(“c:\SPICEapps\datfiles\intro3.txt”) N := rows(Fnom) N = 151 k := 1..N

Spice veriﬁcation - magnitude

0

dBV

−20 db(Fnomk,2) db(Fnomk,3)

−40 −60 −80

3

3.5 V2 V3

4

4.5 log(Fnomk,1) Log freq(Hz)

5

5.5

6

Passive Circuits

15 Spice veriﬁcation - phase angle

180 150 120 Deg

90 Fnomk,4

60 30 0 −30 −60 −90

3

3.5

4

4.5

5

5.5

6

log(Fnomk,1) Log freq(Hz)

For further verification, we compare the accuracy of the A and B arrays obtained from the NDS method to that obtained from the algebraic solution in Section 2.2. Ax and Bx, shown in the following, are from that section. −1 1 1 C1 ⋅ R 4 + R1 + R 2 −1 C 2 ⋅ R 1 + R2) ( Ax := 1 L 3 0 −91909.09 −90909.09 Ax = 394.78 0 0 0 A − Ax = 0 0

0 0 0 0

0 0 0 0

−1 C1 ⋅ ( R1 + R 2 )

−1 C1

−1 1 1 ⋅ + C2 R1 + R 2 R 3

0

0

0

1 L4

0

−90909.09 −91109.09 0 39478.42 0 0 0 0

−1 × 10 7 0 0 0

0 −1 C2 0 0

0 −1 × 10 7 0 0

16

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 C1 ⋅ ( R1 + R 2 ) 0 90909.09 0 1 90909.09 Bx := Bx = B − Bx = 0 0 C2 ⋅ ( R1 + R 2 ) 0 0 0 0

2.2 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS (PART TWO) K := 103

u := 10–6

The algebraic solution of a sample RCL circuit is given to show the amount of labor saved using the NDS method. For those less mathematically inclined, the next three pages can be skipped. The advantages of the NDS method can be seen just by glancing at the amount of circuit analysis algebra given in the following: L3 R1

V1

C1

V2

R2

V3

Ein

R1 := 10 R4 := 10·K fl := 10·K

R2 := 100 C1 := 0.1·u f2 := 100·K L 3 :=

1

( 2 ⋅ π ⋅ f1)

C2

R3

R4

2

⋅ C1

L4

R3 := 50·K C2 := C1

L 4 :=

1

( 2 ⋅ π ⋅ f 2 ) 2 ⋅ C2

Format goal: eL and iC on LH side; Ein, iL, and vC on RH side. Must only use terms involving these unknowns. We thus need N = Ncap + Nind = 4 equations in the following format including constant coefficients. f(eL, iC) = g(iL, vC, Ein) in which e L = L ⋅

diL dt

iC = C ⋅

dvC dt

We first see that eL3 = vC1

eL4 = vC2

(1)

Passive Circuits

17

which are in the correct format. Two more equations are needed. KCL at node V1: Ein − V1 V1 − V2 = iL 3 + iC1 + R1 R4

V1 − V2 = vC1

(2)

Ein v V1 − iL 3 − C1 − R1 R 4 R1

(3)

Substituting: Ein − V1 v = iL 3 + iC1 + C1 R1 R4

iC1 =

Not done yet; need to eliminate V1. KCL at node V2: iL 3 + iC1 +

vC1 V2 − V3 = R4 R2

We see that: V3 = vC2 Substituting and rearranging: V2 vC 2 vC1 − − − iC1 − iL 3 = 0 R2 R2 R 4

(4)

Solving Equation 4 for V2: V2 = iL 3 ⋅ R 2 + vC 2 +

vC1 ⋅ R 2 + iC1 ⋅ R 2 R4

V1 = vC1 + V2 From Equation 2

(5) (6)

Substituting Equation 5 into Equation 6 V1 = vC1 + iL 3 ⋅ R 2 + vC 2 +

vC1 ⋅ R 2 + iC1 ⋅ R 2 R4

Collecting terms: R2 V1 = vC1 ⋅ 1 + + vC 2 + iL 3 ⋅ R 2 + iC1 ⋅ R 2 R4 Substituting Equation 7 into Equation 3:

(7)

18

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

iC1 =

Ein v v R 2 vC 2 iL 3 ⋅ R 2 iC1 ⋅ R 2 − − − iL 3 − C1 − C1 ⋅ 1 + − R1 R 4 R1 R 4 R1 R1 R1

Collecting terms: R 2 Ein R 2 vC 2 1 R2 1 iC1 ⋅ 1 + = − iL 3 ⋅ 1 + − − vC1 ⋅ + + R1 R 4 R1 ⋅ R 4 R1 R1 R1 R1 From Equation 2: V2 = V1 − vC1 Repeating Equation 5: V2 = iL 3 ⋅ R 2 + vC 2 +

vC1 ⋅ R 2 + iC1 ⋅ R 2 R4

KCL at node V3: V2 − V3 V3 = + iC2 + iL 4 R2 R3 Substituting V3 = vC2 −V2 1 1 + vC 2 ⋅ + + iC 2 + i L 4 = 0 R 2 R 3 R2 Multiplying by –1: V2 1 1 − vC 2 ⋅ + − iC 2 − i L 4 = 0 R 2 R 3 R2 Substituting Equation 5: iL 3 +

vC 2 vC1 1 1 + + iC1 − vC 2 ⋅ + − iC 2 − i L 4 = 0 R2 R 4 R2 R 3

Rearranging to the correct format: iC1 − iC 2 = − iL 3 − or finally

vC 2 vC1 1 1 − + vC 2 ⋅ + + iL 4 R 2 R 3 R2 R 4

(8)

Passive Circuits

19

iC1 − iC 2 = − iL 3 +

vC 2 vC1 − + iL 4 R2 R 4

(9)

Create two {N N} arrays W and Q from Equation 1, Equation 8, and Equation 9. Fill in the coefficients from the LH sides for W, and for the RH sides for Q per the column headings: iC1

iC 2

0 0 W := R2 1 + R1 1 vC1 1 0 1 1 R2 Q := − + + 1 4 1 ⋅ R4 R R R −1 R4

eL 3 eL 4

0 0

1 0

0

0

−1

0

0 1 0 0

vC 2

iL 3

iL 4

0 1

0 0

−1 R1 1 R3

R2 − 1 + R1

0 0 0 1

−1

S is created from the only Ein term in the third equation: P is an {N N} diagonal array in the same C and L order as W and Q. 0 0 S := 1 R1 0

C1 0 P := 0 0

0 C2 0 0

Now form A and B as follows: C:= (W·P)–1 −91909.091 −90909.091 A= 394.784 0

−90909.091 −91109.091 0 39478.418

−1 × 10 7 3.492 × 10 −10 0 0

0 0 L3 0

0 0 0 L 4

A := C·Q

B := C·S

90909.091 0 7 90909.091 −1 × 10 B= 0 0 0 0

20

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Because the output is vC2, we place a 1 in the second column of the {K N} array vC1 vC 2 iL 3 D := ( 0

1

0

iL 4 0)

Because there are no input terms Ein in the output: E := 0 Prior to this shortcut method [*], the algebra would have to continue as follows. Isolating iC1 in Equation 8: iC1 =

vC 2 Ein 1 1 − iL 3 − − vC1 ⋅ + R 4 R1 + R 2 R1 + R 2 R1 + R 2

Because iC1 = C1 ⋅ dvC1 − vC1 = dt C1

(10)

dvC1 , we get dt

1 vC 2 i Ein 1 ⋅ + − L3 + − R 4 R1 + R 2 C1 ⋅ ( R1 + R 2 ) C1 C1 ⋅ ( R1 + R 2 )

(11)

From Equation 9: iC 2 = i L 3 − i L 4 +

vC1 vC 2 − + iC1 R4 R3

(12)

Substituting Equation 10 into Equation 12: iC 2 = i L 3 − i L 4 +

iC 2 =

vC1 vC 2 vC 2 1 Ein 1 − − iL 3 − − vC1 ⋅ + + R 4 R1 + R 2 R1 + R 2 R4 R3 R1 + R 2 – vC1 Ein 1 1 − iL 4 + − vC 2 ⋅ + R1 + R 2 R 3 R1 + R 2 R1 + R 2

Again, because iC 2 = C2 ⋅

dvC 2 dt

− vC1 dvC 2 v = − C2 dt C2 ⋅ ( R1 + R 2 ) C2

1 1 iL 4 Ein ⋅ + − + R1 + R 2 R 3 C2 C2 ⋅ ( R1 + R 2 )

From Equation 1 above, repeated here: eL3 = vC1

eL4 = vC2

(13)

Passive Circuits

21

eL 3 = L 3 ⋅

diL 3 , dt

diL 3 vC1 = dt L3

(14)

Similarly: diL 4 vC 2 = dt L4

(15)

Using Equation 11, Equation13, Equation14, and Equation15, the general form matrix equation

dx = Ax + Bu becomes dt

1 dvC1 −1 ⋅ 1 + dt C1 R 4 R1 + R 2 −1 dvC 2 dt C2 ⋅ ( R1 + R 2 ) diL 3 = 1 dt L3 diL 4 0 dt

−1 C1 ⋅ ( R1 + R 2 )

−1 C1

−1 1 1 ⋅ + C2 R1 + R 2 R 3

0

0

0

1 L4

0

1 C1 ⋅ ( R1 + R 2 ) 1 + 2 1 2 ⋅ + C R R ( ) ⋅ Ein 0 0

2.3 ALL-CAPACITIVE CIRCUIT u := 10–6 R3

R1

1

C1

2

Ein C2 3 R2

0 −1 vC1 C2 ⋅ vC 2 iL 3 0 i L4 0

22

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R1 := 10 U := 3 99 RR := 1 3 tors) EE := 0

R2 := 100 R3 := 50 Y := 2 Ein := (99 1) 1 2 0

R1 R 3 R 2

C1 := 0.1·u C2 := 0.5·u Input 1 V at node 99.

1 CC := 2

2 3

C1 LL := 0 (No inducC2

GG := 0 (No controlled sources.)

Get A, B, D, and E arrays from subprogram comm42.mcd: → Reference:C:\mcadckts\CaNL11\comm42.mcd −290909.1 A= −18181.8

−90909.1 −18181.8

90909.1 B= 18181.8 D = ( −0.909

0.091)

E = ( 0.909 ) DC voltages at all U nodes in the order given by Vdc. If inductors are present, they are open-circuited: Vdc := lsolve(A11, A14) X := lsolve(–A,B) Vodc := D·X + E Y=2

VdcT = (1

1

0)

0 X= 1 Vodc = (1) DC output voltage at node Y given by Vodc.

AC Analysis BF := 3

ND := 3

i := 1..ND·PD + 1

PD := 40

cvi := D·(si·I – A)–1·B + E 180 ·arg(cvi)1 π (Phase angle) Y=2

Vai :=

i −1 s := 2·π·10L· −1 PD Voli := db(cvi)

Li := BF +

Passive Circuits

23 Magnitude at node Y

Degrees

dBV

−1 Vo1i −2 −3 −4

Phase at node Y

10

0

3

4

5

0

Vai

−10 −20

6

3

4

5

Li

Li

Log freq (Hz)

Log freq (Hz)

2.4 ALL-INDUCTIVE CIRCUIT u := 10–6

mA := 10–3 R3

R1

1

L1

2

Ein L2 3 R2

R1 := 10 U := 3 99 RR := 3 1

R2 := 100 R3 := 50 Y := 2 Ein := (99 1) 1 0 2

R1 R 2 R 3

1 LL := 2

L1 := 220·u

2 3

CC := 0 (No capacitors) EE := 0 GG := 0 (No controlled sources.) → Reference:C:\mcadckts\CaNL11\comm42.mcd

L1 L 2

L2 := 330·u

6

24

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

−2287272.7 A= 151515.2

227272.7 −484848.5

0 B= 3030.3 D = ( 50

−60 )

E = (1) VdcT = (1

Vdc := lsolve(A11, A14) 9.091 X= 9.091

iL1 mA iL 2

1

0)

X := lsolve(–A, B)

Vodc := D·X + E

Vodc = (0.909)

AC Analysis BF := 3

ND := 3

i −1 PD cvi := D·(si·I – A)–1·B + E Voli := db(cvi)

NP := ND·PD + 1

i := 1..NP

s := 2·π·10L· −1 Vai :=

PD := 50

180 ·arg(cvi)1 π

Li := BF +

Y=2

Amplitude at node Y 0

5 Degrees

dBV

−1 Vo1i −2 −3

Phase at node Y

10

Vai

0 −5

3

4

Li

5

6

−10

3

Log freq (Hz)

Li

5

Log freq (Hz)

2.5 TWIN-T RC NETWORK 60-Hz Notch Filter K :=103 u := 10–6

4

Meg := 106

m := 10–3

6

Passive Circuits

25 C2

C3

V1 R3

R4

V4

Ein

R1

R2

V2 C1

V3

R5

R1 := 267·K R2 := 267·K R3 := 133·K R4 := 0.01 C1 := 0.02·u C2 := 0.01·u U := 4 Y :=3 Ein := (99 1) 4 2 RR := 3 1 99

2 3 0 0 4

R1 R2 R5 R 3 R 4

2 CC : = 4 3

0 1 1

R5 := 10·Meg C3 := 0.01·u

C1 C2 C 3

GG : = 0 LL : = 0 EE : = 0

Resistor R4 is the output impedance of the external voltage source. → Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis

X := lsolve(–A, B)

0.975 VC1 X = 1 VC 2 0.949 V C3

Vodc := D·X + E

Vodc = (0.949) Ein1,2 ⋅ R 5 = 0.949 (Checks; same as Vodc.) R 4 + R1 + R 2 + R 5 DC node voltages: Vdc := lsolve(A11, A14) V1 Vdc T = ( 0

V2

V3

0.975

0.049

V4 1)

Note: The reader is encouraged to reverse 3 1 C3 to 1 3 C3 in the CC array and note the polarity change of VC3 above. Sign changes in the D array cancel the VC3 sign change and the output Vodc polarity remains the same. In SPICE the state variables X and the A, B, D, E arrays are not accessible. As will be seen later, access to these arrays can be useful.

26

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

AC Analysis BF := 0 DF :=

LF := 100

LF − BF NP

NP := 100

i := 1..NP + 1

s := 2·π·F· −1

DF = 1

(Linear frequency sweep) Fi := BF + DF·(i – 1)

cvi := D·(si·I – A)–1·B + E

180 ·arg(cvi) π Note: Most math software and scientific calculators limit phase angles of complex numbers to +/– 180 deg, or π+ to –π. SPICE phase angle outputs can be from 0 to + 360 (2 ) or 360 deg. For example, +300 deg is equivalent to –60 deg; –200 deg is equivalent to +160. Both are correct. Voli := db(cvi)

Vai :=

Output plots Y=3 Magnitude at node Y

0

dBV

−20 Voi −40

−60

0

10

20

30

40

50 Fi

60

70

80

90

70

80

90

100

Freq(Hz) Phase at node Y

100

Deg

50 (Vai)1

0 −50 −100

0

10

20

30

40

50 Fi Freq(Hz)

60

100

Passive Circuits

27

2.6 BROADBAND PULSE TRANSFORMER MODEL K := 103

p := 10–12

u := 10–6

n := 10–9

R6 R1

1

R2

6

L1

2

m := 10–3

R4

3

C2 4

L3

5

Ein C1

R7

R3

R5 L2

7

R1 := 10 R6 := 0.5 L2 := 2·m U := 7

R2 := 1.5 C1 := 20·p L3 := 1·u Y := 5

R3 := 20·K C2 := 5·p R7 := 1

Ein := (99

10)

99 1 3 RR := 3 5 1 3

C3

R4 := 1.5 C3 := 20·p

R5 := 1·K L1 := 1·u

10 Vac input. 1 2 0 4 0 6 7

R1 R2 R 3 R 4 R5 R6 R 7

1 CC : = 6 5

0 5 0

C1 C2 C 3

2 LL : = 7 4

3 0 5

L1 L2 L 3

EE : = 0 GG : = 0 L1 and L3 represent leakage inductance; L2 is the magnetizing inductance. Insert subprogram file: → Reference:C:\mcadckts\CaNL11\comm42.mcd

28

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

DC Analysis X := lsolve(–A,B) X Format: VC1

(

X T = 1.999

VC 2

VC 3

IL 1

IL 2

1, 201

0.7 798

0.8

0.799

Vodc := D·X + E

IL 3 7.98 × 10 −4

)

Vodc = (0.798)

Note that this DC analysis is certainly easier than deriving the following algebraic solution: Vdc5 : =

Ein1,2 ⋅ R 5 R1 + R 2 1 + ⋅ (R 4 + R5) (R 4 + R5) ⋅ R 3 ⋅ R 7 ⋅ + + ⋅ + R 3 R 7 R 4 R 5 R 3 R 7 ( )( )

Vdc5 = 0.798 DC node voltages (inductors open-circuited): VdcT = (10

Vdc := lsolve(A11, A14)

10

0

0

0

10

0)

AC Analysis BF := 2

ND := 6

i := 1..ND·PD +1

PD := 30 Li := BF +

cvi := D·(si·I – A)–1·B + E

i −1 PD

rd :=

s := 2·π·10L· −1

180 π

Voi := db(cvi) Vai := rd·arg(cvi) Note flat response from about 1 KHz to 10 MHz. Output amplitude at node Y

40

dBV

20 Voi

0 −20 −40

2

3

4

5 Li Log freq(Hz)

6

7

8

Passive Circuits

29 Phase at node Y

200 150 Degrees

100 50 (Vai)1

0 −50 −100 −150 −200

2

3

4

5 Li Log freq(Hz)

6

7

Broadband Pulse Transformer — SPICE Verification *File: c:\SPICEapps\Cirtext\xformer.cir VEin 99 0 AC 10 R1 99 1 10 R2 1 2 1.5 R3 3 0 20K R4 3 4 1.5 R5 5 0 1K R6 1 6 0.5 R7 3 7 1 * C1 1 0 20p C2 6 5 5p C3 5 0 20p * L1 2 3 1u L2 7 0 2m L3 4 5 1u * .AC DEC 20 100 1E8 .PRINT AC V(5) VP(5)

8

30

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

.OPTIONS NOMOD NOPAGE NOECHO .END Extracting the data from the SPICE *.out file: Fnom := READPRN(“c:\SPICEapps\datfiles\xformer.txt”) N := rows(Fnom) N = 121 k := 1..N Output amplitude at node Y

40

dBV

20 db(Fnomk,2)

0 −20 −40

2

3

4

5

6

7

8

Degrees

log(Fnomk,1) Log freq(Hz)

Fnomk,3

200 150 100 50 0 −50 −100 −150 −200

Phase at node Y

2

3

4

5 log(Fnomk,1) Log freq(Hz)

6

7

8

2.7 ALL-CAPACITIVE LOOPS (ACL) In a physical circuit, two or more capacitors in parallel can occur, such as in power supply decoupling circuits. However, in converting capacitors to ideal independent voltage sources (which is done using this method of analysis), we end up with a violation of Kirchoff’s laws. For example, in the circuit that follows:

C1

C2

C3

+ −

E1

+ −

E2

+ −

E3

Passive Circuits

31

If we assign arbitrary values to E1, E2, and E3, Kirchoff’s Voltage Law (KVL) is violated around any of the three possible loops. If we assign the value of +1 V to all three, because the resistance is zero, infinite current will flow around the loops unless all assigned values of 1.0 have an infinite number of zeros after the decimal point, e.g., if E1 – E2 = 10–9000 V divided by zero resistance is infinite current. Another example of an ACL is: C2

C1

C3

When converted to ideal voltage sources, KVL is again violated. For example, if the arbitrary values were C1 = E1 = 10 V, C2 = E2 = 7 V, and C3 = E3 = 20 V, KVL yields –10 + 7 + 20 = +17 V ≠ 0. Every “real-world” capacitor has a small amount of series resistance, termed equivalent series resistance (ESR). The cure in state space analysis of circuits with ACLs is to place a small ESR resistor (≈ 0.01 Ω) in series with all (or all but one) of the capacitors. E1

+ −

R2

R1

E2

+ −

E3 The cure

+ −

R3

2.8 ALL-INDUCTIVE CUTSETS (ICS) A similar problem occurs with circuits having two or more inductors connected to the same node. In this analysis method, the inductors become ideal current sources connected to the same node, and we end up with a violation of Kirchoff's Current Law (KCL), as shown in the following: L1 L2

I1 V1

L3

I2

+

−

+

−

V1 I3

+

−

Kirchoff’s Current Law at node V1 is I1 + I2 = I3. This law is violated regardless of the values of I1, I2, and I3. The term cut set comes from circuit topology. If we were to place a small “cookie cutter” at node V1, it would cut the wires of all three inductors. Thus, we are cutting a set of inductor wires.

32

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The cure is to place “de-Qing” resistors in parallel with at least one of the inductors as shown in the following. The values to be used will depend on the remainder of the circuit and the desired L/R time constants.

I1

+

I2

+

R1

R3

−

−

R2

The cure I3 V

+

−

In defense of the NDS method, it should be stated that ACLs and/or ICSs will cause any state space analysis method to fail if additional corrective steps are not taken. See, for example, Intermediate Network Analysis, Shlomo Karni, Allyn & Bacon, 1971.

2.9 ALL-CAPACITIVE LOOP EXAMPLE K := 103

u := 10–6

m := 10–3

R1

V1

KHz := 103

C3

V2

Ein C1

R3

C2 V3

L3

R1 := 1·K R2 := 0.1 R3 := 100 C1 := 1·u C2 := C1 C3 := C1 L3 := 25.33·m U := 3 Y := 3 Ein := (99 1) GG := 0 EE := 0 LL := (3 0 L3) 99 RR : = 2 1 CC : = 1 2

1 3 0 2 0

R1 R 3 C1 C 3 C2

Passive Circuits

33

Call reference subprogram: → Reference:C:\mcadckts\CaNL11\comm42.mcd A, B, D, and E are not returned. Due to the ACL, A is singular, i.e., the determinant of A is zero, and the inverse of A is undefined. Insert R2 to break ACL. R1

V1

R2

Ein

C3

V3

V2

R3

C2

C1

V4 L4

99 RR : = 1 3 1 CC : = 2 3 U := 4

Y := 4

LL := (4

0

1 2 4 0 3 0

R1 R 2 R 3 C1 C 3 C2

L3)

Reinsert subprogram for new node lists. → Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2

ND := 2

i := 1..ND·PD + 1

PD := 50 i −1 s := 2·π·10L· −1 PD Voi := db(cvi)

Li := BF +

cvi := D·(si·I – A)–1·B + E

34

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Output at node Y

−20

dBV

−30 Voi −40

−50

2

2.5

3 Li

3.5

4

Log freq(Hz)

Y=4

REFERENCES 1. R. Boyd, State Space Averaging with a Pocket Calculator, High Frequency Power Conversion Conference Proceedings, Santa Clara, CA, 1990, p. 283.

3

Controlled Sources

3.1 CONTROLLED (DEPENDENT) SOURCES 3.1.1 VOLTAGE-CONTROLLED CURRENT SOURCE (VCCS) SPICE convention: Gname Vp Vn Vcp Vcn Transconductance The units of transconductance are amperes/volts = 1/ohms = siemens (or mhos, for you old-timers). Vp and Vn are the node connections of the current source in the circuit. Current flows away from node Vp (into the + terminal of the source) and towards node Vn, going out of the source. Vcp and Vcn are the + and controlling voltage nodes. This convention is chosen because virtually all models of transistors and MOSFETs depict the current as flowing down and internally away from the collector or drain terminal of the device. Example: MOSFET drain current: Id = gm·Vgs = gm(Vg – Vs) Here Vg and Vs are Vcp and Vcn, respectively. Because Id is dependent by definition, it is unknown, as usually are Vg and Vs. In MathCAD, GG = (Vp Vn Vcp Vcn Gain) For a MOSFET, GG = (Vp Vn Vg Vs gm)

3.1.2 CURRENT-CONTROLLED CURRENT SOURCE (CCCS) SPICE convention: Fname Vp Vn Controlling Current Gain In the NDS analysis method, the controlling current is specified as I = f(V/R) Ein − V1 Example: Ic = B ⋅ lb = B R1

3.1.3 VOLTAGE-CONTROLLED VOLTAGE SOURCE (VCVS) SPICE convention: Ename Vp Vn Vcp Vcn Gain As in VCCS, Vp and Vn are the + and connections of the source in the circuit, and Vcp and Vcn are the + and controlling nodes. Example: V1 V2 = k(V3 V4), or in SPICE Ename V1 V2 V3 V4 k In MathCAD, EE = (Vp Vn Vcp Vcn Gain) = (V1 V2 V3 V4 k) For an opamp, which is usually a single-ended output, Vo = Ao(Vcp Vcn), where typically Ao = 106 V/V. For an inverter, Vcp = 0. For a voltage follower, Vo is connected to Vcn and

35

36

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Vo − AoVcp + AoVo = 0, Vo (1 + Ao ) = AoVcp Vo =

AoVcp Ao = Vcp, since ≈1 1+Ao 1 + Ao

and in MathCAD as EE = (Vo 0 Vcp Vcn Ao) = (Vo 0 Vcp Vo Ao)

3.1.4 CURRENT-CONTROLLED VOLTAGE SOURCE (CCVS) SPICE convention: Hname +V –V Controlling Current Transresistance The units of transresistance are volts/amperes = ohms. Only two types are used in NDS method, the VCVS and the VCCS. Conversions from the remaining two are easily accomplished as shown in the following subsections.

3.1.5 CCVS

TO

VCVS

To convert a CCVS to a VCVS, divide the controlling current nodes by the resistance in the controlling current branch. (This “resistance” could be that of a printed circuit board trace or wire, or a small current-sensing resistor.) Example: Assume the controlling current Ic is through a resistor or resistance R2, which is connected to nodes V2 and V1. Then V2 − V1 Rc Vh = Rc ⋅ Ic = Rc = (V2 − V1) Gain = Rc / R2 R 2 R 2 The gain is thereby converted from a “transresistance” in dimensions of ohms, to a dimensionless gain. MathCAD format: EE = (Vp Vn Vcp Vcn Gain) = (Vh 0 V2 V1 Rc/R2), which is very similar to the SPICE format.

3.1.6 CCCS

TO

VCCS

To convert a CCCS to a VCCS, divide the (dimensionless) gain by the resistance of the “controlling current.” Example: B Ein − V1 Ic = B ⋅ lb = B = ( Ein − V1) R1 R1 The controlling voltage is now Ein – V1, and the “gain,” with dimension 1/ohms or “transconductance,” is B/R1. In MathCAD format, GG = (Vp Vn Vcp Vcn Gain) = (Vp Vn Ein V1 B/R1).

Controlled Sources

37

To repeat, the first input Ein is given the node number 99. For a second input, Ein2 = 98, Ein3 = 97, etc., down to 90. For example, if Vp = 2, Vn = 1, Vcp = 99, Vcn = 1, then GG = (2 1 99 1 B/R1).

3.1.7 FOUR RULES THAT MUST BE OBSERVED 1. The output of a controlled source cannot be connected directly to an independent input source. That is, EE = (99 0 2 1 gain) is not allowed. Input voltage sources are specified, for example, as Ein = (99 5), the input connected from node 99 to ground, with an amplitude of +5 V. However, EE = (2 0 99 1 gain), one input being a controlling node, Vcp or Vcn, is allowed. Here and as earlier, “99” represents any of the nodes 99, 98, 97, … , etc., down to 90. An independent source can be created by having Vcp = 99, 98, etc., and Vcn = 0. For example, assume Ein = (99 5), and it is desired to connect an independent 15-mA current source at an internal node V2 to node V7. Then GG = (2

7

99

0

0.015/5)

For an independent 15 V source at the same nodes: EE = (2 7 99 0 15/5) 2. Vp in a VCVS is not allowed to be zero. That is, the output nodes of a VCVS must always be (Vp 0) or (Vp Vn). For example, EE = (0 2 3 0 gain) is not allowed. If a negative output is desired, use EE = (2 0 3 0 – gain) or EE = (2 0 0 3 gain). 3. If a capacitor C or inductor L in the circuit being analyzed is connected directly to an ideal input source, it must have an equivalent series resistance (ESR) resistor in series between it and the source. That is CC = (99 1 C1) or LL = (98 2 L1) are not allowed. This will be a minor inconvenience as every real-world capacitor and inductor has an ESR. Also, every real-world voltage source has some finite internal source impedance which includes resistance. Hence, the simulation will be more realistic with ESR included. If in doubt about what value of ESR to use, use 0.01 Ω for capacitors and 0.05 Ω for inductors. 4. The nodes Vp or Vn of two or more VCVS’s (EE) must not be common. That is 2 EE = 2

1 0

12 3

4 4

4 2

is not allowed. In the NDS method, this results in “node contention,” and the solution will not be correct. As in SPICE, every circuit must have at least one ground node (node 0).

38

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.2 FLOATING VCVS K := 103

uF := 10–6

m := 10–3

R1

uV1

V1

V2

− +

Ein C1

Gain of VCVS.

99 2 RR : = 2 3 LL := 0

Ein := (99

R1 R2 R 3 R 4

2)

R4

R4 := 2·K Y := 3

180 π

rd :=

1 0 3 0

V3 C2

R2

R1 := 1·K R2 := 3·K R3 := 4·K C1 := 0.01·uF C2 := 0.05·uF U := 3 u := 20

R3

1 CC : = 3

0 0

C1 C2

GG := 0

VCVS equation: uV1 = V2 – V1 or V2 = V1·(1 + u) Format: EE = (Vp

Vn

Vcp

Vcn gain), then: EE := (2

1

1

→ Reference:C:\mcadckts\CaNL11\comm42.mcd −1.325 × 10 6 A= 105000 D = (0

1)

25000 −15000

200000 B= 0

E = (0)

DC Analysis X := lsolve(–A, B) Vodc = (1.217)

XT = (0.174

1.217)

Vodc := D·X + E

DC node voltages: Vdc := lsolve(A11, A14)

VdcT = (0.174

3.652

1.217)

0

u)

Controlled Sources

39

Check VCVS equation: Vdc2 – Vdc1 = 3.478

u·Vdc1 = 3.478

Checks.

AC Analysis BF := 2

ND := 5

PD := 20

Lit := ND·PD + 1

i :=1..Lit

i−1 s := 2·π·10L· −1 db(x) := 20·log(|x|) PD cvi := D·(si·I – A)–1·B + E Voi := db(cvi) Vai := rd·arg(cvi)

Li := BF +

Plot marker: M1 := db(Vodc)

Y=3 Magnitude at node Y

20 M1

dBV

0

Voi

−20 −40 −60 −80

2

3

4

5 Li Log freq(Hz)

6

7

Phase at node Y

0

Deg

−45 (Vai)1

−90 −135 −180

2

3

4

5 Li Log freq(Hz)

6

7

40

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

SPICE Verification — Floating VCVS *File:

c:\Spicapps\Cirtext\vcvs1c.cir

VEin 99 0 AC 2 R1 99 1 1K C1 1 0 0.01u R2 2 0 3K R3 2 3 4K C2 3 0 0.05u R4 3 0 2K * EE 2 1 1 0 20; VCVS .AC DEC 20 100 1E7 .PRINT AC V(3) VP(3) .OPTIONS NOPAGE NOMOD NOECHO .END Fnom := READPRN(“c:\SPICEapps\datfiles\vcvs1c.txt”) N := rows(Fnom) N = 101 k := 1..N

Spice V3 magnitude

20

dBV

0 db(Fnomk,2)

−20 −40 −60 −80

2

3

4 5 log(Fnomk,1) Log freq(Hz)

6

7

Controlled Sources

41 Spice V3 phase angle

0

Deg

−45 Fnomk,3

−90 −135 −180

2

3

4

5

6

7

log(Fnomk,1) Log freq(Hz)

3.3 CIRCUITS WITH M > 1 The subprogram that constructs the A, B, D, and E arrays from the node lists also counts the number of rows in the Ein array and assigns this value to M. In most cases, the user is interested in the node voltages with all inputs active. In some cases, however, the separate superposed contribution of each independent input may be desired. Hence, there are two different subprograms to call, depending on the type of output desired. For DC, call dccomm42.mcd if the user wants all inputs active simultaneously. (Most frequently used.) Call dccomm42m.mcd if the separate contribution of each independent input, M > 1, one at a time, is desired. For AC, call comm42.mcd for all inputs active, and comm42m.mcd to separate the node voltages due to the M > 1 inputs. For a simple example, we use one “circuit” with M = 3 inputs and U = 3 unknown nodes: Ein1 Ein 2 Ein 3 0.1 A 3 : = −0.01 0

−0.01 0.2 −0.02

0 −0.02 0.3

1 B3 : = 0 0

Ein1

Eiin 2

10.05 V3 : = A 3 ⋅ B3 V3 = 0.51 0.03

1.01 10.12 0.67

−1

0 2 0

0 0 3

Ein 3 0.1 V1 1.01 V2 10.07 V3

42

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The aforementioned is what is returned if dccomm42m.mcd is called. The separate contributions of each column (independent input) in B3 is given. When this is not desired, calling dccomm42.mcd gives −0.01 0.2 −0.02

0.1 A3 : = −0.01 0 V1 : = A 3−1 ⋅ B1

0 −0.02 0.3

1 B1 : = 2 3

11.16 V1 V1 = 11.64 V2 10.78 V3

We could get the same answer by adding the columns of V3, but this requires additional statements in the worksheet. i : = 1..3 V1i : = V3i,1 + V3i,2 + V3i,2 + V3i,3 11.16 V1 = 11.64 10.78 For circuits in which M = 1, i.e., Ein array has one row, it does not matter which subprogram is called. This applies only to those circuits with more than one input, where Ein has more than one row and M > 1. Example DC circuit with M = 2: K := 103 R7

V99 R1

V1

R3

V2

R4

V3

Ein1

R8

V98

Ein2 R2

R5

R6

Controlled Sources

43

99 Ein : = 98

15 −5

99 1 1 2 RR : = 2 3 1 3

1 0 2 3 0 0 3 98

1⋅ K 1⋅ K 1⋅ K 1 ⋅ K 10 ⋅ K 1⋅ K 1.5 ⋅ K 1⋅ K

R1 R2 R3 R4 R5 R6 R7 R8

GG := 0 EE := 0 U := 3 Inputs separate. (M = 2) → Reference:C:\mcadckts\CaNL11\dccomm42.mcd Va : = A1−1 ⋅ B2 Ein1 5.3936 Va = 3.4884 1.9320

Ein 2 –0.6440 V1 −1.1628 V2 −1.7979 V3

In SPICE, one of two inputs would have to be zeroed, which requires two runs to get the same information as given earlier. If M = 3, SPICE would require three runs, and so forth. Inputs added. (M = 1) → Reference:C:\mcadckts\CaNL11\dccomm42.mcd Vb : = A1−1 ⋅ B2 4.7496 Vb = 2.3256 0.1342 Va1,1 + Va1,2 = 4.7496 etc.

44

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.4 FIRST-ORDER MOSFET MODEL K := 103

u := 10–6

n := 10–9

p := 10–12

mA := 10–3

Edd R4 V4

R1

V1

R5

V5 C3

M1

Eg R2 V2 C1

V3

R3

R1 := 4.99·K R5 := 1.96·K

R2 := 1·K C1 := 0.1·u

R3 := 10·K C3 := 4.7·n

R4 := 4.99·K

From MOSFET data sheet: gm := 0.001 Edd := 200 Eg := 20 Nodes: V1 — Gate; V3 — Source; V4 — Drain Model using VCCS: C2 := 400·p C2 represents the internal gate-source capacitance. (Nonlinear in higher-order models.) R1

Edd

V1

Eg

R4 R2 C1

C2

V2

V3

R3

V4 R5 + g1 −

V5 C3

Controlled Sources

45

(VCCS g1 is drain current Id) VCCS: gl = gm·Vgs = gm·(V1 – V3) VCCS format: GG = (Vp Vn Vcp Vcn GG := (4 3 1 3 gm) Eg = 20 Edd = 200

gain)

99 1 RR := 3 98 4 2 CC : = 1 5

R1 R2 R 3 R 4 R 5

1 2 0 4 5

C1 C2 C 3

3 3 0

Eg Edd

99 Ein : = 98 LL : = 0 U := 5 Y := 4

→ Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis VC1 VC2 VC3 DC voltages across C1, C2, and C3 X := –A–1·B

XT := (1.82

1.82

190.93)

DC output: Vodc := D·X + E

Vodc = (190.93)

DC voltage at all nodes: Vdc := A11–1·A14 Drain current Id: Vgs := Vdc1 – Vdc3

VdcT = (20

20

Vgs = 1.818

18.128

190.93

Id := gm·Vgs

1.82 × 10–3)

Id = 1.82mA

46

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Id := Vdc6 Id = 1.82mA = Vodc. Checks.

V4 := Edd – Id·R4

V4 = 190.93

AC Analysis BF := 2 Li := BF +

ND := 4 i−1 PD

PD := 25

Lit := ND·PD + 1

s := 2·π·10L· −1

i := 1..Lit

cvi := D·(si·I – A)–1·B + E

Voi := |cvi| Drain voltage V4

200

Y=4

Volts

150 Voi

100 50 0

2

3

4 Li Log freq(Hz)

5

6

mA := 10–3

n := 10–9

3.5 VCVS AND CCCS EXAMPLE K := 103

u := 10–6

m := 10–3

Hybrid-pi model of the Bipolar Junction Transistor (BJT). C1

l1 R1

R3

V1

V4

Ein R2 + −

V2 V3 R5

+ g1 −

R4

C2

Controlled Sources

R1 := 100 R5 := 10

47

R2 := 10 C1 := 80·n

R3 := 40·K C2 := 5·n

R4 := 2·K

Controlled source gains:

hre := 0.004

hie := 100

rd :=

180 π

99 1 RR := 1 4 3

1 2 4 0 0

R1 R2 R 3 R 4 R 5

1 CC : = 4

4 0

C1 C2

LL : = 0 Ein : = ( 99

0.1)

U := 4 Y := 4 VCVS: V2 – V3 = hre·(V1 – V4) Format for EE: EE = (Vc

Vn

Vcp

Vcn

gain)

then EE := (2

3

1

4

hre)

Convert g1 CCCS to a VCCS. g1 = hie ⋅ I1 I1 =

Ein − V1 hie g1 = ⋅ ( Ein − V1) R1 R1

48

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

GG = ( Vp

Vn

Vcp

Vcn

GG = 4

0

99

1

GG = ( 4

0

99

1

gain ) hie R1

1

)

→ Reference:C:\mcadckts\CaNL11\comm42.mcd −747812.5 A= 188040000

−75000 187900000

12500 B= −19800000 D = (0

1)

E = (0) DC Analysis X := lsolve(–A,B) XT = (24.226 –24.138) Vodc := D·X + E Vodc = (–24.14) Vdc := lsolve(A11,A14) VdcT = (0.09 0.09 –4.79 × 10–3 –24.14 0.01) Igl := Vdc5 Igl = 12.67mA (Igl = current thru souce gl) AC Analysis BF := 1

ND := 7

PD := 20

i := 1..ND·PD + 1

i−1 F := 10L s := 2·π·F· −1 PD Voi := D·(si·I – A)–1·B + E Vai := rd·arg(Voi)

Li : = BF +

NDS results and SPICE verification: Fnom := READPRN(“c:\SPICEapps\datfiles\vcvs_cccs4.txt”) N := rows(Fnom) N = 141 k := 1..N Hybrid-pi BJT Model *File: vcvs_cccs4.cir VEin 99 0 AC 0.1 R1 1 99 100 R2 1 2 10 R3 1 4 40K R4 4 0 2K R5 3 0 10

Controlled Sources

49

* C1 1 4 80n C2 4 0 5n * EE 2 3 1 4 0.004 * B = 100; Gain B/R1 = 1.0 in GG GG 4 0 99 1 1 .AC DEC 20 10 1E8 .PRINT AC V(4) VP(4) .OPTIONS NOECHO NOPAGE NOMOD .END Magnitude at node Y

30

dBV

20 db(Fnomk,2) db(Voi) − 4

10 0 −10 −20 −30

1

2

3

Spice NDS

4 5 log(Fnomk,1), Li Log freq(Hz)

6

7

6

7

8

Y=4 Traces are separated to show congruency. Phase angle at node Y

80 40

Deg

0 Fnomk,3

−40

(Vai)1− 10

−80 −120 −160 −200

1

2 Spice NDS

3

4

5

log(Fnomk,1), Li Log freq(Hz)

8

50

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.6 TWO INPUTS, THREE OUTPUTS K := 103

n := 10–9

R1 Ein1

V1

mA := 10–3

R2

V2

C1

R3

V3

R4

V4

+ GG C2 −

+ EE −

R7

R3 := 1·K R8 := 1·K

Ein2

R4 := 2·K R5 := 2.2·K C1 := 20·n C2 := 4·n

100 50

Gains: gm := 10

C3

R6

R8

Three outputs. 99 Ein := 98

V5

V7

V6

R1 := 1·K R2 := 2·K R6 := 2.2·K R7 := 1·K C3 := 6·n U := 7 Y := (1 3 5)T

R5

a := 5 99 1 2 3 RR := 4 5 6 7 1 CC : = 3 5 LL : = 0

1 2 3 4 5 98 0 0 0 0 0

R1 R2 R 3 R 4 R5 R6 R 7 R8 C1 C2 C 3

Controlled Sources

51

For VCVS EE: V4 – V7 = a·(Ein2 – V2)

EE := (4

7

98

2

a)

3

99

gm)

a=5

For VCCS GG: gl = gm·(V3 – Ein1)

GG := (2

6

gm = 10

→ Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis X : = − A −1 ⋅ B Vdc : = D ⋅ X + E 22.03 Vdc = 100.03 308.96 1 Y = 3 5 Vn : = 1solve ( A11, A14 ) V1

V2

V3

V4

V5

V6

V7

Ig1

Vn T = ( 22.03 – 133.92 100.03 567.93 308.96 311.92 – 351.66 0.331) Igl := Vn8

Igl = 311.92mA

AC Analysis BF := 3 Li := BF +

ND := 3 i−1 PD

PD := 40

i := 1..ND·PD + 1

s := 2·π·10L· −1

cvi := D·(si·I – A)–1·B + E

Sample of the three (complex) outputs: 21.37 − 6.19 i cv5 = 100.03 + 0 i 308.92 – 1.14 i

1 Y = 3 5

52

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Vo1i = db ( cvi )1 Vo 2 i = db ( cvi )2 Vo 3i = db ( cvi ) 3 SPICE Listing — Two In Three Out *File:

c:\SPICEapps\Cirtext\wizard.cir

VEin1 99 0 AC 100 VEin2 98 0 AC 50 * R1 99 1 1K R2 1 2 2K R3 2 3 1K R4 3 4 2K R5 4 5 2.2K R6 5 98 2.2K R7 6 0 1K R8 7 0 1K * C1 1 0 20n C2 3 0 4n C3 5 0 6n * GG 2 6 3 99 10 EE 4 7 98 2 5 .AC DEC 50 1E3 1E6 .OPTIONS NOMOD NOECHO NOPAGE .PRINT AC V(1) V(3) V(5) .OPTIONS NUMDGT 8 .END Fnom := READPRN(“c:\SPICEapps\datfiles\wizard.txt”) N := rows(Fnom) N = 151 k := 1..N

Controlled Sources

53

NDS and SPICE plots: Spice V1 magnitude

dBV

32

db(Fnomk,2)

30 28 26

3

3.5

4

4.5 log(Fnomk,1) Log freq(Hz)

5

5.5

6

NDS V1 magnitude

32

dBV

30 Vo1i 28 26

3

3.5

4

4.5 Li

5

5.5

6

Log freq(Hz)

Spice V3 magnitude

dBV

40.0028

db(Fnomk,3)

40.0024 40.0020 40.0016

3

3.5

4

4.5 log(Fnomk,1) Log freq(Hz)

5

5.5

6

54

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad NDS V3 magnitude

dBV

40.0028

Vo2i

40.0024 40.0020 40.0016

3

3.5

4

dBV

5

5.5

6

Spice V5 magnitude

50

db(Fnomk,4)

4.5 Li Log freq(Hz)

49.6 49.2 48.8

3

3.5

4

4.5 log(Fnomk,1) Log freq(Hz)

5

5.5

6

NDS V5 magnitude

50

dBV

49.6 Vo3i 49.2 48.8

3

3.5

4

4.5 Li Log freq(Hz)

5

5.5

6

3.7 THIRD-ORDER OPAMP MODEL This model has two poles and one zero. K := 103

uF := 10–6

pF := 10–12

MHz := 106

KHz := 103

Controlled Sources

55 R3

R1

1 +

EE1

2

3 +

C1

−

R2 EE2

5 C3 6

4 +

C2

−

R1 := 100

R2 := 100

EE3

−

R3 := 100

7 R4

+

EE4

−

R4 := 10

Pole frequencies: pl := 100

p2 := 1·MHz

Zero frequency C1 :=

zl := 100·KHz

1 2 ⋅ π ⋅ R1 ⋅ p1

Cl = 15.915uF

1 1 C 3 := C2 = 1591.549pF 2 ⋅ π ⋅ R 2 ⋅ p2 2 ⋅ π ⋅ R 3 ⋅ z1 C3 = 0.016uF U := 7 Y := 7 Ein := (99 1) Ao := 106 C2 :=

Third-stage transfer function: 1 R 3 ⋅ C3 F (s) = 1 s+ Rp ⋅ C 3 s+

Rp :=

R3 ⋅ R4 R3 + R4

Pole

Zero 1 log =5 2 ⋅ π ⋅ R 3 ⋅ C 3 1 3 RR := 5 6 LL := 0

2 4 6 0

R1 R2 R 3 R 4

1 log = 6.041 2 ⋅ π ⋅ Rp ⋅ C 3

2 CC := 4 5

0 0 6

C1 C2 C 3

GG := 0

56

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 3 EE := 5 7

0 0

99 2

0 0

0

4

0

0

6

0

1 1 R3 1+ R4 Ao

Note EE3 gain.

→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 1

ND := 6

i−1 PD Voi := db(cvi) Li := BF +

PD := 25

i := 1..ND·PD + 1

s := 2·π·10L· −1

cvi := D·(si·I – A)–1·B + E

Opamp open loop gain

140 120

dBV

100 Voi

80 60 40 20 0

1

2

3

4 Li Log freq(Hz)

5

Note zero at 105 Hz; and double pole at 106 = 1 MHz

3.8 A SUBCIRCUIT SCHEME Opamp model using both inverting and noninverting inputs K := 103

uF := 10–6

Differential Amplifier

nF := 10–9

MHz := 106

6

7

Controlled Sources

57

R2 R1

6(Vn) 2 −

Ein1 R3

11 V− 1

V+

7(Vp) 3 +

Ein2

5(Vo)

4

R4

Use the linear two-pole opamp model on page 58. R1 := 10·K R2 := 20·K R3 := 10·K CC := 0 GG := 0 LL := 0 99 98 RR := 6 7 Vo := 5

6 7 5 0

R1 R 3 R2 R 4

Vn := 6

99 Ein := 98

R4 := 20·K

−1 1

Vp := 7

Input nodes to subckt6.mcd Y := Vo

U=7

→ Reference:C:\mcadckts\CaNL11\subckt6.mcd → Reference:C:\mcadckts\CaNL11\comm42.mcd A1 := A

B1 := B

D1 := D

E1 := E

Save arrays.

Get response for opamp open-loop gain of Ao := 105

EE3,5 := Ao

→ Reference:C:\mcadckts\CaNL11\comm42.mcd A2 := A

B2 := B

D2 := D

E2 := E

Save new arrays.

ND := 3

PD := 50

i := 1..ND·PD + 1

AC Analysis BF := 4

i −1 s := 2·π·10L· −1 PD cv2i := D2·(si·I – A2)–1·B2 + E2 Li := BF +

cv1i := D1·(si·I – A1)–1·B1 + E1

58

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Magnitude at node Y 30

dBV

M1 db(cv1i)

20

Y=5

10 0

db(cv2i) −10 −20 −30 −40

4

4.5

5

5.5 Li Log freq(Hz)

Ao = 10^6 Ao = 10^5

6

6.5

7

Note the difference in high-frequency response with Ao = 10^5.

3.9 SUBCIRCUIT OPAMP MODEL MHz := 106 This file requires inputs from the “calling circuit” in order to provide solutions. These inputs are Vp, Vn, and Vo. Because Vo = V5 is common to the calling circuit, node numbers in the calling circuit must start with V5. Ra

1 +

EE1

2 +

C1

−

f1 := 10 Ca :=

Rb

3 EE2

4 C2

−

−

Ao := 106

f2 := 1·MHz

1 2 ⋅ π ⋅ Ra ⋅ f1

Cb :=

0 0 0

Vp 2 4

RR := stack(RR,RR1)

Vn 0 0

1 1 Ao

CC := CA

EE3

Ra := 10

1 2 ⋅ π ⋅ Rb ⋅ f 2

Ra 1 2 2 0 RR1 := CC1 := 3 4 Rb 4 0 CA = CC1 if no capacitors in main circuit. 1 EE := 3 Vo

5 +

Rb := 10

Vo = V5 Ca Cb

CA : = cc ← CC1 if CC = 0 cc ← stack (CC, CC1) otherwisee cc

Controlled Sources

59

→ Reference:C:\mcadwca\wcaref11\Find_U.mcd Find the maximum number of nodes U.

3.10 FIFTH-ORDER ACTIVE FILTER High Pass K := 103

u := 10–6

n := 10–9

C2 Ein

V1 C1

Meg := 106

V5 V2

R1

R3

V3 C3

R2

V5 C5

R4

R6 3

V4 C4

R5

m := 10–3

2

+

−

4 V+

V6 1

V− 11

R7 V7 R8

R1 := 0.01 R2 := 2·K R3 := 70·K R4 := 140·K R5 := 12·K R6 := 2.7·K R7 := 3.2·K R8 := 10·K C1 := 0.03·u C2 := 0.02·u C3 := 1.9·n C4 := 0.4·n C5 := 0.01·u Ao := 106 U := 7 Y := 6 Resistor R1 (0.01 Ω) serves two purposes: (1) acts as an ESR resistor so that C1 is not connected directly to independent input Ein, and (2) prevents an allcapacitive loop via ground, C4, C5, C2, and C1, and the zero-output impedance of Ein. 99 2 2 3 RR := 4 6 6 7 Ein := (99

1 0 3 4 0 5 7 0 1)

R1 R2 R 3 R 4 R5 R6 R 7 R8 LL := 0

1 2 CC := 3 4 5

GG := 0

2 5 0 0 4

C1 C2 C 3 C 4 C5

60

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

For the opamp: EE format: EE = (Vp Vn Vcp V6 = Ao·(V4 – V7)

Vcn gain) EE := (6 0

4

7

Ao)

→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2

ND :=2

i := 1..ND·PD + 1

PD := 50 i−1 s := 2·π·10L· −1 PD Voi := db(cvi) Y=6

Li := BF +

cvi := D·(si·I – A)–1·B + E

Output magnitude at node Y

10 0 −10 dBV

−20 Voi −30 −40 −50 −60 −70

2

2.2

2.4

2.6

3.11 STATE VARIABLE FILTER K := 103

n := 10–9

Ten outputs: V1 through V10.

2.8

3 3.2 Li Log freq(Hz)

3.4

3.6

3.8

4

Controlled Sources

R3

7

2 R1

C1

2

R2

Ein

61

1 3

11

−

3

V−

C2

4 2

1

V+

+

R4

4 3

−

11 V− 1

V+

+

5

6

R5

2

−

3

+

4

11

7

V−

1

V+ 4 R8

R6

1

9

R7

5

R9

8

2

−

3

+

11

4

R1 := 10·K R2 := 20·K R3 := 10·K R4 := 182·K R5 := 2.2·K R6 := 20·K R7 := 10·K R8 := 100·K R9 := 10·K R10 := 100·K C1 := 1.125·n C2 := C1 U := 10 Ao := 106 GG := 0 LL := 0 5 7

C1 C2

Ein := (99

1)

rd :=

180 π

Get all nodes: Y := (1

2

99 7 2 3 5 RR := 1 5 9 3 8

3 1 2 3 4 6 5 9 10 8 7

4

5

6 7

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10

8

9

10)T

Opamps :

Vp Vn Vcp Vcn Gain

3 5 EE := 7 10

0 0 0 0

1 0 0 8

2 4 6 9

1

V+ R10

4 CC := 6

10

V−

Ao Ao Ao Ao

7

62

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Note that the DC Analysis has been omitted AC Analysis BF := 3

ND := 1

PD := 200

i−1 PD

s := 2·π·10L· −1

rows ( A) rows (B) rows (D) rows (E )

cols ( A) 2 cols (B) 2 = cols (D) 10 cols (E ) 10

Li := BF +

i := 1..ND·PD + 1 cvi := D·(si·I – A)–1·B + E

2 1 2 1

N N Format : K K

N M N M

K = number of outputs; M = number of inputs. The dimensions of the complex output variable cv are always {K M}. From the schematic, V1 = V2; V8 = V9; V4 and V6 ≈ zero; hence, we omit V2, V9, V4, and V6. Get magnitude (dBV) and phase (deg) for single or multiple outputs: Vo : = for i ∈1..ND ⋅ PD + 1 if rows ( Y) = 0 vo i ← db ( cvi ) for i ∈1..ND ⋅ PD + 1 otherwise for K ∈1..rows ( Y) vo i,k ← db ( cvi )k vo Vai := rd·arg(cvi)

Controlled Sources

63 V1, V3, V5

40 20

dBV

Voi,1 Voi,3 Voi,5

0 −20 −40 −60

3

3.1

3.2

3.3

V1 V3 V5

3.4

3.5 3.6 Li Log freq(Hz)

3.7

3.8

3.9

3.7

3.8

3.9

4

V7, V8, V10

40 20

dBV

Voi,7 Voi,8 Voi,10

0 −20 −40 −60

3

3.1 V7 V8 V10

3.2

3.3

3.4

3.5 Li

3.6

Log freq(Hz)

3.12 SEVENTH-ORDER ELLIPTICAL LOW-PASS FILTER K := 103

nF := 10–9

4

Ein

3

2

R1 V12

+

−

V+

V−

11

R2

C1

4

V2

1

V1

R5

C2

R3

R4

R6

C4

V3

V4

V5

C3

R7 V6 3

2 +

− V+

V−

11

4

R11

V8

R10

R9 V4

1 C7

R12

R8

C5

V13 R13

V9

C6

V10

V7

V11 3

2 +

− V+

V−

11

4

R15

V10

R14

1

V14

64 Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Controlled Sources

65

R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Y := 14 99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10

12 1 2 5 0 3 6 7 4 8 0 10 11 10 0

1 EE := 13 14

0 0 0

Ein := (99

1)

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 0 6 11

12 3 6 CC := 5 9 11 7

12 13 14

LL := 0

Ao Ao Ao

1 2 3 4 8 9 10

C1 C2 C 3 C 4 C5 C6 C 7

(opamps)

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd The DC analysis has been omitted. AC Analysis BF := 2 Li := BF +

ND := 2 i−1 PD

Voi := db(cvi)

PD := 100 s := 2·π·10L· −1

i := 1..ND·PD + 1 cvi := D·(si·I – A)–1·B + E

180 ·arg(cvi) π Vbi := –210·log(10Li–3)

Vai :=

Equation of asymptote:

A 210 dB/decade rolloff with a seventh-order (140-dB Butterworth) circuit.

66

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Elliptical Seventh-Order LPF — SPICE Verification * File: c:\SPICEapps\Cirtext\Ellipt7.cir * 5/06/05 VEin 99 0 AC 1 R1 99 12 19.6K R2 12 1 196K R3 1 2 1K R4 1 5 147K R5 2 0 71.5 R6 4 3 37.4K R7 5 6 154K R8 13 7 110K R9 13 4 260 R10 4 8 740 R11 8 0 402 R12 9 10 27.4K R13 7 11 110K R14 14 10 40 R15 10 0 960 * C1 12 1 2.67n C2 3 2 2.67n C3 6 3 2.67n C4 5 4 2.67n C5 9 8 2.67n C6 11 9 2.67n C7 7 10 2.67n * EE1 1 0 0 12 1E6 EE2 13 0 6 13 1E6 EE3 14 0 11 14 1E6

Controlled Sources

67

* .OPTIONS NOMOD NOPAGE NOECHO .AC DEC 100 100 10K .PRINT AC V(14) VP(14) .END Fnom := READPRN(“c:\SPICEapps\datfiles\Elliptf7.txt”) N := rows(Fnom) N = 201 k := 1..N Output at node Y

40 20

dBV

Voi + 5 Vbi

0 −20

db(Fnomk,2) −40 −60 −80

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

4

Li, Li, log(Fnomk,1) Log freq(Hz)

NDS Asymptote Spice V(14)

Traces separated to avoid overlay and show congruency. Phase at node Y

200

Deg

100 (Vai)1 Fnomk,3 − 20

0 −100 −200

2

2.2

2.4

NDS Spice VP(14)

2.6

2.8

3

3.2

Li, log(Fnomk,1) Log freq(Hz)

3.4

3.6

3.8

4

68

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.12.1 STEPPING ONE RESISTOR VALUE K := 103

nF := 10–9

For the schematic, see Section 3.12. R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Y := 14 New resistor values for R4: Rx := (100

150

99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10

12 1 2 5 0 3 6 7 4 8 0 10 11 10 0

1 EE := 13 14

0 0 0

Ein := (99

1)

250)T·K

200 R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 0 6 11

12 13 14

LL := 0

Ndc := rows(Rx)

12 3 6 CC := 5 9 11 7

Ao Ao Ao

1 2 3 4 8 9 10

C1 C2 C 3 C 4 C5 C6 C 7

(Opamps)

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Collect all arrays into one multidimensional array VAB:

Ndc = 4

Controlled Sources

69

Vn(U, Y, EE, GG, RR, CC, LL, Ein ) : = for i ∈1..Ndc RR 4 ,3 ← Rx i AE ← G(U, Y, EE, GG, RR, CC, LL, Ein ) A i ← AE1 Bi ← AE 2 D i ← AE 3 E i ← AE 4 A B D E

Row 2 comment: Stuff new Rx values into R4. Row 3 comment: Recompute and store the arrays. (The G function comes from subprogram comm42.mcd previously called.) VAB := Vn(U, Y, EE, GG, RR, CC, LL, Ein) Note: Except for the second line in the Vn routine (given earlier), this routine, the VAB statement (given earlier), and the Vo routine below are universal. That is, they can be used to step values in column 3 of RR, CC, or LL and column 5 of GG or EE in any AC circuit. Similar statements apply for stepping resistor values in DC circuits. AC Analysis BF := 2

ND := 2

Li := BF +

i−1 PD

PD := 100

i := 1..ND.PD +1

70

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Vo : = for k ∈1..Ndc A ← ( VAB1 )k B ← ( VAB2 )k D ← ( VAB3 )k E ← ( VAB4 )k for i ∈1..ND ⋅ PD + 1 L i ← BF +

i −1 PD

si ← 2 ⋅ π ⋅ 10 L i ⋅ −1 cvk ,i ← D ⋅ ( si ⋅ I − A ) ⋅ B + E −1

vo k ,i ← db ( cvk ,ii ) vo

Ndc diﬀerent resistor values

40

dBV

Vo1,i Vo2,i

20 0

Vo3,i −20 Vo4,i −40 −60 −80 2.6

2.7

2.8

R4 = 100 K 150 K 200 K 250 K

Ndc = 4 Note the scale change.

2.9

3

3.1 3.2 Li Log freq(Hz)

3.3

3.4

3.5

3.6

Controlled Sources

71

3.12.2 STEPPING ALL SEVEN CAPACITOR VALUES K := 103

nF := 10–9

For the schematic, see Section 3.12. R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Step C1 through C7 from 1nF to 3 nF: Cx := (1.8 99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10 Y := 14

2.2 12 1 2 5 0 3 6 7 4 8 0 10 11 10 0

2.6

3.0)T·nF

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15

Ndc := rows(Cx)

12 3 6 CC := 5 9 11 7

Ncap := rows(CC)

1 EE := 13 14

0 0 0

Ein := (99

1)

0 6 11

12 13 14

LL := 0

1 2 3 4 8 9 10

Ncap = 7

Ao Ao Ao

(Opamps)

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd

C1 C2 C 3 C 4 C5 C6 C 7

Ndc = 4

72

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Collect all arrays into one multidimensional array VAB:

Vn(U, Y, EE, GG, RR, CC, LL, Ein ) : = for i ∈1..Ndc for j ∈1..Ncap CC j,3 ← Cx i AE ← G(U, Y, EE, GG, RR, CC, LL, Ein ) A i ← AE1 Bi ← AE 2 D i ← AE 3 E i ← AE 4 A B D E

Row 3 comment: Fill CC column 3 with the ith capacitor value. Row 4 comment: Recompute the arrays for each new value and store. VAB := Vn(U, Y, EE, GG, RR, CC, LL, Ein) AC Analysis Bf := 2

ND := 2

Li := BF +

i−1 PD

PD := 100

i := 1..ND·PD + 1

Controlled Sources

73

Vo : = for k ∈1..Ndc A ← ( VAB1 )k B ← ( VAB2 )k D ← ( VAB3 )k E ← ( VAB4 )k for i ∈1..ND ⋅ PD + 1 L i ← BF +

i −1 PD

si ← 2 ⋅ π ⋅ 10 L i ⋅ −1 cvk ,i ← D ⋅ ( si ⋅ I − A ) ⋅ B + E −1

vo k ,i ← db ( cvk ,ii ) vo Four diﬀerent values for C1 thru C7

40 20

dBV

Vo1,i Vo2,i Vo3,i

0 −20

Vo4,i −40 −60 −80

2

2.2

2.4

2.6

C1 thru C7 = 1.8 nF 2.2 nF 2.6 nF 3.0 nF

2.8

3 3.2 Li Log freq(Hz)

1.8 2.2 Cx = nF 2.6 3

3.4

3.6

3.8

4

74

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.13 SQUARE ROOT OF FREQUENCY (+10 dB/DECADE) CIRCUIT K := 103 Hz := 1

u := 10–6

R1

V1

n := 10–9

R2

V2

R3

p := 10–12

V3

R4

kHz := 103

R5

V4

V5

Ein C1

C2

C3

C4

C5 V9

V5 R6

V6 C6

R7

V7 C7

R8

V8

R9

R10

V9

V10

C9

C8

V9 2 3

−

+

11 V− 1

V+ 4

R1 := 523 R2 := 1.54·K R3 := 3.16·K R4 := 6.19·K R5 := 12.4·K R6 := 24.9·K R7 := 49.9·K R8 := 100·K R9 := 200·K R10 := 49.9·K C1 := 330·p C2 := 680·p C3 := 1.2·n C4 := 2.7·n C5 := 4.7·n C6 := 0.01·u C7 := 0.022·u C8 := 0.039·u C9 := 22·p Ao := 106 Ein := (99 1) U := 10 Y := 10 GG := 0 LL := 0 db(x) := 20·log(|x|) S1 : = 100

S1 = 10

db(S1) = 20

S2 : = 1000

S2 = 31.623

db(S2 ) = 30

S3 : = 10000

S3 = 100

db(S3) = 40

Hence, a slope of +10 dB/decade is the square root of frequency.

Controlled Sources

99 1 2 3 4 RR := 5 6 7 8 9 EE := (10

75

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10

1 2 3 4 5 6 7 8 9 100 0

0

9

1 2 3 4 CC := 5 6 7 8 9

9 9 9 9 9 9 9 9 10

C1 C2 C 3 C 4 C5 C6 C7 C8 C9

Ao)

→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 0

ND := 6

Li := BF +

i−1 PD

PD := 20

i := 1..ND·PD +1

F := 10L

Insert a non-inverting opamp gain stage after V10 with a gain of: 118 ⋅ K dBG := 20 ⋅ log 1 + 8.5 ⋅ K dBG = 23.453 s := 2·π·F· −1 cvi := D·(si·I – A)–1·B + E Voi := db(cvi) + dBG Vai := 10·log(Fi) Y = 10 Output at node Y

60 50

dBV

40 Voi Vai

30 20 10 0

0

1 V10 +10 dB/dec

2

3 4 Li Log freq(Hz)

5

6

76

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.14 HV (200 V) SHUNT MOSFET REGULATOR K := 103

n := 10–9

mA := 10–3 Ehv R4

R7

V8

V1 V3

R8 Eref

R10

C1

V7 2 3

− +

11 V−

V1

R1

V2

M1

M2 C2 V9

1

V+ 4

R2

V4

V6 R5

R9

V5

R3 R6

R1 := 10K R2 := 10K R3 := 5.1K R4 := 51K R5 := 215K R6 := 6878 R7 := 562K R8 := 10K R9 := 1.96K R10 := 0.01 C1 := 2.7n C2 := 4.7n Eref := 6.2 Ehv := 400 Y := 6 U := 10 LL := 0 From MOSFET data sheet: gm := 0.001 99 1 2 4 98 RR := 6 5 7 9 988

R8 R1 R2 R 3 R4 R5 R6 R7 R9 R10

7 2 0 0 3 5 0 8 0 10

3 GG := 10

4 6

99 Ein := 98

Eref Ehv

2 3

4 6

8 CC := 3

gm gm

1 9

Ao := 106

Two inputs, M = 2.

C1 C2

EE := (1 0 5 7 Ao) Opamp

99 Ein = 98

6.2 400

Controlled Sources

77

(Note: C1 and C2 are for stability purposes. See Section 5.3, page 107 for analysis.) → Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis −41.43 VC1 X := lsolve(–A,B) X = Vodc := D·X + E 200.91 VC 2

Vodc = (200.01)

DC drain currents of MOSFETs M1 and M2: Vdc := lsolve(A11,A14) Id2 := Vdc12 Id1 := Vdc11

Id1 := 3.904mA

Id2 := 0.901mA

AC Analysis BF := 0

ND := 5

PD := 30

Lit := ND·PD + 1

i := 1..Lit

s := 2·π·10L· −1 log(20) = 1.3

Li := BF +

cvi := D·(si·I – A)–1·B + E

i−1 PD Voi := |cvi|

200 V regulation is maintained up to about 20 Hz. Output at V5

250

Volts

200 Voi

150 100 50 0

0

1

2

3 Li Log freq(Hz)

4

Due to the opamp, a short expression for the DC output is: R5 Vo := Eref ⋅ 1 + R6 Vo := 200.01

5

78

3.15 LTC 1562 BAND-PASS FILTER IC IN A QUAD IC R21

Ein

V1 2

−

3

+

R1A

V2 11 V−

2

−

3

+

1

V+ 4

C1A

V3

V4

R5

11 2

V− 1

V+

3

4

R6

V5 − +

V6

C2B RQ2

RIN2 V7

11 V−

2

1

V+ 4

3

−

R1B

V8

11

2

V− 1

V+

+

3

4

C1B

V9 − +

V10

R7

11 2

V−

R8

V11 −

1

V+

3

4

+

V12

11 V− 1

V+ 4

To RIN3 R23

C2C RQ3

RIN3 V13

2

−

3

+

R1C

V14 11 V− 4

C1C

V15

2

−

3

+

1

V+

R24

V16

R9

11 2

V− 1

V+ 4

R10

V17

3

− +

V18

RIN4

C2D RQ4

V19

11 V− 1

V+ 4

2 3

− +

R1D

V20

11

2

V− 1

V+

3

4 Vout

C1D

V21 − +

V22

R11

11 2

V−

R12

V23 −

1

V+ 4

3

+

V24

11 V− 1

V+ 4

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

C2A RQ1

RIN1

R22

Controlled Sources

79

Opamp rolloff for the first four stages of this circuit is shown following. The remaining stages have infinite bandwidth at gain Ao. V25

R13

+

V26 C3

−

V33 +

V27

R14

+

V28 C4

−

R17

V34 C7

−

V35

R18

+

V36 C8

−

V2

V29

+

+

−

−

V14

+

−

−

V30 C6

V31

R16

+

V32 C5

−

V37

+

R15

R19

V38 C9

V39 +

V8 + −

R20

V40

C10

−

V20 + −

Output plot — see following Mathcad file. Resistor values for fo = 100 KHz are from LTC data sheet [1]. Total circuit has 40 unknown nodes and 68 components. See Section 3.16 following.

3.16 LTC 1562 QUAD BAND FILTER IC K := 103

m := 10–3

u := 10–6

n := 10–9

p := 10–12

See Section 3.15 for a schematic of the four connected sections and the opamp rolloff subcircuit. First-stage resistor values for 100-KHz fo: RIN1 := 42.2·K C1A := 159.15·p

RQ1 := 42.2·K C2A := C1A

R21 := 10·K R5 := 10·K

R1A := 10·K R6 := 10·K

Second-stage resistor values for 100-KHz fo: RIN2 := 42.2·K C1B := 159.15·p

RQ2 := 42.2·K C2B := C1B

R22 := 10·K R1B := 10·K R7 := 10·K R8 := 10·K

Third-stage resistor values for 100-KHz fo: RIN3 := 42.2·K C1C := 159.15·p

RQ3 := 42.2·K C2C := C1B

R23 := 10·K R1C := 10·K R9 := 10·K R10 := 10·K

Fourth-stage resistor values for 100-KHz fo: RIN4 := 42.2·K C1D := 159.15·p

RQ4 := 42.2·K C2D := C1B

R24 := 10·K R11 := 10·K

R1D := 10·K R12 := 10·K

80

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

These component values were obtained from Reference 1. Opamp frequency rolloff components: R13 := 1 R14 := 1 R15 := 1 R16 := 1 R17 := 1 R18 := 1 R19 := 1 R20 := 1 Cx1 := 15.91·m Cx2 := 159·n (10-Hz and 1-MHz poles) (Note: These poles, and Ao (given in the following), are estimates because the vendor chose not to put this information in the data sheet.) C3 := Cx1 C8 := Cx2 Ein := (99

C4 := Cx2 C9 := Cx1 1)

C5 := Cx1 C6 := Cx2 C10 := Cx2

C7 := Cx1

Lao 20

Ao := 10

Lao := 130

Component node lists: LL := 0

GG := 0

Y := 20

U := 40

Quad 1 of 4 quads 99 1 2 RR1 := 6 4 5

25 27 EE1 := 2 4 6

RIN1 RQ1 R1A R 21 R5 R6

1 2 3 1 5 6

0 0 0 0 0

0 26 28 0 0

1 0 0 3 5

1 CC := 3

2 4

C2 A C1A

1 1st opamp inv input. 1 1st opamp 10 Hz pole Ao 1st opamp 1MHz pole Ao 2nd opamp, no roolloff Ao 3rd opamp, no rolloff

Controlled Sources

81

Quad 2 of 4 2 7 8 RR 2 := 12 10 11

29 31 EE 2 := 8 10 12

RIN 2 RQ 2 R1B R 22 R7 R8

7 8 9 7 11 12

0 0 0 0 0

0 30 32 0 0

7 0 0 9 11

7 CC2 := 9

1 1 Ao Ao Ao

8 10

C2 B C1B

4th opamp inv input. 4th opampp 10 Hz pole 4th opamp 1MHz pole 5th opamp, no rolloff 6th opamp, no rolloff

Quad 3 of 4 8 13 14 RR 3 := 18 16 17

33 35 EE 3 := 14 16 18

13 14 15 13 17 18

0 0 0 0 0

RIN 3 RQ 3 R1C R 23 R9 R10

0 34 36 0 0

13 0 0 15 17

13 CC 3 := 15

1 1 Ao Ao Ao

14 16

C2C C1C

7th opamp inv input. 7th opamp 10 Hz pole 7th opamp 1MHz pole 8th opam mp, no rolloff 9th opamp, no rolloff

82

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Quad 4 of 4 14 19 20 RR 4 := 24 22 23 37 39 EE 4 := 20 22 24

RIN 4 RQ 4 R1D R 24 R11 R12

19 20 21 19 23 24 0

0

19

0 0 0 0

38 40 0 0

0 0 21 23

19 CC 4 := 21

20 22

C2 D C1D

1 10 th opamp inv input. 1 10tth opamp 10 Hz pole Ao 10th opamp 1MHz pole Ao 11thh opamp, no rolloff Ao 12th opamp, no rolloff

R and C’s for rolloff poles: 25 27 29 31 RR 5 := 33 35 37 39

26 28 30 32 34 36 38 40

R13 R14 R15 R16 R17 R18 R19 R 20

26 28 30 32 CC5 := 34 36 38 40

0 0 0 0 0 0 0 0

C3 C4 C5 C6 C7 C8 C9 C10

Stack into one array: RR := stack(RR1,stack(RR2,stack(RR3,stack(RR4,RR5)))) CC := stack(CC1,stack(CC2,stack(CC3,stack(CC4,CC5)))) EE := stack(EE1,stack(EE2,stack(EE3,stack(EE4,CC5)))) → Reference:C:\mcadckts\CaNL11\comm42.mcd rows ( A) rows (B) rows (D) rows (E )

cols ( A) 16 cols (B) 16 = cols (D) 1 cols (E ) 1

16 1 16 1

N N Format : K K

N M N M

Controlled Sources

83

AC Analysis

BF := 40·K

LF := 180·K

i := 1..NP + 1 s := 2·π·F· −1

NP := 101

DF :=

LF − BF NP

Fi := BF + DF·(i – 1) cvi := D·(si·I – A)–1·B + E

voi := db(cvi)

Get SPICE output (see SPICE listing below) Fnom := READPRN(“c:\SPICEapps\datfiles\ltc1562_nom.txt”) N := rows(Fnom) N = 101 k := 1..N LTC1562 output at node Y

30 20 10

dBV

0 Voi db(Fnomk,2) − 5

−10 −20 −30 −40 −50 −60 −70 40

60 NDS Spice

80

100 120 Fi Fnomk,1 , K K Freq(KHz)

140

160

180

SPICE plot separated by 5 dBV from NDS plot to show both. Also see Amplitude Response plot in Reference 1. Y = 20 SPICE listing for Itc1562.med LTC1562 Analysis * File: Itc1562A.cir VEin 99 0 AC 1 * * Quad 1 of 4 quads *

84

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

RIN1 99 1 4.22K RQ1 1 2 42.2K R1A 2 3 10K R21 6 1 10K R5 4 5 10K R6 5 6 10K C1A 3 4 159.15p C2A 1 2 159.15p EE1 25 0 0 1 1 EE2 27 0 26 0 1 EE3 2 0 28 0 3.162E6 EE4 4 0 0 3 3.162E6 EE5 6 0 0 5 3.162E6 * Quad 2 * RIN2 2 7 42.2K RQ2 7 8 42.2K R1B 8 9 10K R22 12 7 10K R7 10 11 10K R8 11 12 10K C2B 7 8 159.15p C1B 9 10 159.15p EE6 29 0 0 7 1 EE7 31 0 30 0 1 EE8 8 0 32 0 3.162E6 EE9 10 0 0 9 3.162E6 EE10 12 0 0 11 3.162E6 * * Quad 3

Controlled Sources

* RIN3 8 13 42.2K RQ3 13 14 42.2K R1C 14 15 10K R23 18 13 10K R9 16 17 10K R10 17 18 10K C2C 13 14 159.15p C1C 15 16 159.15p EE11 33 0 0 13 1 EE12 35 0 34 0 1 EE13 14 0 36 0 3.162E6 EE14 16 0 0 15 3.162E6 EE15 18 0 0 17 3.162E6 * Quad 4 * RIN4 14 19 42.2K RQ4 19 20 42.2K R1D 20 21 10K R24 24 19 10K R11 22 23 10K R12 23 24 10K C2D 19 20 159.15p C1D 21 22 159.15p EE16 37 0 0 19 1 EE17 39 0 38 0 1 EE18 20 0 40 0 3.162E6 EE19 22 0 0 21 3.162E6 EE20 24 0 0 23 3.162E6 *

85

86

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

* R’s & C’s for opamp poles * R13 25 26 1 R14 27 28 1 R15 29 30 1 R16 31 32 1 R17 33 34 1 R18 35 36 1 R19 37 38 1 R20 39 40 1 C3 26 0 15.915M C4 28 0 159.15n C5 30 0 15.915M C6 32 0 159.15n C7 34 0 15.915M C8 36 0 159.15n C9 38 0 15.915M C10 40 0 159.15n * .OPTIONS NOMOD NOPAGE NOECHO .AC LIN 101 40000 180000 .PRINT AC V(20) .END

Controlled Sources

87

3.17 BJT CONSTANT CURRENT SOURCE — A SIMPLE LINEAR MODEL USING THE NDS METHOD Constant Current Source Ein

Q1

Explanatory schematic Ein

R1 +

R4

V1

V4

Ic

− +

D1

V3 R3

R1

−

V3

V2 R2

V4

R4

V1

Vbe

R3

+

Ix

+

Vd

Iy

−

−

V2 R2

K := 103 mA := 10–3 uA := 10–6 pA := 10–12 R1 := 10·K R2 := 1.4·K R3 := 300 R4 := 0.01 Ein := (99 Ecc) beta := 100 U := 4

Ecc := 15

Use Roe = 1/hoe = 50 K in linear model — simulates Early voltage. Roe := 50K 99 2 RR := 3 1 99

1 0 0 4 3

R1 R2 R3 R 4 Roe

Id = Ix + Iy =

V2 R2

Ib flows through Vbe. The values of Ix and Iy are not needed, only Id. Vbe initial guess: Vbe := 0.6 Vbe refinement; see next page. Vbe := 0.705 Match Vd

88

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Vd := Vbe 1 GG := 99

2

2

0

3

1

4

1 R2 beta R4

1 EE := 4

Id =

V2 R2

V1 − V4 Ic = beta ⋅ Ib = beta ⋅ R 4

2

99

0

3

99

0

Vd Ecc Vbc Ecc

→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := Isolve (A1, B2) 2.395 1.69 Get node voltages from nodes 1 to U: k := 1..U Vk = 1.69 2.395 Get VCCS currents set by GG: Ngg := rows (GG) n := 1..Ngg 1.21 Vn+ U = ⋅ mA 5.31

Isrc = 5.31 mA

V2 Id = 1.207mA Id := V5 R2 Id = 1.207 mA Id := V5 Checks. Id :=

Refine Vbe: V1 − V4 R4

ml := 0.068

b1 := 0.588

Isrc = 100 Ib Ie = 5.63 mA

Ib + b1 Vbe : = ml ⋅ log uA

Iroe :=

Ib :=

Ic := le – lb

Ecc − V3 Roe

Ib

Ib + Id = 1.26mA

Id

Vbe = 0.705

Ie :=

V3 R3

Ic = 5.58 mA

Iroe = 266.19uA

Ecc − V1 V1 − V4 V2 = + R1 R4 R2

Ib = 53.15uA

Ic – Iroe = 5.31mA

Ecc − V1 V1 − v4 V2 + = 1.26 mA = 1.26 mA R1 R4 R2

Checks.

Controlled Sources

89

3.18 uA733 VIDEO AMPLIFIER K := 103

mA := 10–3

uA := 10–6

pA := 10–12

Also see NE592 Video Amplifier (http://onsemi.com) Rs := 0.01 R1 := 2.4·K R2 := 2.4·K R3 := 50 R4 := 590 R5 := 50 R6 := 590 R7 := 1.1·K R8 := 1.1·K R9 := 7·K Ein1 := 4.1 Ein2 := 4.0 Ein3 := 15 beta := 100 R10 := 7·K Roe := 50·K (Simulates 1/hoe of transistors. Not shown on schematic.) Rg := 20·K

R7 R1

Q3 V13

V4 Rs

V3

R3

V5

Ein1

Q2

R6

Q4

V15

Q6

V1 Rs

V1 Rs V3

V2

V10

Out

R9 V4

Out2

V11 R10

Ein2

V7 I1 +

Q5

Rs

V8

V6 R5

Rg

R4

V16

V9

R2

Q1 V1

Ein

R8

+

I2

+

−

I3

−

+

I4

−

−

Current source values obtained from analysis on the previous page. I1 := 5.31·mA I3 := 4.54·mA Initialize Vbe:

(R3 = 300)

I2 := I1

99 Ein := 98 97

Ein1 Ein 2 Ein 3

(R3 = 350) I4 := I3 Vbe := (0.6 0.6 0.6 0.6 0.6 0.6)T Vbe := (0.68 0.68 0.69 0.68 0.70 0.70)T Vbe refinements; see next page.

U := 16

90

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

99 98 97 97 5 6 97 97 3 4 RR := 4 3 9 8 5 3 4 8 9 97 97

1 2 3 4 7 7 8 9 10 11 13 14 16 15 6 5 6 12 12 10 11

R3 R5 R1 R 2 R4 R6 R7 R8 R9 R10 Rs Rs Rs Rs Rg Roe Ro oe Roe Roe Roe Roe

R 3 external R 5 external

Rg externall

Vbe voltage sources 1 2 13 EE := 14 16 15

5

97

0

6

97

0

12

97

0

12

97

0

10

97

0

11

97

0

Vbe1 Ein 3 Vbe 2 Ein 3 Vbe 3 Ein 3 Vbe 4 Ein 3 Vbe 5 Ein 3 Vbe 6 Ein 3

Controlled Sources

7 12 10 11 3 GG := 4 8 9 97 97

91

0

97

0

0

97

0

0

97

0

0

977

0

5

99

1

6

98

2

12

4

13

12

3

14

10

9

16

11

8

15

I1 Current source I1 (Ic = beta ⋅ Ib) Ein 3 I2 Current source I2, etc. Ein 3 I3 Ein 3 I4 Ein 3 Q1 current source frrom V3 to V5, beta Ein1–V1 R 3 controlled by Ib = R3 beta Q22 current source from V4 to V6, Ein2–V2 R5 controlled by Ib = beta R5 Rs Q3 current source from V8 to V12, beta controlled by Ib = V4–V13 , etc Rs Rs beta Rs beta Rs

→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := lsolve(A1,B2) Get all node voltages from 1 to U: k := 1..U

Vnk := Vk

See the following. Get VCCS currents set by GG: Ngg := rows(GG) ViT = (5.31 5.31

n := 1..Ngg Vin := Vn+U 4.54 4.54 2.6 2.42 3.09 2.04

4.8

4.62)mA

92

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Get base currents to refine Vbe:

IbT = (26.01

24.21

30.87

Ib1 : =

Ein1 − V1 R3

Ib 2 : =

Ein 2 − V2 R5

Ib 3 : =

V4 − V13 Rs

Ib 4 : =

V3 − V14 Rs

Ib 5 : =

V9 − V16 Rs

Ib 6 : =

V8 − V15 Rs

20.35

48.02

46.19)uA

From Vbe curve-fit data: m1 :=0.068

b1 := 0.588

Ib Vbe W : = ml ⋅ log w + b1 uA VbeT = (0.68

0.68

0.69

0.68

Copy to Vbe in the previous text. Repeat if necessary. (Converges very rapidly.)

0.70

0.70)

w := 1..rows(Ib)

Controlled Sources

93

NDS (Mathcad) 4.0987 3.9988 9.3186 9.3286 3.4187 3.3188 1.8023 11.4909 Vk = 12.6208 11.9208 10.7909 8.6386 9.3286 9.3186 11.4909 12.6208

Spice using 2N3904 4.0991 3.9992 9.3188 9.32999 3.4085 3.3104 1.7930 11.4960 Vspice : = 12.6350 11.9280 10.7900 8.6342 9.3299 9.3188 11.4960 12.6350

pe k : =

Vk −1 Vspice k

Percent error, each node −0.01 −0.01 −0.00 −0.01 0.30 0.25 0.52 min(pe) = −0.11% −0.04 pe = % −0.11 max(pe) = 0.52% −0.06 0.01 0.05 −0.01 −0.00 −0.04 −0.11

94

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

SPICE Comparison of uA733 Video Amplifier Analysis uA733 Video Ampl * File: uA733_va.cir VEin1 99 0 DC 4.1 VEin2 98 0 DC 4.0 VEin3 97 0 DC 15 * R3 99 1 50; External input resistor R5 98 2 50; External gain resistor R1 97 3 2.4K R2 97 4 2.4K R4 5 7 590 R6 6 7 590 R7 97 8 1.1K R8 97 9 1.1K R9 3 10 7K R10 4 11 7K Rg 5 6 20K; External gain resistor * Rs1 4 13 0.01 Rs2 3 14 0.01 Rs3 9 16 0.01 Rs4 8 15 0.01 * Current sources I1 7 0 DC 5.31mA I2 12 0 DC 5.31mA I3 10 0 DC 4.54mA I4 I1 0 DC 4.54mA * * C B E Q1 3 1 5 Q2N3904

Controlled Sources

95

Q2 4 2 6 Q2N3904 Q3 8 13 12 Q2N3904 Q4 9 14 12 Q2N3904 Q5 97 16 10 Q2N3904 Q6 97 15 11 Q2N3904 * * Bf=416.4 .model Q2N3904 NPN(Is=6.734f Xti=3 Eg=1.11 Vaf=74.03 +Bf=416.4 Ne=1.259 Ise=6.734f Ikf=66.78m Xtb=1.5 +Br=.7371 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=3.638p Mjc=.3085 +Vjc=.75 Fc=.5 Cje=4.493p Mje=.2593 Vje=.75 Tr=239.5n +Tf=301.2p Itf=.4 Vtf=4 Xtf=2 Rb=10) * OPTIONS NOMOD NOECHO NOPAGE .END

NODE

VOLTAGE

NODE

VOLTAGE

NODE

VOLTAGE

NODE

VOLTAGE

(1) (5) (9) (13) (97)

4.0991 3.4085 12.6350 9.3299 15.0000

(2) (6) (10) (14) (98)

3.9992 3.3104 11.9280 9.3188 4.0000

(3) (7) (11) (15) (99)

9.3188 1.7930 10.7900 11.4960 4.1000

(4) (8) (12) (16)

9.3299 11.4960 8.6342 12.6350

REFERENCES 1. LTC1562 Data Sheet, p. 18, www.linear.com.

This page intentionally left blank

4

Leverrier’s Algorithm

4.1 NUMERICAL TRANSFER FUNCTION [1] The transfer matrix G is a matrix of output/input transfer functions. It has the dimensions {K M}, or {output input}. The desired numerical transfer function is an element of the transfer matrix G. For example, output 1 / input 2 would be G12. Leverrier’s algorithm finds both. Note that in the following sequence, the symbol tr( ) indicates the trace of a matrix, i.e., the sum of the diagonal elements. General subscripts are given in parentheses, but specific ones are not. That is, FN – 1 is designated F(N – 1). However, F2 would be designated by F2. This is to prevent double subscript sets in later equations. For a given matrix A of dimension {N N}, the general sequence is: I = identity(N) F = (N – 1) = I T(N − 1) =

− tr A ⋅ F ( N − 1) 1

F = (N − 2 ) = A ⋅ F (N − 1) + T(N − 1) ⋅ I T(N − 2 ) =

− tr A ⋅ F ( N − 2 )

F = (N − 3) = A ⋅ F (N − 2 ) + T(N − 2 ) ⋅ I T(N − 3) =

− tr A ⋅ F ( N − 3)

2

3

F1 = A ⋅ F 2 + T2 ⋅ I T1 =

− tr ( A ⋅ F1) N −1

F 0 = A ⋅ F1 + T1 ⋅ I T0 =

− tr ( A ⋅ F 0 ) N

The numerator coefficients are then: Y(N − 1) = D ⋅ F (N − 1) ⋅ B + E ⋅ T(N − 1) Y(N − 2 ) = D ⋅ F (N − 2 ) ⋅ B + E ⋅ T(N − 2 )

Y1 = D ⋅ F1 ⋅ B + E ⋅ T1 Y0 = D ⋅ F 0 ⋅ B + E ⋅ T0

97

98

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The output I / input J transfer function extracted from the {K M} transfer matrix G is then: GI J (s) =

E I J sN + Y ( N − 1)I J s N−1 + Y ( N − 2 )I J s N− 2 + + Y1I J s + Y0 I J sN + T ( N − 1) sN−1 + T ( N − 2 ) sN− 2 + + T1s + T0

A simple example will help clarify the procedure. Let −1 A=0 0

0 −4 −1

0 1 4 , I = 0 0 0

0 1 0

0 0 1

in which N = 3 The trace of A = 5; the trace of I = 3. Sequence is: F2 = I

T2 =

4 − tr ( A ⋅ F 2 ) = 5, F1 = A ⋅ F 2 + T2 ⋅ I = 0 1 0

T1 =

4 − tr ( A ⋅ F1) = 8, F 0 = A ⋅ F1 + T1 ⋅ I = 0 2 0

T0 =

− tr ( A ⋅ F 0 ) =4 3

0 1 −1

0 4 4

0 0 −1

The denominator of GI,J is then D(s) = s3 + T2s2 + T1s + T0 = s3 + 5s2 + 8s + 4 Let the D, B, and E arrays be, with {K M} = {2 2}. −1 D= 0

0 0

1 1 , B = 0 1 1

We compute the numerator of G using:

0 1 1 , E = 0 −1

0 4 5

0 1

Leverrier’s Algorithm

99

5 Y2 = D ⋅ F 2 ⋅ B + E ⋅ T2 = 1

−1 4

9 Y1 = D ⋅ F1 ⋅ B + E ⋅ T1 = 5

−66 2

4 Y0 = D ⋅ F 0 ⋅ B + E ⋅ T0 = 4

−5 −1

The numerator of G is a matrix polynomial: 1 N(s) = Es 3 + Y2s2 + Y1s + Y0 = 0

0 3 5 s + 1 1

−1 2 s 4

9 + 5

−6 4 s+ 2 4

−5 −1

G I,J =

N (s) D (s)

Then:

G1,2 =

(

− s 2 + 6s + 5

)

s 3 + 5s 2 + 8s + 4

and G2,2 is G 2 ,2 =

s 3 + 4 s 2 + 2s − 1 , s 3 + 5s 2 + 8s + 4

etc. Another way to find D(s) is by using eigenvalues: −1 A=0 0

0 −4 −1

0 −2 4 , eigenvals( A) = −2 −1 0

then D(s) = (s + 1)(s + 2)(s + 2) = s3 + 5s2 + 8s + 4 A circuit example is given in Section 4.2.

100

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

4.2 TRANSFER FUNCTION USING LEVERRIER’S ALGORITHM FOR TWIN-T RC NETWORK → Reference:C:\mcadckts\CaNL11\TwinT2.mcd See schematic in Section 2.5. Display A, B, D, and E arrays: −374.53 A = −374.53 −374.53

−187.27 −1136.41 −384.53 D = (0

–1

−187.27 −384.553 −384.53 –1)

374.53 B = 1136.41 384.53

E = (1)

The {N N} identity matrix is obtained from the referenced subprogram: 1 I = 0 0

0 1 0

0 0 1

{K M} = {1 1} here. Step 1 − tr ( A ⋅ F 2 ) T2 = 1895.48 1 Y2 := D·F2·B + E·T2 Y2 = (374.53) F2 := I

T2 :=

Step 2

F1 := A·F2 + T2·I Y1 := D·F1·B + E·T1

− tr ( A ⋅ F1) T1 = 718489.21 2 Y1 = (140274.07)

T1 :=

Step 3

F0 := A·F1 + T1·I Y0 := D·F0·B + E·T0

− tr ( A ⋅ F 0 ) 3 Y0 = (5.27 × 107)

T0 :=

T0 = 5.56 × 107

Leverrier’s Algorithm

101

Transfer function: G (s) :=

E ⋅ s 3 + Y2 ⋅ s2 + Y1 ⋅ s + Y0 s 3 + T2 ⋅ s2 + T1 ⋅ s + T0

Compare the following plot with that of the twin-T network in Section 2.5: Transfer function magnitude

0 −10 dBV

−20 db(G(si)) −30 −40 −50 −60

0

20

40

60

80

100

Fi Freq(Hz)

REFERENCES 1. D.M. Wiberg, Schaum’s Outline Series, State Space and Linear Systems, McGrawHill, 1971, p. 102.

This page intentionally left blank

5

Stability Analysis

5.1 UNITY GAIN DIFFERENTIAL AMPLIFIERS The NDS Method can be used for stability analysis problems. Techniques illustrated are, (1) Α and β slope intersection method, and (2) gain-phase plots of loop gain Αβ. Several examples are contained in this chapter. (In control theory, the symbols G and Η are used for Α and β respectively.) K := 103

u := 10–6

p := 10–12

Meg := 106

Hz := 1

MHz := 106

Compensated unity gain differential amplifier R1

R2 Ein1

R5

R3

11 2 − V−

C3

3 +

V0 1

V+ 4

Ein2 R6

R1 R4 R5 C3

:= := := :=

30·K R2 := 30·K R3 := 100·Meg 10·Meg (R4 internal to opamp) 30·K R6 := 30·K 0.01·u C4 := 5·p (Stray package capacitance)

Beta equivalent circuit (R4 and C4 internal to opamp) Note that Vo becomes the input, or Ein. R2

R1

V1

V0 (Ein) R3

R4

V2

C4

C3 R5

V3 R6

103

104

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

By definition: Beta =

V1 − V3 Ein

The inverse of this is: InvBeta =

Ein V1 − V3

For opamp poles: f1 := 20·Hz rd :=

f2 := 1·MHz

180 π

ω1 := 2·π·f1

ω2 := 2·π·f2

U := 3

1 Y := 3

Two outputs are V1 and V3

99 1 1 RR := 1 3 3

1 0 2 3 0 0

LL := 0

R1 R2 R 3 R 4 R5 R6

GG := 0

2 CC := 1

EE := 0

3 3

C 3 C 4

Ein := (99

1)

One input.

→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2 L i = BF +

ND := 5 i −1 PD

PD := 20

F := 10L

i := 1..ND·PD + 1

s := 2 ⋅ π ⋅ F ⋅ −1

For the opamp: Ao si si 1 + ⋅ 1 + ω1 ω2

Ao := 105.5

Ao1i =

V1i := (cvi)1

V3i := (cvi)2

cvi := D·(si·I – A)–1·B + E

Stability Analysis

105

1 Recall that Y = Vai := V1i – V3i 3 Aold := A (for future reference) This is with the compensation R3 and C3 (sometimes called the “beta killer”) disabled by setting R3 = 100 Meg. To enable it, we now set R3 = 2K, RR3,3 := 2·K, and call the reference template again to get the new A matrix value. → Reference:C:\mcadckts\CaNL11\comm42.mcd Anew := A 1 50000 −1 −50000 Aold = Anew = 6 8 −1.067 × 10 8 2000 −6.689 × 10 1 × 10 cvi := D·(si·I – A)–1·B + E V1i := (cvi)1 V3i := (cvi)2 Vbi := V1i – V3i Net slope of intercept is >20 dB/decade implies unstable (R3 = 100 Meg). Net slope of intercept = 20 dB/decade implies stable (R3 = 2 K). With and without compensation

80 70 60

dBV

50 db(Aoli)

40

−db(Vai)

30

−db(Vbi)

20 10 0 −10 −20

2

3

4

Aol R3 = 100 Meg R3 = 2 K

Li

5

6

7

Log freq(Hz)

Plot Loop Gain as a Gain–Phase Plot: Loop gain is defined as (Aol)(Beta) AB1i := db(Aoli·Vai) AB2i := db(Aoli·Vbi) φi := rd·arg(Aoli·Vai) θi := rd·arg(Aoli·Vbi) φi := if(φi > 0, φi – 360, φi) θi := if(θ > 0, θi – 360, θi) Zero crossover markers: F1 := –192 F2 := –103

106

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Phase margin (R3 = 100 Meg) = 180 + F1 = −12 implies unstable. Phase margin (R3 = 2 K) = 180 + F2 = 77 implies stable. Gain-phase plot

50

F2

Gain (dBV)

F1

AB1i

0

AB2i

−50 −230

−210

−190

−170

−150 φi, θi Phase angle (Deg)

R3 = 100 Meg R3 = 2 K

−130

−110

−90

5.2 STABILITY OF LM158 OPAMP MODEL In this section, the stability of an LM158 opamp model embedded in a feedback circuit is analyzed. Meg := 106

R3

K := 103

U := 106

MHz := 106

Original circuit C1 V3 Rs

R3

0.1 uF

1.13 K

1.13 K R2

V1

R1

Ein 2.26 K

LM158 opamp

Ein

10 K 2 −

3

+

1

Feedback (beta) circuit C1 V3 Rs R3

R2 2.26 K

0.1 uF V1

R1 10 K

(V2) Ein1

X V2

LM158 model

R4 V4

4

Ein

(V2)

10 K

V− V+

Rs

R1

V1

11

p := 1012

0.1 uF V1

2.26 K

V5 C2

1.13 K

Using LMI 58 model C1 V3

R2

V2

N := 109

+ −

R5

EE2

V7

V6 C3

+ −

R6

EE3

V8 C4 EE4

+ −

Stability Analysis

107

R1 := 10·K R2 := 2.26·K R3 := 1.13·K R4 := 99.47·Meg R5 := 10 R6 := 10 C1 := 0.1·u C2 := 80·p C3 := 13.263·n C4 := 7.958·n Rs := 0.01 Ao := 105 U := 8 1 Y= 2 The feedback circuit consists of R1, R2, R3, and C1. The opamp model consists of R4, C2, R5, C3, R6, C4, and VCVSs EE2 through EE4. When analyzing the feedback factor beta, the output V2 becomes an input Ein1. For the opamp model, inverting input V1 becomes a new input Ein1. f1, f2, and f3 are the three pole frequencies (Hz) of the opamp model.

1 f1 : = 2 ⋅ πR 4 ⋅ C2

Ein := (99

1)

99 1 1 RR := 99 5 7 99 5 EE := 7 2

1 1 f2 : = f3 : = 2 ⋅ πR 5 ⋅ C 3 2 ⋅ πR 6 ⋅ C 4

LL := 0 R1 R2 R 3 R 4 R5 R6 Rs

1 0 0 4 6 8 3 0 0 0

4 6 8

0 0 0

GG := 0

3 4 CC := 6 8

1 0 0 0

C1 C2 C 3 C 4

1 1 Ao

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aold := A

Bold := B

Save arrays. New value for C2 C2 := 250·p Insert into CC array: CC2,3 := C2

1.3 log ( f ) = 6.08 6.3

108

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Call reference again with new value of C2: New pole frequency f1:

f1 :=

0.81 log ( f ) = 6.08 6.3

1 2 ⋅ πR 4 ⋅ C2

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Anew := A

Bnew := B

AC Analysis BF := 0

ND := 7

PD := 20

i := 1..ND·PD + 1

i −1 s := 2 ⋅ π ⋅ 10 L ⋅ −1 PD Vai := D·(si·I – Aold)–1·Bold + E Vai := (vai)1 L i = BF +

Vbi := D·(si·I – Anew)–1·Bnew + E

A3i := (vai)2

A4i := (vbi)2

rd :=

180 π

Loop gain: AB1i := A3i·Vai AB2i := A4i·Vai φi := rd·arg(A3i·Vai) αi := rd·arg(A4i·Vai) φi := if(φi > 0, φi – 360, φi) αi := if(αi > 0, αi – 360, αi) Zero crossover markers: F1 := –165

F2 :=–129

Phase margins: PM1 := 180 + F1

PM1 = 15

PM2 := 180 + F2

PM2 = 51

Stability rule of thumb: Phase margin should be greater than 45°. 80

Gain-phase plot of loop gain AB F1

dBV

60 db(AB1i)

40

db(AB2i)

20

F2

0

0 −20 −300

−250 C2 80 pF C2 250 pF

−200

−150 φi, αi Deg

−100

−50

0

Stability Analysis

109 Opamp open loop gain and inverse beta

120 100 80

dBV

db(A4i)

60

db(A3i)

40

−db(Vai)

20 0 −20

0

1

2

3

4

5

6

7

Li

C2 250 pF

Log freq(Hz)

C2 80 pF Inv Beta

Note: Net slope of intercept of Inv Beta with opamp Aol should be 20 dB/dec.

5.3 HIGH-VOLTAGE SHUNT REGULATOR — STABILITY ANALYSIS In this section, the stability analysis of the HV Shunt Regulator presented in Section 3.14 is given. K := 103

nF := 10–9

Hz := 1

MHz := 106

V := 1

Ehv R10

R4 R7 V8

C1

V10 V3

R8 Eref

V7

2

−

3 +

M2

11 V1 R1

V− V+

V2

C2

M1

V3

1 4

R2

V4

R9

V6 R5 V5

R3 R6

R1 R5 R9 C2

:= := := :=

10·K 215·K 1.96·K 4.7·nF

R2 := 10·K R6 := 6878 Ehv := 400

db(x) := 20·log(|x|)

R3 := 15·K R4 := 150·K R7 := 562·K R8 := 14.7·K Eref := 6.2 C1 := 2.7·nF

110

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Calculate poles, zeros, and critical gain points in dBV: T1 := C1·(R7 + R8) T6 := R9·C2

T3 := R8·C1

T2 := C2·(R4 + R9)

Breakpoint (bp) of loop gain 1 (lg1): F1 :=

1 2 ⋅ π ⋅ T1

F1 = 102.2 Hz

LF1 := log(F1)

LF1 = 2.01

LF2 := log(F2)

LF2 = 2.348

LF6 := log(F6)

LF6 = 4.24

First bp of lg2 (see plot marker): F 2 :=

1 2 ⋅ π ⋅ T2

F1 = 222.8 Hz

Second bp of lg2: 1 F6 = 17.3 KHz 2 ⋅ π ⋅ T6 BF := 0 ND := 7 PD := 20 F 6 :=

L i = BF +

i −1 PD

i := 1..ND·PD +1

s := 2 ⋅ π ⋅ 10 L ⋅ −1

Minor loop inverse beta (see the following derivation). s ⋅ T3 1g1i := − db i si ⋅ T1 + 1 Major loop inverse beta s ⋅ T6 + 1 R 4 ⋅ R6 ⋅ 1g 2 i : = – db i si ⋅ T2 + 1 R 3 ⋅ ( R 5 + R 6 ) High-frequency gain of lg1 R7 G1 := db 1 + R8

G1 = 31.87

High-frequency gain of lg2 R 3 ⋅ (R 4 + R9) ⋅ (R5 + R6) G 4 := db R 4 ⋅ R6 ⋅ R9

G4 = 47.96

Stability Analysis

111 Inverse betas & break points

80

LF2

70

LF6

60

G4

dBV

50 lg1i

40

lg2i

30

G1

20 10 0 −10

0

1

Minor loop Major loop

2

3 Li

4

Log freq(Hz)

Note: Net slope of intercept = 20 dB/dec. Opamp DC open loop gain in V/V: Ao := 106 Goa := db(Ao) Goa = 120 Foa := 30·Hz Foa = First opamp breakpoint. ω1 := 2·π·Foa ω2 := 2·π·2·106 (Opamp poles) Ao Ao1i = db 1 + si ⋅ 1 + si ω1 ω 2 Opamp open loop gain: R 3 ⋅ (R5 + R6) IG 2 := db R 4 ⋅ R6 LF 3 := LF 2 + LF 4 : =

G1 − IG 2 20

Goa − G1 + log ( Foa ) 20

IG2 = 10.17

LF3 = 3.43

LF4 = 5.88

5

6

112

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Ao1i lg1i lg2i

Stability intercepts

130 120 110 100 90 80 70 60 50 40 30 20 10 0 −10

LF3

LF4

G4 G1

0

0.5

1

1.5

Opamp Minor loop Major loop

2

2.5

3

3.5 Li

4

4.5

5

5.5

6

6.5

7

Note that at each intercept LF3 and LF4, the net slope is approximately 20 dB/decade, which implies stability. Calculate loop gain GH:

F 7 i :=

si ⋅ R 7 ⋅ C1 + 1 si ⋅ R 8 ⋅ C1

F 8 i :=

1 R 4 ⋅ ( si ⋅ R 9 ⋅ C2 + 1) R 6 ⋅ ⋅ R 3 s i ⋅ C2 ( R 4 + R 9 ) + 1 R 5 + R 6

GHi := db(F7i·F8i) + Ao1i

M1 = 37

− F 7 ⋅ F 8 ⋅ Ao 180 i i PH I := ⋅ arg π 1 + si ⋅ 1 + si ω1 ω 2

Stability Analysis

113 Gain vs. phase

200 M1

Gain

100 GHi 0

−100

0

20

40

60

80

100

phi Deg

Note: phasemargin := M1 phasemargin := 37 Voltage divider R1, R2 not included. Derivation of minor loop gain 1 (lg1) and major loop gain 2 (lg2): R7

C1

Ein = 1V 562 K

2.7 nF R8

lg1 derivation

1V

−

14.7 K

C2

R5

4.7 nF

215 K

Vb

+

lg1 R3

Va

15 K

R4

+

R9

150 K

1.96 K

Ebuﬀ

−

lg2 derivation

Ebuff represents source follower M2. Ig1 is the drain current of M1, For lg1 derivation: Va =

R8 1 R8 + R 7 + sC1

For inverse, use –dBV

=

s ⋅ R 8 ⋅ C1 s ⋅ C1 ⋅ ( R 7 + R 8 ) + 1

Vc

R6

6.878 K

114

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

For lg2 derivation: Ig1 current =

1⋅ V R3

ZL =

R 4 ⋅ ( s ⋅ R 9 ⋅ C2 + 1) s ⋅ C2 ⋅ ( R 4 + R 9 ) + 1

of Ig1 Vb =

ZL 1 R 4 ⋅ ( s ⋅ R 9 ⋅ C2 + 1) = ⋅ R 3 R 3 s ⋅ C2 ⋅ ( R 4 + R 9 ) + 1

Vc =

Vb·R 6 R5 + R6

6

Transient Analysis

6.1 INTRODUCTION One method of transient analysis is based on the following equation: ∆x = Ax + Bu or ∆x = (Ax + Bu)·∆t ∆t Because A and B are already known using the NDS method, the task is to determine ∆t. If ∆t is too large, the solution will not be accurate. If ∆t is excessively large, the solution will not converge. If too small, a longer-than-necessary execution time may be required. The time increment ∆t generally should be less than the smallest time constant in the A matrix. This should be used as a guide in selecting the initial value of ∆t. Some adjustment may be required for circuits with very fast and very slow time constants. A simple circuit is used as the first example. R1

V1

Ein R2

R1 := 20·K

R2 := 40·K

C1

C1 := 0.5·uF

Ein := 4.5

The time constant of this circuit is easily found to be:

Rp := τ := Rp· C1

R1 ⋅ R 2 R1 + R 2

τ = 6.667 ms

To confirm this, KCL at the node V1 gives: Ein − V1 V1 = + iC1 R1 R2 1 Ein 1 iC1 = −V1 ⋅ + + R1 R 2 R1 115

116

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Noting that V1 = vC1 and substituting iC1 = C1 ⋅ dvC1 − vC1 = dt C1

dvC1 dt

Ein 1 1 , ⋅ + + R1 R 2 R1 ⋅ C1

which is in the state space form dx = Ax + Bu dt Then

A := u := Ein

−1 1 1 ⋅ + C1 R1 R 2

A = –150

B = 100

B :=

1 R1 ⋅ C1

u = 4.5

The time constant of A is 1 = 6.667 ms A which is τ as in the preceding text. We then chose ∆t = 1 ms < τ. Using ∆x = (Ax + Bu)⋅∆t we initialize: Vc1 := 0 (can be an initial condition other than zero) ∆Vc1 := (A·Vc1 +B·Ein)·∆t Vc1 = 0.45 Vc2 = ∆Vc1 +Vc1 Vc2 = 0.45 ∆Vc2 := (A·Vc2 +B·Ein)·∆t Vc2 = 0.383 Vc3 = ∆Vc2 +Vc2 Vc3 = 0.832 Combining: Vc2 := (A·Vc1 +B·Ein)·∆t + Vc1 Vc3 := (A·Vc2 +B·Ein)·∆t + Vc2

Vc2 = 0.45 Vc3 = 0.832

Setting the maximum number of iteration to kmax : = 50 and indexing k := 2..kmax, Vck : = (A·Vck-1 +B·Ein)·∆t + Vck-1 The total sweep time is: kmax⋅∆t = 50 ms, which should be sufficient because 5⋅τ = 33.33 ms.

Transient Analysis

117

We plot Vc and compare this to the continuous solution F ( t ) :=

−t Ein ⋅ Rp ⋅ 1 − exp R1 Rp ⋅ C1

t := 0, 0.005·ms..50·ms Widening the span of k to include k = 1 (Vc1 = 0): k := 1..kmax Time plot

Volts

3

Vck

2

F(t) 1

0 0

10

20

30 . k ∆t , t ms ms Time(ms)

40

50

Ein ⋅ Rp =3 R1 Note the lag of Vc behind the continuous time function F(t). We can decrease this lag by decreasing Dt to 0.5 ms and by increasing kmax from 50 to 100 to maintain the same sweep time: The steady-state value is

∆t := 0.5·ms

kmax :=

50 ⋅ ms ∆t

kmax = 100

k := 2..kmax (for computing) Vc1 := 0 Vck := (A·Vck–1 + B·Ein·∆t + Vck–1 k := 1..kmax (for plotting)

118

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Time plot

Volts

3

Vck

2

F(t) 1

0 0

10

20

30

40

50

k . ∆t , t ms ms Time(ms)

Further reduction of ∆t would result in the two plots approaching congruency. The reader is encouraged to select larger values of ∆t and note the deleterious effect on the solution. As will be shown, this method applies irrespective of whether A and B are scalars as in the preceding text or arrays.

6.2 SWITCHED TRANSIENT ANALYSIS A more complicated example is now shown to further illustrate the utility of the method. R1 Ein

V1 Q1

R2

V2

C1

V3

1 R3

R4

2

R1 := 10·K R2 := 10·K R3 := 2·K Qloff := 10·Meg Qlon := 0.5 (Q1 is a CMOS SPST switch.) C1 := 0.1·u

U := 3

1 Y := 2 3

R4 := 10·K

Ein := (99

Analytical Q1off and Q1on time constants: R 3 ⋅ ( R1 + R 2 ) τ1 := R 4 + ⋅ C1 R1 + R 2 + R 3

τ1 = 1.182m

1)

Transient Analysis

119

R2 ⋅ R 3 τ 2 := R 4 + ⋅ C1 R2 + R 3 V3pk :=

τ2 = 1.167m

10 ⋅ R 3 ⋅ R 4 R 3 ⋅ R 4 + ( R1 + R 2 ) ⋅ ( R 3 + R 4 )

99 1 RR := 1 2 3 LL := 0

1 0 2 0 0

R1 Q1off R2 R 3 R 4

EE := 0

CC:= (2

3

V3pk = 0.769

C1)

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Close sw Q1

Boff := B

Doff := D

Eoff := E

RR2,3 := Q1on

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A

Bon := B

Don := D

Eon := E

Compare time constants: t1 :=

1 Aoff

t1 = 1.182m

From above: 1 Aon

τ1= 1.182m

t 2 :=

From above: τ2 = 1.167m

∆t := 0.02·m

Per k max := floor ∆t

t2 = 1.167m

Per := 20·m

kmax = 1000

Ein := 10

Create input pulse from Mathcad’s unit step function φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w, Ein) := Ein·pulse(x – f, w) Eapp(t) := bpf(t, 0.05·Per, 0.9·Per, Ein) k := 2..kmax Initialize: V11 := 0 Switch time: Sw := 0.45·kmax Sw·∆t = 9m

120

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

V1k := if(k < Sw, Aoff·V1k–1·∆t + Boff·Eapp(k·∆t)·∆t + V1k–1, Aon·V1k–1·∆t + Bon·Eapp(k·∆t)·∆t + V1k–1) Vok := if(k < Sw, Doff·V1k + Eoff·Eapp(k·∆t), Don·V1k + Eon·Eapp(k·∆t)) Input & output waveforms

1.5

Sw . ∆t m

1

Volts

(Vok)2 − (Vok)3 (Vok)3 Eapp(k . ∆t)

V3pk

0.5 0

10

–V3pk

–0.5 –1

0

10 k . ∆t m Time(ms)

5 Vc1 V3 (Input pulse)/10

15

20

6.3 N = 2 SWITCHED CIRCUIT TRANSIENT RESPONSE In this section, a circuit with two capacitors (N = 2) with multiple time constants and a synchronously switched inputs is analyzed. K := 103

u := 10–6

Meg := 106

m := 10–3

R1

V1

Ein1 R3

R2 V2 1

C1

R4

V3 C2

Q1 2 Ein2

R1 := 10·K R2 := 10·K R3 := 20·K R4 := 100·K Q1off := 10·Meg Q1on := 0.5 C1 := 0.02·u C2 := 0.5·u U := 3 Y := (1 2 3)T 99 Ein := 98

1 1

LL := 0

GG := 0

EE := 0

Transient Analysis

121

Two inputs. To be changed to +25 V and −10 V later. Switch Q1 OFF 99 1 RR := 2 1 1

R1 R2 Q1off R 3 R 4

1 2 98 3 0

1 CC := 3

C1 C2

0 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Switch Q1 ON

Boff := B

Doff := D

Eoff := E

Save OFF arrays.

RR3,3 := Qlon

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A tau1 : =

Bon := B

Don := D

Eon := E

Save ON arrays.

1 1 1 1 tau 4 : = tau 2 : = tau 3 : = max ( Aoff ) min ( Aoff ) max ( Aon ) min ( Aon )

tau1 := (400

124.9

400

76.9)u

tau4 := 76.9 u

This is the shortest time constant; ∆t must be less than this. Choose ∆t := 50·u

Per1 := 20·m

Per2 := 40·m

Per 2 kmax := floor ∆t

kmax = 800 pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w, Ein) := Ein·pulse(x – f, w) Ein1 := 25 Ein2 := –10 Eapp1(t) := bpf(t, 0.05·Per1, 0.95·Per1, Ein1) Eapp2(t) := bpf(t, 0.4·Per1, 0.95·Per1, Ein2) Eapp1( t ) Eapp( t ) : = Eapp 2( t )

0.95·Per1 := 19m

k := 2..kmax Initialize: 0 V11 := 0

0.5·Per1 = 10m

122

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Switch time: Sw := 0.25·kmax Sw = 200 Sw·∆t = 10m V1k := if(k < Sw, Aoff·V1k–1·∆t + Boff·Eapp(k·∆t)·∆t + V1k–1, Aon·V1k–1·∆t + Bon·Eapp(k·∆t)·∆t + V1k–1) Vok := if(k < Sw, Doff·V1k + Eoff·Eapp(k·∆t), Don·V1k + Eon·Eapp(k·∆t)) 30 25

Sw . ∆t m

20

(Vok)1

15

(Vok)3

10

Eapp(k . ∆t)1

5

Eapp(k . ∆t)2

0 –5 –10 –15

0

5 V1 V3 Ein1 Ein2

10

15

20 k . ∆t m

25

30

35

40

SPICE Verification N=2 Switched Circuit Transient Response *File: n2tran.cir V1 99 0 PWL(0,0 1m,0 1.001m,25 19.99m,25 20m,0) V2 98 0 PWL(0,0 7.99m,0 8m,-10 17.99m,-10 18m,0) R1 99 1 10K R2 1 2 10K R3 1 3 20K R4 1 0 100K * C2 3 0 0.5u C1 1 0 0.02u * * Build separate switch control

Transient Analysis

123

* V3 97 0 PWL(0,0 9.99m,0 10m,+5 47.99m,+5 48m,0) RL 97 0 10K SQ1 2 98 97 0 SMOD .MODEL SMOD VSWITCH(RON=0.5 ROFF=10MEG VON=+5 VOFF=0) .TRAN 0.1m 40m 0 50u .PRINT TRAN V(99) V(98) V(1) V(3) .OPTIONS NOMOD NOECHO NOPAGE .END Tnom := READPRN(“c:\SPICEapps\datfiles\n2tran.txt”) N := rows(Tnom) N = 401 k := 1..N

Spice veriﬁcation 30 25

Volts

Tnomk,2 Tnomk,3

20 15 10

Tnomk,4

5

Tnomk,5

0 –5 –10 –15

0

5

10

15

Ein1 Ein2 V1 V3

20 25 Tnomk,1 m Time(ms)

6.4 COMPARATOR 100-HZ OSCILLATOR K := 103 V := 1

u := 10–6 Hz := 1

Meg := 106

m := 10–3

30

35

40

124

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

LM339 comparator circuit

Redrawn explanatory circuit Ein

C1

2

3 R1 Ein +5V

Vp

Ein R5 +5V

Vn – +

R5 Vn

R4 11 V– V+

1

Vc

C1

R4

Vc

R3

Vp

R1 Ein

1 R2

Q1 2

4

R3 Q1 internal

R2

R1 := 100·K R5 := 3.3·K

R2 := 100·K Q1on := 150

R3 := 100·K R4 := 5.75·K Qloff := 10·Meg C1 := 1.15·u

Switch Q1 is the open-collector (OC) transistor output of an LM339 comparator. Vn is the inverting input, and Vp is the noninverting input to the LM339. Hence, when Vn > Vp, Q1 will be ON (switch closed), and when Vn < Vp, Q1 will be OFF (switch open). When power is applied (Ein = +5 V DC), C1 will charge up to a voltage greater than Vp, closing switch Q1, and then discharging C1 towards a voltage less than Vp, which opens the switch, and the cycle repeats. Hence, the output of the LM339 will go high (Q1 OFF) and low (Q1 ON) at a rate determined by the circuit time constants. With the given, component values the frequency of oscillation is about 100 Hz. From the plot in the following text, the falling edges of Vc are about 10 ms apart, for a period of 100 Hz. Note that max Vce(sat) is given on the LM339 data sheet as 0.25 V. This is simulated by setting the ON resistance of Q1 to 150 Ω. U := 3 LL := 0

Y := (1 2 EE := 0

3)T CC := (1 0 C1) GG := 0 Ein := (99 5)

Note: Vn = V1 = VC1 = minus input to LM339, Vc = V2 = Vcollector, Vp = V3 = plus input to LM339.

Transient Analysis

125

99 3 3 RR := 2 99 2

3 0 2 0 2 1

R1 R2 R3 Q1off R5 R4

with switch Q1 OFF → Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Boff := B Save OFF arrays.

Doff := D

Eoff := E

RR4,3 := Q1on

Repeat with switch Q1 ON.

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A Bon := B Save ON arrays. ∆t := 0.05·m

Don := D

Per := 50·m

Eon := E

Per kmax = floor ∆t

kmax = 100 pulse(x) := φ(x) (φ(x) is Mathcad’s unit step function.) bpf(x, f, Ein) := pulse(x – f) Eapp(t) := bpf(t, 0.005·Per,1)

126

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Program

Comments

Vo := V11 ← 0

Initialize

Vn1 ← 0 Vc1 ← 0 Vp1 ← 0 for k ∈ 2..kmax if Vn k −1 > Vp k −1 V1k ← Aon ⋅ V1k −1 ⋅ ∆t + Bon ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V1k −1

Iterate from 2 to kmax Q1 to switch ON

Vn k ← Don1 ⋅ V1k + Eon1 ⋅ Eapp ( k ⋅ ∆t ) Vc k ← Don 2 ⋅ V1k + Eon 2 ⋅ Eapp ( k ⋅ ∆t ) Vp k ← Don 3 ⋅ V1k + Eon 3 ⋅ Eapp ( k ⋅ ∆t ) otherwise V1k ← Aoff ⋅ V1k −1 ⋅ ∆t + Boff ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V1k −1 Vn k ← Doff1 ⋅ V1k + Eoff1 ⋅ Eapp ( k ⋅ ∆t ) Vc k ← Doff2 ⋅ V1k + Eoff2 ⋅ Eapp ( k ⋅ ∆t ) Vp k ← Doff3 ⋅ V1k + Eoff3 ⋅ Eapp ( k ⋅ ∆t ) Vn Vc Vp

Q1 to swittch OFF

Transient Analysis

127 Oscillator waveforms

5

Volts

4 |(Vo1)k| 3 |(Vo2)k| 2 1 0

0

10

20

Vn Vc

k . ∆t m Time(ms)

30

40

50

Oscillator waveforms

5

Volts

4 |(Vo1)k| 3 |(Vo3)k| 2 1 00

10

20

Vn Vp

k . ∆t m Time(ms)

30

40

6.5 TRANSIENT ANALYSIS OF PULSE TRANSFORMER ns := 10–9

ps := 10–12

MHz := 106

For the schematic, see Section 2. 6. Insert AC circuit analysis file: → Reference:C:\mcadckts\CaNL11\xformerrs5.mcd Y := (1

3

5)T

Insert subprogram file: → Reference:C:\mcadckts\CaNL11\comm42.mcd

50

128

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Time constants of A: 1 max ( A )

tau1 : =

tau 2 : =

Specify time parameters: Choose ∆t < tau, ∆t := 2·ps m := 1..Npp Tper kmax := floor ∆t

1 min ( A )

2.5 tau ps 2.5

Tper := 200·ns

Npp := 200

kmax = 100000

kmax Npp = number of plotting points. rto := floor Npp Create delayed input pulse using Mathcad’s unit step function φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.02·Ter, 0.5·Tper) Vo : = V11 ← ( 0

0

0

0

0

0)

T

for k ∈ 2..kmax V12 ← A ⋅ V11 ⋅ ∆t + B ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V11 Vx1 ← D ⋅ V11 + E ⋅ Eapp ( k ⋅ ∆t ) V11 ← V12 tx ←

k rto

vo tx ← Vx1 if tx = floor ( tx ) vo

Volts

Delayed input pulse 1.2 1 0.8 Eapp(m. ∆t ⋅rto) 0.6 0.4 0.2 0 −0.2

0

50

100 m. ∆t ⋅rto n Time(ns)

150

200

Transient Analysis

129 Output at node Y

15

Volts

(Vom)1 (Vom)2

10 5

(Vom)3 0 –5

0

Length(Vo) = 200

25

50

75

100 125 m. ∆t⋅rto ns

V1 V3 V5

Time(ns)

Npp = 200

1 Y := 3 5

150

175

200

Note the distortion on V3 and V5. Because the bandwidth is approximately 10 MHz (see Section 2.6), the rise or fall times of the input pulse should be greater than

Tr :=

ln ( 3) π ⋅ 10 ⋅ MHz

Tr = 34.97ns

The rise or fall time used here is 10 ps. SPICE Verification TRANSFORMER PULSE RESPONSE * File: xformer_tran.cir VEin 99 0 PWL(0,0 4ns,0 4.012ns,10 104.012ns,10 104.022ns,0) * 10ps rise & fall time; 100ns PW * 4.012ns - 4ns = 0.012ns = 12ps; 10% to 90% = 10ps * R1 99 1 10 R2 1 2 1.5 R3 3 0 20K

130

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R4 3 4 1.5 R5 5 0 1K R6 1 6 0.5 R7 3 7 1 * C1 1 0 20pF C2 6 5 5pF C3 5 0 20pF * L1 2 3 1uH L2 7 0 2mH L3 4 5 1uH * .TRAN 1ns 200ns 0ns 2ps .PRINT TRAN V(99) V(1) V(3) V(5) .OPTIONS ITL5=0 .OPTIONS NOECHO NOPAGE NOMOD .END Tnom := READPRN(“c:\SPICEapps\datfiles\xformer_tran.txt”) N := rows(Tnom) N = 201 k := 1..N Spice veriﬁcation

15

Volts

Tnomk,3 Tnomk,4

10 5

Tnomk,5 0 –5

0

50 V1 V3 V5

100 Tnomk,1 ns Time(ns)

150

200

Transient Analysis

131

6.6 PASSIVE RCL CIRCUIT TRANSIENT ANALYSIS The same circuit was used in Section 2.1 (Introduction). L3 R1

V1

C1

R2

V2

V3

Ein

R1 := 10 C1 := 0.1·u

R2 := 100 C2 := C1

99 1 RR := 2 3

1 2 3 0

Ein := (99

1)

R1 R4 R2 R 3

C2

R3

R4

L4

R3 := 50·K R4 := 10·K L3 := 2533.03·u L4 := 25.3303·u 1 CC := 3

EE := 0

2 0

GG := 0

C1 C2

1 LL := 3

U := 3

L 3 L 4

2 0

Y := (1

2

3)T

→ Reference:C:\mcadckts\CaNL11\comm42.mcd 1 = 25.33 u max ( A )

1 = 0.1 u min ( A )

Select ∆t as: ∆t := 0.02·u Set period: Tper := 100·u

Tper kmax := floor ∆t

kmax = 5000

Create delayed input pulse as before: pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Pulse width = Tper (0.5) = 50 u

Eapp(t) := bpf(t, 0.05·Tper, 0.5·Tper)

Instead of looking at the output voltage nodes Y, we have the option of looking at the capacitor voltages and inductor currents using the following seeded iteration method. V1 is the voltage across C1, V2 on C2, I3 is the current in L3, and I4 in L4.

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

k := 2..kmax Initialize: V11 0 V21 0 := I31 0 I4 0 1 Iterate: V1k V1k −1 V1k −1 V2 k V2 k −1 V2 k −1 := A ⋅ ⋅ ∆t + B ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + I3k I3k −1 I3k −1 I4 I4 I4 k k −1 k −1 Output plots: Input pulse and transients on C1 & C2

1.2 0.8 V1k Volts

132

Eapp(k . ∆t) 5 . V2k

0.4 0 –0.4 –0.8

0

20

V1 Input pulse 5 x V2

V2 is scaled by 5

40

60

k . ∆t u Time(us)

80

100

Transient Analysis

133 Transient currents thru L3 & L4

15

Current (mA)

12.5 10

I3k

7.5

m

5

I4k

2.5

m

0 –2.5 –5

0

20

40

I3 I4

60

80

100

k . ∆t u Time(us)

6.7 MATHCAD’S DIFFERENTIAL EQUATION SOLVERS Consider passive RCL circuits (compare with the NDS method). For schematic and component values, see Section 6.6. → Reference:C:\mcadckts\CaNL11\LCtran.mcd Transient Analysis Using rkfixed or Rkadapt Functions Only step functions can be used. Pulse, ramp, and triangular input waveshapes require use of the NDS transient analysis method. Set time period T as: T := 100·u Set maximum number of time points: kmax := 200 Initialize x and form the {N 1}array D(t,x) from elements of the A and B arrays obtained from comm42.mcd. 0 0 x := 0 0

A1,1x1 + A1,2 ⋅ x 2 + A1,3 ⋅ x 3 + A1,4 ⋅ x 4 + B1 A 2,1x1 + A 2,2 ⋅ x 2 + A 2,3 ⋅ x 3 + A 2,4 ⋅ x 4 + B2 D ( t, x ) : = A 3,1x1 + A 3,2 ⋅ x 2 + A 3,3 ⋅ x 3 + A 3,4 ⋅ x 4 + B3 A x + A ⋅ x + A ⋅ x + A ⋅ x + B 4 ,1 1 4 ,2 2 4 ,3 3 4 ,4 4 4

134

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Call rkfixed: Z := rkfixed(x, 0, T, kmax, D) “rkfixed” uses a constant internally calculated ∆t. The Mathcad ordinary differential equation (ODE) solver “Rkadapt” uses a variable ∆t that can be faster because ∆t is large for slowly-varying outputs and small for fast-varying outputs. It is called in the same manner as “rkfixed.” Z : = Rkadapt(x, 0, T, kmax, D)

n := 1..kmax

(Note: To verify identical outputs with rkfixed and Rkadapt, right-click on Z statement, and then click “Disable Evaluation.” A black square will appear denoting disabled. Then compare with the following plots.) C1 & C2 voltage waveforms 1.2

Volts

0.8 Zn,2

0.4

5 . Zn,3

0 −0.4 −0.8

0

20

40

60

80

100

Zn,1 u Time(us)

Vc1 Vc2

L3 & L4 inductor current

15

Current (mA)

12.5 Zn,4 mA Zn,5 mA

10 7.5 5 2.5 0 −2.5 −5

0

20 L3 L4

40

60 Zn,1 u Time(us)

80

100

Transient Analysis

135

Stiff ODEs can be defined as a large disparity between absolute minimum and maximum values of the elements of the A matrix, i.e., very slow and very fast time constants in the circuit (the slow ones are “stiff”). This circuit is not stiff, but the pulse transformer model given earlier is, and the function rkfixed did not provide the correct output. For stiff circuits, use “Stiffb” as follows: initialize and form the {N N+1} Jacobian array function J(t,x) using the elements from the A matrix: 0 0 x := 0 0

0 0 J ( t, x ) : = 0 0

A1,1

A1,2

A1,3

A 2,1

A 2 ,2

A 2,3

A 3,1

A 3,2

A 3,3

A 4 ,1

A 4 ,2

A 4 ,3

A1,4 A 2,4 A 3,4 A 4 ,4

Call the function: Z := Stiffb(x, 0, T, kmax, D, J) Same output: Compare these step input waveforms with the plots in Section 6.6. C1 & C2 voltage waveforms

1.2

Volts

0.8 0.4

Zn,2 5 . Zn,3

0 −0.4 −0.8 0

20

40

60

80

100

Zn,1 u Time(us)

6.8 A MATHEMATICAL PULSE WIDTH MODULATOR (PWM) us := 10–6

KHz := 103

This PWM will be used as the switching function for the power supply presented in Section 6.9.

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

User inputs: Fsw := 50·KHz

Nper := 4 (number of periods)

Du := 0.5 (duty cycle)

Per :=

1 Fsw

Per = 20us

Nper ⋅ Per + 0.5 kmax : = floor ∆t

∆t := 0.1·us

kmax = 800

(1 − Du ) ⋅ kmax Du ⋅ kmax K2 : = floor + 0.5 K1 : = floor + 0.5 Nper Nper K1 = 100 K2 = 100 kper := K1 + K2 kper = 200 po : = c ← 1 p1 ← 1 for k ∈ 2..kmax p k ← 1 if k ≥ 1 + ( c − 1) ⋅ kper ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← 0.05 otherwise c ← c + 1 if k ≥ c ⋅ kper p k := 1..kmax PWM output 1 Switch on/oﬀ

136

pok

Du = 0.25

0.5 0

0

10

20

30

40 50 k . ∆t us Time(us)

60

70

80

Transient Analysis

137 PWM output

Switch on/oﬀ

1

pok

0.5 0

0

10

20

30

40 50 k ⋅ ∆t us Time(us)

60

70

80

Du = 0.5

6.9 SWITCHING POWER SUPPLY OUTPUT STAGE — BUCK REGULATOR This section analyses the turn-on (start-up) transient of a switched-mode power supply. us := 10–6 ms := 10–3

uF := 10–6 mV := 10–3

uH := 10–6 Meg := 106 3 KHz := 10

Sw1 represents the switch internal to the pulse width modulator (PWM). Sw2 represents the flywheel diode. When Sw1 is ON, Sw2 will be OFF, and vice versa. This section utilizes the Pulse Width Modulator (PWM) of Section 6.8. Ein

1

Sw1

2

V1

R1

V2

L1

1

R2

−

Sw2 2

V3 R3 V4

+ C1

R1 := 0.3 R2 := 0.085 R3 := 38 L1 := 20·uH U := 4 Y := 3

C1 := 47·uF

User inputs:

Fsw := 50·KHz

Nper := 20

Du := 0.5 (50% duty cycle)

Per :=

1 Fsw

Per = 20us

138

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

∆t = 1·us

Nper ⋅ Per kmax : = floor + 0.5 ∆t

kmax = 400

Ein := (99

1)

(1 − Du ) ⋅ kmax K1 := floor + 0 Nper

Du ⋅ kmax K2 : = floor + 0.5 Nper kper := K1 + K2 Switch ON/OFF resistances: Q1on := 1

Q1off := 10·Meg

99 1 RR := 1 3 3

1

EE := 0

0 2 4 0

Q1on Q 2 off R1 R 2 R 3

Q2on := 1

CC := (4

0

Q2off := 10·Meg

C1)

LL := (2

3

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A

B := B

Don := D

Eon := E

Change switch positions: RR1,3 := Q1off

RR2,3 := Q2on

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A

Boff := B

Doff := D

Eoff := E

Ein := 15

L1)

Transient Analysis

139

Vo : = c ← 1 0 Vc1 ← 0 Vo1 ← 0 p1 ← 1 for k ∈ 2..kmax p k ← 5 if k ≥ kper ⋅ ( c − 1) + 1 ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← 0 otherwise c ← c + 1 if k ≥ c ⋅ kper if p k = 5 Vc k ← Aon ⋅ Vc k −1 ⋅ ∆t + Bon ⋅ Ein ⋅ ∆t + Vc k −1 Vo k ← Don ⋅ Vc k + Eon ⋅ Ein if p k = 0 Vc k ← Aoff ⋅ Vc k −1 ⋅ ∆t + Boff ⋅ Ein ⋅ ∆t + Vc k −1 Vo k ← Doff ⋅ Vc k + Eoff ⋅ Ein Vo p Pulse height is set to 5 V, see on the following plot. K := 1..kmax

M1 := Ein·Du

M1 = 7.5

Theoretical output = M1 = input times duty cycle.

140

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad 10 M1

|(Vo1)k| (Vo2)k

5

0

0

50

100

150

200 k . ∆t us

250

300

350

400

M3 := 7.42 M2 := 7.08 Ripple amplitude M3 – M2 = 340 mV 7.5

|(Vo1)k| (Vo2)k

M3

7.25 M2 7 300

320

340

360

380

400

k ⋅∆t us

6.10 STATE SPACE AVERAGING State Space Averaging was developed by Dr. R.D. Middlebrook of the California Institute of Technology in the early 1980’s. The concept itself is not difficult, but in those days the difficult part was the amount of algebra one had to resort to in obtaining the state space arrays. (See Section 1.1.1., Introduction, and Section 2.2). The NDS method now provides a painless method of obtaining the state space arrays, A, B, D, & E, greatly simplifying the process of State Space Averaging, as will be seen in this section. uF := 10–6 mV := 10–3 C1 := 47·uF

uH := 10–6 Meg := 106 us := 10–6 V := 1 R1 := 0.3 R2 := 0.085 L1 := 430·uH U := 6 Y := 6

V99 1

2

V1

Ein1 Sw1

Vs

R1

V2

+ −

+

V98

L1

V6

1 R2

Sw2 Ein2

V4

ms := 10–3 R3 := 38

V3

2

C1

−

− +

+

Vf

R3 V5

Transient Analysis

141

User inputs: 15 1

99 Ein := 98

Du := 0.63

Switch ON/OFF resistances: Q1on := 0.001 99 2 RR := 2 6 6 GG := 0

Q1off := 10·Meg

1 3 4 5 0

Q1on Q 2 off R1 R 2 R 3

Vs := 0.1

Q2on := 0.001

CC := (5

0

C1)

1 EE := 3

Vf := 0.7

Q2off := 10·Meg

LL := (4

2 0

98 0

0 98

6

L1)

Vs Vf

Vs is switch drop (e.g., Vcesat) Vf is diode forward drop. → Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A

Bon := B

Don := D

Eon := E

Change switch positions: RR1,3 := Q1off

RR2,3 := Q2on

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A

Boff := B

Doff := D

Eoff := E

Averaging the arrays with duty cycle Du: A := Du·Aon + (1 – Du)·Aoff D := Du·Don + (1 – Du)·Doff

B := Du·Bon + (1 – Du)·Boff E := Du·Eon + (1 – Du)·Eoff

Multiplying the state space arrays by the duty cycle (Du) and (1 – Du) as above, is the essence of the State Space Averaging concept. DC Analysis

X := –A–1·B

9.06 X= 0.24

vC1 i L1

Vodc := D·X

Vodc = 9.056V

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Theoretical no-loss output: Vt := Ein1,2·Du

Vt = 9.45V

AC Analysis BF := 2

ND := 2

i −1 PD Voi := db(cvi) L i := BF +

PD := 40

i := 1..ND·PD + 1

s := 2 ⋅ π ⋅ 10 L ⋅ −1

cvi := D·(si·I – A)–1·B + E

M3 := db(Vodc) DC & AC buck converter output y/u

40 30

M3

20 dBV

142

Voi

10 0 −10 −20

2

2.5

3 Li

3.5

4

Log freq(Hz)

Compare results with conventional state space methods [1] [2]: R2 W := −R 3 Ein1,2 u : = Vs Vf

B1 := C·S1·U B2 := C·S2·u

1 1

−1 Q := 0

C1 P := 0 15 u = 0.1 0.7

0 L1

− R1 − ( R1 + R 3)

1 S1 := 1

C := (W·P)–1

0 S2 := 0

0 0

−1 −1

A1 := C·C

−1 −1

A2 := A1

Compare arrays from conventional and NDS methods:

0 0

Transient Analysis

143

As := Du·A1 + (1 – Du)·A2 −558.66 As = −2320.39

Bs := Du·B1 + (1 – Du)·B2 −558.66 A= −2320.39

21229.11 −894.91

1.04 × 10 −12 Bs = 21227.91

21229.11 −897.23

0 B= 21227.91

6.11 SIMPLE TRIANGULAR WAVEFORM GENERATOR This section shows the implementation of a simple triangular wave generator that can be used as an input for transient analysis of other circuits. This analysis uses the PWM given in Section 6.8. K := 103

uF := 10–6

us := 10–6

Meg := 106

ms := 10–3

Hz := 1

C1 V2 Ein1

Ein2

2 2

1

V1 R1

11 2 − V−

1

3 +

V3 1

V+ 4

R1 := 10·K C1 := 0.05·uF U := 3 Y := 3 CC := (2 GG := 0 EE := (3 0 0 2 106) LL := 0

3

C1)

Switch is a SPDT CMOS type.

Fsw := 500·Hz ∆t := 5·us 99 Ein := 98

Du := 0.5

Nper := 5

Per :=

Nper ⋅ Per kmax : = floor + 0.5 ∆t 1 −1

1 Fsw

Per = 2ms

kmax = 2000

Du ⋅ kmax K2 : = floor + 0.5 Nper

(1 − Du ) ⋅ kmax K1 := floor + 0 Nper

kper := K1 + K2

Switch ON/OFF resistances: Q1on := 50

Q1off := 10·Meg

kmax·∆t = 10 ms

Einampl := 5

144

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 RR := 99 98

2 1 1

R1 Q1on Q1off

→ Reference:C:\mcadckts\CanL11\comm42.mcd Aon := A

Bon := B

Don := D

Eon := E

Bon = (1990)

Change switch positions: RR2,3 := Q1off

RR3,3 := Q1on

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A

Boff := B

Doff := D

Eoff := E

Boff = (–1990)

Vo : = c ← 1 Vc1 ← 0 Vo1 ← 0 p1 ← 1 Hi ← 4.8 Lo ← 0.2 for k ∈ 2..kmaax p k ← Hi if k ≥ kper ⋅ ( c − 1) + 1 ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← Lo otherwise c ← c + 1 if k ≥ c ⋅ kper Vc k ← Aon ⋅ Vc k −1 ⋅ ∆t + Bon ⋅ Einampl ⋅ ∆t + Vc k −1 if p k = Hi Vc k ← Aoff ⋅ Vc k −1 ⋅ ∆t + Boff ⋅ Einampl ⋅ ∆t + Vc k −1 if p k = Lo Vc p k := 1..kmax (switch position shown for reference)

Transient Analysis

145 Output at node Y

Volts

10 |(Vo1)k|

5

(Vo2)k

0

1

0

2

3

4

5 6 . k ∆t ms Time(ms)

7

8

9

10

6.12 QUADRATURE OSCILLATOR This section shows how the NDS transient analysis method can be used to analyze oscillators. Since there is no independent inputs in oscillator circuits, we must provide non-zero initial voltage conditions on the capacitors. This is illustrated below. K := 103

Hz := 1

nF := 10–9

us := 10–6

ms := 10–3

C1 R1 V1

2 − 3 +

11 V−

V2 1

V+ 4

R2 V3

3

C2

2 R3

V5

+ −

4 V+

1

V− 11

V4 C3

V4

R1 := 10·K

R2 := R1

4 Y := 4 RR := 2 0

C3 := C1

U := 5

Ao := 106

GG := 0

2 EE := 4

0 0

R3 := R1

0 3

LL := 0 1 5

Ao Ao

C1 := 1 3 5

Ein := (99

100 ⋅ nF 2⋅π R1 R 2 R 3

C2 := C1 1 CC := 3 4

2 0 5

C1 C2 C 3

0) Ein is a dummy variable here.

146

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\mcadckts\CaNL11\comm42.mcd 0 B = 0 0

D = (0

1

1)

E = (0)

Because there is no independent input, B is a null array. tau1 : =

1 max ( A )

V11 1 V21 : = 1 V3 1 1

tau 2 : =

1 min ( A )

159.16 tau = us 159.15

Initial capacitor voltages = 1 V.

∆t := 5·us

kmax := 500

V1k V1k −1 V1k −1 V2 k : = A ⋅ V2 k −1 ⋅ ∆t + B ⋅ ∆t + V2 k −1 V3 V3 V3 k k −1 k −1

k := 2..kmax

V1k Vo k := D ⋅ V2 k V3 k

Per := kmax·∆t

Per = 2.5 ms

Capacitor voltages 4

Volts

V1k V2k V3k

2 0 −2 −4

0

500

V1 V2 V3

1000

1500 k ⋅ ∆t us Time(us)

2000

2500

Transient Analysis

147

All values are initialized at 1 V as before. M1 := 690

M2 := 1690

F := M2 – M1

F = 1000Hz

Output at node Y 5

Volts

M1 Vok

M2

0

−5

0

500

1000

1500

2000

2500

k⋅ ∆t us Time(us)

Verification of A matrix using algebraic method

1 W := 0 0

0 1 0

0 0 1

0 −1 Q := R2 0

1 R1 −1 R2 1 R3

1 R1 0 0

C1 P := diag C2 C 3

As := (W·P)–1·Q 0 As = −6283.185 0 −0.006 A = −6283.179 0 eigenvals ( A ) Le := 2⋅π

6283.185 −6283.185 6283.185 6283.179 −6283.185 6283.179

6283.185 0 0 6283.179 0 −0.006

−0 + 1000 i Le = −0 − 1000 i −1000

|Le1| = 1000

Eigenvalues indicate the frequency of oscillation (triple pole at 1000 Hz).

148

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

6.13 WEIN BRIDGE OSCILLATOR This section shows one more example of oscillator transient analysis using the NDS method. K := 103

nF := 10–9

KHz := 103

us := 10–6

R5

R6

V1

11 2 − V− + V+

3 V2

C4 := 10·nF

EE := (4

0

R6 := 20·K R1 :=

2

1

V3 R1

R2

ms := 10–3

1 2 ⋅ π ⋅ fo ⋅ C 3

106)

4

C3

C4

R5 := 10·K

V4 1

fo := 10·KHz C3 := 10·nF

R2 := R1

1 4 RR := 4 2

LL := 00

GG := 0

R 5 R 6 R1 R 2

0 1 3 0

3 2 C 3 CC := U := 4 Y := 4 2 0 C 4 (Ein is a dummy variable) Ein := (99 0) → Reference:C:\mcadckts\CaNL11\comm42.mcd −62831.9 A= −62831.9

125663.1 62831.3

0 B= 0

D = (0

3) E = (0)

No independent input, B = 0. ∆t := 0.01·us Per := 500·us

kmax :=

Per ∆t

kmax = 50000

k := 2..kmax There is no independent input; hence, an initial condition voltage to start the oscillation must be given to one or both capacitors.

Transient Analysis

V11 := (1

149

1)T

V1k := A·V1k–1·∆t + V1k–1 1 = 100 us 10 ⋅ KHz

Vok := D·V1k

Volts

Output at node Y

Vok

4 3 2 1 0 −1 −2 −3 −4

0

50

100

150

200

250

300

350

400

450

500

k⋅ ∆t us Time(us)

Verification of A matrix (assumes ideal opamp):

1 W := R1

−1 0

0 Q := −1

1 R2 R6 R5

C3 P := diag C 4

As := (W·P)–1·Q −62831.9 As = −62831.9

125663.7 62831.9

−62831.9 A= −62831.9

125663.1 62831.3

The oscillation frequency is the geometric mean of the two eigenvalues:

Le := eigevals(A)

−0.283 + 62831.853i Le = −0.283 − 62831.853i

fo :=

Le1 ⋅ Le 2 2⋅π

fl = 10KHz

REFERENCES 1. R.D. Middlebrook, et al., Using Small Computers to Model and Measure Magnitude and Phase of Regulator Transfer Functions and Loop Gain, Advances in SwitchedMode Power Conversion, Vols I & II, TESLACo, 1983. 2. R. Boyd, State Space Averaging with a Pocket Calculator, Proceedings of High Frequency Power Conversion Conference, Santa Clara, CA, 1990, p. 283.

This page intentionally left blank

7

DC Circuit Analysis

DC analysis has been demonstrated in the introductory RCL circuit (see Section 2.1). What follows are DC analyses that will further illustrate how to use the NDS method.

7.1 RESISTANCE TEMPERATURE DETECTOR (RTD) CIRCUIT R8 Eref

V6

R9

11 2 − V− 3 +

Eref

V7

R2

R1

V+

1 4

R3

V1 R4 V3 RT V2 R5 R6

V4

11 2 − V− 3 +

V5 1

V+ 4

R7

Eref

R1 := 4.53 R2 := 34.8 R3 := 132 R4 := 9.09 R7 := 27.4 R8 := 20 R9 := 20 RT := 1.915 Eref := 5

R5 := 9.09

R6 := 4.53

Values in kohms: Opamp open loop gain: Ao := 106 RTD value (RT) varies from 1 K (Vo is approximately –5 V at 0°C) to 2 K (Vo is approximately +5 V at +260°C).

151

152

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

7 99 3 1 2 RR := 99 4 99 6 1 U := 7

R1 R2 R 3 R 4 R5 R6 R 7 R8 R9 RT

1 3 5 3 4 2 0 6 7 2

Y := 5

7 EE := 5

GG := 0

0 0

Ein := (99

0 4

Ao Ao

6 3

Eref)

Note: For DC analysis, CC and LL component arrays are not required. Hence, only six inputs, RR, EE, U, Y, GG, and Ein, are now required for the subprogram dccomm42.mcd. Get A1 and B2 DC arrays, and solve for node voltages Vn. → Reference:C:\mcadckts\CaNL11\comm42.mcd Vn :=1solve(A1, B2) V1

(

Vn T = −0.535

V2

V3

1.07

0.803

Vo = 4.326

Vo := VnY

V4

V5

V6

V7

0.803

4.326

5 × 10 −6

−5

)

Y=5

Note that nodes V3 (Vn3) and V4 (Vn4) are equal owing to the opamp, and that node V6 is approximately zero as expected.

7.2 AN UNDERGRADUATE EE TEXTBOOK PROBLEM Unit suffixes: V := 1

Amps := 1

All four types of controlled sources: VCVS, CCVS, CCCS, VCCS. R7

EE1

Ein

V1

+ −

V2

EE2

V3

+ −

V4 R3

V6

R4 R5

+

GG1

+

−

−

R6

R1 := 2 R7 := 1

R2

V5

R2 := 2 R3 := 4 Ein := (99 24.5)

R4 := 3

R5 := 6

R6 := 2

GG2

R1

DC Circuit Analysis

153

The controlled source equations are as follows:

EE1 = (VCVS)

EE2 = 8.la (CCVS)

Ia =

V6 R1

GG1 := 6.la (CCCS)

GG2 = 2·V6 (VCCS)

7.2.1 MATRIX SOLUTION TO DEMONSTRATE NDS METHOD

THE

UTILITY

OF THE

Igg1 is the current of GG1, Igg2 is GG2 current. Note column headers for A. V1

1 R5 A :=

+

1 R6

V2 +

1

1

R7

R4

V3 −

1 R4

−1

−1

1

R5

R4

R4

0

0

0

+ +

V4 1

R5

0

1 0

0

1

−1 R3

1

−1

−1

R3

R3

R1

0

0

0

0

1

1

−1

0

R3

0

1

0

−1

0

0

0

0

−

Igg1 Igg 2

0

1

R2 0

V6

R5

0

0

0

V5

1 + R1

0

R2 1

−8

0

0

R1

0

−3

9

−6

1

R1 0

Ein1,2 R7 0 0 B := 0 0 0 0 0 V1 Vn T = (14.50

0

0

0

0

−2

0

Vn := 1solve(A, B)

V2

V3

V4

V5

V6

13.00

8.00

6.00

1.00

0.50

Igg1 1.50

Igg 2 1.00 )

0 −1 0 0 0 0 1 0

154

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Using the NDS method: 1 EE := 3

2

6

0

4

6

0

6 5 4 RR := 2 1 1 99

3 8 R1

R1 R2 R 3 R 4 R5 R6 R 7

0 6 5 3 3 0 1

3 GG := 5

0

6

0

0

6

0

6 R1 2

U := 6

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Vdc := 1solve(A1, B2) V1 VDC T = (14.5 Igg1 := Vdc7

V2

V3

V4

V5

13.0

8.0

6.0

1.0

Igg2 := Vdc8

V6

Igg1 Igg 2

0.5

Igg1 = 1.5 Amps

1.0 )

1.5

Igg2 = 1 Amps

7.3 DC TEST CIRCUIT This section exercised the NDS method using a DC circuit with multiple inputs and four VCVS’s and three VCCS’s embedded in a resistive network. The solutions are then compared to a SPICE simulation. K := 103

mA := 10–3 R12

V10 R15 V11

Ein4 (96) GG3

EE4 + −

R1 Ein1 (99)

Ein3 (97)

−

R2

V2

− +

EE3

R13

V14 +

V1

V4 R6

R17

R16

V13

R5

V5

− +

R9

R7

V12

GG1 V3 R3

GG2

V6 + −

EE2

R4

V9 +

Ein2 (98)

−

V7 R11 V8 EE1

+ −

R14

DC Circuit Analysis

155

R1 := 1·K R2 := R1 R3 := R1 R4 := R1 R5 := R1 R6 := R1 R7 := R1 R9 := R1 R11 := R1 R12 := R1 R13 := R1 R14 := R1

R15 := R1

R16 := R1 U := 14

99 2 3 9 5 4 3 RR := 2 7 96 4 12 10 13 5

1 3 9 98 4 97 0 6 8 10 12 0 11 0 14

R1 R2 R3 R 4 R5 R6 R7 R9 R111 R12 R13 R14 R15 R16 R17

14 GG : = 7 13

3 9 10

12 3 96

R17 := R1

8 6 EE := 2 5

0 0 0

0 0 1 11

0.02 0.04 0.01

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Vn := 1solve(A1,B2) p := 1..U Vndsp := Vnp See SPICE listing in the following section.

99 98 EIN := 97 96

4 3 12 4

0 4 4 0

5 −3 8 13

10 2 4 −2

156

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

NDS 2.8613 −9.2842 −2.8539 6.0727 7.1818 −17.8532 174.8829 Vnds p = 60.7273 −60.0048 81.1636 19.3273 3.0364 −130.0000 −53.5455

SPICE 2.8613 −92842 −28539 6.0727 7.1818 −17.8530 174.8800 Vsp : = 60.7270 −60.0050 81.1640 19.3270 3.0364 −130.0000 −53.5450

Vnds −1 pce := Vsp

Percent error −0.001 −0 −0 0 0 0.001 0.002 pce = 0 −0 −0 0.001 −0.001 0 0.001 The last three entries (not shown) in Vn are the currents through GG1, GG2, and GG3, respectively. Igg1 := Vn15 Igg2 := Vn16 Igg3 := Vn17

Igg1 = 60.73 mA Igg2 = –114.16 mA Igg3 = 130 mA

DC Circuit Analysis

SPICE Comparison Testdc4a VEin1 99 0 DC 5 VEin2 98 0 DC -3 VEin3 97 0 DC 8 VEin4 96 0 DC 13 R1 99 1 1K R2 2 3 1K R3 3 9 1K R4 9 98 1K R5 5 4 1K R6 4 97 1K R7 3 0 1K R9 2 6 1K R11 7 8 1K R12 96 10 1K R13 4 12 1K R14 12 0 1K R15 10 11 1K R16 13 0 1K R17 5 14 1K * EE1 8 0 4 0 10 EE2 6 0 3 4 2 EE3 2 1 12 4 4 EE4 5 11 4 0 -2 * GG1 14 3 12 0 0.02 GG2 7 9 3 0 0.04 GG3 13 10 96 0 0.01 *

157

158

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

.OPTIONS NOMOD NOPAGE NOECHO .END **** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE (1) 2.8613 (2) -9.2842 (3) -2.8539 (4) 6.0727 (5)

7.1818

(6)

-17.8530

(9)

-60.0050

(10)

81.1640

(11)

(13) -130.0000

(14)

-53.5450

(96)

(98)

(99)

5.0000

-3.0000

(7) 174.8800

(8)

60.7270

19.3270

(12)

3.0364

13.0000

(97)

8.0000

VOLTAGE SOURCE CURRENTS NAME

CURRENT

VEin1

-2.139E-03

VEin2

-5.700E-02

VEin3

-1.927E-03

VEin4

6.816E-02

7.4 STACKING VCVS’s AND PARALLELING VCCS’s This DC circuit shows that VCCS’s can be paralleled and VCVS’s can be connected in series (stacked). K := 103

mA := 10–3 R1 Ein1

V1 + −

GG2

R2

V2

Ein2

GG1 R4 −

+

R5 V3

+ −

V4

+ −

R1 := 1·K

R2 := R1

R3 := R1

R3

R4 := R1

EE1 EE2

R5 := R1

U := 4

DC Circuit Analysis

99 1 RR := 2 1 2 1 GG : 1

0 0

159

1 2 98 0 3 2 3

0 0

R1 R2 R 3 R 4 R 5 0.1 0.2

3 EE : = 4

4 0

2 1

0 0

2 3

99 Ein : 98

2 −3

→ Reference:C:\mcadckts\CaNL11\comm42.mcd

Vn := A1–1·B2

0.5768 −06930 0.3444 Vn = 1.7303 −0.0693 0.0689

Igg1 is the current in GG1, and Igg2, the current in GG2. Igg1 := Vn5

Igg2 := Vn6

−69.30 Igg = mA 68.87

7.5 DC VOLTAGE SWEEP (RTD CIRCUIT) For the schematic and component values, see Section 7.1. (Get circuit data from Section 7.1.) → Reference:C:\mcadckts\CaNL11\dctrd.mcd Ein := (99 1) Reset Ein to 1 V for new inputs u: → Reference:C:\mcadckts\CaNL11\comm42.mcd Sweep the DC input (always initialized at 1 V as mentioned earlier) from 4.8 V to 5.2 V in 0.1V increments:

160

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

u : = for j ∈1..5 u1, j ← 4.7 +

j 10

u Vn := A1–1·B2·u

k := 1..cols(u)

Display node Y: Y=5 Input 4.8 4.9 u T = 5.0 5.1 5.2 Output

Vn Y,k

4.153 4.239 = 4.326 4.412 4.499

Nominal value of u is 5.0 V Display for all U nodes: u = (4.8

4.9

5.0

−0.514 1.027 0.771 Vn = 0.771 4.153 −6 4.9 × 10 −4.8

5.1

5.2)

−0.525 1.048 0.787 0.787 4.239 4.9 × 10 −6 −4.9

−0.535 1.07 0.803 0.803 4.326 5 × 10 −6 −5

−0.546 1.091 0.819 0.819 4.412 5.1 × 10 −6 −5.1

−0.557 1.113 0.835 0.835 4.499 5.2 × 10 −66 −5.2

DC Circuit Analysis

161

7.6 RTD CIRCUIT — STEP RESISTOR VALUE R8

R9

V6

Eref

11 2 − V− 3 +

Eref

V7

R2

R1

V+

1 4

R3

V1 R4 V3 RT V2 R5 R6

V4

11 2 − V− 3 +

V5 1

V+ 4

R7

Eref

R1 := 4.53 R6 := 4.53

R2 := 34.8 R7 := 27.4

R3 := 132 R4 := 9.09 R5 := 27.4 R8 := 20 R9 := 20 RT := 1.915

Values in kohms: RTD value (RT) varies from 1 K (Vo is approximately –5 V at 0°C) to 2 K (Vo is approximately +5 V at +260°C). 7 99 3 1 2 RR := 99 4 99 6 1

1 3 5 3 4 2 0 6 7 2

R1 R2 R 3 R 4 R5 R6 R 7 R8 R9 RT

Ao := 106

7 EE := 5

0 0

0 4

6 3

U := 7 Y := 5 GG := 0 Ein := (99 5) Get A1 and B2 DC arrays, and solve for node voltages Vn. → Reference:C:\mcadckts\CaNL11\comm42.mcd vn := 1solve(A1, B2)

Vo := VnY

Vo = 4.326

Now, sweep RT value from 1 K to 2 K in 0.1 K increments. RT := (1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2)T

Ao Ao

162

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Ndc := rows(RT)

k := 1..Ndc

Vn ( U, EE, GG, RR, Ein ) : = for k ∈1..Ndc RR10,3 ← RTk AE ← G ( U, EE, GG, RR, Ein ) A1 ← AE1 B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v5 k ← ( vn k )5 vr The line RR10,3 ← RTk loads new values of RT into the RR array. For the line AE ← G(U, EE, GG, RR, Ein); the G function is from the dccomm42.mcd subprogram. Plot: V5 := Vn(U, EE, GG, RR, Ein) Check linearity with straight line equation:

V5k yk

5 3.75 2.5 1.25 0 −1.25 −2.5 −3.75 −5

RTD Ckt linearity

Linearity delta

0.3 0.2 Volts DC

Volts DC

yk := 10(RTk – 1) – 5

yk − V5k

0.1 0 −0.1 −0.2

1

1.2 1.4 1.6 1.8 RTk RT (K Ohms)

2

−0.3

1

1.2 1.4 1.6 1.8 RTk RT (K Ohms)

The maximum linearity temperature error is 260 ⋅ deg C maxerr : = 0.3 ⋅ V ⋅ 10 ⋅ V

maxerr = 7.8 degC

2

DC Circuit Analysis

163

We can step two resistor values simultaneously as shown here: Step R4 and R5 from 8K to 10K in 0.2 K increments: Ra := (8

8.2

8.4

8.6

Ndc := rows(Ra)

8.8

9

9.2

k := 1..Ndc

9.4

9.6

9.8

10)T

(Ra in kohms)

Vn ( U, EE, GG, RR, Ein ) : = for k ∈1..Ndc RR 4 ,3 ← Ra k RR 5,,3 ← Ra k AE ← G ( U, EE, GG, RR, Ein ) A1 ← AE1 B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v5 k ← ( vn k )5 v5 Plot: V5 := Vn(U, EE, GG, RR, Ein) Marker for nominal values: M1 := 9.09

M2 := 4.326 V5 vs. R4 & R5

8

Volts DC

M1 6 V5k

M2 4

2

8

8.5

9 9.5 Rak R4, R5 (K Ohms)

10

164

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

7.7 FLOATING 5-V INPUT SOURCE K :=103 At times it may be desired to have an input voltage source floating. The restriction of all Ein inputs being single-ended can be overcome as shown. R1

V6 +

V1

R4

V2

EE1

11 2 − V−

R2

−

V7 R3

+ −

R6

V4

V3

V99

R5

3 +

V5 1

V+ 4

R7

Ein

R1 := 1·K R2 := 20 R3 := 1·K R4 := 20·K R5 := 200·K R6 := 20·K R7 := 200·K Ao := 106 U := 7 Y := 5 6 1 7 RR := 1 2 3 4

1 3 3 2 5 4 0

R1 R2 R 3 R 4 R5 R6 R 7

6 EE := 5

7 0

99 4

GG := 0

0 2

Ein := (99

1)

5 Ao

→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := 1solve(A1, B2) VT = (–0.223 –0.247

–0.272

–0.247

Input voltage: V6 – V7 = 5

Vo := VY

Vo = –0.495

–0.495

2.253

–2.747)

DC Circuit Analysis

165

Matrix solution: 1 1 1 R1 + R 3 + R 2 + R 4 −1 R4 Am := 1 1 − + R 2 R1 + R 3 0 0

−1

1 1 + R 2 R1 + R 3

−

R4 1 R4

+ 0

1

0

R5 1 R1 + R 3

0 Ao

+

1 R2

+

0

Vm := 1solve(Am, Bm)

−1

0

R5

1

−1

R6

R6

0

−1 R6 0

1 1 + R6 R 7 − Ao

5 R1 + R 3 0 Bm := −5 R1 + R 3 0 0 −0.223 −0.247 Vm = −0.272 −0.247 −0.495

0

Vo := Vm5

Vo = –0.495

0 1

This page intentionally left blank

8

Three-Phase Circuits

8.1 CONVERT ∆ FLOATING VOLTAGE INPUTS TO SINGLE-ENDED Y INPUTS Circuits with single-ended inputs are easier to solve than those with floating inputs. Setup: pr(E, θ) := E·(cos(θ) + i·sin(θ)) 180 (convert radians to degrees) π mp(x) := (|x| rd·arg(x)) (get magnitude and phase) Line-to-line voltages are (in polar form): (convert polar to rectangular) rd :=

A – B = 115<0 B – C = 115<–120 C – A = 115<120 (counterclockwise phase rotation ABC) Convert from polar form to rectangular form: EAB := pr(115, 0) EBC := pr(115, –120·deg) ECA := pr(115, 120·deg) EAB := 115 EBC := –57.5 – 99.59i ECA := –57.5 + 99.59i Find an equivalent phasor pair, i.e., line-to-neutral equivalent to line-to-line: 1 Am := 0 −1

−1 1 0

0 0 1

E AB Bm := E BC E CA

Cm := 1solve(Am, Bm)

57.5 – 99.59 i Cm = −57.5 – 99.59 i −0 EA := Cm1 EB := Cm2 EC := Cm3 mp(EA) = (115 – 60) mp(EB) = (115 – 120) |EA – EB| = 115 arg(EA – EB) = 0deg Hence equal to |EAB| = 115 arg(EAB) = 0deg A |EB – EC| = 115 arg(EB – EC) = –120deg Hence equal to |EBC| = 115 arg(EBC) = –120deg B 167

168

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

|EC – EA| = 115 arg(EC – EA) = 120deg arg(ECA) = 120deg C

Hence equal to |ECA| = 115

and, thus, equivalent as seen by the load. Subsequent circuit examples will verify this. A second equivalent phasor pair is obtained from: 1 Am := 0 −1

0 1 0

0 −1 1

E AB Bm := E BC E CA

Cm := 1solve(Am, Bm)

115 Cm : −5.68 × 10 −14 57.5 + 99.59 i EA := Cm1 EB := Cm2 EC := Cm3 mp(EA) = (115 0) mp(EC) = (115 60) |EA – EB| = 115 arg(EA – EB) = 0deg Hence equal to |EAB| = 115 arg(EAB) = 0deg A |EB – EC| = 115 arg(EB – EC) = –120deg Hence equal to |EBC| = 115 arg(EBC) = –120deg B |EC – EA| = 115 arg(EC – EA) = 120deg Hence equal to |ECA| = 115 arg(ECA) = 120deg C A third equivalent phasor pair is: 1 Am := 0 0

−1 1 0

0 −1 1

E AB Bm := E BC E CA

Cm := 1solve(Am, Bm)

−0 Cm : = −115 −57.5 + 99.593i EA := Cm1 EB := Cm2 EC := Cm3 mp(EB) = (115 180) mp(EC) = (115 120) |EA – EB| = 115 arg(EA – EB) = 0deg Hence equal to |EAB| = 115 arg(EAB) = 0deg A |EB – EC| = 115 arg(EB – EC) = –120deg Hence equal to |EBC| = 115 arg(EBC) = –120deg B |EC – EA| = 115 arg(EC – EA) = 120deg Hence equal to |ECA| = 115 arg(ECA) = 120deg C

Three-Phase Circuits

169 Phasor pair A & B 90 120 150 60 100

150

30

50 180

0

0

210

330 240

270

300

A B

Phasor pair A & C 90 60 120 150 100

150

30

50 180

0

0

210

330 240

270

300

A C

Phasor pair B & C 90 120 60 150 100

150

30

50 180

0

0

330

210 240 B C

270

300

170

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

8.2 THREE-PHASE NDS SOLUTION 8.2.1 UNBALANCED DELTA LOAD — SINGLE-ENDED INPUTS ON A AND B R5 EinA +

4

R1

−

R2

1 R6

3

C1

L2

5 C

−

R2 := 10

R3 := 15

6

R4 +

R1 := 12

C2

R3

2

EinB

R4 := 0.01

R5 := 0.01

R6 := 0.01

R4 to R6 are line impedances.

F := 60

rd :=

ω := 2·π·F

s := ω ⋅ −1

4 4 6 RR := 99 98 5

180 π

Y := (1

2

3

4

EE := 0

GG := 0

5

1 3 2 4 6 0 6)T

R1 R2 R 3 R 5 R4 R6

C1 :=

1 12 ⋅ ω

L2 :=

C1 C2

1 CC := 3

5 6

1 1

LL := (2

99 Ein := 98

→ Reference:C:\mcadckts\CaNL11\comm42m.mcd For three-phase circuits, comm42m.mcd must be used.

20 ω

0

U := 6

L2)

Three-Phase Circuits

rows( A) rows(B) rows(D) rows(E )

171

cols( A) 3 cols(B) 3 = cols(D) 6 cols(E ) 6

3 2 3 2

N N Format : K K

N M N M

K = number of outputs; M = number of inputs. Complex input at A and B: 3 ⋅i 0.5 − 2 u : = 208 ⋅ 3 ⋅ i −0.5 − 2 cv := D·(s·I – A)–1·B·u + E·u

−60 rd ⋅ arg ( u ) = −120

A B

Get magnitude (V) and phase (deg) when Y is a scalar (one output) or a column vector (multiple outputs): mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

1 2 3 mp = 4 5 6

146.9 166.3 207.8 207.8 0.1 207.8

−105 −83.1 −119.9 −60.1 −15.1 −119.9

magφ(x) := (|x| rd·arg(x)) (convert rectangular to polar form).

172

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The textbook given as Reference 1 answers using floating delta inputs: Iab :=

Ibc := Ica :=

cv4 − cv6 magφ(Iab) := (20.74 1 R2 + ω ⋅ C2 ⋅ i

0.01) Text answer: 20.8A/_0 deg.

cv6 − cv5 magφ(Ibc) := (8.32 – 173.09) Text answer: 8.32A/_–173.13 deg. R 3 + ω ⋅ L2 ⋅ i − cv4 magφ(Ica) := (12.25 164.93) Text answer: 12.26A/_165 deg. 1 R1 + ω ⋅ C1 ⋅ i

8.2.2 UNBALANCED DELTA LOAD — SINGLE-ENDED INPUTS ON A AND C R5 EinA +

4

R1

−

R2

1 EinC

C1 R6 5

+

R2 := 10

L2 B

−

R1 := 12

3

R3 := 15

R3

2

C2 6

R4

R4 := 0.01

R5 := 0.01

R6 := 0.01

R4 to R6 are line impedances

rd :=

180 π

C2 := 1000 EE := 0

L2 :=

20 ω

LL := (2

4 4 6 RR := 6 99 98 Y := (1

ω := 2·π·F

F := 60

2

1 3 2 0 4 5 3

U := 6 5

L2)

s := ω ⋅ −1 99 Ein := 98 GG := 0

R1 R2 R3 C1 1 5 CC := R4 3 6 C2 R 54 R6 4 5 6)T (column vector)

C1 := 1 1

1 12 ⋅ ω

Three-Phase Circuits

173

→ Reference:C:\mcadckts\CaNL11\comm42m.mcd For polyphase circuits, comm42m.mcd must be used. Subprogram comm42.mcd will not work. rows( A) rows(B) rows(D) rows(E )

cols( A) 3 cols(B) 3 = cols(D) 6 cols(E ) 6

3 2 3 2

N N Format : K K

N M N M

K = number of outputs; M = number of inputs. Complex input at A and C: 1 0 u : = 208 ⋅ rd ⋅ arg ( u ) = 3 ⋅ i 0.5 + 60 2 cv := D·(s·I – A)–1·B·u + E·u

A C

Get magnitude (V) and phase (deg) when Y is a scalar or a column vector: mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

1 2 3 mp = 4 5 6 magφ(x) := (|x| rd·arg(x))

76.1 125 0.3 207.7 208 0.3

30.2 6.9 2 0 60 2

(Convert rectangular to polar form.)

174

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The textbook given as Reference 1 answers using floating delta inputs: Iab :=

Ibc := Ica :=

cv4

magφ(Iab) := (20.77

1 R2 + ω ⋅ C2 ⋅ i

0.01) Text answer: 20.8A/_0 deg.

− cv5 magφ(Ibc) := (8.32 – 173.14) Text answer: 8.32A/_–173.13 deg. R 3 + ω ⋅ L2 ⋅ i cv5 − cv4 magφ(Ica) := (12.25 164.93) Text answer: 12.26A/_165 deg. 1 R1 + ω ⋅ C1 ⋅ i

8.3 THREE-PHASE Y — UNBALANCED LOAD Single-ended two-phase Y input at A and B. R5 EinA

V1

+

R1

−

V2

C1

R3 EinC = 0

V4

V3

R2

EinB

L1

R4

+

V5

−

F := 1000

ω := 2·π·F

s := ω·i R1 := 12

R4 := 0.01

R5 := 0.01

L1 :=

Y := (1

3

5)T

rd :=

2

99 1 RR := 3 4 98

1 2 0 3 5

4

R5 R1 R2 R 3 R 4

4 ω

C1 :=

180 π

CC := (2

dr :=

3

R2 := 20 1 ω ⋅ 16

R3 := 3

U := 5

1 rd

C1) LL := (4

5

L1)

Three-Phase Circuits

EE := 0

175

99 Ein := 98

GG := 0

1 1

pr(E,θ) := E·(cos(θ·dr) + i·sin(θ·dr)) (polar to rectangular conversion) magφ(x) := (|x| rd·arg(x)) (rectangular to polar conversion) 1 − 1.73205 ⋅ i u : = 100 ⋅ −1 − 1.73205 ⋅ i magφ(u2) = (200 –120)

magφ(u1) = (200

–60)

→ Reference:C:\mcadckts\CaNL11\comm42m.mcd rows( A) rows(B) rows(D) rows(E )

cols( A) 2 cols(B) 2 = cols(D) 5 cols(E ) 5 cv := D·(s·I – A)–1·B·u + E·u

2 2 2 2

N N Format : K K

N M N M

Get magnitude (V) and phase (deg) when Y is a scalar or a column vector: mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

Node Magnitude Phase 1 2 mp = 3 4 5

200 236.9 130.1 181.1 199.8

−60 −92.8 −137.6 −139.9 −120

176

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Im 1 : =

cv1 − cv2 magφ(Im1) = (10.696 R1

Im 2 : =

cv3 R2

magφ(Im2) = (6.506

29.55) –137.64)

cv4 − cv3 magφ(Im3) = (17.102 –145.611) R3 See SPICE comparison in the following text.

Im 3 : =

* SPICE Verification * Convert to single-ended Y input on A & B; C = 0 * Same load as 3phasewye2 with floating delta input * VEinA 99 0 AC 200V –60 VEinB 98 0 AC 200V –120 * R1 1 2 12 R2 3 0 20 R3 4 3 3 R4 98 5 0.01 R5 99 1 0.01 * C1 2 3 9.947UF L1 5 4 0.637MH * .AC LIN 1 1KH 1KH .PRINT AC IM(R1) IP(R1) .PRINT AC IM(R2) IP(R2) .PRINT AC IM(R3) IP(R3) .OPTIONS NOECHO NOPAGE NOMOD .END **** AC ANALYSIS TEMPERATURE = 27.000 DEG C

Three-Phase Circuits

FREQ

177

IM(R1)

IP(R1)

1.000E+03 1.070E+01 2.954E+01 FREQ

IM(R2)

IP(R2)

1.000E+03 6.506E+00 –1.377E+02 FREQ

IM(R3)

IP(R3)

1.000E+03 1.710E+01 -1.456E+02

8.4 THREE-PHASE Y-CONNECTED UNBALANCED LOAD — FLOATING DELTA INPUT Same load as in Section 8.3. V1

R5

R6

V8

+

+

+ EinAB

−

R2

−

+

1 16 ⋅ ω CC := (2 0 C1 :=

V3

EinBC

L1

V6

s := ω·i R1 := 12

R5 := 0.01 U := 9 C1)

R3

V5 +

R4 := 0.01

C1

R4

R7

ω := 2·π·F

EinCA

V4

V7

F := 1000

V2

V9 −

+

R1

R2 := 20

R6 := 0.01

R7 := 0.01

Y := (1

3

LL := (3

2 6

4

L1 :=

5)T

L1)

Note generator polarities.

rd :=

180 π

dr :=

1 rd

R3 := 3

(radians–degree conversions)

4 ω

178

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

8 1 4 RR := 3 5 9 7

1 2 0 0 4 1 6

R5 R1 R2 R 3 R4 R6 R 7

Floating generators: 8 EE := 6 4

7 5 9

99 98 97

0 0 0

1 1 1

99 Ein := 98 97

1 1 1

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42m.mcd rows( A) rows(B) rows(D) rows(E )

cols( A) 2 2 N N cols(B) 2 3 = Format : cols(D) 5 2 K K cols(E ) 5 3 K = number of outputs; M = number of inputs.

N M N M

pr(E,θ) := E·(cos(θ·dr) + i·sin(θ·dr)) (polar to rectangular conversion) magφ(x) := (|x| rd·arg(x)) (rectangular to polar conversion) u1 := pr(200,0)

u2 := pr(200,–120) u3 := pr(200,120)

Create ∆-connected inputs. 200 u = −100 − 173.205 i −100 + 173.205 i

cv := D·(s·I – A)–1·B·u + E·u

Three-Phase Circuits

179

Get magnitude (V) and phase (deg) when Y is a scalar or a column vector: mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

Node Magnitude Phase 1 2 mp = 3 4 5

214 171.2 51.3 130.2 130.3

−23.6 −60.4 −145.6 42.3 42.3

Current through R1: I 1m : =

cv1 − cv2 R1

Current through R2: I 2m : =

cv4 R2

I 3m : =

cv3 R3

Current through R3:

180

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Rectangular Form I1m = 9.307 + 5.281i I2m = 4.811 + 4.384i I3m = –14.118 – 9.665i Polar Form magφ(I1m) = (10.701 29.571) magφ(I2m) = (6.509 42.34) magφ(I3m) = (17.11 –145.606) SPICE solution is as follows: * SPICE Verification * Three phase floating delta input VEinAB 8 7 AC 200V 0; + *R21 6 1 1M VEinBC 6 5 AC 200V –120; + VEinCA 4 9 AC 200V 120; + * R1 1 2 12 R2 4 0 20 R3 3 0 3 R4 5 4 0.01 R5 8 1 0.01 R6 9 1 0.01 R7 7 6 0.01 * C1 2 0 9.947UF L1 3 6 0.637MH * .AC LIN 1 1KH 1KH .PRINT AC IM(R1) IP(R1) .PRINT AC IM(R2) IP(R2) .PRINT AC IM(R3) IP(R3) .OPTIONS NOECHO NOPAGE NOMOD

Three-Phase Circuits

181

.END **** AC ANALYSIS TEMPERATURE = 27.000 DEG C FREQ

IM(R1)

IP(R1)

1.000E+03 1.070E+01 2.956E+01 FREQ

IM(R2)

IP(R2)

1.000E+03 6.508E+00 4.233E+01 FREQ

IM(R3)

IP(R3)

1.000E+03 1.711E+01 -1.456E+02

8.5 BALANCED Y- LOAD This section illustrates the single-ended input method (on phase A and phase B inputs) with a balanced Y load. Answers are compared to a SPICE analysis of the same circuit. uF := 10–6

uH := 10–6

mH := 10–3

R7

Meg := 106

V1

EA

R1

C1

R2

R3

C2

L1 L3

R9 V5

V8

R5

3 L2 := L1 ω R5 := R4 R3 := R1 R10 := 1·Meg

R4

C3

V7

V6

R8

EB

L1 :=

V10 R10

R6

ω := 2·π·F

L2

V9

EC = 0

F := 60

V4

V3

V2

s := ω·i

C1 :=

L3 := L1 R2 := R4

Y := (1 2

3

4

1 ω⋅8

C2 := C1

C3 := C1

R1 := 6

R6 := R1

R4 := 4

R7 := 0.001

R8 := R7

R9 := R7

5

6)T

99 Ein := 98

1 1

U : = 10

182

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

rd :=

180 π

1 1 4 10 9 RR := 5 99 98 5 8

2 3 6 6 5 7 1 6 0 0

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10

R10 eliminates an all-inductive cutset at node V8. 1 CC := 2 6

4 5 7

C1 C2 C 3

3 LL := 8 8

8 10 9

L1 L 2 L 3

EE := 0

magφ(x) := (|x| rd·arg(x)) → Reference:C:\mcadckts\CaNL11\comm42m.mcd 3 0.5 − 2 ⋅ i u : = 200 ⋅ 3 i −0.5 − 2

EA magφ(u1) = (200

–60)

N N Format : K K

N M N M

EB

magφ(u2) = (200 –120) cv := D·(s·I – A)–1·B·u + E·u rows( A) rows(B) rows(D) rows(E )

cols( A) 6 cols(B) 6 = cols(D) 6 cols(E ) 6

6 2 6 2

GG := 0

Three-Phase Circuits

183

Get magnitude and phase (deg) when Y is a scalar or a column vector: mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

Node Magnitude Phase 1 2 3 mp = 4 5 6

200 160 108.9 82.1 0 200

−60 −96.9 −54.2 −109.9 −70.6 −120

Get currents: I 1m : =

cv1 − cv2 R1

I 2m : =

(Magnitude phase angle) magφ(I1m) = (19.99 magφ(I2m) = (23.09 magφ(I3m) = (19.99

–6.88) –66.88) 53.12)

cv1 − cv3 R2

I 3m : =

cv4 − cv6 R3

184

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

See the following SPICE comparisons for both single-ended Y and floating delta inputs. SPICE Y input SPICE Verification. * File:

Fig23_25p941y.cir

* Compare with Mathcad file Fig23_p941s.mcd * Delta-Wye Load * SINGLE ENDED Y INPUT VEA 99 0 AC 200 -60 VEB 98 0 AC 200 -120 * R7 99 1 0.001 ; ESR for input R8 98 6 0.001 R9 5 0 0.001 * R1 1 2 6 R2 1 3 4 R3 4 6 6 R4 6 10 4 R5 5 9 4 R6 5 7 6 R10 8 0 1MEG; Not required for SPICE. ICS compensated for internally. * C1 1 4 331.573UF C2 5 2 331.573UF C3 6 7 331.573UF * L1 3 8 7.958MH L2 10 8 7.958MH L3 9 8 7.958MH

Three-Phase Circuits

185

* .AC LIN 1 60 60 .PRINT AC IM(R1) IP(R1) .PRINT AC IM(R2) IP(R2) .PRINT AC IM(R3) IP(R3) .OPTIONS NOPAGE NOECHO NOMOD **** AC ANALYSIS TEMPERATURE = 27.000 DEG C FREQ 6.000E+01

IM(R1) 1.999E+01

FREQ 6.000E+01

IM(R2) 2.309E+01

FREQ 6.000E+01

IM(R3) 1.999E+01

IP(R1) -6.877E+00 IP(R2) -6.688E+01 IP(R3) 5.312E+01

SPICE ∆ Input SPICE Verification. * Compare with Mathcad file Fig23_p941s.mcd * DELTA INPUT VAB 100 98 AC 200 0; Floating Delta RS 100 99 0.001; ESR VBC 98 97 AC 200 -120; Floating Delta VCA 97 99 AC 200 +120; Floating Delta * R7 99 1 0.001 ; ESR for input R8 98 6 0.001 R9 97 5 0.001 * R1 1 2 6 R2 1 3 4 R3 4 6 6 R4 6 10 4 R5 5 9 4

186

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R6 5 7 6 R10 8 0 1MEG * C1 1 4 331.573UF C2 5 2 331.573UF C3 6 7 331.573UF * L1 3 8 7.958MH L2 10 8 7.958MH L3 9 8 7.958MH * .AC LIN 1 60 60 .PRINT AC IM(R1) IP(R1) .PRINT AC IM(R2) IP(R2) .PRINT AC IM(R3) IP(R3) .OPTIONS NOPAGE NOECHO NOMOD **** AC ANALYSIS TEMPERATURE = 27.000 DEG C FREQ 6.000E+01 FREQ 6.000E+01 FREQ 6.000E+01

IM(R1) 1.999E+01 IM(R2) 2.309E+01 IM(R3) 1.999E+01

IP(R1) -6.877E+00 IP(R2) -6.688E+01 IP(R3) 5.312E+01

REFERENCES 1. Boylestad, Introductory Circuit Analysis, 7th ed., Macmillan Publishing Co., New York, 1994, p. 946.

Appendix I BACKGROUND THEORY OF NDS METHOD The method evolves from writing the circuit equations after converting all capacitors to ideal 1 V voltage sources and inductors to ideal 1 A current sources. We begin with the passive RCL circuit used to introduce the method. Original circuit: L3 R1

C1

V1

V2

R2

V3

Ein R3

R4

C2

L4

Note that for those less mathematically inclined, this appendix may be skipped without loss of continuity. Converted circuit: I3 R1 Ein

V1

+

−

+

−

E1

V2

R2

V3 L4

E2 R4

R3

+ +

−

−

Remembering that these are now known sources with values 1 V and 1 A, we can write the circuit equations based on this configuration: The input voltage Ein is also known and is usually set to 1 V, but can have other values. These are DC equations; no AC or LaPlace equations in s are required. DC circuit equations: KCL at node V1 gives: (Ein – V1)·G1 = (V1 – V2)·G4 + I3 + iC1 iC1 is the unknown current through capacitor C1, now the voltage source E1.

187

188

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The G’s are the conductances of the resistors R. This is done to make the arrays more compact. Rearranging all unknowns on the left-hand side and knowns on the right-hand side: V1·(G1 + G4) – V2·G4 + iC1 = Ein·G1 – I3 The ideal current source I3 has the known value of 1 A, but we will retain the reference designator temporarily for tutorial purposes. The same is done for I4 and for the 1 V values of E1 and E2. KCL at node V2 gives: (V1 – V2)·G4 + iC1 + I3 = (V2 – V3)·G2 Rearranging: –V1·G4 + V2·(G2 + G4) – V3·G2 – iC1 = 13 KCL at node V3 gives: (V2 – V3)·G2 = V3·G3 + iC2 + I4 = 0 Rearranging: –V2·G2 + V3·(G2 + G3) + iC2 = –I4 V1 – V2 = eL3 eL3 and eL4 are the unknown voltages across L3 and L4. This equation is then: V1 – V2 – eL3 = 0 V3 = eL4

or

V3 – eL4 = 0

For E1 and E2: V1 – V2 = E1

V3 = E2

Next we set the component values: K := 103 1 10 C2 := C1 G1 :=

u := 10–6

m := 10–3

V := 1

A := 1

mA := 1

1 1 1 G 3 := G 4 := C1 := 0.1·u 100 50 ⋅ K 10 ⋅ K L3 := 2533.03·u L4 := 25.3303·u Ein := 1 G2 :=

Appendix I

189

Letting U = the number of unknown nodes, M the number of inputs (1 in this case), and N the number of capacitors (1 V sources) and inductors (1 A sources), the following matrices are created from the preceding equations. Note column headings for coefficients: Matrix A1 contains the coefficients of the left-handed sides of the preceding equations and has the dimensions {U+N U+N}. U := 3

N := 4

M := 1

We form array A1 from left-hand sides of the preceding equations: (Note column headings.) V1 G1 + G 4 −G 4 0 1 A1 := 0 1 0

V2

V3

iC1 iC2 eL 3 eL 4

−G 4 G2 + G 4 −G 2 −1 0 −1

0 −G 2 G2 + G 3 0 1 0

1 −1 0 0 0 0

0 0 1 0 0 0

0 0 0 0 0 −1

0

1

0

0

0

0 0 0 0 0 0 −1

From the equations: V1·(G1 + G4) – V2·G4 + iC1 = Ein·G1 – I3 –V1·G4 + V2·(G2 + G4) – V3·G2 – iC1 = I3 –V2·G2 + V3·(G2 + G3) + iC2 = –I4 V1 – V2 = E1 V3 = E2 V1 – V2 – eL3 = 0 V3 – eL4 = 0 We next form {U+N N+M} array B2 for the right-hand sides of the preceding equations and set the sources to their unity values: E1 := 1

E2 := 1

I3 := 1

I4 := 1

190

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

E1 0 0 0 B2 := E1 0 0 0

E2

I3

I4

Ein

0 0 0 0

− I3 I3 0

0 0 − I4

0 0 0 0

0 0 0 0

Ein ⋅ G1 0 0 0 0 0 0

E2 0 0

Note that every row and column of A1 must have at least one entry, and that every column of B2 must have at least one entry. We can now partition array A1 into four submatrices A11, A12, A21, and A22 as follows: V1 G1 + G 4 A11 := −G 4 0 1 0 A21 := 1 0

−1 0 −1 0

V2

V3

−G 4 G2 + G 4 −G 2

0 −G 2 G 2 + G 3

0 0 A22 := 0 0

0 1 0 1

iC1 iC2 eL 3 eL 4 1 A12 := −1 0 0 0 0 0

0 0 −1 0

0 0 1

0 0 0

0 0 0

0 0 0 −1

From the circuit, we see that current through C1 (E1) leaves node V1 and enters node V2. If we mentally assign –1 for current leaving a node, and +1 for current entering a node, and compare this to –A12: −1 − A12 = 1 0

0 0 −1

0 0 0

0 0 0

V1 V2 V3

Because column 1 represents C1, the coding here tells us which nodes C1 is connected to and the current polarity. In the same manner, column 2 represents C2, and we can see without looking at the schematic that C2 is connected from (–1) node V3 to ground. We next split array B2 into four submatrices A13, A14, A23, and A24:

Appendix I

191

E1 E 2

I3

I4 0 0 −1

0 A13 := 0 0

0 0 0

−1 1 0

1 0 A23 := 0 0

0 1 0 0

0 0 0 0

0 0 0 0

Ein ⋅ G1 A14 := 0 0 0 0 A24 := 0 0

Similar to A12, array A13, with column 3 and column 4 representing L3 and L4, respectively, gives us the same information about these two components: which nodes they are connected to and the current polarity, –1 leaving a node and +1 entering. Repeating A12, A13, and A21 iC1 iC2 eL 3 eL 4 1 A12 = −1 0 V1 1 0 A21 = 1 0

0 0 1

0 0 0

0 0 0

E1 E 2 0 A13 = 0 0

0 0 0

I3

I4

−1 1 0

0 0 −1

V2 V3 −1 0 −1 0

0 1 0 1

Next, we take the transpose (interchange rows and columns) of A12 and –A13 1 0 A12 T = 0 0

−1 0 0 0

0 1 0 0

0 0 –A13T = 1 0

0 0 −1 0

0 0 0 1

and we see that we can pull out the first two rows of A12T and the last two rows of –A13T and, combining them, we have A21.

192

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Ncap is the number of capacitors, and Nind is the number of inductors, so that N = Ncap + Nind For A22: Ncap := 2

Nind := 2 iC1 iC2 eL 3 eL 4 0 0 A22 = 0 0

0 0 0 0

0 0 −1 0

0 0 0 −1

If the equations are taken in the order given earlier, we can see that the –1’s will go in the locations shown. These –1’s will be at A22Ncap+1, Ncap+1 and A22N,N. They represent the unity coefficients of eL3 and eL4. E1 E 2 I3 I4 1 0 A23 = 0 0

0 1 0 0

0 0 0 0

0 0 0 0

The +1’s here are located at A231,1 and A232,2. They represent the values of E1 = +1 and E2 = +1. Again, taking the equations in the order given earlier, A24 will always be an {N M} array of zeros. (Matrices or vectors filled with all zeros are called null arrays.) 0 0 A24 = 0 0 These procedures can be coded in software that will automate the construction of these submatrices individually (see comm42.mcd or dccomm42.mcd). They then can be formed into A1 and B2 as follows: A1 := stack(augment(A11,A12), augment(A21,A22))

Appendix I

193

0.1001 −0.0001 0 1 A1 = 0 1 0

−0.0001 0.0101

0 −0.01

1 −1

0 0

0 0

−0.01 −1 0 −1 0

0.01 0 1 0 1

0 0 0 0 0

1 0 0 0 0

0 0 0 −1 0

0 0 0 0 0 0 −1

B2 := stack(augment(A13,A14), augment(A23,A24)) 0 0 0 B2 = 1 0 0 0

0 0 0 0 1 0 0

−1 1 0 0 0 0 0

0 0 −1 0 0 0 0

0.1 0 0 0 0 0 0

Solving: V := A1–1·B2 What is contained in V? V is dimension {U+N N+M} 0.0909 −0.9091 0 −0.0092 V= −0.0091 1 0

0.0909 0.0909 1 −0.0091 −0.0091 0 1

0 0 0 −1 0 0 0

0 0 0 0 −1 0 0

0.9091 0.9091 0 0.0091 0.0091 0 0

Concentrating on the top U = 3 rows of V: V1,1 is the node voltage at node V1 due to E1 = 1, E2 = I3 = I4 = Ein = 0. V1,2 is the node voltage at V1 with E2 = 1, E1 = I3 = I4 = Ein =0. V1,3 is the V1 node voltage with I3=1, E1 = E2 = I4 = 0. V1,4 is V1 with I4 =1, E1 = E2 = Ein =0 = I3 = 0. V1,5 is V1 with Ein = 1, E1 = E2 = I3 = I4 = 0. And correspondingly for row 2 (V2) and row 3 (V3)

194

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Getting the R’s from the G’s: R1 := G1–1

R2 :=G2–1

R3 := G3–1

R4 := G4–1

To check this:

V1,5 :=

Ein ⋅ R 2 R1 + R 2

V1,5 = 0.9091

R4 and R3 are shorted by inductors L3 and L4. E1 ⋅ R1 R1 + R 2 and so forth. V1,1 :=

V1,1 = 0.0909

V1,2 :=

E 2 ⋅ R1 R1 + R 2

V1,2 = 0.0909

Extracting the last N = 4 rows of V and calling it H: H := submatrix(V, U + 1, U + N, 1, N + M) −0.0092 −0.0091 H= 1 0

−0.0091 −0.0091 0 1

−1 0 0 0

0 −1 0 0

0.0091 0.0091 0 0

Row 1 is current iC1 with the five sources active one at a time as above. − E1 H1,1 = –0.0092 R 4 ⋅ ( R1 + R 2 ) R1 + R 2 + R 4 := –0.0091 H1,3 := –I3 H1,3 = –1

−E2 R1 + R 2

H1,1 =

H1,2 =

H1,2

H1,4 := 0

because I4 is shorted by E2 = 0. H1,5 =

Ein R1 + R 2

H1,5 = 0.0091

Row 2 is iC2 with the five sources separately active; row 3 is eL3 and row 4 is eL4 under the same circumstances. We next form the {N N}diagonal array P, with C1, C2, L3, and L4 in that order.

Appendix I

195

C1 0 P := 0 0

0 C2 0 0

0 0 0 L 4

0 0 L3 0

which has same order as the columns of A12 and A22. The next operation is to solve H and P simultaneously and label the result AB. The array AB will have the dimensions {N N+M}. AB := P–1·H −91909.091 −90909.091 AB = 394.784 0

−90909.091

−1 × 10 7

0

0 0 0

−1 × 10 0 0

−91109.091 0 39478.411

90909.091 90909.091 0 0

7

In effect, we are dividing the top row of H by C1: H1,1 = −91909.091 C1

H1,2 = −90909.091 C1

etc.

and dividing the second row of H by C2: H 2,1 = −90909.091 C2

H 2 ,2 = −91109.091 C2

etc.

and, similarly, the third row by L3, and the fourth row by L4. We now extract A from the first N columns of AB: A := submatrix(AB, 1, N, 1, N) and extract B from the last M columns of AB: B := submatrix(AB, 1, N, N + 1, N + M) −91909.091 −90909.091 A= 394.784 0

−90909.091 −91109.091 0 39478.411

−1 × 10 7 0 0 0

−1 × 10 0 0 0

7

196

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

90909.091 90909.091 B= 0 0 As for output arrays D and E, we extract these from row Y of V, where Y := 3. D := submatrix(V, Y, Y, 1, N)

D = (0

1

0

0)

The column labels of D are vC1, vC2, iL3, and iL4. Hence, the 1 in column 2 tells us that the output is being taken directly from C2 or VY = V3. See the schematic. E := submatrix(V, Y, Y, N + 1, N + M)

E = (0)

A-I.1 THEORY OF NDS METHOD A DC voltage-controlled voltage source (VCVS) K := 103

mA := 10–3 lx R1

V1

Ein

EE1

R5

R1 := 1·K

R2 := 3·K

R3 := 4·K

Nodal Equations Ein – V1 V1 = + Ix R1 R5 Ix =

V2 V 2 − V 3 + R2 R3

V2 − V3 V3 = R3 R4

R3

V2

− +

R2

V3 R4

R4 := 2·K

R5 := 1.5·K

Ein := 5

Rearranged 1 Ein 1 V1 ⋅ + + Ix = R1 R 5 R1 1 V3 1 V2 ⋅ + − − Ix = 0 R 2 R 3 R 3 1 −V2 1 + + V3 ⋅ =0 R3 R4 R3

Appendix I

197

VCVS equation: V2 – V1 = k·V3

V2 – V1 – k·V3 = 0

k := 2

Insert into arrays A1 (per column headings) and B2 (M = 1, so B2 has only one column). V1 1 1 + R1 R 5 0 A1 := 0 −1

V2

V3

0

0

1 1 + R2 R 3 −1 R3 1

−1 R3 1 1 + R3 R4 −k

1.579 4.737 V := 1solve(A1,B2) V= 1.579 0.002 Ix := V4 Ix = 2.368mA V2–V1 = 3.158 VCVS equation checks.

Ix −1 0 0 1

Ein R1 B2 := 0 0 0

k·V3 = 3.158

Optimizing: Add row 2 (Vp) to row 1 (Vn). 1 1 + R1 R 5 0 A1 := 0 −1

1 1 + R2 R 3 1 1 + R2 R 3 −1 R3 1

−1 R3 −1 R3 1 1 + R3 R4 −k

−1 0 0 0

Ein R1 B2 := 0 0 0

1.579 4.737 V := 1solve(A1,B2) V= 1.579 0.002 Now insert VCVS equation into row 2 (Vp), and then delete the fourth row and fourth column.

198

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 1 R1 + R 5 −1 A1 := 0

V := 1solve(A1,B2) Save A1:

−1 R3 −k

1 1 + R3 R4

1 1 + R2 R 3 1 −1 R3

Ein R1 B2 := 0 0

1, 579 V = 4.737 1.579

A1a := A1

Ix is missing, but the node voltages are the same. If needed, Ix can be found from the node V1 equation. Ix : =

Ein 1 1 − V1 ⋅ + R1 R 5 R1

Ix = 2.368 mA

or from the node V2 equation: 1 V3 1 Ix : = V2 ⋅ + − R 2 R 3 R 3

Ix = 2.368 mA

Using the NDS method: 99 1 RR := 2 2 3 GG := 0

1 0 0 3 0

R1 R5 R2 R 3 R 4

EE := (2

U := 3

1

3

0

Ein := (99

5)

k)

→ Reference:C:\mcadckts\CaNL11\dccomm42.mcd

V := 1solve(A1,B2)

1.579 V = 4.737 1.579

0.002 A1 = −1 0

−0 −2 0.001

0.001 1 −0

0.002 A1a = −1 0

0.001 1 −0

−0 −2 0.001

Appendix I

199

A-I.1.1 AN AC FLOATING VCVS See Section 3.2 for NDS solution. mA := 10–3

K := 103

uF := 10–6 lx

R1

V1

Ein

uV1

V2

− +

C1

R3

R2

V3 C2

R4

1 1 1 1 G 2 := G 3 := G 4 := 1⋅ K 3⋅ K 4⋅K 2⋅K C1 := 0.01·uF C2 := 0.05·uF u := 20 Ein := 2 U := 3 N := 2 M := 1 G1 :=

Resistances are converted to conductances to make the arrays more compact. VCVS equation: uV1 = V2 – V1 In the NDS method, this would be specified as: EE = (Vp

Vn

Vcp

Vcn

Gain)

or EE := (2

1

1

0

20)

Let Ix be the current through the VCVS, a fourth unknown in addition to the U = 3 voltage nodes. Temporarily increase U to add the unknown Ix. U := 4 Circuit equations: From schematic: (Ein – V1)·G1 = Ix + iC1 Ix = V2·G2 + (V2 – V3)·G3 (V2 – V3)·G3 = iC2 + V3·G4 uV1 = V2 – V1 V1 = E1 = 1 V3 = E3 = 1

200

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Rearranged: V1·G1 + Ix + iC1 = Ein·G1 V2·(G2 + G3) – V3·G3 – Ix = 0 –V2·G3 + V3·(G3 + G4) + iC2 = 0 V2 – V1·(1 + u) = 0 Insert the coefficients of these equations into {U+N U+N} array A1 and {U+N N+M} array B2. Note the column headers. V1 G1 0 0 A1 := − (1 + u ) 1 0

V2

V3

0 G2 + G 3 −G 3 1 0 0

0 −G 3 G3 + G4 0 0 1

E1 E 2 0 0 0 B2 := 0 1 0

0 0 0 0 0 1

Ix iC1 iC2 1 −1 0 0 0 0

1 0 0 0 0 0

0 0 1 0 0 0

Ein Ein ⋅ G1 0 0 0 0 0

C1 P := diag C2

Note that it is important to keep the column order of A1 and B2 as shown when inserting the equation coefficients into the arrays. Also note that column 5 and column 6, iC1 and iC2, are in the same order as C1 and C2 in P, as are E1 and E2 in B2. Get A, B, D, and E from A1 and B2 as before: V := A1–1·B2 H := submatrix(V, U + 1, U + N, 1, N + M) AB := P–1·H A := submatrix(AB, 1, N, 1, N) B := submatrix(AB, 1, N, N + 1, N + M)

Appendix I

201

25000 −15000

−1.325 × 10 6 A= 105000

200000 B= 0

0.174 X= 1.217

X := 1solve(–A,B)

Dc voltage on C1 Dc voltagee on C2

Reducing the order by the number of VCVSs can significantly decrease execution time and increase accuracy in circuits with many opamps. To reduce the order by 1: Add row Vp (2) to row Vn (1). Zero out row Vp (2) and insert VCVS equation V2 – V1(1 + u) = 0. G1 − 1 + u ) ( A1 := 0 1 0

G2 + G 3 1 −G 3

−G 3 0 G3 + G4

0 0

0 1

0 0 1 0 0

1 0 0 0 0

0 0 B2 := 0 1 0

0 0 0 0 1

Ein ⋅ G1 0 0 0 0

Reduce U by 1. U := 3 The numerical values in A1 and B2 are: 0.001 −21 A1 = 0 1 0

0.001 1 −0 0 0

−0 0 0.001 0 1

1 0 0 0 0

0 0 1 0 0

0 0 B2 = 0 1 0

0 0 0 0 1

0.002 0 0 0 0

For programming purposes, we partition A1 into A11, A12, A21, and A22, as follows. A11 A12 A21 A22

:= := := :=

submatrix(A1, submatrix(A1, submatrix(A1, submatrix(A1,

0.001 A11 = −21 0

0.001 1 −0

1, U, 1, U) 1, U, U + 1, U + N) U + 1, U + N, 1, U) U + 1, U + N, U + 1, U + N) −0 0 0.001

1 A12 = 0 0

0 0 1

202

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 A21 = 0

0 0

0 1

0 0

0 A22 = 0

Note that A21 is the transpose of A12. Partition B2 into four subarrays: A13 A23 A14 A24

:= := := :=

submatrix(B2, submatrix(B2, submatrix(B2, submatrix(B2,

0 A13 = 0 0

0 0 0

1, U, 1, N) U + 1, U + N, 1, N) 1, U, N + 1, N + M) U + 1, U + N, N + 1, N + M

0.002 A14 = 0 0

1 A23 = 0

0 1

0 A24 = 0

We obtain the inductors-open (if present) DC node voltages using A11 and A14: V1 Vdc := 1solve(A11, A14)

Vdc T = ( 0.174

V2

V3

3.652

1.217 )

If required, we can find DC value of Ix by adding the currents through R2 and R3. Ix := Vdc2·G2 + (Vdc2 – Vdc3)·G3

Ix = 1.826mA

After creating these subarrays from the node lists the software program comm42.mcd or comm42m.mcd, then finds A, B, D, and E as follows: A1 := stack(augment(A11,A12), augment(A21,A22)) and B2 := stack(augment(A13,A14), augment(A23,A24)) V := A1–1·B2 H := submatrix(V, U + 1, U + N, 1, N + M) A := submatrix(AB, 1, N, 1, N) B := submatrix(AB, 1, N, N + 1, N + M) −1.325 × 10 6 A= 105000

25000 –15000

200000 B= 0

We get D and E from V at output node: Y := 3 D := submatrix(V, Y, Y, 1, N) D = (0 1) E := submatrix(V, Y, Y, N + 1, N + M) E = (0)

Appendix I

203

A-I.1.2 VCVS

AND

CCCS

See Section 3.5 for NDS solution. K := 103

u := 10–6

Meg := 106

mA := 10–3

uA := 10–6

mV := 10–3

C1

l1 R1

R3

V1

V4

Ein +

R2

−

g1

R4

C2

V2 + −

V3

R5

1 1 1 1 1 G2 := G 3 := G 4 := G5 := 100 10 40 ⋅ K 2⋅K 10 C1 := 0.08·u C2 := 0.005·u a := 0.004 B := 100 N := 2 U := 4 + 2 Y := 4 M := 1 Ein := 100·mV G1 :=

Ix is current through the VCVS (V2 – V3) VCVS: V2 – V3 = a·(Vcp – Vcn) Controlling nodes: Vcp = V1

Vcn = V4

–a·V1 + V2 – V3 + a·V4 = 0

Convert g1 CCCS to a VCCS. gl = B·I1 gl =

I1 =

Ein − V1 R1

B ⋅ ( Ein − V1) = B ⋅ G1 ⋅ ( Ein – V1) R1

gl + B·G1·V1 = B·G1·Ein

From the schematic: (Ein – V1)·G1 = (V1 – V2)·G2 + (V1 – V4)·G3 + iC1 (V1 – V2)·G2 = Ix Ix = V3·G5

204

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

(V1 – V4)·G3 + iC1 = g1 + V4·G4 + iC2 V1 – V4 = E1 V4 = E2 Rearranged: V1·(G1 + G2 + G3) – V2·G2 – V4·G3 + iC1 = Ein·G1 –V1·G2 + V2·G2 + Ix = 0 V3·G5 – Ix = 0 –V1·G3 + V4·(G3 + G4) – iC1 + iC2 + g1 = 0 Insert coefficients into A1 and B2: V1 G1 + G 2 + G 3 −G 2 0 −G 3 A1 := −a B ⋅ G1 1 0

V2

V3

−G 2 G2 0 0 1 0 0 0

0 0 G5 0 −1 0 0 0

E1 E 2 0 0 0 0 B2 := 0 0 1 0

0 0 0 0 0 0 0 1

V4 −G 3 0 0 G3 + G4 a 0 −1 1

Ix

gl

iC1 iC2

0 1 −1 0 0 0 0 0

0 0 0 1 0 1 0 0

1 0 0 −1 0 0 0 0

0 0 0 1 0 0 0 0

Ein Ein ⋅ G1 0 0 0 0 B ⋅ G1 ⋅ Ein 0 0

C1 P := diag C2

Add row 2 and row 3; insert row 5 (VCVS equation) in row 2; delete row 5 and column 5: U := 5

Appendix I

205

V1 G1 + G 2 + G 3 −a −G 2 −G 3 A1 := B ⋅ G1 1 0

V2

V3

V4

g1

iC1 iC2

−G 2 1 G2 0 0 0

0 −1 G5 0 0 0

−G 3 a 0 G3 + G4 0 −1

0 0 0 1 1

1 0 0 −1 0

0

0

1

0 0

0 0

0 0 0 B2 := 0 0 1 0

0 0 0 1 0 0 0

Ein ⋅ G1 0 0 0 B ⋅ G1 ⋅ Ein 0 0

0 0 0 0 0 0 1

We partition A1 and B2 as before: A11 A12 A21 A22

:= := := :=

submatrix(A1, submatrix(A1, submatrix(A1, submatrix(A1,

1, U, 1, U) 1, U, U + 1, U + N) U + 1, U + N, 1, U) U + 1, U + N, U + 1, U + N)

0.11 −0.004 A11 = −0.1 −0 1

−0.1 1 0.1

0 −1 0.1

−0 0.004 0

0 0

0 0

0.001 0

1 A12 T = 0

0 0

0 0

0 A22 = 0

0 0

−1 1

0 0

0 0 0 1 1

1 A21 = 0

1 0 A12 = 0 −1 0 0 0

0 0

−1 1

0 0 0 1 0 0 0

Again note that A12T is identical to A21. With no inductors (Nind = 0), A22 is merely an {N N} null array.

206

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

And similarly for B2: A13 A14 A23 A24

:= := := :=

submatrix(B2, submatrix(B2, submatrix(B2, submatrix(B2,

0 0 A13 = 0 0 0

0 0 0 0 0

1, U, 1, N) 1, U, N + 1, N + M) U + 1, U + N, 1, N) U + 1, U + N, N + 1, N + M

0.001 0 A14 = 0 0 0.1

1 A23 = 0

0 1

0 A24 = 0

A24 is always an {N M} null array. The row–column order of A1 is: V1, V2, ..., V(U), g1, g2, ..., g(Ngg), iC1, iC2, ..., iC(Ncap), eL1, eL2, ..., eL(Nind). The row order of B2 will be the same as A1; the column order of B2 will be: E1, E2, ..., E(Ncap), I1, I2, ..., I(Nind), Ein1, Ein2, ..., Ein(M). U is increased in the subprogram comm42.mcd to U + Ngg. During this process, A11 and A14 can be used to find the inductors-open (if present) DC node voltages and current g1. Vdc := 1solve(A11,A14) VdcT = (0.087 0.092 –4.789 × 10–3 V1 := Vdc1 V1 = 87.33mV V2 :=Vdc2 V2 = 92.11mV

–24.138

0.013)

and so forth. g1 := Vdc5

gl = 12.675mA

Once the partitioned arrays are created by the program comm42.mcd or comm42m.mcd, A1 and B2 are created as: A1 := stack(augment(A11,A12), augment(A21,A22)) and B2 := stack(augment(A13,A14), augment(A23,A24)) And A, B, D, and E are obtained as before: V := A1–1·B2 H := submatrix(V, U + 1, U + N, 1, N + M) AB := P–1·H A := submatrix(AB, 1, N, 1, N) B := submatrix(AB, 1, N, N + 1, N + M)

Appendix I

207

D := submatrix(V, Y, Y, 1, N) E := submatrix(V, Y, Y, N + 1, N + M) −750000 −747812.5 A= 188040000 187900000 D = (0 1) E = (0)

12500 B= −19800000

See Section 3.5 and compare the arrays.

This page intentionally left blank

Part II Tolerance Analysis

This page intentionally left blank

9

Introduction

9.1 INTRODUCTION Most of the tolerance analysis examples given here are passive or idealized opamp circuits. Discrete devices such as BJTs and MOSFETs, except for some linear firstorder models, are not emphasized. The reason for this is as follows.

9.1.1 TOLERANCE ANALYSIS COMPONENTS

OF

CIRCUITS

WITH

DISCRETE

In well-designed opamp circuits, the opamp can be considered ideal. (Thirty years ago this would not have been possible with opamps such as the uA709. But modernday opamps, which have bandwidths up to 400 MHz, offsets measured in nV and pA, and with negligible error, can be taken as ideal.) However, in circuits with discrete components such as MOSFETs and BJTs, a problem arises. Volumes have been written describing discrete device model parameters. Indeed, the forte of the commercial versions of SPICE is using these models for nominal circuit analysis. (See Reference 1, for example.) However, to the author’s knowledge, no one has published data on worst-case tolerances of model parameters such as reverse beta or other parameters as described in the following text. A typical BJT, 2N2222A, has the following SPICE model with 27 constants: .MODEL 2N2222 NPN(Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=255.9 Ne=1.307 + Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 + Cjc=7.306p Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 + Tr=46.91n Tf=411.1p Itf=.6 Vtf=1.7 Xtf=3 Rb=10) In this model, Bf is hfe or the forward beta DC gain; Br, the reverse beta; Vaf, the Early voltage; and so forth (see reference 1). If an analyst wanted to do a worst-case analysis on a circuit using one or more of these devices, he or she might vary hfe from the data sheet minimum and maximum, taking the device operating point into account. However, there is no data available that describes how other parameters such as Vaf vary from transistor to transistor, given 1000 2N2222’s, for example. Is the Early voltage dependent on hfe in some way? That is, if we arbitrarily change hfe, do we have to change Vaf by

211

212

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

some amount? Is it independent? If so, by what percentage and in which direction does it vary? It appears that nobody has done the work of putting a statistically significant number of these devices on a curve tracer or embedded them in test circuits and extracted the data. To do a worst-case analysis that truly reflects the minimum and maximum performance of circuit boards with one or more 2N2222’s in the design, we must have statistics on all 27 parameters, just as we have statistics (tolerances) on passive components such as resistors. For a DC analysis, we may not need to know how the AC and switching parameters such as Cjc, Cje, Tr, and Tf vary, but we certainly need to know how the DC parameters vary from transistor to transistor. Hence, trying to make an accurate prediction of the worst-case performance of circuits with discrete devices is a dubious if not futile exercise.

9.1.2 ANALYSIS METHODS Included here are the worst-case analysis methods of root sum square (RSS) and extreme value analysis (EVA). Circuit types for which these methods will give incorrect results include band-pass and band-reject filters and any circuit in which nonmonotonic components are present. In some cases, however, valuable economic and technical information can be obtained about circuit performance by analyzing sensitivities; they are included for this reason. Monte Carlo analysis (MCA) will produce realistic results for virtually any circuit that has a reasonably accurate and stable mathematical model. The proviso is that a large number of samples must be used. The larger the sample, the more accurate the results. A rule of thumb is to use no less than 1000 samples.

9.2 SOME FACTS ABOUT TOLERANCE ANALYSIS 9.2.1 DC ANALYSIS There are two types of EVA: (1) sensitivity-based analysis and (2) analysis based on all possible tolerance combinations. The second type has a somewhat awkward label, fast Monte Carlo analysis (FMCA) [2]. Sensitivity-based EVA uses the signs of the component sensitivities to determine which combination of signs will yield the maximum output and then reverses those signs to obtain the minimum output. The FMCA method examines all possible 2Nc combinations, where Nc is the number of components, and selects the maximum and minimum from this set. This method can get cumbersome when Nc is large. For example, in a circuit with 15 components, there are 215 = 32,768 combinations, or circuit solutions, that must be performed. Both types of EVA give the same answers in the majority of cases (circuits). One simple exception is the following balanced bridge:

Introduction

213 Ein R2

R1 V1 R3

R5

V2 R4

When the nominal value of R1 = R2 = R3 = R4, sensitivity-based EVA, when perturbing R5 (multiplying R5 by 1 + dpf = 1.0001), will not show a change in output because V1 – V2 = 0. The contribution of R5 will be included when all 25 = 32 tolerance combinations are examined using FMCA. The author has come across two other DC circuits in which this occurs. Needless to say, there are others. SPICE uses the sensitivity-based method. A true and complete EVA, however, requires that FMCA also be performed if the circuit has a small-to-medium component count to include inputs. 9.2.1.1 Monte Carlo Analysis MCA uses random number generators (RNGs) to obtain various random distributions, the most common of which are the uniform and normal (Gaussian) distributions. The normal distribution is used to approximate RSS analyses, whereas the uniform distribution will generate wider tolerance bands between RSS and EVA. Uniform RNGs create random numbers, rn, between zero and one, or 0 < rn < 1. Using a component tolerance of ±5%, rn creates the random component with tolerance range T = 10%(rn) – 5%. Then, T varies from –5% < T < +5% No good uniform RNG will ever come up with exactly 0 or exactly 1, no matter how many samples are taken. With a unique random tolerance 0.95R < R < 1.05R assigned to each of, say, Nc = 6 components (using the aforementioned 5% example), the odds of obtaining a set of random component values that will approach one extreme or the other are very high. As Nc increases, the odds sharply increase. Hence, MCA will never duplicate EVA results. But with a large enough number of samples, it will provide tolerance bands that will be greater than those of RSS but less than those of EVA. This will later be empirically demonstrated by examples (for example, see Section 10.4).

9.2.2 AC ANALYSIS The considerations for DC circuits are applicable to AC circuits also. One additional aspect is nonmonotonic components. That is, increasing the value of a component (within its tolerance range) causes the output to both increase and decrease in different portions on the frequency band. Monotonic components will result only in either increasing or decreasing the output, not both. Circuits with nonmonotonic components are usually band-pass or band-stop filters or any circuit in which the output increases and decreases across the frequency

214

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

band. Circuits such as Butterworth low-pass and high-pass filters will usually contain only monotonic components. SPICE uses a sensitivity-based EVA that does not take monotonicity into account. A 500-Hz multiple-feedback active band-pass filter will be used as a case in point. C2

R3 C1

R1 Ein

V1

11 2 − V− V2

R2 3

+

V3 1

V+ 4

The public domain SPICE listing for EVA analysis is given along with the incorrect results: Band-pass Filter WCA VEin 99 0 AC 1 R1 99 1 RA 6.34K R2 1 0 RA 80.6 R3 3 2 RA 127K C1 1 2 CA 0.1uF C2 3 1 CA 0.1uF E1 3 0 0 2 1E6 * As in Mathcad, an ideal VCVS is used. *.MODEL RA RES(R=1 DEV/GAUSS=0.667%) *3 sigma = 2% *.MODEL CA CAP(C=1 DEV/GAUSS=3.333%) *3 sigma = 10% .MODEL RA RES(R=1 DEV/UNIFORM=2%) .MODEL CA CAP(C=1 DEV/UNIFORM=10%) .WCASE AC V(3) MIN VARY DEV *.WCASE AC V(3) MAX VARY DEV *.WCASE AC V(3) YMAX VARY DEV .AC LIN 100 400 600

Introduction

215

.PRINT AC V(3) .OPTIONS NOECHO NOPAGE NOMOD .END Plotting the results from the SPICE *.out file: Spice AC “.WCASE” results

15

Volts

Anomk,2 10 Ahik,2 Alok,2

5

0 400

425

450

475

Nom EVA Hi EVA Lo

500 525 Anomk,1 Freq(Hz)

550

575

600

One can see there is definitely something amiss here. The algorithm that SPICE uses takes sensitivities at only two frequencies, 400 Hz and 501 Hz, in this circuit. The correct method of EVA will take sensitivities across the entire frequency band, from 400 Hz to 600 Hz. Doing this in Mathcad [3] or MATLAB results in the following plot: Nominal & EVA output

15

446 Hz

568 Hz

Volts

10

5

0 400

420

440

460

480

500 Freq(Hz)

520

540

560

580

600

216

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

These results are somewhat better, but not good enough to get the whole picture. FMCA (which SPICE is not capable of) gives the following plot: FMCA of BPF

11.465 15

568 Vfpk

446 Vfhii Voi

1.102

10

5

0 400 400

420

440

460

480

500 Fi

520

540

560

580

600 600

Nine of the 32 possible tolerance combinations yield the extrema shown in the preceding plot. We still get the worst-case center frequencies of 446 Hz and 568 Hz, but what about at, say, 480 Hz? Is this the maximum amplitude we will get at this frequency? The answer is no, and the MCA plot clearly shows this superimposed on the FMCA results: 11.465 15 447 Voi

568

Vpk

10

Vmaxi Vfhii

1.102

5

0 400 400

420

440

460

480

500 Fi

520

540

560

580

600 600

The number of samples used here was Nk = 1000. As Nk is increased, the skirts of the tolerance band creep out toward the FMCA extremes. Diminishing returns are at work here because using Nk = 10,000 does not move the skirts much farther. As implied previously, the skirts will never be congruent with the FMCA extremes, no matter how large Nk is. This is true of any AC or DC circuit by the very nature of uniform distribution RNGs.

Introduction

217

9.2.3 TRANSIENT ANALYSIS Time-domain tolerance analysis requires that MCA be used. Many, if not most, transient analyses results involve a transitory damped ringing oscillation wherein EVA and RSS analyses give incorrect answers.

9.2.4 ASYMMETRIC TOLERANCES Asymmetric tolerances occur regularly in some commercial and most military applications. This is due to some components having asymmetric tolerances at room temperature (e.g., aluminum electrolytic capacitors), but more frequently due to asymmetric temperature ranges. For example, on the International Space Station, temperature requirements were from –60ºC to (∆T = –85) to +50ºC (∆T = +25). SPICE has no convenient way to specify asymmetric tolerances (and no RSS capability). The Mathcad programs in this book can easily accommodate asymmetric tolerances.

REFERENCES 1. Ian Getreu, Modeling the Bipolar Transistor, Tektronix, Inc., Beaverton, OR.,

1976. 2. Boyd, R., Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 87. 3. Boyd, R., Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 44.

This page intentionally left blank

10

DC Circuits

10.1 RESISTANCE TEMPERATURE DETECTOR (RTD) CIRCUIT In this section, the DC RSS and EVA limits of the following circuit are shown. R8

R9

V6

Eref 2

−

3 +

V7

11

Eref R2

R1

V−

R3

V1 R4

1

V+

V3

4

RT V2 R5 R6

V4

11 2 − V− 3 +

V5 1

V+ 4

R7

Eref

R1 := 4.53 R6 := 4.53

R2 := 34.8 R7 := 27.4

R3 := 132 R4 := 9.09 R5 := 9.09 R8 := 20 R9 := 20 RT := 1.915

Values given in kohms: Ao := 106 7 99 3 1 2 RR := 99 4 99 6 1 Y := 5

1 3 5 3 4 2 0 6 7 2

GG := 0

R1 R2 R 3 R 4 R5 R6 R 7 R8 R9 RT

7 EE := 5

Ein := (99

0 0

0 4

6 3

Ao Ao

U := 7

5)

219

220

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd Calculate “real-world” asymmetric tolerances as decimal percentages. Tinit := 0.001 Tlife := 0.002 ppm := 10–6 TC1 := 50·ppm TC2 := 25·ppm Thi := Tinit + Tlife + 35·TC1 Tlo := –Tinit – Tlife – 80·TC1 Trhi := 8.1·10–4 Trlo := –Trhi Treflo := –0.02 – 80·TC2 Trefhi := 0.02 + 35·TC2 p := 1..9 T1,p := Tlo T2,p := Thi T1,10 := Trlo T2,10 := Trhi T1,11 := Treflo T2,11 := Trefhi Display asymmetric tolerance array T: R1

R2

R3

R4

R5

R6

−0.7 T= 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

R7

R8

R9

RT

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.081 0.081

Eref −2.2 % 2.0875

Call RSS/EVA WCA subprogram. → Reference:C:\mcadwca\wcaref11\dcwa.mcd SensT = (–2.41 3.68 0.81 –4.13 –0.82 –2.11 0.89 –2.7 2.7 4.09 1) Tolerance array T and sensitivities are in the same order as the RR array, i.e., the normalized sensitivity of R4 is –4.13 %/%, Eref sensitivity is 1 %/%, etc. 4.1277 Vrss = V 4.5589

3.7379 Veva = V 4.9848

Va = 4.3433V

Va is the average output, not the nominal output. With symmetric tolerances, the nominal output Vo and the average output Va would be the same (see Section 10.2). ∆rss := Vss2 – Vrss1 ∆eva :=Veva2 – Veva1 ∆rss = 0.431 ∆eva = 1.247 As expected, the tolerance spread of RSS is less than EVA. Note that when using the reference program dcwca.mcd, the user must supply the complete tolerance array T as shown in the preceding text. This facilitates using asymmetric tolerances. In other programs, the user supplies only the symmetric tolerances, namely, resistor tolerance Tr, capacitor tolerance Tc, and the inductor tolerance Ti, and in some cases, the input voltage source tolerance Te.

DC Circuits

221

10.2 A NOTE ON ASYMMETRIC TOLERANCES The NOS method of handling a symmetric tolerances is described in this section. Example: Ra = 1000 For Ra, let the asymmetric tolerances be: T1 := – 0.01

T2 := 0.03

The average value of the two asymmetric tolerances plus one is Mr: Mr := 1 +

T2 + T1 2

Mr = 1.0100

For symmetric tolerances, Mr = 1.0000 Statistically, the average value of Ra is no longer 1000; it is: Rb := Mr·Ra

Rb = 1010

Ra has the limits: Ra1 := Ra·(1 + T1)

Ra1 = 990

Ra2 := Ra·(1 + T2) Ra2 = 1030

Because the asymmetric tolerance is Ra1 = 990 and Ra2 = 1030, the symmetric tolerance of these two extremes about the average value Rb is:

Tv :=

T2 − T1 2 ⋅ Mr

Tv = 1.98% Rb1 := Rb·(1 – Tv) Rb2 := Rb·(1 + Tv) Symmetric vs. asymmetric

0.5

Ra

Bin height

0.4

Rb

0.3 0.2 0.1 0 970

980

990

1000 1010 R value (Ohms)

1020

Symmetric Asymmetric

Ra = 1000 Rb = 1010 Ra1 = 990 Ra2 = 1030 Rb2 = 1030

Rb1 = 990

1030

1040

222

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Normally distributed inputs will yield a Gaussian curve of Rb, as shown in the preceding figure. By definition, there is no Gaussian curve for a resistor with a mean of 1000 and –1%, +3% tolerances. But there is one with exactly the same tolerance range (40 Ω) averaged about Rb. The components with asymmetric tolerances are then given a new average value with symmetric tolerances, from which the EVA and RSS values are calculated. From statistics:

(

If F = g(x1,x2,…,xn), then F = g x1 , x 2 , …, x n

)

where the overbars indicate average value. The average output Va is then calculated with these average values, whereas the nominal output Vo is calculated using the nominal component values. These calculations are used in the routines for Ta, Va, and Vrss in the subprogram dcwca.mcd.

10.3 CENTERED DIFFERENCE APPROXIMATION — SENSITIVITIES The following demonstrates a more accurate method of calculating numerical derivatives and sensitivities [1].

True derivative

Fore shot

Back shot

Better approximation

The example function used here is two resistors with a parallel resistance of Rp = 75Ω. A third resistor R3 is added to make Rp slightly less than 75Ω at Rp = 74.8Ω. First, we determine the value of R3 required for Rp = 74.8Ω, and then a more accurate sensitivity of R3 is calculated using the centered difference method: R1 := 100

R2 := 300

R1 ⋅ R 2 = 75 R1 + R 2

Rp := 74.8

Solving for R3: 1 H ( Rp, R1, R 2 ) := 1 1 1 EQHERE − − Rp R1 R 2

R3 := H(Rp,R1,R2) R3 = 28050

The required value of R3 for Rp = 74.8.

DC Circuits

223

We find the numerical derivative of H with respect to Rp as follows: dpf := 0.0001

Q := 1 + dpf B := 1 – dpf

(dpf = derivative perturbation factor) Rr := H(Rp·Q,R1,R2) (fore shot) Rr = 29143 This is equivalent to y + ∆y = f(x + ∆x) in calculus. Rr := H(Rp·B,R1,R2) (back shot) Rb = 27036 Equivalent to y – ∆y = f(x – ∆x) Then 2·∆y = f(x + ∆x) – f(x – ∆x)

The approximate derivative is then usual

∆y f ( x + ∆x ) − f ( x − ∆x ) instead of the = ∆x 2 ⋅ ∆x

∆y f ( x + ∆x ) − f ( x ) Rr − Rb = , which here is D := ∆x ∆x 2 ⋅ Rp ⋅ dpf

D = 140822

1 1 The exact derivative dr3 = dR3/dRp is with Ra := Rp ⋅ + R1 R 2 dr 3 :=

1

Ra

+

(1 − Ra ) (1 − Ra )2

is

dr3 = 140625

Normalized sensitivities are defined as S =

x dy ⋅ and are in (dimensionless) y dx

Rp ( Rr − Rb ) Rr − Rb = ⋅ R 3 2 ⋅ Rp ⋅ dpf 2 ⋅ R 3 ⋅ dpf The centered difference approximation method gives:

units of %/%. Then Sr =

Sr =

Rr − Rb 2 ⋅ R 3 ⋅ dpf

Sr = 375.525

The exact sensitivity is: Sre :=

Rp ⋅ dr 3 R3

Sre = 375

Just using the fore shot: Su :=

Rr − R 3 R 3 ⋅ dpf

Su = 389.57

224

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Percentage error: Su − 1 = 3.89% Sre

Sr − 1 = 0.14% , Sre

which is much more accurate.

10.4 RTD CIRCUIT MONTE CARLO ANALYSIS (MCA) For the schematic, see Section 10.1. Call circuit information from Section 10.1. → Reference:C:\crc_book_ms\wca_mcd\dctdwca.mcd The same asymmetric tolerances are used: R1

R2

R3

R4

R5

R6

−0.7 T= 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

R7

R8

R9

RT

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.081 0.081

Eref −2.2 % 2.0875

Nk := 20000 nb := 30 nb = number of histogram bins. Call normal and uniform DC MCA subprograms. → Reference:C:\mcadwca\wcaref11\dc_mca_un.mcd Vrss and Veva from Section 10.1 are: 4.3258 4.3440 4.0482 4.6576 Vstat = 0.2159 4.3439 3.9365 4.8538 0.3750

Nominal Norm_mean Norm_min Norm_max Norm_3σ Unif_mean Unif_min Unif_max Unif_3σ

4.1277 Vrss = 4.5589

3.7379 Veva = 4.9848

DC Circuits

225 Histogram - uniform dist input

0.12

Bin height

Veva1 pvnh E(binnh)

Veva2

0.08

0.04

0 3.7

3.8

3.9

4

4.1

4.2

Unif dist

4.3 4.4 4.5 binnh volts DC

4.6

4.7

4.8

4.7

4.8

4.9

5

Ideal Guassian dist Histogram - normal dist input

0.12

Vrss2

Bin height

Vrss1 pvnh E(binnh)

0.08

0.04

0 3.7

3.8

3.9

4

4.1

Norm dist Ideal Guassian dist

4.2

4.3

4.4

4.5

4.6

4.9

5

binnh volts DC

Note the difference in the two outputs. The normal distribution is very close to RSS values. The uniform distribution, although wider than RSS, does not and will not approach EVA values no matter how large Nk is. The reason the output is approximately normal when all components have a uniform distribution is because of the central limit theorem from statistics [3]. When this occurs, the ratio of 3σU to 3σN averages 3 [2]. To show that EVA may be an unrealistic analysis for circuit specification limits, the following plot shows uniform distribution input MCA extremes (minimum and maximum) with increasing Nk compared to EVA limits (Veva) in percent. For example, at 5%, the MCA voltage extremes are Vmc1 : = 3.9346 Vmc = 4.7474

3.7379 Veva = 4.9848

Veva1 Veva 2 Vmc 2 : = 1 − 0.05 1.05

226

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Percent MCA vs EVA vs Nk

10 8 6

Percent

4 Dnav1,r Dnav2,r

2 0 −2 −4 −6 −8 −10

1

2

3

4

5

6

7

r+1 Nk = 10^(r + 1)

Note that at Nk = 1 million samples, the percentage deviation is still not close to zero. (These ten plotting points are the average of seven.)

10.5 RTD MCA WITH R4 TOLERANCE = 10% Call circuit information from Section 10.1. → Reference:C:\mcadwca\caNLwca11\dcrtdwca.mcd T1,4 := –0.1

T2,4 := 0.1

Set R4 at 10% tolerance. Nk := 20000 number of MCA samples nb := 30 nb = number of histogram bins. → Reference:C:\mcadwca\wcaref11\dc_mca_un.mcd By no means will all DC circuits have a normal distribution output with a uniform distribution input. If one component has a large sensitivity and tolerance, it will tend to dominate, and the output will be more uniform in appearance. As an example, assigning a tolerance of ±10% to R4 (sensitivity 4.13 %/% being the largest), the following histogram results: (Note scale changes.)

DC Circuits

227 R4 tolerance 10%

0.08

Bin height

0.06 pvnh E(binnh)

0.04 0.02 0

2

2.5

3

3.5

Unif dist Ideal guassian dist

4

4.5 5 binnh volts DC

5.5

6

6.5

7

10.6 RTD CIRCUIT FAST MONTE CARLO ANALYSIS (FMCA) For the schematic, see Section 10.1. Call circuit data from Section 10.1. → Reference:C:\mcadwca\CaNLwca11\dcrtdwca.mcd Call the FMCA subprogram: → Reference:C:\mcadwca\wcaref11\dc_fmca.mcd U=7

Nf := 211

Nf = 2048

The output shown in the following text is the minimum and maximum voltage at all U nodes and using all Nf possible tolerance combinations. Because there are ten resistors and one reference voltage in the RTD circuit, Nf has the value shown in the preceding text. Min −0.603 1.0038 0.7516 0.7516 Va = 3.7379 −6 4.8328 × 10 −5.1648

Max −0.4711 1.1379 0.8569 0.8569 4.9848 5.1648 × 10 −6 −4.8328

Node V1

Node V5 Node V7

228

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

As before, we select the output voltage: Y=5 3.7379 Vfmca := (VaT)〈Y〉 Vfmca = 4.9848 From the previous EVA (Section 10.1): 3.7379 Veva = 4.9848 Hence, no difference between EVA and FMCA is found in this circuit. This is not true for all DC circuits.

10.7 A CASE FMCA GREATER THAN EVA Another circuit in which the FMCA limits are greater than the EVA limits is analyzed in this section. K : = 103

V := 1 R1

RF

V1

E1 R3 R2

V2

E2

V3

11 2 − V− 3 +

1

V+ 4

R4

R1 := 1·K RF := 10·K R2 := 1·K R3 := 10·K R4 := 10·K E1 := 4·V E2 := 4·V U := 3 Y := 3 EE := (3 0 2 1 106) 99 98 RR := 1 2 3

1 2 0 0 1

R1 R2 R 3 R 4 RF

99 Ein := 98

E1 E 2

GG := 0

→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd

DC Circuits

229

3.636 V = 3.636 3.636

V := 1solve(A1, B2)

Tr := 0.01 − Tr T := Tr

V3 := VY

V3 = 3.636

Te := 0.05 − Tr Tr

− Tr Tr

− Tr Tr

− Tr Tr

− Te Te

− Te Te

→ Reference:C:\mcadwca\wcaref11\dcwca.mcd S1 := Sens S1T = (1.00001

–1.09091

–1

1.09091

–0.00001

–11

12)

Approximate sensitivities are obtained using the centered difference approximation (CDA) method. RSS/EVA results: −0.7733 Veva = 7.8958

0.6756 Vrss = 6.597

→ Reference:C:\mcadwca\wcaref11\dc_fmca.mcd 3.448 Va = 3.448 −0.773

3.825 3.825 7.983

−0.7733 Vfmca = 7.9831 pce :=

Vfmca 2 −1 Veva 2

c := 1..2

Vfmcac := VaY,c

−0.7733 Veva = 7.8958 pce = 1.106%

Although the difference is only 1.1%, there is no guarantee that this will always be the case. Exact Sensitivities for Comparison 1 1 + E 2 ⋅ 1 + R1 ⋅ 3 R RF RF − E1 Vo = 3.636 ⋅ Vo := R2 R1 1+ R4

230

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Derivatives and exact sensitivities:

dR1 :=

− RF ⋅ E 2 ⋅ R 4 − E1 ⋅ ( R 2 + R 4 )

Sens1 :=

R12 ⋅ ( R 2 + R 4 )

1 1 − E 2 ⋅ RF ⋅ R 4 ⋅ 1 + R1 ⋅ + RF R 3 dR 2 := 2 R1 ⋅ ( R 2 + R 4 ) dR 3 : =

− E 2 ⋅ RF ⋅ R 4 R 32 ⋅ ( R 2 + R 4 )

Sens 3 : =

R3 ⋅ dR 3 Vo

Sens 4 : =

dRF :=

E 2 ⋅ R 4 ⋅ ( R1 + R 3) − E1 ⋅ R 3 ⋅ ( R 2 + R 4 ) R1 ⋅ R 3 ⋅ ( R 2 + R 4 )

dE1 : =

− RF R1

RF dE 2 : = ⋅ R1

R2 ⋅ dR 2 Vo

Sens 2 : =

1 1 1 + R1 ⋅ RF + R 3 E 2 ⋅ RF ⋅ R 2 dR 4 := ⋅ R1 ( R 2 + R 4 )2

Sens 6 : =

R1 ⋅ dR1 Vo

R4 ⋅ dR 4 Vo

Sens 5 : =

RF ⋅ dRF Vo

E1 ⋅ dE1 Vo

1 1 1 + R1 ⋅ + RF R 3 R2 1+ R4

Sens 7 : =

E2 ⋅ dE 2 Vo

Compare approximate and exact values: ppm := 10–6 SensT = (1 –1.0909091 –1

1.0909091

0

–11

12)

which are the exact sensitivities. S1T = (1.00001 –1.0909091 –0.999999 1.0909091 –0.000011 –11 12) which are approximate values obtained using CDA. The difference in parts per million: Ec := ( Sens − S1) EcT = (–10.01

0

–0.99 –0.009

11

6.15 × 10–6

–6.267 × 10–6) ppm

DC Circuits

231

10.8 TOLERANCING INPUTS K := 103 This example shows the necessity of applying tolerances to independent inputs when M > 1. The difference between EVA and RSS computations with the inputs at zero tolerance and again at 5% tolerance are shown in the following text. Note that there is no direct or convenient method of tolerancing inputs in SPICE. R1

RF

V1

E1 R3

2 R2

V2 3

E2

− 11 V−

V3

V+

1

+

4

R4

R1 := 1·K RF := 10·K R2 := 1·K R3 := 10·K R4 := 10·K E1 := 4·V E2 := 4·V U := 3 Y := 3 EE := (3 0 2 1 106) 99 98 RR := 1 2 3

1 2 0 0 1

R1 R2 R 3 R 4 RF

E1 E 2

99 Ein := 98

GG := 0

→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd

V := 1solve(A1,B2)

3.636 V = 3.636 3.636

R1

R2

R3

R4

− Tr T := Tr

− Tr Tr

− Tr Tr

− Tr Tr

V3 := VY

V3 = 3.636

RF E1 E 2 − Tr Tr

0 0

0 0

Both inputs (last two columns) at zero tolerance. → Reference:C:\mcadwca\wcaref11\dcwca.mcd SensT = (1

–1.091

–1 1.091

–0

–11

12)

Note the very high sensitivities for inputs E1 and E2. V1r := Vrss V1e := Veva

Tr := 0.02

232

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

We repeat with the inputs given a tolerance of Te := 0.05. − Tr − Tr − Tr − Tr − Tr T := Tr Tr Tr Tr Tr Call the wca reference function again:

− Te Te

− Te Te

→ Reference:C:\mcadwca\wcaref11\dcwca.mcd V2r := Vrss V2e := Veva 3.484 V1r = 3.789

3.321 V1e = 3.930

Inputs 0% tolerance.

0.673 −1.008 Inputs +/– 5% tolerance. V2 r = V2 e = 6.600 7.970 Note that the V2r and V2e tolerances spreads (Te = 5%) are much wider than those of V1r and V1e (Te = 0%).

10.9 BETA DISTRIBUTIONS [4–6] Beta functions can be used in Mathcad to generate skewed random distributions. These skewed input distributions are then used as MCA inputs and output histograms examined. First, Beta functions are mathematically described and plotted by the y programming sequence below. n := 1..100 y : = for k ∈1..7 s1 ← k + 1 s2 ← 10 – s1 Bk ← 2 ⋅

∫

π 2

0

sin ( x )

2⋅s1−1

⋅ cos ( x )

for n ∈1..101 x←

n −1 100

y s1,nn ← y

x s1−1 ⋅ ( x − 1) Bk

s 2 −1

2⋅s 2 −1

dx

DC Circuits

233 Beta functions, y(s1, n)

4

y2,n

3

y4,n y5,n y6,n y8,n

2

1

0

0 s1 = 2 s1 = 4 s1 = 5 s1 = 6 s1 = 8

50 n

100

Among other things, beta functions have been used to describe manpowerloading forecasts for new projects or contracts. “Front loaded,” s1 = 2; “rear loaded,” s1 = 8. Beta (Skewed) Distributions Uses Mathcad’s built-in “rbeta” function. nb := 50 q := 1..nb + 1 nh := 1..nb Nk := 30000 s1 := 2 z := rbeta(Nk,s1,10 – s1) σ2 := stdev(z) BH := max(z) BL := min(z) BH − BL bin2q := BL + intv·(q – 1) pb2 := hist(bin2,z) nb s1 := 4 z := rbeta(Nk,s1,10 – s1) σ4 := stdev(z) BH := max(z) BL := min(z) intv :=

BH − BL bin4q := BL + intv·(q – 1) pb4 := hist(bin4,z) nb s1 := 5 z := rbeta(Nk,s1,10 – s1) σ5 := stdev(z) BH := max(z) BL := min(z) intv :=

intv :=

BH − BL nb

bin5q := BL + intv·(q – 1) pb5 := hist(bin5,z)

234

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Beta distributions (smoothed)

2000

pb5nh pb4nh

1500 1000

pb2nh 500 0

0

0.1

0.2

0.3

s1 = 5 s1 = 4 s1 = 2

σ2 = 0.122

σ4 = 0.148

0.4 0.5 0.6 0.7 bin5nh, bin4nh, bin2nh

0.8

0.9

σ5 = 0.151

Note the increase in the standard deviation σ as s1 increases.

10.10 RTD MCA — BETA (SKEWED) DISTRIBUTION For the schematic, see Section 10.1. Call circuit data from Section 10.1: → Reference:C:\mcadwca\CaNLwca11\dctrdwca.mcd The same tolerances are used: −0.7 T= 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.4 475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.081 0.081

−2.2 % 2.087

Overwrite R4 tolerance at 10%: T1,4 := –0.1

T2,4 := 0.1

(disabled when not used) For beta distributions skewed left: s1 := 2 (see Section 10.9) nb := 30 (number of histogram bins) Nk := 20000

−0.7 0.475

1

DC Circuits

235

Call beta distribution subprogram dc_beta.mcd: → Reference:C:\mcadwca\wcaref11\dc_beta.mcd With original tolerances: R4 10% 4.3258 4.3409 Vstat = 4.1377 4.5474 0.1551

Nominal Average Min Max 3σ

4.3258 5.3857 Vstat = 3.3089 6.3131 1.3997

Vavg := Vstat2

Note that the beta distribution output is not skewed to the left as is the input. This is due to the central limit theorem from statistics, with all rv’s approximately equally weighted. Nk = 20000 Output Histogram-beta (skewed) Input

0.12

Vavg

Bin height

0.1 pvnh E(binnh)

0.08 0.06 0.04 0.02 0

4

4.05

4.1

4.15

Histogram Ideal gaussian

4.2

4.25 4.3 4.35 binnh Volts DC

4.4

4.45

4.5

4.55

4.6

With R4 10% tolerance again, the beta distribution output is skewed to the right, whereas the input is beta-skewed to the left. This is due to the large-tolerance high-sensitivity resistor (R4, –4.13 %/%) dominating the output. Because the sensitivity is negative, the output is skewed opposite to the input. As with the uniform distribution input given earlier (see Section 10.4), the output will approach the normal (Gaussian) only when the random variables are approximately equally weighted. Also, note the expected change of the horizontal-axis scale.

236

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad With R4 10% tolerance

0.12

Vavg

Bin height

0.1 0.08 pvnh

0.06 0.04 0.02 0

3

3.5

4

4.5

5 5.5 binnh volts DC

6

6.5

7

From the preceding histogram, a principle of statistics, “The mean does not equal the mode” is illustrated.

10.11 MCA OF RTD CIRCUIT USING BIMODAL (GAPPED) DISTRIBUTION INPUTS These distributions will occur when vendors prescreen components for tighter tolerances. For the schematic, see Section 10.1. Call circuit data from Section 10.1: → Reference:C:\mcadwca\CaNLwca11\dcrtdwca.mcd The same tolerances are used: −0.7 T= 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.4 475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.081 0.081

Create “gapped” Normal distribution input: Set gap width equal to 0.5 on either side of zero. sp := 0.5

nb := 30

Nk := 20000

−0.7 0.475

−0.7 0.475

−2.2 % 2.087

DC Circuits

237

z := k ← 0 while k < Nk y ← sin ( 2 ⋅ π ⋅ rnd (1) ) ⋅ −2 ⋅ ln ( rnd (1) ) if ( y < −sp ) ∨ ( y > sp ) k ← k +1 zk ← y z q := 1..nb + 1 intvz :=

nh := 1..nb

VH − VL nb

VL := min(z) VH := max(z)

binzq := VL + intvz·(q– 1) pz := hist(binz,z)

The expression for y is known as the Box–Muller transformation for normal distributions [7]. Bimodal (gapped) input

3000

pznh

2000 1000 0 −4

−2

0

2

4

binznh

Apply gapped inputs to all Nc = 10 components of the RTD circuit using subprogram dc_gap.mcd: → Reference:C:\crc_book_ms\Ref_files_v11\dc_gap.mcd Note that the bimodal output in the following text is approximately normal and not gapped as is the input. This is due to the central limit theorem from statistics, with the rv’s approximately equally weighted.

238

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

4.3258 4.3419 Vstat = 4.0302 4.6878 0.2690

Nk = 20000

Nominal Average Min Max 3σ

Gapped Input - R4 Original Tolerance

0.16

Vstat2

0.14

Bin Height

0.12 pvnh

0.1

E ( binnh) 0.08 0.06 0.04 0.02 0 3.8

3.9

4

4.1

4.2

4.3

4.4

4.5

4.6

binnh Volts DC Bimodal Dist Ideal Normal

Set R4 tolerance at 10%, and call the dc\_gap subprogram again: T1,4 := –0.1

T2,4 := 0.1

→ Reference:C:\crc_book_ms\Ref_files_v11\dc_gap.mcd R4 10% tolerance. 4.3258 4.3597 Vstat = 2.0577 7.1057 2.2509

Nominal Average Min Max 3σ

4.7

4.8

DC Circuits

239

Gapped Input - R4 +/-10%

0.16

Vstat2

0.14

Bin Height

0.12 pvnh

0.1

E ( binnh) 0.08 0.06 0.04 0.02 0

2

2.5

3

3.5

4

4.5

5

5.5

6

6.5

7

binnh Volts DC Bimodal Dist Ideal Normal

Note the larger horizontal scale. The larger tolerance on R4 causes the output distribution to be much wider. As in the case of the beta distribution inputs, the gap is now evident because the gapped R4 distribution dominates. In terms of volts DC, the gap width is k := 1..2

Vgap k := Vstat 2 +

( −1)k ⋅ sp ⋅ Vstat 5 3

3.985 Vgap = V 4.735

REFERENCES 1. S.C. Chapra, R.P. Canale, Numerical Methods for Engineers, 3rd ed, McGraw-Hill, Boston, MA, 1998, p. 93. 2. R. Boyd, Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 188. 3. H. Arkin and R. R. Colton, Statistical Methods, Barnes & Noble COS, New York, 1970, p. 144. 4. Abramowitz and Stegun, Handbook of Mathematical Functions, Dover, New York, 1970, p. 258. 5. Erwin Kreyszig, Advanced Engineering Mathematics, John Wiley & Sons, New York, 2nd ed, 1968, p. 714. 6. M. Spiegel, Advanced Mathematics for Engineers & Scientists, Schaum’s Outline Series, New York, p. 211. 7. Eric W. Weisstein, Box-Muller Transformation, From http://mathworld.wolfram.com/ Box-Muller Transformation.html.

This page intentionally left blank

11

AC Circuits

11.1 CIRCUIT OUTPUT VS. COMPONENT VALUE In this section the definition of monotonicity is given and illustrated with the DC circuit shown in the schematic below. Then on page 243, an example of nonmonotonicity in an AC circuit is given for comparison. Examine the components for monotonicity: V := 1

K := 103

Definition of monotonicity: A function or series is monotonic increasing if X1 ≤ X2 ≤ X3, etc. Example: 1.0, 2.0, 2.0, 2.5, 2.6, 2.601, ... A function or series is monotonic decreasing if X1 ≥ X2 ≥ X3, etc. Example: 9.0, 9.0, 8.8, 8.7, 8.7, 8.69, ... We examine the component slopes (derivatives) of a DC differential amplifier by stepping two resistor values, R1 and R2: R1

R2

1

Ein2

11 2 − V−

R3 Ein1

Ein1 := 1

Ein2 := 1

3 + R4

1

V+ 4

Ao := 106

R1 := 1·K

Ein1 Ein 2

EE := (2

R4 := 10·K

99 Ein := 98

98 1 RR := 99 3

1 2 3 0

R1 R2 R 3 R 4

3

2

U := 3

R2 := 10·K 0

3

1

R3 := 1·K

Ao)

GG := 0

241

242

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\mcadwca\wcaref11\dcomm42.mcd Vn := 1solve(A1,B2)

VnT = (0.909

20

0.909)V

Vary R1 and R2 from 80 to 120%: ml := 0.8 A K :=

m2 := 1.2

W := 500

k := 1..W + 1

m 2 − m1 ⋅ ( k − 1) + m1 W

Component multiplier: A1 = 0.8

AW+1 = 1.2

Vn ( U, EE, GG, RR, Ein ) : = for k ∈1..W + 1 RR1,3 ← R1 ⋅ A k

Vaary R1

AE ← G ( U, EE, GG, RR, Ein ) AE routine from A1 ← AE1

dccomm42.mcd

B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v2 a k ← ( vn k )2 RR1,3 ← R1 for k ∈1..W + 1

Restore R1 to

RR 2,3 ← R 2 ⋅ A k

nominal value

AE ← G ( U, EE, GG, RR, Ein )

Vary R2

A1 ← AE1 B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v2 a k ← ( vn k )2 v2 a v2 b V2a := Vn(U, EE, GG, RR, Ein)1

V2b := Vn(U, EE, GG, RR, Ein)2

AC Circuits

243

Plot of output vs. component value change: R1

25

V2ak 20

15 0.8

R2

25

V2bk 20

0.9

1 R1·Ak

15

1.1

8

9

K

10 R2 ·Ak

11

12

K

Hence, resistors are monotonic in virtually all DC circuits because DC circuits are functions of R and/or 1/R. They can be nonlinear as R1. They can be bipolar but remain monotonic. Find the component slope for multiple-feedback-band pass filter (BPF) capacitor C1: R1 := 6366.2 uF := 10–6 C2 := 0.1·uF C1 := 0.1·uF

R2 := 80.5

R3 := 127324

Plot the output of the BPF at four constant frequencies (F1) while varying only C1. F1 := (470

480

490 500)T

e := 1..rows(F1)

S1 := 2 ⋅ π ⋅ F1 ⋅ −1 Instead of the NDS method, it is quicker to use the BPF transfer function:

G ( R1, R 2, R 3, C1, C2, s ) : =

s R1 ⋅ C1

s2 +

1 1 s 1 1 1 ⋅ + ⋅ + + R 3 ⋅ C1 ⋅ C2 R1 R 2 R 3 C1 C2

Clvk := C1·Ak Vary C1 80% to 120% V1k,e := |G(R1, R2, R3, C1vk, C2, sle)|

244

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad C1 varied from 0.08 uF to 0.12 uF

15 V1k,1 V1k,2 V1k,3 V1k,4

10

5 0 0.08

0.1 C1vk

470 Hz 480 Hz 490 Hz 500 Hz

0.12

uF

Frequency is constant for each trace. Only C1 varies. Next, we find the C1 slopes (derivatives) for the frequencies of 470 through 500 Hz to show the relationship between bipolar sensitivities and nonmonotonic components. These slopes are measured at the nominal value of C1, 0.1 uF, as shown by the plot vertical gridline. Note the slope gets steeper (at the 0.1 vertical grid line) from 470 to 480 to 490, and is zero for 500 Hz. h := 0.5·W + 1 h = 251 x2 = 0.10008uF x2 := C1vh+1 ∆x := x2 – x1 y2 := V1hh+1,1 y1 = 3.716V ∆y := y2 – y1

x1 := C1vh y2 = 3.735V

Approximate derivative: ∆y V = 239.51 ∆x uF Sensitivity: x1 ∆y ⋅ = 6.45 y1 ∆x Continuing: y2e := V1h+1,e

Sensle :=

y1e := V1h,e

x1 ∆y e ⋅ y1e ∆x

∆ye := y2e – y1e

6.45 8.41 Sens1 = 9.35 −0.24

x1 := 0.1uF y1 = V1h,1

AC Circuits

245

New set of frequencies, from 510 Hz to 530 Hz: F2 := (510 520 530)T e := 1..rows(F2) V1k,e := |G(R1, R2, R3, C1vk, C2, s2e)|

C1 varied from 0.08 uF to 1.2 uF

Output of BPF (volts)

15 V1k,1 V1k,2

S2 := 2 ⋅ π ⋅ F 2 ⋅ −1

10

V1k,3

5

0 0.08 510 Hz 520 Hz 530 Hz

0.1 C1vk uF Capacitance(uF)

0.12

Frequency is constant for each trace. Only C1 varies. y2e := V1h+1,e

y1e := V1h,e

x1 ∆y e Sens2 e := ⋅ y1e ∆x

∆ye := y2e – y1e

−10.16 Sens2 = −9.56 −7.76

Plot all seven sensitivities: Sens := stack(Sens1, Sens2)

F := stack(F1,F2)

Hence, bipolar sensitivities indicate nonmonotonic components. Do not use EVA, RSS, or FMCA tolerance analysis. Results will be erroneous. Use MCA.

246

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Sensitivities vs. frequency

15 10

%/%

5 Sens

0 −5 −10 −15 460

470

480

490

500 510 F Freq(Hz)

520

530

540

If more frequency points were used, this plot would duplicate the sensitivity plot of C1 shown in the BPF EVA, Section 11.10. As shown, bipolar sensitivities indicate the presence of nonmonotonic components. Hence, nonmonotonicity can be detected by calculating the normalized sensitivities, which is part of the normal tolerance analysis procedure given here. EVA, RSS, or FMCA should not be used if nonmonotonic components are present. The magnitude of the errors is a function of the maximum magnitudes of the bipolar sensitivities. For circuits such as the Butterworth low-pass filter, the errors may be negligible. If in doubt, use MCA. Some quotes from the literature on monotonicity are germane: From Improving the Manufacturability of Electronic Designs,[2] “Nonparametric boundary analysis … selects only those components in the tails of the distributions — the combinations most likely to cause yield problems — for a complete circuit simulation. An important constraint is that the functions … must be approximately monotonic… the author conjectures that the vast majority of practical circuit designs are approximately monotonic.” (Present author’s note: Guessing is not necessary now.) From Spence and Soin [1]: “Unfortunately, there is no straightforward procedure for testing whether monotonicity is obeyed.” (Present author’s note: True in 1988; not true in 1999.) From PSPICE user’s manual on worst-case analysis: “Worst-case (.WCASE) analysis … will show the true worst-case results when the collating function is monotonic with all tolerance combinations. Otherwise, there is no guarantee. Usually you cannot be certain if this condition is true, but insight into the operation of the circuit may alert you to possible anomalies.” (Present author’s note: Now you can be certain that this condition [nonmonotonicity] is true by looking for bipolar sensitivities. See the EVA of the band-pass filter [Section 11.10] for an example of “no guarantee.”)

AC Circuits

247

11.2 EXACT VALUES OF C1 SENSITIVITY In this section the exact expression for the sensitivity of C1 is calculated and plotted for comparison with the rough plot just shown on page 246 and the sensitivity plots in Section 11.10, page 258. fo := 500

wo := 2·π·fo DF :=

NP := 100 ωi := 2·π·fi

Q := 20

LF − BF NP

BF := 400

i := 1..NP

LF := 600

Fi := BF + DF·(i –1)

From Reference 3, SC1 ( ω ) : =

(

)

ω 2 ⋅ 2 ⋅ Q 2 ⋅ wo 2 − ω 2 + wo 2

(

2 ⋅ Q ⋅ wo − ω 2

2

2

)+ω

2

⋅ wo 2

[1] F36 = 470 SC1 ( ω 36 ) = 6.60 F41 = 480 SC1 ( ω 41 ) = 8.69 Sensitivity of C1

10 8 6

%/%

4 SC1(ωi)

2 0 −2 −4 −6 −8 −10 400

420

440

460

480

Value at ω = ωo: SC1(wo) = 0.5 Zero-crossing frequency:

fz := fo ⋅ 1 +

1 2 ⋅ Q2

fz = 500.31

500 520 Fi Freq(Hz)

540

560

580

600

248

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Peak amplitudes with Q:

k := 1..8

Qk := 5·(k – 1) + 5

( Q k )2

Vc1a k :=

( )

4 ⋅ Q2

k

−1

Vc1Q := augment(Q, Vc1a) Peak magnitude of C1 sensitivity in %/%: 5 Vc1Q T = 2.51

10 5.01

15 7.5

20 10

25 12.5

30 15

35 17.55

40 20

Note that the peak magnitude of C1 sensitivity is approximately Q/2.

11.3 MULTIPLE-OUTPUT EVA An example is the third-order Butterworth low-pass filter. uF := 10–6 K := 103 R1 Ein

V1 C1

V2

R2

C2

11 2 − V−

1

V+

3 +

4

V4

R3

V3 C3

R1 := 1·K

R2 := 1·K

C2 := C1

C3 := C1

99 RR := 2 4

1 3 3

LL := 0 BF := 2

R1 R 2 R 3

GG := 0 ND := 2

1 ⋅ uF 2⋅π Ein := (99 1)

R3 := 1·K U := 4

C1 :=

1 CC := 1 3 EE := (4 0 PD := 50

C1 C2 C 3

2 4 0 0

2

106)

AC Circuits

249

→ Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Call the wca function acwcalog.mcd with Y = 1, and store as Veva1. Y := 1 → Reference:C:\mcadwca\wcaref11\acwcalog.mcd Vev11 := MPeva1

Vev12 := MPeva2

Y := 4

Call the wca function acwcalog.mcd with Y = 4, and store as Veva2. → Reference:C:\mcadwca\wcaref11\acwcalog.mcd Vev21 := MPeva1

Vev22 := MPeva2

Y := 3

Call the wca function acwcalog.mcd with Y = 3, and store as Veva3. → Reference:C:\mcadwca\wcaref11\acwcalog.mcd Veva31 := MPeva1

Veva32 := MPeva2

EVA for V1

10

dBV

0 db[(Veva12)i] −10 db[(Veva11)i] −20 −30 −40

2

2.5

EVA Hi V1 EVA Lo V1

3 Li Log freq(Hz)

3.5

4

250

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA for V4

10

dBV

0 db[(Veva22)i] −10 db[(Veva21)i] −20 −30 −40

2

2.5

3 Li EVA Hi V4 Log freq(Hz) EVA Lo V4

3.5

4

3.5

4

EVA for V3

10

dBV

0 db[(Veva32)i] −10 db[(Veva31)i] −20 −30 −40

2

2.5

3 Li EVA Hi V3 Log freq(Hz) EVA Lo V3

11.4 BUTTERWORTH LOW-PASS FILTER CIRCUIT The schematic and components are given here. The various worst-case analyses, MCA, EVA, and FMCA, will refer to this circuit via a subprogram call.

R2 R1 Ein

C2

V1 R3

C1 11 2 − V− V2 3 +

V3 1

V+ 4

Unit suffixes: K := 103 uF := 10–6 nF := 10–9 R1 := 1.43·K R2 := 14.3·K R3 := 9.09·K

C1 := 2·nF

AC Circuits

251

C2 := 0.1·uF 99 RR := 3 1 LL := 0

U := 3 1 1 2

R1 R 2 R 3

GG := 0

Y := 3

Ein := (99

3 CC := 1 EE := (3

0

C1 C2

2 0 0

1)

2

106)

11.5 BUTTERWORTH LOW-PASS FILTER MCA For the schematic and component values, see Section 11.4. Call that circuit for data via a reference subprogram: → Reference:C:\crc_book_ms\wca_mcd\bwlpf_ckt.mcd Next, call comm42 to get the state space arrays A, B, D, and E: → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Specify the component tolerances before calling the tolerance array subprogram: Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

Variables: Tr — resistor tolerances in decimal percentage Tc — capacitor tolerances in decimal percentage Ti — inductor tolerances in decimal percentage (set to zero if there are no inductors) Te — input (Ein) tolerance Nk — number of Monte Carlo samples For single inputs (M = 1), Te can be set to zero as the output extremes can be later multiplied by a nonzero 1 + Te if desired. Te should not be set to zero when M > 1, because the sensitivities are no longer 1.0 %/% Call tolerance array subprogram TolArray: → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd Display tolerance array T as a check: The tolerances are in the order RR, CC, LL (if any) and Ein.

252

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R1

R2

R3

C1

C2 Ein

Tr

Tr

Tr

Tc

Tc

Te

−0.02 0.02

−0.02 0.02

−0.1 0.1

−0.1 0.1

0 0

−0.02 T= 0.02

Specify log AC frequency sweep and number of Monte Carlo samples Nk: BF := 2

ND := 2

PD := 50

Nk := 2000

Call the AC MCA subprogram: → Reference:C:\crc_book_ms\Ref_files_v11\mcalog.mcd Create plots: Note the plot parameters — MPmca (for magnitude/phase MCA) column 1 is the output due to uniform distribution inputs; column 2 is for the normal distribution. Nk = 2000

dBV

db[(MPmca1,1)i] db[(MPmca2,1)i] db[(MPmca3,1)i]

Y=3 25 20 15 10 5 0 −5 −10 −15 −20 −25

Uniform MCA at node Y

2

2.25

2.5

Unif MCA Lo Nom Unif MCA Hi

2.75

3 3.25 Li Log freq(Hz)

3.5

3.75

4

AC Circuits

253

dBV

db[(MPmca1,2)i] db[(MPmca2,2)i] db[(MPmca3,2)i]

25 20 15 10 5 0 −5 −10 −15 −20 −25

Normal MCA at node Y

2

2.25

2.5

Norm MCA Lo Nom Norm MCA Hi

2.75

3 3.25 Li Log freq(Hz)

3.5

3.75

4

11.6 BUTTERWORTH LOW-PASS FILTER EVA See Section 11.4 for the schematic. The calculation sequence is the same as that of MCA except for the last analysis subprogram called. → Reference:C:\crc_book_ms\wca_mcd\bwlpf_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2

ND := 2

PD := 50

Call EVA analysis subprogram for log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\acwcalog.mcd Plot sensitivities: Note the slight bipolarity of R2 and C2 sensitivities — more on this later.

254

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Sensitivities, R1, R2, R3

1 0

%/%

%/%

Sensi,1 Sensi,2 Sensi,3

−1 −2

2

2.5

3 3.5 Li Log freq(Hz)

R1 R2 R3

Sensitivities, C1, C2

0.5 Sensi,4 Sensi,5

0 −0.5 −1 −1.5

4

2

2.5 C1 C2

3 3.5 Li Log freq(Hz)

4

Y=3 EVA at node Y

25 20 15

dBV

db[(MPeva1)i] db[(MPeva2)i] db[(MPa1)i]

10 5 0 −5 −10 −15 −20 −25

2

2.25

2.5

EVA Lo EVA Hi Nom

2.75

3 3.25 Li Log freq(Hz)

3.5

3.75

4

This plot is virtually the same as the uniform MCA plot in Section 11.5.

11.7 BUTTERWORTH LOW-PASS FILTER FMCA See Section 11.4 for the schematic. The calculation sequence is the same as that of MCA except for the last analysis subprogram called. → Reference:C:\crc_book_ms\wca_mcd\bwlpf_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

AC Circuits

255

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2

ND := 2

PD := 50

Call FMCA analysis subprogram for log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Y=3 FMCA at node Y

25 20 15 10 dBV

db[(MPfmca1)i]

5

db[(MPfmca2)i]

0

db[(MPfmca3)i]

−5 −10 −15 −20 −25

2

2.25

2.5

2.75

FMCA Lo Nom Norm Hi

3 3.25 Li Log freq(Hz)

3.5

3.75

4

Because the sensitivities are not significantly bipolar, there is no discernible difference between (uniform input) MCA, EVA, and FMCA.

11.8 MULTIPLE-FEEDBACK BAND-PASS FILTER (BPF) CIRCUIT A Multiple-Feeback Band-Pass filter circuit is now used for another example. This band-pass filter has a center frequency of 500 Hz, and Q of 20. The same calculation sequence as in Section 11.7 for the Butterworth low-pass filter will be performed. C2

R3 C1

R1 Ein

V1 R2

K :=103

uF := 10–6

Hz := 1

V2

11 2 − V− 3 +

V3 1

V+

V := 1

4

256

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R1 := 6.34·K R2 := 80.6 R3 := 127·K C2 := C1 U := 3 Y := 3 Ein := (99 99 RR : 1 3

1 0 2

R1 R 2 R 3

GG := 0

EE := (3

1 CC := 3 0

0

2

2 1

C1 := 0.1·uF 1)

C1 C2

LL := 0

106)

11.9 MULTIPLE-FEEDBACK BPF MCA See Section 11.8 for the schematic and component values. The same calculation sequence (except for the last subprogram) is called. → Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Display T for tutorial purposes: R1 −0.02 T= 0.02

R2

R3

C1

−0.02 0.02

−0.02 0.02

−0.1 0.1

C2 Ein −0.1 0.1

0 0

This can be overwritten by an asymmetric T array if desired: −0.02 T= 0.02

−0.02 0.02

−0.03 0.05

−0.05 0.15

−0.05 0.15

0 0

Specify linear frequency sweep and Nk: BF := 400

LF := 600

DF := 2

Nk := 2000

Call the MCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd Extreme center frequency markers from EVA analysis: M1 := 447

M2 := 568

Y=3

Nk = 2000

AC Circuits

257 Uniform MCA at node Y

12 M1

Volts

10 (MPmca3,1)i

8

(MPmca2,1)i

6

(MPmca1,1)i

4

M2

2 0 400

420

440

460

480

Uniform MCA Hi Nominal Uniform MCA Lo

F41 = 480Hz

500 520 Fi Freq(Hz)

540

560

580

600

(MPmca3,1)41 = 10.794V

This is to be compared with the EVA at this same 480-Hz frequency of 3.38 V (see Section 11.10) and the FMCA value of 7.73 V (Section 11.11). Hence, MCA gives the best answer. Normal MCA at node Y

12

M1

Volts

10 (MPmca3,2)i

8

(MPmca2,2)i

6

(MPmca1,2)i

4

M2

2 0 400

420

440

460

480

Normal MCA Hi Nominal

500 520 Fi Freq(Hz)

540

560

580

600

Normal MCA Lo

F41 = 480

(MPmca3,2)41 = 10.586V

The normal distribution maximum is at 480 Hz.

11.10 MULTIPLE-FEEDBACK BPF EVA See Section 11.8 for the schematic and component values. The same calculation sequence except for the last subprogram is called.

258

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Specify linear frequency sweep: BF := 400

LF := 600

DF := 2

Call the EVA analysis subprogram for linear frequency sweep. → Reference:C:\mcadwca\wcaref11\acwcalin.mcd

Sensi,1

5

Sensi,2

0

Sensi,3

−5

Sensitivities, R1, R2, R3

−10 400

450 R1 R2 R3

500 550 Fi Freq(Hz)

Sensitivities, C1, C2

10

%/%

%/%

10

5

Sensi,4 Sensi,5

0 −5 −10 400

600

450 C1 C2

500 550 Fi Freq(Hz)

600

With the exception of R1, note the significant bipolarity of the aforementioned sensitivities. Extreme center frequency markers for symmetric tolerances: M1 := 447

M2 := 568 EVA Outputs

12

M1

Volts

10 (MPeva1)i

8

(MPeva2)i

6

(MPa1)i

4

M2

2 0 400

420

440

460

480

500 520 Fi Freq(Hz)

540

560

580

600

AC Circuits

259

This plot indicates that maximum amplitudes will only be obtained at 447 and 568 Hz. What about at, say, 480 Hz? F41 = 480Hz

(MPeva2)41 = 3.38V

Is 3.38 V the maximum this circuit will ever see at 480 Hz? The answer is no. See the FMCA analysis in Section 11.11.

11.11 MULTIPLE-FEEDBACK BPF FMCA See Section 11.8 for the schematic and component values. The same calculation sequence as in Section 11.8, except for the last subprogram, is called. → Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Specify linear frequency sweep: BF := 400 LF := 600 (1-Hz increments)

DF := 1

Call FMCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=3 Extreme center frequency markers: M1 := 447

M2 := 568

480-Hz amplitude marker: M3 := 7.73·V

260

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Band pass filter FMCA

14 M1

12

Volts

(MPfmca1)i

M2

10

M3

8

(MPfmca2)i

6

(MPfmca3)i

4 2 0 400

420

440

460

FMCA Lo Nom FMCA Hi

F81 = 480

480

500 520 Fi Freq(Hz)

540

560

580

600

(MPfmca3)81 = 7.73V

Peak responses are shown here for 9 of the 32 possible tolerance combinations. This analysis says that 7.73 V is the maximum we will ever see at 480 Hz. This obviously contradicts the EVA, where 3.38 V was predicted as the maximum amplitude. The FMCA, although showing interesting plots, is also incorrect. For the best answer, see the previous MCA (Section 11.9).

11.12 SWITCHING POWER SUPPLY COMPENSATION CIRCUIT A switching power supply compensation circuit is now used for a third example. Again, the same calculation sequence as in Section 11.7 for the Butterworth lowpass filter will be perfomed. K := 103 Meg := 106 u := 10–6 n := 10–9 p := 10–12 C4 R3 V4 C2 R1 Ein

L1

R4

V2

R5 V6 C3 V5

R6

V1 R2

RL V3

C1

V7

11 2 − V− 3 +

1

V+ 4

R1 := 0.2 RL := 9 R2 := 0.01 R3 := 4.99·K R4 := 100·K R5 := 100·K R6 := 1·Meg C1 := 47·u C2 := 1·n C3 := 1·n C4 := 100·p L1 := 180·u U := 7 Y := 7 LL := (1 2 L1) Ein := (99 1)

AC Circuits

261

99 2 2 RR := 2 2 5 5

1 3 0 4 5 6 7

Ao := 106

EE := (7

R1 R2 RL R 3 R4 R5 R 6

3 4 CC := 6 5

0

0

5

0 5 7 7

C1 C2 C 3 C 4

GG := 0

Ao)

11.13 SWITCHING POWER SUPPLY COMPENSATION MCA For the schematic and component values, see Section 11.12. Call data from that circuit. → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Component tolerances: Tr := 0.02

Tc := 0.1

Ti := 0.2

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Display tolerance array T from TolArray.mcd: Tr −2 T= 2

−2 2

−2 2

Tc −10 10

−2 2

−2 2 Ti

−10 10

−10 10

−20 20

−2 2

−2 2

−10 10

Te 0 % 0

Tolerance array T in RR, CC, LL, and Ein order. R1 R2 RL R3 R4 R5 R6 C1 C2 C3 C4 L1 Ein BF : = 2

ND : = 2

PD : = 40

Nk : = 2000

262

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\crc_book_ms\Ref_files_v11\mcalog.mcd Y=7 Uniform & normal MCA at node Y

20

dBV

15 db[(MPmca3,1)i]

10

db[(MPmca2,1)i]

5

db[(MPmca1,1)i]

0

db[(MPmca3,2)i]

−5

db[(MPmca1,2)i] −10 −15 −20

2

2.2

2.4

2.6

Uniform MCA Hi Nominal Uniform MCA Lo Normal MCA Lo Normal MCA Hi

2.8

3 3.2 Li Log Freq(Hz)

3.4

11.14 SWITCHING POWER SUPPLY COMPENSATION EVA See Section 11.12 for the schematic. Call circuit data from that file: KHz = 103 → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0.2

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2

ND := 2

PD := 50

→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Notch marker: Mn := 3.23

3.6

3.8

4

AC Circuits

263

Plot sensitivities on same vertical scale: R1, R2, RL, R3

2

R4, R5, R6, C1

2

Mn

Sensi,2 Sensi,3 Sensi,4

0

Sensi,6

2

3 Li

R1 R2 RL R3

0

Sensi,7 Sensi,8

−1 −2

1

Sensi,5 0 %/%

%/%

Sensi,1

Mn

1

−1 −2

4

2 R4 R5 R6 C1

3 Li

4

C2, C3, C4, L1

2

Mn

%/%

Sensi,9 Sensi,10 Sensi,11 Sensi,12

1 0 0 −1 −2

2 C2 C3 C4

3 Li

4

L1

Note that C1 and L1 are significantly bipolar and, therefore, nonmonotonic. Also note that in the following plot, there is a notch in the EVA Hi trace, which is due to the nonmonotonicity of C1 and L1. Hence, the EVA is incorrect in the vicinity of the notch. The notch is at Mn = 3.23 Y=7

fnotch := 10Mn

fnotch = 1.698KHz

264

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA at node Y

20

Mn

15

dBV

db[(MPeva2)i] db[(MPeva1)i] db[(MPa1)i]

10 5 0 −5 −10 −15 −20

2

2.2

2.4

2.6

EVA Hi EVA Lo Nom

2.8

3 3.2 Li Log Freq(Hz)

3.4

3.6

11.15 SWITCHING POWER SUPPLY COMPENSATION FMCA For the schematic see Section 11.12. Call circuit data from that file. → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0.2

Te := 0

Specify component tolerances. → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 2

ND := 2

PD := 50

Specify AC log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Call AC FMCA subprogram. Y=7

3.8

4

AC Circuits

265

FMCA at Node Y

20 15 10

dBV

db (MPfmca3)i

5

db (MPfmca2)i

0

db (MPfmca1)i

5 10 15 20

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

4

Li

Log Freq (Hz)

FMCA Hi Nom FMCA Lo

11.16 SALLEN AND KEY BAND-PASS FILTER (BPF) CIRCUIT This circuit will show an unusual response to MCA with common component tolerances but not with precise component tolerances. An explanation for this anomaly will be given. uF := 10–6

K := 103 R2 R1 Ein

V1 C1

C2

V2

3

R3

+

2 − V3 R4

4 V+

V4

1

V− 11 R5

R1 := 15.8·K R2 := 5.11·K R3 := 2.61·K C1 := 0.1·uF C2 := C1 U := 4 Y := 4

R4 := 3.32·K R5 := 13.3·K Ein := (99 1)

99 4 RR := 2 3 4

C1 C2

GG := 0

1 1 0 0 3

R1 R2 R 3 R 4 R 5

EE := (4

1 CC := 1

0 2

3

106)

0 2

LL := 0

266

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

11.17 SALLEN AND KEY BPF MCA See Section 11.16 for the schematic and component values. Call subprograms per previous sequences: → Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd The MCA outputs are first given using precision tolerances and then with common tolerances: Precision tolerances: Tr := 0.002

Tc := 0.01

Ti := 0.

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd R1

R2

R3

R4

R5

C1

−02 T= 0.2

−02 0.2

−02 0.2

−02 0.2

−02 0.2

−1 1

C2 Ein −1 1

0 % 0

Displayed in percentage. Specify linear frequency sweep and Nk: BF := 400

LF := 600

DF := 1

Nk := 2000

Call MCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd 10

Volts

(MPmca3,1)i (MPmca2,1)i (MPmca1,1)i

Precision tolerances

8 6 4 2 0 400 425 450 475 500 525 550 575 600 Fi Freq(Hz) MCA Hi Nom MCA Lo

AC Circuits

267

Note that the center frequency of 500 Hz does not vary. Only the amplitude varies. Change to common tolerances: Tr := 0.02

Tc := 0.1

Call tolerance array subprogram again: → Reference:C:\mcadwca\wcaref11\TolArray.mcd −2 T= 2

−2 2

−2 2

−2 2

−2 2

−10 10

−10 10

0 % 0

Call MCA subprogram again. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd Note change of vertical scale! Nk = 2000 1500

Volts

(MPmca3,1)i (MPmca2,1)i (MPmca1,1)i

Common tolerances

1200 900 600 300 0 400 425 450 475 500 525 550 575 600 Fi Freq(Hz) MCA Hi Nom MCA Lo

See the following text for an explanation of what causes the MCA spikes with common tolerances.

11.17.1 SALLEN AND KEY BPF — MCA AND PRECISION TOLERANCES

WITH BOTH

COMMON

This circuit is designed for a center frequency fo of 500 Hz, a peak gain of 10 V/V, and a Q of 10. Two output plots were shown. The first is with precision resistor tolerances of 0.2% and capacitor tolerances of 1%.

268

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Compare this plot with the second one, which uses common tolerances of 2% and 10% for resistors and capacitors, respectively. The common tolerance plot becomes “pathological” in that there are numerous spikes in the output. The reason for this can be found by looking at the transfer function for this circuit. The standard form of the band-pass transfer function is: G (s) =

N1s s2 + D1s + D 0

in which for this circuit, D1 =

1 1 2 R5 R 4 + R5 + − and N i = R1 ⋅ R 4 ⋅ C1 C1 R1 R 3 R 2 ⋅ R 4

The peak gain is given by Gpk =

N1 . Obviously, if D1 is ever zero or close to D1

it, Gpk will “blow up.” 1 2 R5 + = . R1 R 3 R 2 ⋅ R 4 By assigning tolerance multipliers of 0.982 for R2, 0.9816 for R4, and 1.02 for R5 (all at or within the ±2% tolerance), it will be found that D1 = 0.166, N1 = 3267.56, and Gpk = 19,688 or about 85 dBV. Given Nk Monte Carlo samples, it can be seen from the second plot that there are many more random tolerance combinations that will cause Gpk to become extremely high. Hence, the culprit here is the minus sign in D1, for which the analog circuit designer should be wary of in band-pass filter circuits using this topology. Because of the random nature of MCA, the size of the spikes will be different for each run. It was stated in the introduction to Part II that Monte Carlo analysis (MCA) will produce realistic results for virtually any circuit that has a reasonably accurate and stable mathematical model. Because one term (D1) of the transfer function can become negative, this causes unstable roots in the right-half s-plane. Hence, with the common tolerances, this circuit does not qualify. The reader is cautioned that in using the NDS method, this instability would not have been foreseen. Hence, the transfer functions G(s) still serve a useful purpose and should be examined when any erratic circuit analysis behavior is observed. D1 will be zero when

11.18 SALLEN AND KEY BPF EVA See Section 11.16 for the schematic and component values.

AC Circuits

269

→ Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 400

LF := 600

DF := 2

→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd R1 is the middle trace in the following plot. Sign-change markers: M1 := 456

20 Sensi,1 Sensi,2 Sensi,3

M2 := 554

Sensitivities, R1 thru R5 10

10

M2

M1

5 Sensi,6

0

Sensi,7

Sensi,4

Sensi,5 −10 −20 400

Sensitivities, C1 & C2

0 −5

450 R1 R2 R3 R4 R5

500 Fi

550

600

−10 400

450 C1 C2

500 Fi

550

600

The following large ugly gap is caused by the sign changes of C1 and C2 sensitivities. Note markers M1 and M2. Again, nonmonotonic components = bipolar sensitivities, and EVA results are rendered meaningless.

270

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA output at node Y

20

M1

Volts

(MPeva1)i

M2

15

(MPeva2)i 10 (MPa1)i

5 0 400

425

450

475

EVA Lo EVA Hi Nom

500 525 Fi Freq(Hz)

550

575

600

11.19 SALLEN AND KEY BPF FMCA See Section 11.16 for the schematic and component values. → Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 400

LF := 600

DF := 2

→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=4 FMCA at node Y

80

Volts

(MPfmca3)i 60 (MPfmca2)i 40 (MPfmca1)i

20 0 400

425

450

FMCA Hi Nom FMCA Lo

475

500 525 Fi Freq(Hz)

550

Number of components in this circuit including the input: Nc := 8

575

600

AC Circuits

271

With common tolerances, some of the 2Nc = 256 tolerance combinations will cause Gpk (FMCA Hi) to be large.

11.20 STATE VARIABLE FILTER CIRCUIT This circuit is used to show the affects of increasing the number of Monte Carlo samples Nk. It will be shown that Nk and the tolerance band are of course directly proportional, but nonlinear. For example, doubling Nk does not double the width of the tolerance band. n := 10–9 K := 103 R3

V7

C1 R2

V2 2

R1 V1 Ein

3

− +

11

V3

V−

1

V+ 4

C2

V4 R4 2

−

3 +

11

V6

V5 R5

V− 1

V+

2

4

−

3 +

11

V7

V−

1

V+ 4 R8

V9 V1

R6

V5

R7 2 R9 V8 3

− +

11

V10

V− V+

1 4

R10

V7

R1 := 10·K R2 := 20·K R3 := 10·K R4 := 182·K R5 := 2.2·K R6 := 20·K R7 := 10·K R8 := 100·K R9 := 10·K R10 := 100·K C1 := 1.125·n C2 := C1 U := 10 Y := 10 Ao := 106 LL := 0 GG := 0 99 7 2 3 5 RR := 1 5 9 3 8

1 2 3 4 6 5 9 10 8 7

R1 R2 R3 R 4 R5 Ein := (99 R6 R7 R8 R9 R10

1)

4 CC := 6

5 7

C1 C2

272

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3 5 EE := 7 10

0 0 0 0

1 0 0 8

Ao Ao Ao Ao

2 4 6 9

11.21 STATE VARIABLE FILTER MCA For the schematic and component values see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd T=

−2 2

−2

−2

−2

−2

−2

−2

−2

−2

−2

−10

−10

2

2

2

2

2

2

2

2

2

10

10

BF := 3000

LF := 7000

NP := 100

DF :=

LF − BF NP

0

0

%

Nk := 2000

→ Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd The following plots show the effects of increasing Nk on the tolerance bands. Extreme center frequency markers from EVA 11.22: M1 := 4388 M2 := 5795 Nk = 20 Y = 10

Volts

140 120

Uniform MCA at node Y M1

M2

(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz) MCA Lo Nom MCA Hi

AC Circuits

273

Nk = 200 140

Volts

120

Uniform MCA at node Y M1

M2

(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz)

Nk = 2000

Volts

140 120

Uniform MCA at node Y

M1

M2

(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz)

11.22 STATE VARIABLE FILTER EVA For the schematic and component values, see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 3000

LF := 7000

DF := 20

→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd

274

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Sensitivities

10

Sensi,3 Sensi,4 Sensi,5

5

Sensi,11 %/%

%/%

Sensi,2

0 −5 −10

3

4

R2 R3 R4 R5

Sensitivities

10

5 6 Fi K Freq(KHz)

5

Sensi,12

0

Sensi,13

−5 −10

7

3

4

C1 C2 Ein

5 Fi

6

7

K Freq(KHz)

The preceding plots show that 6 of the 13 components are nonmonotonic. Ein sensitivity is +1 as expected. Extreme center frequency markers: M1 := 4388

M2 := 5795 EVA at node Y

140

Volts

(MPeva2)i (MPeva1)i (MPa1)i

M2

M1

120 100 80 60 40 20 0 3000

3500

4000

EVA Hi EVA Lo Nom

4500

5000 5500 Fi Freq(Hz)

6000

6500

7000

The “spike” at 5 KHz is caused by the asynchronous polarity change of the nonmonotonic components. From the zoomed sensitivity plots below, all zero crossovers do not take place at the same frequency.

AC Circuits

275 Sensitivities

10 Sensi,3

5

Sensi,4

0

Sensi,5

−5 −10 4.9

5 %/%

%/%

Sensi,2

Sensitivities

10

Sensi,11

0

Sensi,12

−5 4.95

R2 R3 R4 R5

5 5.05 Fi K Freq(KHz)

−10 4.9

4.95

C1

5 5.05 Fi K Freq(KHz)

C2

Hence, at 5.00 KHz to 5.02 KHz, the polarity of the sensitivities are not changing sign together. This causes the EVA process, which detects sensitivity sign changes, to show a different magnitude in this 20-Hz frequency band.

11.23 STATE VARIABLE FILTER FMCA AND MCA COMBINED For the schematic and component values see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 3000

LF := 7000

DF := 20

Nk := 2000

→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd

276

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad FMCA & MCA at node Y

140 120

Volts

(MPmca3,1)i (MPfmca2)i (MPfmca3)i

100 80 60 40 20 0 3000

3500

4000

MCA Hi Nom FMCA Hi

4500

5000 5500 Fi Freq(Hz)

6000

6500

7000

Another telltale sign of nonmonotonic components is that MCA is greater than FMCA. This occurs at about 5400 Hz, as the following plot shows.

140

FMCA & MCA (Zoomed)

Volts

(MPmca3,1)i (MPfmca2)i 120 (MPfmca3)i 100 4000

4500

5000

5500

6000

Fi Freq(Hz)

11.24 HIGH-Q HUM NOTCH FILTER CIRCUIT The following circuit has an extremely sharp notch. This notch would be very difficult to realize on a circuit board due to temperature drift of the components. In spite of this, the circuit is interesting to analyze and show the response to component tolerance variation. K := 103

nF := 10–9

AC Circuits

277 RS RB

R7

V10

V5 2

−

3+

FNOTCH R1

C1

11

V6

V−

V7

R9

R10 V8

1

V+ 4

2

C2

1K R3

4 V+

1

V−

− 11 V9

R2

V4

3 +

R4

Ein 2 QNOTCH R6A

−

3+ V3

11 V− V+ 4 R6B

1 V9

R1 := 4.73·K R2 := 100·K R3 := 100·K R4 := 200·K R6 := 100·K R7 := 100·K R8 := 4.99·K R9 := 681·K R10 := 681·K Rs := 0.01 C1 := 3.9·nF C2 := C1 a := 0.01 (Qnotch (R6) pot setting factor can be set from 0.01 to 0.99.) R6A := a·R6 R6B := (1 – a)·R6 U := 10 Y := 9 Ao := 106 Ein :=(99 1) 99 4 99 1 3 RR := 3 5 5 6 7 99 2 EE := 6 9

R1 R2 R3 R 4 R 6 A R 6B R7 R8 R9 R10 Rs

4 0 1 2 0 9 0 6 7 8 10 0 0 0

3 4 8

1 5 9

10 CC := 2

Ao Ao Ao

8 7

C1 C2

LL := 0

GG := 0

278

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

11.25 HIGH-Q HUM NOTCH FILTER MCA For the schematic and component values, see Section 11.24. Get circuit data. → Reference:C:\crc_book_ms\wca_mcd\hiqhum_ckt.mcd Get A, B, D, and E state space arrays. → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

Component tolerances in decimal percent → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd Display tolerance array T: −2 2

−2

−2

−2

−2

−2

−2

−2

−2

−2

−2

−10

−10

2

2

2

2

2

2

2

2

2

2

10 0

10

BF := 50

LF := 70

DF := 0.1

0

0

Nk := 2000

→ Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd The following plot shows both uniform and normal minimums. Y=9 MCA at node Y

−10 −30 db[(MPmca1,1)i] dBV

T=

db[(MPmca2,1)i] db[(MPmca3,1)i] db[(MPmca1,2)i]

−50 −70 −90 −110 50

52

54

56

Uniform MCA Lo Nominal Uniform MCA Hi Normal MCA Lo

58

60 62 Fi Freq(Hz)

64

66

68

70

%

AC Circuits

279

11.26 HIGH-Q HUM NOTCH FILTER EVA See Section 11.19 (MCA) for schematic. Get circuit data → Reference:C:\crc_book_ms\wca_mcd\hiqhum_ckt.mcd Get A, B, D, & E state space arrays → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

Component tolerances in decimal percent → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 50

LF := 70

DF := 0.1

→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd 200

C1 sensitivity

200

Sensi,12

100 %/%

%/%

100

C2 sensitivity

0

Sensi,13

0

−100

−100

−200 54 56 58 60 62 64 66 Fi Hz

−200 54 56 58 60 62 64 66 Fi Hz

Note the extreme bipolarity. Also note that Vo approaches zero at F = 60 Hz. Hence, dividing by Vo here causes the sensitivities to be very large. Extreme notch frequency markers: M1 := 53.5 Y=9

M2 := 68.3

280

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA at node Y

−10

dBV

db[(MPeva1)i] db[(MPeva2)i] db[(MPa1)i]

M2

M1

−30 −50 −70 −90 −110 50

52

54

56

58

EVA Lo EVA Hi Nom

60 62 Fi Freq(Hz)

64

11.27 HIGH-Q HUM NOTCH FILTER FMCA For the schematic and component values, see Section 11.24. → Reference:C:\crc_book_ms\wca_fmcd\hiqhum_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\tolArray.mcd BF := 50

LF := 70

DF := 0.1

EVA notch markers: M1 := 53.5

M2 := 68.3

→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=9

Y=9

66

68

70

AC Circuits

281

−10

FMCA at node Y

M2

M1

−30

dBV

db[(MPfmca1)i] db[(MPfmca2)i] db[(MPfmca3)i]

−50 −70 −90 −110 50

52

54

56

FMCA Lo Nom FMCA Hi

58

60 62 Fi Freq(Hz)

64

66

68

70

11.28 LTC 1562 MCA See Part I (Section 3.15) for a schematic of the four connected sections and opamp rolloff subcircuit. Component count = 68. → Reference:C:\mcadckts\CaNL11\ltc1562.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

Nk := 2000

→ Reference:C:\mcadwca\wcaref11\tolArray.mcd Markers for EVA extreme center frequencies (see Section 11.29): → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd M1 := 87

M2 := 116

Y = 20

282

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad LTC 1562 MCA at node Y

30 20

dBV

db[(MPmca3,1)i]

Y = 20

M2

M1

10 0

db[(MPmca2,1)i] −10 −20 db[(MPmca1,1)i] −30 db[(MPmca3,2)i] −40 −50 −60 −70 40

60

80

Uniform MCA Hi Nominal Uniform MCA Lo Normal MCA Hi

100

120 Fi K Freq(KHz)

140

160

180

11.29 LTC 1562 EVA In this section an Extreme Value Analysis (EVA) of the 68-component LTC 1562 circuit is performed. The EVA markers M1 and M2, used in the previous section, are calculated here for MCA comparison. → Reference:C:\mcadckts\CaNL11\ltc1562.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\tolArray.mcd → Reference:C:\mcadwca\wcaref11\acwcalin.mcd

AC Circuits

283 Some (Bipolar) sensitivities

%/%

4 Sensi,3

2

Sensi,6

0

Sensi,39

−2 −4

40

60

80

R1A R6 C2D

M1 := 87

100

120 Fi K Freq(KHz)

140

160

180

M2 := 116

These are the extreme frequency markers. Y = 20 EVA at node Y

dBV

30 20 10 0

db[(MPeva1)i] −10 db[(MPeva2)i] −20 −30 db[(MPa1)i] −40 −50 −60 −70 40

M2

M1

60

EVA Lo EVA Hi Nom

80

100

120 Fi K Freq(KHz)

140

160

180

284

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

REFERENCES 1. Spence and Soin, Tolerance Design of Electronic Circuits, Addison-Wesley, Wokingham, England, 1988, p. 31. 2. Improving the Manufacturability of Electronic Designs, IEEE Spectrum, June 1999, p. 70. 3. Boyd, R., Tolerance Analysis of Electronic Circuits Using MATLAB, CRC Press, Boca Raton, FL., 1999, p. 115.

12

Transient Tolerance Analysis

12.1 TRANSIENT MCA — TWIN-T RC NETWORK Tolerance analysis in the time domain is explored in this and subsequent sections. The first circuit analyzed is a passive 60-Hz notch filter. C2 V4

C3

V1 R5

Rs R1

R3

V2

V3

Ein C1

R7

K := 103 u := 10–6 Meg := 106 m := 10–3 R1 := 265·K R3 := 265·K R5 := 133·K R7 := 10·Meg Rs := 0.01 C1 := 0.02·u C2 := 0.01·u C3 := 0.01·u U := 4 Y := 3 Ein := (99 1) 99 2 RR := 1 3 99 LL := 0

R1 R 3 R5 R 7 Rs

2 3 0 0 4

2 CC := 4 1

0 1 3

C1 C2 C 3

GG := 0

EE := 0

→ Reference:C:\mcadwca\wcaref11\comm42.mcd See Part I for a review of the nominal Mathcad transient analysis method. 1 = 877.78 u min ( A ) kmax :=

Tper ∆t

1 = 5.3m max ( A )

∆t := 50·u

Tper := 80·m

Nk := 500

285

286

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Note that ∆t is << 878us because of output spikes. Create an input pulse using Mathcad’s unit step function Φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.01·Tper, 0.5·Tper) Tr := 0.05 Tc := 0.01 Ti := 0 (Input tolerance Te not used for transient analysis.) → Reference:C:\mcadwca\wcaref11\tranlin.mcd MCA at node Y

1

Y=3

Volts

(Vnj)1 vminj vmaxj

0.5

Eapp(j⋅ ∆t) 0

0

10

20

30

Nom MCA Lo MCA Hi Input

40 50 j⋅ ∆t m Time(ms)

60

70

80

Y=3

12.2 TRANSIENT MCA — MULTIPLE FEEDBACK BPF The Multiple Feedback Bandpass Filter, previously analyzed in the frequency domain in Section 11.8, is now examined to show the effects of component variation in response to a pulse input. The first plot shows the MCA for Nk = 10, while the second shows the response variation for Nk = 1000; Nk being the number of samples. C2 R1 Ein

V1 R2

R3 C1 V2 2

−

3 +

11

V3

V−

1

V+ 4

K := 103 uF := 10–6 us := 10–6 ms := 10–3 C1 := 0.1·uF C2 := C1 R1 := 6.34·K R2 := 80.6 R3 := 127·K U := 3 Y := 3 Ein := (99 1)

Transient Tolerance Analysis

99 RR := 1 3 EE := (3

1 0 2 0

0

287

R1 R 2 R 3 2

1 CC := 3

C1 C2

2 1

LL := 0

GG := 0

106)

→ Reference:C:\mcadwca\wcaref11\comm42.mcd 1 = 12.68 ms min ( A )

1 = 7.964 us max ( A )

∆t := 5·us

Tper := 5·ms

Create a delayed input pulse using Mathcad’s unit step function Φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.001·Tper, 0.1·Tper) Tr := 0.02

Tc := 0.01

Ti := 0

Nk := 1000

→ Reference:C:\mcadwca\wcaref11\tranlin.mcd Nk = 10

1.2 0.8

Volts

(Vnj)1 vminj vmaxj

0.4 0

Ein1,2 . Eapp(j ·∆t) −0.4 −0.8 −1.2

0

1

Nom Min Max Pulse input

2 j · ∆t ms Time(ms)

3

4

5

288

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Nk = 1000 1.2 0.8

Volts

(Vnj)1

0.4

vminj

0

vmaxj

Ein1,2 . Eapp(j ·∆t) −0.4 −0.8 −1.2

0

1

2

3

4

5

j · ∆t ms Time(ms)

Nom Min Max Pulse input

Initial output is negative because of the inverting opamp.

12.3 AC AND TRANSIENT MCA — BESSEL HPF The next circuit chosen to illustrate transient tolerance analysis is a Bessel highpass filter. A nominal AC analysis is also given here, as well as an example of using the G array introduced in Section 1.1.2. K := 103

u := 10–6

n := 10–9

MHz := 106

Hz = 1

R1

V3 R4

V1 C1

V2

C2

C3

V4

3

Ein R2

V6 + −

R5 EE1

R3

V7 C4

V8 + −

R6 EE2

p := 10–12

2

V9 C5

+

−

4 V+

V5 1

V− 11

V5 +

EE3

−

Controlled sources EE1 through EE3 model the opamp of the Bessel highpass filter.

Transient Tolerance Analysis

289

R1 := 52·K R2 := 75·K R3 := 287·K R4 := 0.01 R5 := 1·K R6 := 1·K C1 := 1.55·n C2 := C1 C3 := C1 fp1 := 100·Hz fp2 := 1·MHz 1 1 C5 := 2 ⋅ π ⋅ fp1 ⋅ R 5 2 ⋅ π ⋅ fp 2 ⋅ R 6 Y := 5 Ein := (99 1) C 4 :=

3 2 4 RR := 99 6 8

5 0 0 1 7 9

R1 R2 R 3 R 4 R5 R6

6 EE := 8 5

Vp : = 4 Ao := 10

1 2 CC := 3 7 9

6

Vn : = 5

2 3 4 0 0 0 0 0

U := 9

C1 C2 C 3 C 4 C5

Vp 7 9

Vn 0 0

LL := 0

GG := 0

1 1 Ao

→ Reference:C:\mcadwca\wcaref11\comm42.mcd BF := 2

ND := 6

PD := 25

NP :=ND·PD + 1

i := 1..NP

i −1 s := 2 ⋅ π ⋅ 10 L ⋅ −1 cvi := D·(si·I – A)–1·B + E PD Voi := db(cvi) fo := 1000·Hz log(fo) = 3 L i := BF +

Asymptote equation: Vmi := 60·log(10Li–3) Output magnitude at node Y

dBV

20 Voi Vmi

0 –20 –40 –60

2

3

4

5 Li Log freq(Hz)

6

7

8

Note gain peaking and rolloff due to opamp. Transient MCA: 1 = 80.6 p min ( A )

1 = 159.155 n max ( A )

∆t := 50·p

Tper := 500·n

290

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

kmax :=

Tper ∆t

Nk := 200

pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.001·Tper, 0.1·Tper) Tr := 0.02

Tc := 0.01

Ti := 0

Nk := 1000

→ Reference:C:\mcadwca\wcaref11\tranlin.mcd Transient response MCA at node Y

2 1

Volts

(Vnj)1 vminj

0

vmaxj Eapp(j ·∆t)

−1 −2

0

100

200

Nom Min Max Pulse input

Nk = 200

300 j · ∆t n Time(ms)

400

500

Y=5

Verification of state space arrays: R2 W := 0 0

0 R 3 − R1 R 3

C1 P := diag C2 C 3

1 S = 1 1 D := (0

−R2 R1 0

0

0)

1 Q := ( −1) ⋅ 1 1

C := (W·P)–1

0 1 1

0 0 1

A := C·Q

E := 0

Use G array: Because V4 = V5 = Vo = iC3·R3 (Ideal opamp) F := (0 0 R3) G := F·P G = (0 0 444.85)u I := identity(3) cvi := (D + G·A)·(si·I – A)–1·B + E + G·B Vai := 20·log(|cvi|)

Ein1,2 S : = Ein1,2 Ein 1,2

B := C·S

Transient Tolerance Analysis

291

20 0 Vai Vmi

–20 −40 −60

2

3

4

5 Li

Ideal output Asymptote

6

7

8

The previous plot shows the response with an ideal opamp with no frequency rolloff or gain peaking.

12.4 TRANSIENT MCA — STATE VARIABLE FILTER Here the state variable filter, previously analyzed in the frequency domain in Section 11.20, is used again to show the oscillatory, ringing response to a pulse input. The tolerance bands of this oscillatory response due to component value variation are also shown. K := 103

n := 10–9

u := 10–6

m := 10–3

R3

V7

C1 R2

V2 2

R1 Ein

V1 3

− +

11

V3

V−

R4

1

V+ 4

C2

V4 2

−

3 +

V1

11

V5

V−

R5

V6

1

V+

2

4

R6

−

3 +

V5

R7

11

2 3

4 R8

− +

11

R4 := 182·K R8 := 100·K

V10

V− V+

1 4

R10

R3 := 10·K R7 := 10·K

1

V+

V9

R9 V8

R1 := 10·K R2 := 20·K R5 := 2.2·K R6 := 20·K R9 := 10·K R10 := 100·K

V7

V−

V7

292

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

C1 := 1.125·n 99 7 2 3 5 RR := 1 5 9 3 8

LL := 0

C2 := C1 1 2 3 4 6 5 9 10 8 7

GG := 0

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10

U := 10

Ein := (99

3 5 EE := 7 10

0 0 0 0

Ao := 106

Y := 10

4 CC := 6

1)

1 0 0 8

5 7

Ao Ao Ao Ao

2 4 6 9

→ Reference:C:\mcadwca\wcaref11\comm42.mcd 1 = −2.475 u min ( A ) kmax := 2000

1 = 409.501u max ( A )

∆t := 1·u

Tper := kmax·∆t

pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(x, 0.01·Tper, 0.5·Tper) Tr := 0.02

Tc := 0.01

Ti := 0

Nk := 300

→ Reference:C:\mcadwca\wcaref11\tranlin.mcd

Tper = 2m

C1 C2

Transient Tolerance Analysis

293 Transient output at node Y

15 10

Volts

(Vnj)1

5

vminj

0

vmaxj 10 . Eapp(j · ∆t)

–5 −10 −15

0

0.2

0.4

0.6

Nom Min Max Input pulse x 10

Y = 10

Nk = 300

0.8

1 j·∆t m Time(ms)

1.2

1.4

1.6

1.8

2

This page intentionally left blank

13

Three-Phase Circuits

13.1 THREE-PHASE Y-CONNECTED UNBALANCED LOAD MCA uH := 10–6

uF := 10–6

Single-ended two-phase Y input on A and B as before. R5 +

V1

EinA

R1

−

C1

V2 R3

R2

V4

V3

L1

EinC= 0

EinB

+

R4

V5

−

R1 := 12 R2 := 20 R3 := 3 R4 := 0.01 L1 := 636.62·uH C1 := 9.947·uF 99 1 Ein := CC := (2 3 C1) 98 1 EE := 0 GG := 0 U := 5 Y := 3 99 1 RR := 3 4 98

1 2 0 3 5

R5 := 0.01

LL := (5

4

L1)

R5 R1 R2 R 3 R 4

→ Reference:C:\mcadwca\wcaref11\comm42.mcd BF := 2 ND := 3 PD := 40 Tr := 0.02 Tc := 0.1 Ti := 0.2 Te := 0.05

295

296

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Unif := 1 Unif = 1 calls uniform distribution; Unif = 0 calls normal distribution. Nk := 1000 → Reference:C:\mcadwca\wcaref11\TolArray.mcd → Reference:C:\mcadwca\wcaref11\3ph_ac_mcalog.mcd Display input amplitude and phase: 100 − 173.205 i u= |u1| = 200 −100 − 173.205 i |u2| = 200 rd·arg(u2) = –120 deg Nk = 1000

rd·arg(u1) = –60 deg

MCA magnitude

200

Volts

(Vmca1)i 150 (Vmca2)i

100

(Vmca3)i

50 0

2

2.5

3

MCA Lo Nom MCA Hi

3.5 Li Log freq(Hz)

4

4.5

5

MCA phase angle

−50 −70

Deg

(Vmca4)i (Vmca5)i

−90

(Vmca6)i −110 −130 −150

2

2.5 MCA Lo Nom MCA Hi

3

3.5 Li Log freq(Hz)

4

4.5

5

Three-Phase Circuits

297

13.2 THREE-PHASE Y-CONNECTED UNBALANCED LOAD EVA deg := 1

uH := 10–6

uF := 10–6

See Section 13.1 for the schematic. R1 := 12 R2 := 20 R3 := 3 R4 := 0.01 R5 := 0.01 L1 :=636.62·uH C1 := 9.947·uF U := 5 Y := 3 fo :=

1 2 ⋅ π ⋅ L1 ⋅ C1

CC := (2

EE := 0

3

C1)

GG := 0

fo = 2000

LL := (5

4

1 3 RR := 4 98 99

log(fo) = 3.3

L1) 2 0 3 5 1

99 Ein := 98

1 1

R1 R2 R 3 R 4 R 5

→ Reference:C:\mcadwca\wcaref11\comm42.mcd BF := 2 ND := 3 PD := 40 Tr := 0.02 Tc := 0.1 Ti := 0.2 Te = input (Ein) tolerance.

Te := 0.05

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd → Reference:C:\mcadwca\wcaref11\3ph_ac_evalog.mcd Display input amplitude and phase: 100 − 173.205 i u= |u1| = 200 −100 − 173.205 i |u2| = 200 rd·arg(u2) = –120 deg M1 := 3.34 M2 := 3.55 (Plot markers)

rd·arg(u1) = –60 deg

298

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Magnitude sensitivities

%/%

2 Sensi,1

1

Sensi,2

0

M1

M2

Sensi,3 −1 −2

2

2.5

3

R1 R2 R3

3.5 Li

4

4.5

5

Log freq(Hz)

Note bipolarity and zero crossing of sensitivities at M1 and M2. Magnitude sensitivities

3

M1

%/%

2 Sensi,6

1

Sensi,7

0

M2

−1 −2

2

2.5

3

3.5 Li

4

4.5

5

4

4.5

5

Log freq(Hz)

C1 L1

Magnitude sensitivities

3

M1

%/%

2 Sensi,8

1

Sensi,9

0

M2

–1 –2

2

2.5 EinA EinB

3

3.5 Li Log freq(Hz)

Three-Phase Circuits

299

The sensitivity plot of EinA and EinB requires some comment: If Ein were 99 1 changed to Ein := , i.e., EinB at node 98 = 0, the sensitivity of EinA 98 0 would +1 across the entire frequency band, or any frequency band. But, because there are two inputs, one via the capacitor C1 (EinA) and the second via the inductor L1 (EinB), the sensitivity of each varies with frequency. Because C1 becomes a short at high frequency, the sensitivity of EinA goes from zero to +1 as the frequency is increased. Because L1 becomes open at high frequency, it does just the opposite, namely, the sensitivity goes from +1 to zero, and conversely for low frequencies. Hence, when there is more than one input (M > 1), the tolerance analysis answers cannot merely be multiplied by 1 + Te, as they can for the M = 1 case. Thus, input tolerances become significant when M > 1. Te = 0.05 EVA magnitude

200

M1

M2

150 Volts

(MPeva1)i (MPeva2)i 100 (MPa1)i 50 0

2

2.5

3

M1

−70

Deg

(MPeva4)i (MPa2)i

4

4.5

5

EVA phase angle

−50

(MPeva3)i

3.5 Li Log freq(Hz)

M2

−90 −110 −130 −150

2

2.5

3

3.5 Li Log freq(Hz)

4

4.5

5

300

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

13.3 THREE-PHASE Y-CONNECTED UNBALANCED LOAD FMCA deg := 1

uH := 10–6

uF := 10–6

Single-ended two phase Y input as before. For the schematic, see Section 13.1. R1 := 12

R2 := 20

L1 := 636.62·uH

R3 := 3

C1 := 9.947·uF 99 1 RR := 3 4 98

log (fo) = 3.3

LL := (5

4

U := 5

Y := 3

R4 := 0.01

L1)

1 2 0 3 5

99 Ein := 98

fo :=

R5 := 0.01

1 2 ⋅ π ⋅ L1 ⋅ C1

fo = 2000

R5 R1 R2 R 3 R 4

CC := (2

3

1 1

EE := 0

GG := 0

C1)

→ Reference:C:\mcadwca\wcaref11\comm42m.mcd BF := 2 ND := 3 PD := 40 Tr := 0.02 Tc := 0.1 Ti := 0.2

Te := 0.05

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd → Reference:C:\mcadwca\wcaref11\3ph_ac_fmcalog.mcd Display input amplitude and phase: 100 − 173.205 i u= |u1| = 200 −100 − 173.205 i |u2| = 200 rd·arg(u2) = –120 deg

rd·arg(u1) = –60 deg

Three-Phase Circuits

301 FMCA magnitude

200 150 Volts

(Vfmca1)i (Vfmca2)i 100 (Vfmca3)i

50 0

2

2.5

3

3.5 Li Log freq(Hz)

FMCA Lo Nom FMCA Hi

4

4.5

5

FMCA phase angle

−50 −70 Deg

(Vfmca4)i (Vfmca5)i

−90

(Vfmca6)i −110 −130 −150

2

2.5

3

3.5 Li Log freq(Hz)

4

4.5

5

This page intentionally left blank

14

Miscellaneous Topics

14.1 COMPONENTS NOMINALLY ZERO Section 14.1 is background information for tolerance analysis of opamp offsets given in Section 14.2. mV := 10–3 Let the function be: G(A, B, C) := (A + B)·C Let the nominal component values be: A := 0

B := 0

C := 20

Vo := G(A, B, C)

Vo = 0

Then

Let the tolerances of the components be: Va := 0.02

Vb := 0.01

Tc := 0.03

The tolerances of A and B are in component units, e.g., Volts; the tolerance of C is in %. The tolerances of A and B cannot be in percentages, because X% of zero is zero. The derivatives of Vo wrt the components are: da := C

db := C

dc := A + B

Formal definition of RSS, the variance: Var := (da·A·Va)2 + (db·B·Vb)2 + (dc·C·Tc)2

Var = 0

We cannot use this form because A = B = 0. 3σA is Va, not the product of A and Va. Hence, Var := (da·Va)2 + (db·Vb)2 + (dc·C·Tc)2 Vs := Var

Var = 0.200

Vs = 0.447

303

304

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

RSS: −Va T := Va

Nc := 3

−Vb Vb

− Tc Tc

0.0001 Q= 0 0

Q := dpf·identity(Nc)

Vrp := G[Qp,1, Qp,2, C·(Qp,3 + 1)]

dpf := 0.0001 0 0.0001 0

p := 1..Nc

0 0 0.0001

2 Vr = 2 mV 0

Vr contains the nonnormalized sensitivities. It cannot be normalized, because the nominal value of Vo = 0. The RSS values are: Vrss : =

1 ⋅ dpf

∑ (Vr ⋅ T p

2 ,p

)2

Vrss = 0.447

p

This is the same as the formal definition Vs. MCA w := 1..Nc

Nk := 30000

zw := rnorm(Nk, 0, 1)

(Mathcad’s normal distribution function) k := 1..Nk Normally distributed random tolerances: T2,w − T1,w ⋅ ( z w )k + 3 + T1,w 6 Vmcak := G[Trnk,1, Trnk,2, C·(Trnk,3 + 1)] Vavg := mean(Vmca) Vavg = 0.407 mV Vsm := 3·stdev(Vmca) Vsm = 0.449 Trn k ,w =

The value Vsm = 0.449 is very close to the value of Vrss = 0.447. Hence, this is another example of how MCA with normal distribution inputs very closely approximates RSS. By repeating the MCA ten times, for example, Vs will show an average closer to Vrss = 0.447. EVA m :=1..2

Mm,p := if(m = 1, if(Vrp < 0, T2,p, T1,p), if(Vrp ≥ 0, T2,p, T1,p))

Miscellaneous Topics

−0.02 M= 0.02

305

−0.01 0.01

−0.03 0.03 −0.582 Vev = 0.618

Vevm := G[Mm,1, Mm,2, C·(Mm,3 + 1)]

FMCA Nf := 2Nc

Nf = 8

m := 1..Nf

Re Re w+1,m : = floor w,m 2 0 Dr = 0 0

1 0 0

0 1 0

1 1 0

Rew,m := m – 1

Drw,m := Rew,m – 2·Rew+1,m 0 0 1

1 0 1

0 1 1

1 1 1

Binary array counting from 0 to Nf – 1. Tf is all eight possible tolerance combinations based on binary array Dr: Tfw,m := if(Drw,m = 0, T1,w, T2,w) −0.02 Tf = −0.01 −0.03

0.02 −0.01 −0.03

−0.02 0.01 −0.03

0.02 0.01 −0.03

−0.02 −0.01 0.03

0.02 −0.01 0.03

−0.02 0.01 0.03

0.02 0.01 0.03

Vfm := G[Tf1,m, Tf2,m, C·(Tf3,m + 1)] min ( Vf ) Vfmca : = max ( Vf ) VfT = (–0.582

0.194

−0.618 Vfmca : = 0.618 –0.194

0.582

–0.618

−0.582 Vev = 0.618 0.206

0.618)

Hence, FMCA is correct in choosing Vf5 = –0.618 as the minimum and not Vf1 = –0.582 as in EVA. Why did FMCA produce a slightly wider tolerance band than EVA? 2 Hint: Vr = 2 mV . 0

14.2 TOLERANCE ANALYSIS OF OPAMP OFFSETS Input sources nominally zero. K := 103 nA := 10–9 mV := 10–3

306

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad R1

R2 V1

Vos +

V2

−

2

lb1

−

V−

+ −

3 R3

V4

11

+

1

V+ 4

V3 lb2 +

R4

−

R1 := 10·K R2 := 200·K R3 := 10·K R4 := 200·K Ib := 100·nA los := 20·nA Vos := 5·mV (LM156 data sheet) Maximum offsets: los los Ib 2 := Ib + 2 2 Ib1 = 90nA Ib2 = 110nA Ib1 := Ib −

The Resistor tolerance is Tr := 0.02 Ein := (99

1)

Ao := 106

U := 4

Y := 4

Under the broad assumption that the average value of Vos = 0 and that the average bias currents are half of the maximum: Vos := 0 1 1 RR := 3 3

0 4 0 0

R1 R2 R 3 R 4

4 EE := 1

0 2

3 99

2 0

Ao Vos

Miscellaneous Topics

1 GG := 3

307

0

99

0

0

99

0

Ib1 2 Ib 2 2

→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd Vn := 1solve(A1, B2) VnY = –2mV Ig1 := Vn5 Ig1 = 45nA Ig2 := Vn6 (bias currents)

Ig2 = 55nA

Neither the NDS method nor SPICE is designed for tolerance analysis with nominal zero value components. Hence, we must resort to “manual” methods. Circuit function: Ib1 ⋅ R1 ⋅ R 2 Ib 2 ⋅ R 3 ⋅ R 4 R2 G ( R1, R 2, R 3, R 4, Vos, Ib1, Ib 2 ) : = Vos + − ⋅ 1 + R1 + R 2 R3 + R4 R1 Reset Vos to maximum: Vos := 5·mV Tolerance array T: − Tr − Tr − Tr T := Tr Tr Tr Nc := cols(T) Nc = 7

− Tr Tr

−Vos Vos

0 Ib1

0 Ib 2

p := 1..Nc

RSS dpf := 0.0001

Q := dpf·identity(Nc)

Again, under the assumption that the average value of Vos = 0 and that the average bias currents are half of the maximum: Ib1 Ib 2 Va : = R1, R 2, R 3, R 4, 0, , 2 2

Va = –2mV

This confirms the aforementioned NDS answer. Nonnormalized sensitivities: Vrp := G[R1·(Qp,1 + 1), R2·(Qp,2 + 1), R3·(Qp,3 + 1), R4·(Qp,4 + 1), Qp,5, Qp,6, Qp,7] VrT = (0 0 0 0 0.002 20 –20)

308

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Ta := Tr Vrssm :=

Tr

( −1)m ⋅ dpf

Tr

Tr

Vos

∑ (Vr ⋅ Ta ) p

2

p

p

Ib1 2

Ib 2 2

T

m := 1..2

−106 Vrss = mV 106

MCA w := 1..Nc Nk := 30000 (normal distribution) k := 1..Nk

zw := rnorm(Nk, 0, 1)

T2,w − T1,w ⋅ ( z w )k + 3 + T1,w 6 Vmk = G[R1·(Tnk,1 + 1), R2·(Tnk,2 + 1), R3·(Tnk,3 + 1), R4·(Tnk,4 + 1), Tnk,5, Tnk,6, Tnk,7] Vavg := mean(Vm) Vavg = –2mV Vsm := (–1)m·3·stdev(Vm) Tn k ,w :=

−106 Vs = mV 106 Compare this with RSS. EVA Mm,p := if[(m) = 1, if(Vrp < 0, T2,p, T1,p), if(Vrp ≥ 0, T2,p, T1,p)]

1 m= 2

Vevam := G[R1·(Mm,1 + 1), R2·(Mm,2 + 1), R3·(Mm,3 + 1), R4·(Mm,4 + 1), Mm,5, Mm,6, Mm,7] −127 Veva = mV 123 FMCA Nf := 2Nc

Nf = 128

Rew,k := k – 1

k := 1..Nf

Re Re w+1,k : = floor w,k 2

Drw,k := Rew,k – 2·Rew+1,k Tfw,k := if(Drw,k = 0, T1,w, T2,w Vmfk := G[R1·(Tf1,k + 1), R2·(Tf2,k + 1), R3·(Tf3,k + 1), R4·(Tf4,k + 1), Tf5,k, Tf6,k, Tf7,k]

Miscellaneous Topics

309

Vfmca1 := min(Vmf)

Vfmca2 := max(Vmf)

−132 Vfmca = mV 127

A slightly wider tolerance band than EVA is obtained.

14.3 BEST-FIT RESISTOR RATIOS Find the best parallel resistor values for Rp out of all the 96 or 192 resistor value combinations (choice 1), find the best noninverting gain values for gain Gp (choice 2), find the best inverting gain values for gain –Gn (choice 3), or find the best voltage divider values for gain D (choice 4). Choose B: B = 48 (2% values), or B = 96 (1% values), or B = 192 (0.1% values). B := 96 Required functions: frac(x) := x – trunc(x) Rx ( x ) : = 10

x trunc B

Lx(x) := round(B·log(x))

frac x ⋅ round 10 B , 2

User input: (choice = 1, or choice = 2, or choice = 3, or choice = 4) choice := 2 Rp := 55.86 Gp := 9.56 Gn := –3.861 D := 0.26 (example inputs for choices 1 to 4.)

310

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Rv : = E ← 10 6 for m ∈1..B + 1 R1x ← Rx ( B + m ) if choice = 1 R1x ← Rx ( Lx ( Rp ) + m ) R2t ←

Rp ⋅ R1x R1x − Rp

R2t ←

R1x if choice = 2 Gp − 1

R2t ←

R1x if choice = 3 −Gn

R2t ←

R1x ⋅ D if choice = 4 1− D

R 2 x ← Rx ( Lx ( R 2 t ) ) E1 ← R 2 x − R 2 t if E1 < E E ← E1 R1 ← R1x R 2 ← R 2x R1 R 2 11.8 Rv = 1.37 Use appropriate decade values.

Miscellaneous Topics

311

Ans := R ←

Rv1 ⋅ Rv2 Rv1 + Rv2

R ←1+

Ans = 9.613

Rv1 Rv2

if choice = 1 iff choice = 2

R←

− Rv1 Rv2

R←

Rv2 Rv1 + Rv2

if choice = 3 if choice = 4

Gp = 9.560

Percentage error: pce := 1 −

Ans Gp

pce = —0.56%

Changing B to 192 yields pce = 0. Using a “convenient value” method: Gpx : = 1 +

14.4

10 1.15

Gpx = 9.696

pce := 1 −

Gpx Gp

pce = –1.42%

TRUNCATED GAUSSIAN DISTRIBUTION

In this distribution, Gaussian probability densities less than –3σ and greater than 3σ are rejected. It does not use transcendental functions as does the Box–Muller form (see Reference 1) and is hence faster. This could be useful in manufacturing yield analyses to simulate using all in-spec components.

312

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R := k ← 1 while k ≤ Nk x1 ← 2 ⋅ rnd (1) − 1 x 2 ← 2 ⋅ rnd (1) − 1 w ← x1 ⋅ x1 + x 2 ⋅ x 2 if w < 1 w←

−2 ⋅ 1n ( w ) w

y 2 ← w ⋅ x1 if ( y 2 > −3) ∧ ( y 2 < 3) y1k ← y 2 k ← k +1 y1 Create histogram: nb := 30 Nk := 30000 q := 1..nb + 1 nh := 1..nb VL := min(R) VH := max(R) VL = –2.995 VH = 2.988 VH − VL binq := VL + intv·(q – 1) pr := hist(bin,R) nb Vs := stdev(R) Vavg := mean(R) Vavg = 0.012 3·Vs = 2.966 E(R) := Nk·intv·dnorm(R, Vavg, Vs) intv :=

3000 3.Vs

−3.Vs prnh E(binnh)

2000 1000 0 −5

−4

−3

−2

Histogram Ideal Gaussian

−1

0 binnh

1

2

3

4

5

Miscellaneous Topics

313

14.5 LTC1060 SWITCHED CAPACITOR FILTER MCA with one and three stages K := 103

Hz := 1

KHz := 103

There are times when no circuit topology is available to construct the node list arrays. An example is the LTC1060 switched capacitor filter. Here, we must rely on information from the data sheet to perform a worst-case analysis. The diagram from the vendor’s data sheet is shown in the following. R4 R3 R2 R1 VIN

4 (17)

N S1A 3 (18) 5 (16)

–

+

+

∑

LP 1 (20)

– –

∫

SA/B 6

BP 2 (19)

∫

TLC1060-MO006

1/2 LTC1060

15

V– f0 =

fCLK 100(50)

R2 R3 ;Q= R4 R2

R2 ;H = –R2/R1; H0BP = –R3/R1; H0LP = –R4/R1 R4 0HP

Mode 3: 2nd order filter providing highpass, bandpass, lowpass.

14.5.1 DESIGN PROCEDURE

FROM THE

DATA SHEET

H := 1

fc := 51·KHz

fo := 640·Hz

Q1 := 100

wo := 2·π·fo

R1 := 412·K

wc R 4 := R 2 ⋅ wo

R 2 :=

H ⋅ R1 ⋅ wo Q1 ⋅ wc

wc := R 3 :=

2 ⋅ π ⋅ fc 50

wc ⋅ Q1 ⋅ R 2 wo

2

R2 = 2.585K

R3 = 412K

R4 = 6.566K

AC Analysis BF := 560

LF := 720

NP := 160

i := 1..NP + 1

DF :=

LF − BF NP

314

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Fi := BF + DF·(i – 1) Tr := 0.02 Resistor tolerance 2% Twc := 0.075 Switching frequency tolerance 7.5% Construct component vector X and tolerance array T: X := (R1

R2

− Tr T := Tr

R3

− Tr Tr

R4 wc)T − Tr Tr

− Tr Tr

− Twc Twc

Magnitude function:

G ( X, ω ) : =

X5 ⋅ X2 ⋅ ω X1 ( X 5 )2 ⋅ X 2 X ⋅ X ⋅ω2 − ω2 + 5 2 X3 X4 2

Convert to rad/sec: ω := 2·π·F MCA V1i := G(X, ωi) Nominal output. Nc := length (X) w := 1..Nc Nk := 4000 k := 1..Nk Tnw,k := (T2,w – T1,w)·rnd (1) + T1,w + 1 Random tolerance array, dim {Nc Nk} Uniform distribution. BWw,k := Xw·Tnw,k Random component array, dim {Nc Nk} Vck,1 := G(BW〈k〉,ωi) Random output array, dim {Nk NP + 1} Vmca1i := max(Vc〈i〉) The maximums of the output array at each of NP + 1 frequencies. Three stages Q3 := 51.1096 Design for overall Q of 100 for the three stages. H ⋅ R1 ⋅ wo Q 3 ⋅ wc

R1 := 412·K

R 2 :=

R3 = 412 K

wc R 4 := R 2 ⋅ wo

R5 := R1

R6 := R2

R2 = 5.058K

2

R7 := R3

R4 = 12.847 K R8 := R4

R 3 :=

wc ⋅ Q 3 ⋅ R 2 wo

Miscellaneous Topics

315

Same values for second stage. R9 := R1

R10 := R2

R11 := R3

R12 := R4

Same values for third stage. X := (R1

R2

R3

R4

R5

R6

R7

R8

R9

R10

wc)T

Magnitude function for the three stages

G 3 ( X, ω ) : = a ←

b←

c←

X13 ⋅ X 2 ⋅ ω X1 ( X13 )2 ⋅ X 2 X ⋅ X ⋅ω2 − ω 2 + 13 2 X4 X3 2

X13 ⋅ X 6 ⋅ ω X5 ( X13 )2 ⋅ X 6 X ⋅ X ⋅ω2 − ω 2 + 13 6 X8 X7 2

X13 ⋅ X10 ⋅ ω X9 ( X13 )2 ⋅ X10 X ⋅ X ⋅ω2 − ω 2 + 13 10 X12 X11 2

Tf ← a ⋅ b ⋅ c − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr – Twc T := Tr Tr Tr Tr Tr Tr Tr Tr Tr Tr Tr Twc Tr V3i := G3(X, ωi) Nominal output for three stages. Nc := length(X) w := 1..Nc Tnw,k := (T2,w – T1,w)·rnd (1) + T1,w + 1 BXw,k := Xw·Tnw,k Vck,1 := G3(BW〈k〉,ωi) Vmca3i := max(Vc〈i〉) EVA markers: M1 := 580.3·Hz

M2 := 701.9·Hz

316

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Bandpass Filter MCA

1.2 1

Volts

V1i

M1

M2

0.8

Vmca1i Vmca3i V3i

0.6 0.4 0.2 0 560

580

600

620

640 Fi Freq (Hz)

660

680

700

720

Nom_1 1 Stage MCA 3 Stage MCA Nom_3

Nk = 4000 This plot illustrates an important principle of statistical tolerance analyses. The question may well be asked as to why one stage with 5 components or variables has a wider frequency tolerance band than three stages with 13 variables. Also, note that the amplitude of the three stages shows a higher variance than the single stage, but the average is lower. The center frequency in Hz is given by fo =

D0 wc 2 ⋅ R 2 , in which D01 = for 2⋅π R4

wc 2 ⋅ R 6 wc 2 ⋅ R10 for the second, and D0 3 = for the third stage. R8 R12 Due to the separate tolerances on R2 through R12, each of these fo’s will be different for one frequency sweep, and different again for subsequent Nk frequency sweeps because of new random tolerances assigned by the Monte Carlo process. When ω2 = D01, the first term in the transfer function denominator radical

the first stage, D0 2 =

R3 , but D02 and D03 in the R1 second and third stages will not equal ω2, and the denominators here will be larger, pulling down the average peak gain of the three combined stages. The nominal peak gain is: becomes zero, and the peak gain is given by Gpk =

G 3pk :=

R 3 R 7 R11 ⋅ ⋅ R1 R 5 R 9

G3pk = 1

A numerical example will help illustrate.

Miscellaneous Topics

317

In the transfer function G ( s ) =

N1 :=

wc ⋅ R 2 R1

N1 = 78.7

D1 :=

wc ⋅ R 2 R3

D1 = 78.7

N1 ⋅ s s2 + D1 ⋅ s + D0

Assume the following random values for wc, R2, R4, ... , R12: R2 := R2·(1.015) R4 := R4·(0.998) R6 := R6·(1.006) R8 := R8·(0.991) R10 := R10·(0.993) R12 := R12·(0.982) wc := wc·(1.071) Then:

f1 :=

wc R2 ⋅ 2 ⋅ π R4

f1 = 691.3Hz

f 2 :=

wc R6 ⋅ 2 ⋅ π R8

f2 = 690.6Hz

f 3 :=

wc R10 ⋅ 2 ⋅ π R12

f3 = 689.3Hz

Use nominal values for the other components and convert to rad/sec: ω1 := 2·π·f1 Tfa :=

Tfb :=

N1 ⋅ ω1 2

wc 2 ⋅ R 2 2 2 R 4 − ω1 + ( D1 ⋅ ω1) N1 ⋅ ω1 2

wc 2 ⋅ R 6 2 2 R 8 − ω1 + ( D1 ⋅ ω1)

318

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

N1 ⋅ ω1

Tfc :=

2

wc 2 ⋅ R10 2 2 R12 − ω1 + ( D1 ⋅ ω1)

Tfa = 1 Tfb = 0.995 Tfc = 0.953 Tf := Tfa·Tfb·Tfc Tf = 0.948 Tfa = 1, but the product of all three is less. As to the wider center frequencies for the single stage, the chances of wc, R2, and R4 having random values approaching the minimum and maximum center frequencies are much greater than the likelihood of wc, R2, R4, R6, R8, R10, and R12 all having one set of random values for an extreme center frequency. The larger variance, not the mean, of the three-stage gain is again due to the larger number of components involved. Showing that the overall Q for the three stages is 100:

Q1 = 100

1 M 3 := fo ⋅ 1 − 2 ⋅ Q1

1 M 4 := fo ⋅ 1 + 2 ⋅ Q1

M3 = 636.8

M4 = 643.2

M5 :=

1 2

1 0.9 0.8 M5

V3 i 0.7 0.6 0.5 630

632

634

636

638

640 Fi

fo Q2 := M4 – M3

100 Q = 100 51.11

REFERENCES 1. www.taygeta.com/random/gaussian.html.

642

644

646

648

650

Appendix II SUMMARY OF TOLERANCE ANALYSIS METHODS DC It has been demonstrated that the conventional sensitivity-sign-based method of extreme value analysis (EVA) does not always yield the “extreme values.” Hence, the fast Monte Carlo analysis (FMCA) method must be used to guarantee accurate and reliable output tolerance spreads. However, this method may not be practical for large DC circuits because the number of required iterations is 2Nc, where Nc is the number of components. For small-to-medium-sized circuits, however, it is the preferred method. Normal distribution input MCA can be used to closely approximate RSS tolerance bands (Nk > 5000 as a guideline) but not for EVA or FMCA, as has been empirically demonstrated.

AC With AC circuits that have nonmonotonic components, RSS, EVA, and FMCA methods become unreliable and should not be used. Hence, prudence dictates that these methods should not be used for any AC circuit. That leaves MCA as the method of choice. A large number of samples of Nk must be used to obtain tolerance bands greater than those in RSS but less than those in EVA, using uniform distribution inputs. As in DC circuits, the normal (Gaussian) distribution will approximate the RSS 3 σ values for monotonic circuits. A rule of thumb is to use no less than Nk = 1000 samples for large circuits and Nk greater than 10,000 for small circuits.

TRANSIENT Several examples of transient Monte Carlo analysis have been given. The author has discovered that EVA, RSS, or FMCA methods, when applied to transient analysis, yield erroneous results. This is due to the bipolar sensitivities encountered with oscillatory waveforms, which many RC and RCL circuits exhibit. Hence, MCA is once again the recommended method. The execution time is a direct function of kmax (the total number of time increments), Nk (number of Monte Carlo samples), and N (the total number of capacitors and inductors in the circuit). The number N determines the dimensions of the A matrix to be {N N}, which, of course, has a direct effect on execution time.

319

320

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

TABLE OF SUBPROGRAMS PART I NOMINAL ANALYSIS SUBPROGRAMS Lin or Log Frequency

File Namea

Function

comm42 comm42m dccomm42 dccomm42m FindU

AC Nominal AC Nominal DC Nominal DC Nominal Finds total number of circuit nodes

Either Either N/Ab N/A N/A

PART II TOLERANCE ANALYSIS SUBPROGRAMS (USED SUBPROGRAMS) File Namea

Function

Lin or Log Frequency

acwcalin acwcalog dc_beta dc_fmca dc_gap dc_mca

AC EVA AC EVA DC DC FMCA DC DC MCA

Lin Log N/A N/A N/A N/A

dcwca fmcalin fmcalog mcalin mcalog TolArray tranlin 3_ph_ac_evalog 3_ph_ac_fmcalog 3_ph_ac_mcalog

DC EVA AC FMCA AC FMCA AC MCA AC MCA T Array TA 3-Phase EVA 3-Phase FMCA 3-Phase MCA

N/A Lin Log Lin Log N/A N/A Log Log Log

a b

Comments

Superposed outputs for M > 1 Superposed outputs for M > 1 Optional use WITH

PART I

Comments Sensitivity outputs included Sensitivity outputs included Uses Mathcad rbeta functions Uses bimodal input distributions Histogram outputs; normal and uniform distributions EVA and sensitivity outputs

Normal and uniform distribution inputs Normal and uniform distribution inputs Creates symmetric tolerance array T Transient analysis; pulse input Sensitivity outputs included Magnitude and phase outputs Magnitude and phase outputs

All have the file extension mcd. Not applicable.

For required inputs, see example worksheet files.

IN CASE OF DIFFICULTY A checklist if comm42.mcd will not return A, B, D, and E: 1. Check nodes for sequence, i.e., they must be 1, 2, 3, 4, …, U. Make sure no node numbers are skipped or omitted.

Appendix II

321

2. The input source node sequence must be in descending order from 99, 98, …, 90. 3. Check that U is the same as the maximum number of nodes in the circuit. 4. Make sure that Y is at least one of the nodes in the circuit. 5. For AC, make sure that RR, CC, LL, U, Y, Ein, EE, and GG are all created or set to zero as required. 6. For DC, make sure that RR, U, Y, Ein, EE, and GG are all created or set to zero. 7. U, Y, RR, and Ein must all be nonzero. 8. Make sure that all the node numbers in RR, CC, LL, EE, Ein, and GG exist in the circuit and are connected properly. 9. Ensure that autocalculate is ON (Tools, Calculate). As a check, press CTRL + F9. 10. Check for all-capacitive loops and all-inductive cutsets. 11. Check for at least one ground (node 0) in the circuit (also a SPICE requirement). 12. Ensure that none of the four rules of circuit construction given on p. 37 are being violated.

ABBREVIATIONS BPF BJT dpf EVA FMCA HPF HV LPF MCA MFB MOSFET RNG RSS rv TA TTA WCA

Band-pass filter Bipolar junction transistor Derivative perturbation factor Extreme value analysis Fast Monte Carlo analysis High-pass filter High-voltage Low pass filter Monte Carlo analysis Multiple feedback Metal-oxide semiconductor field effect transistor Random number generator Root sum square Random variable Tolerance analysis Transient tolerance analysis Worst-case analysis (a generic term that includes EVA, RSS, FMCA, and MCA)

This page intentionally left blank

Index A A and ß slope intersection method, 103 to 105 AC analysis ACLs, 33 to 34 all-capacitive circuits, 22 to 23 all-inductive circuits, 23 to 24 broadband pulse transformer models, 28 fifth-order active filter, 60 floating VCVSs, 39 HV (200 V) shunt MOSFET regulator, 77 LTC 1562 quad band filter IC, 83 MOSFET model (first-order), 46 output plots, 11 to 13 seventh-order elliptical low-pass filters, 65, 69 to 70, 72 to 73 square root of frequency (+10dB/decade) circuits, 75 State Space Averaging, 142 state variable filters, 62 subcircuits schemes, 57 to 58 third-order opamp models, 56 tolerance analysis, 213 to 216 twin-T RC networks, 26 two inputs, three outputs, 51 unity gain differential amplifiers, 104, 108 to 109 VCVS example, 48 AC and transient MCA — Bessel HPF, 288 to 291 AC circuits, tolerance analysis, 241 to 284 Butterworth low-pass filter circuits, 250 to 255 circuit output vs. component value, 241 to 246 CI sensitivity, exact values, 247 to 248 high-Q hum notch filter circuits, 276 to 281 LC 1562, 281 to 283 multiple-feedback BPF circuits, 255 to 260 multiple output EVA, 248 to 250 Sallen and Key BPF circuits, 265 to 271 state variable filter circuits, 271 to 276 switching power supply compensation circuits, 260 to 265 AC floating VCVS (voltage controlled voltage current), 199 to 202 ACLs (all-capacitive loops), 30 to 31, 32 to 34 Algorithms, Leverrier’s, 97 to 101 All-capacitive circuits, 21 to 23 All-capacitive loops, see ACLs

All-inductive circuits, 23 to 24 All-inductive cutsets, see ICS Amplifiers, video (uA733), 89 to 95, 212 Asymmetric tolerances, 217, 221 to 222

B Balanced Y-load, 181 to 186 Bessel HPF, AC and transient MCA, 288 to 291 Beta distributions [4-6], 232 to 234 Bimodal (gapped) distribution inputs, 236 to 239 Bipolar junction transistors, see BJTs BJTs (bipolar junction transistors), 46 to 47, 87 to 88, 211 to 212 Broadband pulse transformer models, 27 to 30 Buck regulator, switching power supply output stage, 137 to 140 Butterworth low-pass filter circuits, 250 to 255

C CASE FMCA greater than EVA, 228 to 230 CCCS (current-controlled current source), 35, 36 to 37 CCVS (current-controlled voltage source), 36 Centered difference approximation — sensitivities, 222 to 224 Circuit output vs. component value, 241 to 246 Circuits, discrete components, 211 to 212 Circuits with M<1, 41 to 43 CI sensitivity, exact values, 247 to 248 Comparator 100-Hz oscillator, 123 to 127 Component value vs. circuit output, 241 to 246 Constant current source model, 87 to 88 Controlled sources, nominal analysis, 35 to 95 BJT constant current source model, 87 to 88 circuits with M<1, 41 to 43 dependent, 35 to 37 fifth-order active filters, 59 to 60 first-order MOSFET model, 44 to 46 floating VCVS, 38 to 41 HV (200 V) shunt MOSFET regulator, 76 to 77 LTC 1562 band-pass filter IC in a quad IC, 78 to 79 LTC 1562 quad band filter IC, 79 to 86

323

324

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

seventh-order elliptical low-pass filters (see Seventh-order elliptical low-pass filters) square root of frequency (+10dB/decade) circuits, 74 to 75 state variable filters, 60 to 63 subcircuit schemes, 56 to 58 third-order opamp models, 54 to 56 two inputs, three outputs, 50 to 54 uA733 video amplifier, 89 to 95 VCVS,CCCS examples, 46 to 49 Conversions CCCS to VCCS, 36 to 37 CCVS to VCVS, 36 D floating inputs to single-ended Y, 167 to 169 Current-controlled current source, see CCCS

D DC analysis broadband pulse transformer models, 28 floating VCVSs, 38 to 39 HV (200 V) shunt MOSFET regulator, 77 MOSFET model (first-order), 45 to 46 output plots, 9 to 11 State Space Averaging, 141 to 142 tolerance analysis, 212 to 213 twin-T RC networks, 25 two inputs, three outputs, 51 VCVS example, 48 DC circuit analysis, nominal, 151 to 165 floating 5-V input source, 164 to 165 problem, textbook, 152 to 154 RTD circuit, 151 to 152 RTD circuit, step resistor value, 161 to 163 stacking VCVSs and paralleling VCCSs, 158 to 159 test circuit, 154 to 158 voltage sweep (RTD circuit), 159 to 160 DC circuits, tolerance analysis, 219 to 239 asymmetric tolerances, 221 to 222 beta distributions [4-6], 232 to 234 CASE FMCA greater than EVA, 228 to 230 centered difference approximation-sensitivities, 222 to 224 MCA of RTD, bimodal (gapped) inputs, 236 to 239 RTD circuits, 219 to 220, 224 to 228, 234 to 236 tolerancing inputs, 231 to 232 Dependent controlled sources, 35 to 37 Differential equation solvers, Mathcad, 133 to 135 Discrete component circuits, 211 to 212

E Equivalent series resistance, see ESR ESR (equivalent series resistance), 31 EVA (extreme value analysis), 212 to 215, 217 Butterworth low-pass filters, 253 to 254 high-Q hum notch filters, 279 to 280 LC 1562, 282 to 283 less than CASE FMCA, 228 to 230 multiple-feedback BPFs, 257 to 259 Sallen and Key BPFs, 268 to 270 state variable filters, 273 to 275 switching power supply compensation, 262 to 264 Extreme value analysis, see EVA

F Fast Monte Carlo analysis, see FMCA Fifth-order active filters, 59 to 60 First-order MOSFET model, 44 to 46 Floating 5-V input source, 164 to 165 Floating delta input, Y-connected unbalanced load, 177 to 181 Floating VCVSs (voltage-controlled voltage sources), 38 to 41 FMCA (fast Monte Carlo analysis), 212 to 213, 216 Butterworth low-pass filters, 254 to 255 high-Q hum notch filters, 280 to 281 and MCA, state variable filters, 275 to 276 multiple-feedback BPFs, 259 to 260 RTDs (resistance temperature detectors), 227 to 228 Sallen and Key BPFs, 270 to 271 switching power supply compensation, 264 to 265

G Gain-phase plot, plot loop gain as, 105 to 106 Gapped (bimodal) distribution inputs, 236 to 239

H High-Q hum notch filter circuits, 276 to 281 High-voltage shunt regulators, 109 to 114 Histograms, output, 232 HV (200 V) shunt MOSFET regulators, 76 to 77 Hybrid-pi model, BJTs, 46 to 47

Index

325

I

N

ICS (all-inductive cutsets), 31 to 32

N=2 switched circuit transient response, 120 to 123 NDS (node list DC superposition) method BJT, 87 to 88 definition, 3 to 5 solution, three phase circuits, 170 to 174 stability, 103 NDS (node list DC superposition) method theory, 187 to 207 AC floating VCVS, 199 to 202 background theory, 187 to 196 VCVS and CCCS, 203 to 207 Node list circuit analysis, 6 to 21 algebraic solution, passive circuits, 16 to 21 output plots, passive circuits, 9 to 16 rules and definitions, 6 to 8 Node list DC superposition, see NDS Nominal circuit analysis, 3 to 8 Nonmonotonic components, 213 to 214 Numerical derivatives, 222 to 224 Numerical transfer function, Leverrier’s algorithm, 97 to 99

K KCL (Kirchoff’s Current Law), 31 Kirchoff’s Current Law, see KCL Kirchoff’s Voltage Law, see KVL KVL (Kirchoff’s Voltage Law), 30 to 31

L LC 1562, 281 to 283 Leverrier’s algorithm, 97 to 101 LM158 (opamp model), 106 to 109 Low-pass filters, seventh-order elliptical, see Seventh-order elliptical low-pass filters LTC 1562 band-pass filter IC in a quad IC, 78 to 79 LTC 1562 quad band filter IC, 79 to 86

M Mathcad’s differential equation solvers, 133 to 135 Mathematical pulse width modulator, see PWM Matrix solution, 153 to 154 MCA (Monte Carlo analysis) Butterworth low-pass filters, 251 to 253 high-Q hum notch filters, 278 inputs, 232 LC 1562, 281 to 282 multiple-feedback BPFs, 256 to 257 RTD, beta (skewed) distribution, 234 to 236 RTD, bimodal (gapped) inputs, 236 to 239 RTD, R4 tolerance=10%, 226 to 227 Sallen and Key BPFs, 266 to 268 state variable filters, 272 to 273 switching power supply compensation, 261 to 262 transient, 285 to 288, 291 to 293 Monotonic components, 213 Monte Carlo analysis, see MCA MOSFET circuits, 211 to 212 MOSFET model (first-order), 44 to 46 MOSFET regulator, HV (200 V) shunt, 76 to 77 Multiple-feedback BPF (band-pass filter) circuits, 255 to 260 Multiple feedback BPFs (band-pass filters), 286 to 288

O OC (open-collector) transistor output, 124 ODE (ordinary differential equation) solver (Mathcad), 134 to 135 One resistor value, stepping, 68 to 70 Opamp model (LM158), 106 to 109 Open-collector, see OC Ordinary differential equation, see ODE Output histograms, 232 Output plots, 9 to 16

P Paralleling VCCSs and stacking VCVSs and, 158 to 159 Passive circuits, nominal analysis, 9 to 34 ACLs, 21 to 23, 30 to 34 algebraic solution, 16 to 21 all-inductive circuits, 23 to 24 broadband pulse transformer models, 27 to 30 ICS, 31 to 32 output plots, 9 to 16 twin-T RC networks, 24 to 26 Passive RCL circuits, 131 to 133 Plot loop gain as gain-phase plot, 105 to 106 Pulse transformer, 127 to 130

326

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

PWM (mathematical pulse width modulator), 135 to 137, 143

Q Quadrature oscillator, 145 to 147

R Random number generators, see RNGs RCL circuits, 16 to 21, 131 to 133 Resistance temperature detector, see RTD Rkadapt functions, 133 to 134 rkfixed functions, 133 to 134 RNGs (random number generators), 213 Root sum square, see RSS RSS (root sum square), 212, 213, 217 RTD (resistance temperature detector) circuits, 151 to 152, 159 to 163, 219 to 220 RTD (resistance temperature detector) circuits, MCA, 224 to 226, 236 to 239 RTD (resistance temperature detector) FMCA, 227 to 228 RTD (resistance temperature detector) MCA, beta (skewed) distribution, 234 to 236 RTD (resistance temperature detector) MCA, R4tolerance=10%, 226 to 227 Rules, four, 37 Rules and definitions, 6 to 8

S Sallen and Key BPF (band-pass filter) circuits, 265 to 271 Sensitivities, 222 to 224, 247 to 248 Seven capacitor values, stepping, 71 to 73 Seventh-order elliptical low-pass filters, 63 to 73 one resistor value, stepping, 68 to 70 seven capacitor values, stepping, 71 to 73 Simple triangular waveform generator, 143 to 145 Slope intersection method, 103 to 105 SPICE node list text format, 5 Square root of frequency (+10dB/decade) circuits, 74 to 75 Stability analysis, 103 to 114 high-voltage shunt regulator, 109 to 114 opamp model (LM158), 106 to 109 unity gain differential amplifiers, 103 to 106 Stacking VCVSs and paralleling VCCSs, 158 to 159 State Space Averaging, 140 to 143 State variable filter circuits, 271 to 276 State variable filters, 60 to 63, 291 to 293

Step-resistor value, RTD circuit, 161 to 163 Stiff ODEs (ordinary differential equations), 135 Subcircuit schemes, 56 to 58 Switched circuit (N=2) transient response, 120 to 123 Switching power supply compensation circuits, 260 to 265 Switching power supply output stage--Buck regulator, 137 to 140

T Test circuit, DC circuit analysis, 154 to 158 Third-order opamp models, 54 to 56 Three-phase circuits, nominal analysis, 167 to 186 balanced Y-load, 181 to 186 conversion, D floating inputs to single-ended Y, 167 to 169 NDS solution, three phase, 170 to 174 Y-connected unbalanced load--floating delta input, 177 to 181 Y-unbalanced load, three phase, 174 to 177 Three-phase circuits, tolerance analysis, 295 to 301 Time-domain tolerance analysis, 217 Tolerance analysis, introduction, 211 to 217 Tolerancing inputs, 231 to 232 Transfer function, Leverrier’s algorithm, 97 to 101 Transient analysis, 115 to 149 comparator 100-Hz oscillator, 123 to 127 Mathcad’s differential equation solvers, 133 to 135 N=2 Switched circuit transient response, 120 to 123 passive RCL circuits, 131 to 133 pulse transformers, 127 to 130 PWM (mathematical pulse width modulator), 135 to 137 quadrature oscillators, 145 to 147 simple triangular waveform generators, 143 to 145 State Space Averaging, 140 to 143 switched transient analysis, 118 to 120 switching power supply output stage--Buck regulator, 137 to 140 tolerance analysis, 217 Wein bridge oscillator, 148 to 149 Transient tolerance analysis, 285 to 293 AC and transient MCA --Bessel HPF, 288 to 291 transient MCA--multiple feedback BPF, 286 to 288 transient MCA--state variable filter, 291 to 293

Index transient MCA--twin-T RC network, 285 to 286 Twin-T RC networks, 24 to 26, 100 to 101, 285 to 286 Two inputs, three outputs, 50 to 54

U uA733 video amplifier, 89 to 95 Unbalanced delta loads, single-ended inputs, 170 to 174 Unity gain differential amplifiers, 103 to 106

V VCCSs (voltage-controlled current sources), 35, 148 to 149 VCVSs (voltage-controlled voltage sources), 5, 35 to 36, 38 to 41

327 VCVSs (voltage-controlled voltage sources), CCCSs (current controlled current sources), 46 to 49, 203 to 207 Video amplifiers (uA733), 89 to 95 Voltage-controlled current sources, see VCCSs Voltage-controlled voltage sources, see VCVSs Voltage sweep (RTD circuit), 159 to 160

W Wein bridge oscillator, 148 to 149

Y Y-connected unbalanced load--floating delta input, 177 to 181 Y-unbalanced load, three phase, 174 to 177

Other Related Titles of Interest Include: Tolerance Analysis of Electronic Circuits Using MATLAB Robert R. Boyd, University of California, Irvine, California ISBN: 0849322766 Tolerance Analysis of Electronic Circuits Using MATHCAD Robert R. Boyd, University of California, Irvine, California ISBN: 0849323398 The Electronics Handbook, Second Edition Jerry Whitaker, Technical Press, Morgan Hill, California ISBN: 0849318890 PSPICE and MATLAB for Electronics: An Integrated Approach John O. Attia, Prairie View A&M University, Texas ISBN: 0849312639 Electronics and Circuit Analysis Using MATLAB, Second Edition John O. Attia, Prairie View A&M University, Texas ISBN: 0849318920

Node List Tolerance Analysis Enhancing SPICE Capabilities with Mathcad

Robert R. Boyd

Boca Raton London New York

A CRC title, part of the Taylor & Francis imprint, a member of the Taylor & Francis Group, the academic division of T&F Informa plc.

Published in 2006 by CRC Press Taylor & Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca Raton, FL 33487-2742 © 2006 by Taylor & Francis Group, LLC CRC Press is an imprint of Taylor & Francis Group No claim to original U.S. Government works Printed in the United States of America on acid-free paper 10 9 8 7 6 5 4 3 2 1 International Standard Book Number-10: 0-8493-7028-0 (Hardcover) International Standard Book Number-13: 978-0-8493-7028-1 (Hardcover) Library of Congress Card Number 2005052136 This book contains information obtained from authentic and highly regarded sources. Reprinted material is quoted with permission, and sources are indicated. A wide variety of references are listed. Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the consequences of their use. No part of this book may be reprinted, reproduced, transmitted, or utilized in any form by any electronic, mechanical, or other means, now known or hereafter invented, including photocopying, microfilming, and recording, or in any information storage or retrieval system, without written permission from the publishers. For permission to photocopy or use material electronically from this work, please access www.copyright.com (http://www.copyright.com/) or contact the Copyright Clearance Center, Inc. (CCC) 222 Rosewood Drive, Danvers, MA 01923, 978-750-8400. CCC is a not-for-profit organization that provides licenses and registration for a variety of users. For organizations that have been granted a photocopy license by the CCC, a separate system of payment has been arranged. Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe.

Library of Congress Cataloging-in-Publication Data Boyd, Robert (Robert R.) Node list tolerance analysis : enhancing SPICE capabilities with Mathcad/ Robert R. Boyd. p. cm. Includes bibliographical references and index. ISBN 0-8493-7028-0 (alk. paper) 1. Electric circuits, Linear. 2. Analog electronic systems. 3. Electric circuit analysis. 4. Tolerance (Engineering) 5. Mathcad. 6. SPICE (Computer file) TK454.B66 2006 621.3815--dc22

2005052136

Visit the Taylor & Francis Web site at http://www.taylorandfrancis.com Taylor & Francis Group is the Academic Division of Informa plc.

and the CRC Press Web site at http://www.crcpress.com

Preface The purpose of this book is to provide an improved SPICE-like, worst-case analysis (WCA) capability using Mathcad. To achieve more accurate WCA methods, a SPICE-like netlist or node list method of nominal circuit analysis was developed first. Subprogram routines were then added to perform tolerance analyses using Root-Sum-Square (RSS), Extreme Value Analysis (EVA), and Monte Carlo Analysis (MCA) in the DC, frequency, and time domains. Note that “SPICE” is a generic term referring to the public domain software developed by the University of California–Berkeley in the early 1980s. Several companies were started after converting the Fortran code to C and adding a graphics interface. These commercial versions are very capable in nominal circuit analysis and, correspondingly, expensive. There are many areas in SPICE WCA that range from nonexistent or weak capability to erroneous analyses. Most if not all of these deficiencies still exist in many commercial versions. These areas are: • • • • • • • •

A 400-sample Monte Carlo limitation — not nearly enough for adequate statistical confidence levels No RSS capability No direct method of handling asymmetric component tolerances, e.g., +2%, 4% No Fast Monte Carlo Analysis (FMCA) capability* No single-run method of tolerancing inputs No direct method of detecting nonmonotonic components, which cause erroneous WCA outputs No AC frequency sweep sensitivity capability No predefined beta (skewed) or bimodal (gapped) distributions available for MCA

In addition, the SPICE random number generator used for MCA repeatedly supplies the same set of random numbers with each analysis run. To correct this, a new seed must be supplied before each new run. (This is equivalent to having the same 20 numbers come up every time in a Las Vegas keno game.) Some commercial versions may have improved a few of these areas, as most companies want to make a good product better. All of these deficiencies have been addressed and corrected in the supplied Mathcad software on the CD and demonstrated using many examples in this book. For example, the number of Monte Carlo samples is now limited only by the amount * Boyd, R., Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 87.

of memory on the computer platform used. Those readers knowledgeable in statistics know that in Monte Carlo analysis, more is better. It is the author’s hope that this book will provide a much less expensive and more accurate method of performing tolerance analysis of electronic circuits.

The Author Robert R. Boyd was a technical instructor in the United States Air Force for 19 years. Upon his retirement in 1971, he enrolled at the University of New Mexico and received a B.S.E.E. degree with honors in 1974. He was subsequently employed in the aerospace industry, including 8 years with Hughes Aircraft Co., in analog circuit design until 1993 and as a consultant until 2002. He taught courses in tolerance analysis at the University of California Extension, Irvine, in 1998 and 1999. He has authored two books, Tolerance Analysis of Electronic Circuits Using MATLAB and Tolerance Analysis of Electronic Circuits Using Mathcad, both published by CRC Press in 1999.

This page intentionally left blank

Acknowledgments I would like to give my thanks and credit to the following people at Taylor & Francis/CRC Press: Engineering Editor, Nora Konopka – for her successful presentation of my manuscript to the publishing committee and for pleasant email “conversation.” Editorial Project Development Manager, Helena Redshaw – for her patience and diligence in guiding me and the book material through to production. Associate Editor, Allison Taub – for smoothing out the rough spots and helping with the reviews. Project Editor, Amber Stein – for putting up with my frequent changes to the manuscript. They have all been easy to communicate with and helped make the work of writing this book less painful than it would have otherwise been; and all this in spite of several hurricanes! Robert Boyd Placerville, CA

This page intentionally left blank

Table of Contents PART I Chapter 1 1.1

1.2

Nominal Analysis Introduction ........................................................................................3

Nominal Analysis.............................................................................................3 1.1.1 Introduction ..........................................................................................3 1.1.2 The NDS Method of Nominal Circuit Analysis..................................4 1.1.3 General Guidelines...............................................................................5 Introduction to Node List Circuit Analysis .....................................................6 1.2.1 Rules and Definitions...........................................................................6

Chapter 2

Passive Circuits...................................................................................9

2.1 Introduction to Node List Circuit Analysis (Part One)...................................9 2.2 Introduction to Node List Circuit Analysis (Part Two).................................16 2.3 All-Capacitive Circuit ....................................................................................21 2.4 All-Inductive Circuit ......................................................................................23 2.5 Twin-T RC Network ......................................................................................24 2.6 Broadband Pulse Transformer Model............................................................27 2.7 All-Capacitive Loops (ACL)..........................................................................30 2.8 All-Inductive Cutsets (ICS) ...........................................................................31 2.9 All-Capacitive Loop Example .......................................................................32 References................................................................................................................34 Chapter 3 3.1

3.2 3.3 3.4 3.5 3.6

Controlled Sources ...........................................................................35

Controlled (Dependent) Sources....................................................................35 3.1.1 Voltage-Controlled Current Source (VCCS) .....................................35 3.1.2 Current-Controlled Current Source (CCCS) .....................................35 3.1.3 Voltage-Controlled Voltage Source (VCVS) .....................................35 3.1.4 Current-Controlled Voltage Source (CCVS) .....................................36 3.1.5 CCVS to VCVS .................................................................................36 3.1.6 CCCS to VCCS..................................................................................36 3.1.7 Four Rules that Must be Observed....................................................37 Floating VCVS...............................................................................................38 Circuits with M > 1 .......................................................................................41 First-Order MOSFET Model .........................................................................44 VCVS and CCCS Example ...........................................................................46 Two Inputs, Three Outputs ............................................................................50

3.7 3.8 3.9 3.10 3.11 3.12

Third-Order Opamp Model............................................................................54 A Subcircuit Scheme .....................................................................................56 Subcircuit Opamp Model...............................................................................58 Fifth-Order Active Filter ................................................................................59 State Variable Filter........................................................................................60 Seventh-Order Elliptical Low-Pass Filter......................................................63 3.12.1 Stepping One Resistor Value .............................................................68 3.12.2 Stepping All Seven Capacitor Values ................................................71 3.13 Square Root of Frequency (+10 dB/decade) Circuit ....................................74 3.14 HV (200 V) Shunt MOSFET Regulator........................................................76 3.15 LTC 1562 Band-Pass Filter IC in a Quad IC................................................78 3.16 LTC 1562 Quad Band Filter IC.....................................................................79 3.17 BJT Constant Current Source — A Simple Linear Model Using the NDS Method ..................................................................................................87 3.18 uA733 Video Amplifier..................................................................................89 References................................................................................................................95 Chapter 4

Leverrier’s Algorithm ......................................................................97

4.1 4.2

Numerical Transfer Function [1] ...................................................................97 Transfer Function Using Leverrier’s Algorithm for Twin-T RC Network ..................................................................................................100 References..............................................................................................................101 Chapter 5 5.1 5.2 5.3

Stability Analysis ............................................................................103

Unity Gain Differential Amplifiers..............................................................103 Stability of LM158 Opamp Model..............................................................106 High-Voltage Shunt Regulator — Stability Analysis..................................109

Chapter 6

Transient Analysis ..........................................................................115

6.1 Introduction ..................................................................................................115 6.2 Switched Transient Analysis........................................................................118 6.3 N = 2 Switched Circuit Transient Response ...............................................120 6.4 Comparator 100-Hz Oscillator.....................................................................123 6.5 Transient Analysis of Pulse Transformer ....................................................127 6.6 Passive RCL Circuit Transient Analysis......................................................131 6.7 Mathcad’s Differential Equation Solvers.....................................................133 6.8 A Mathematical Pulse Width Modulator (PWM) .......................................135 6.9 Switching Power Supply Output Stage — Buck Regulator .......................137 6.10 State Space Averaging..................................................................................140 6.11 Simple Triangular Waveform Generator......................................................143 6.12 Quadrature Oscillator...................................................................................145 6.13 Wein Bridge Oscillator ................................................................................148 References..............................................................................................................149

Chapter 7 7.1 7.2

7.3 7.4 7.5 7.6 7.7

DC Circuit Analysis .......................................................................151

Resistance Temperature Detector (RTD) Circuit ........................................151 An Undergraduate EE Textbook Problem ...................................................152 7.2.1 Matrix Solution To Demonstrate the Utility of the NDS Method ....................................................................................153 DC Test Circuit ............................................................................................154 Stacking VCVS’s and Paralleling VCCS’s..................................................158 DC Voltage Sweep (RTD Circuit) ...............................................................159 RTD Circuit — Step Resistor Value............................................................161 Floating 5-V Input Source ...........................................................................164

Chapter 8

Three-Phase Circuits .....................................................................167

Convert ∆ Floating Voltage Inputs to Single-Ended Y Inputs ....................167 Three-Phase NDS Solution..........................................................................170 8.2.1 Unbalanced Delta Load — Single-Ended Inputs on A and B ............................................................................................170 8.2.2 Unbalanced Delta Load — Single-Ended Inputs on A and C ............................................................................................172 8.3 Three-Phase Y — Unbalanced Load ...........................................................174 8.4 Three-Phase Y-Connected Unbalanced Load — Floating Delta Input....................................................................................................177 8.5 Balanced Y- Load.........................................................................................181 References..............................................................................................................186 8.1 8.2

Appendix I ............................................................................................................187 Background Theory of NDS Method....................................................................187 A-I.1 Theory of NDS Method...............................................................................196 A-I.1.1 An AC Floating VCVS ..................................................................199 A-I.1.2 VCVS and CCCS...........................................................................203

PART II Chapter 9 9.1

9.2

Tolerance Analysis Introduction ....................................................................................211

Introduction ..................................................................................................211 9.1.1 Tolerance Analysis of Circuits with Discrete Components ............211 9.1.2 Analysis Methods.............................................................................212 Some Facts about Tolerance Analysis .........................................................212 9.2.1 DC Analysis .....................................................................................212 9.2.1.1 Monte Carlo Analysis .......................................................213 9.2.2 AC Analysis .....................................................................................213 9.2.3 Transient Analysis ............................................................................217

9.2.4 Asymmetric Tolerances....................................................................217 References..............................................................................................................217

Chapter 10 DC Circuits .....................................................................................219 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 10.10 10.11

Resistance Temperature Detector (RTD) Circuit......................................219 A Note on Asymmetric Tolerances...........................................................221 Centered Difference Approximation — Sensitivities ...............................222 RTD Circuit Monte Carlo Analysis (MCA) .............................................224 RTD MCA with R4 Tolerance = 10%......................................................226 RTD Circuit Fast Monte Carlo Analysis (FMCA) ...................................227 A CASE FMCA Greater than EVA......................................................... 228 Tolerancing Inputs.....................................................................................231 Beta Distributions [4–6]............................................................................232 RTD MCA — Beta (Skewed) Distribution ..............................................234 MCA of RTD Circuit using Bimodal (Gapped) Distribution Inputs.....................................................................................236 References..............................................................................................................239 Chapter 11 AC Circuits .....................................................................................241 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 11.9 11.10 11.11 11.12 11.13 11.14 11.15 11.16 11.17

11.18 11.19 11.20 11.21

Circuit Output vs. Component Value........................................................241 Exact Values of C1 Sensitivity .................................................................247 Multiple-Output EVA................................................................................248 Butterworth Low-Pass Filter Circuit.........................................................250 Butterworth Low-Pass Filter MCA...........................................................251 Butterworth Low-Pass Filter EVA ............................................................253 Butterworth Low-Pass Filter FMCA ........................................................254 Multiple-Feedback Band-Pass Filter (BPF) Circuit ................................255 Multiple-Feedback BPF MCA..................................................................256 Multiple-Feedback BPF EVA ...................................................................257 Multiple-Feedback BPF FMCA................................................................259 Switching Power Supply Compensation Circuit .....................................260 Switching Power Supply Compensation MCA ........................................261 Switching Power Supply Compensation EVA..........................................262 Switching Power Supply Compensation FMCA ......................................264 Sallen and Key Band-Pass Filter (BPF) Circuit.......................................265 Sallen and Key BPF MCA........................................................................266 11.17.1 Sallen and Key BPF — MCA with both Common and Precision Tolerances ...................................................................267 Sallen and Key BPF EVA .........................................................................268 Sallen and Key BPF FMCA .....................................................................270 State Variable Filter Circuit .....................................................................271 State Variable Filter MCA ........................................................................272

11.22 State Variable Filter EVA..........................................................................273 11.23 State Variable Filter FMCA and MCA Combined...................................275 11.24 High-Q Hum Notch Filter Circuit ...........................................................276 11.25 High-Q Hum Notch Filter MCA ..............................................................278 11.26 High-Q Hum Notch Filter EVA................................................................279 11.27 High-Q Hum Notch Filter FMCA ............................................................280 11.28 LTC 1562 MCA ........................................................................................281 11.29 LTC 1562 EVA..........................................................................................282 References..............................................................................................................284 Chapter 12 Transient Tolerance Analysis ........................................................285 12.1 12.2 12.3 12.4

Transient MCA — Twin-T RC Network ...................................................285 Transient MCA — Multiple Feedback BPF ...............................................286 AC and Transient MCA — Bessel HPF .....................................................288 Transient MCA — State Variable Filter......................................................291

Chapter 13 Three-Phase Circuits ....................................................................295 13.1 Three-Phase Y-Connected Unbalanced Load MCA ....................................295 13.2 Three-Phase Y-Connected Unbalanced Load EVA .....................................297 13.3 Three-Phase Y-Connected Unbalanced Load FMCA..................................300 Chapter 14 Miscellaneous Topics......................................................................303 14.1 14.2 14.3 14.4 14.5

Components Nominally Zero.......................................................................303 Tolerance Analysis of Opamp Offsets .........................................................305 Best-Fit Resistor Ratios ...............................................................................309 Truncated Gaussian Distribution .................................................................311 LTC1060 Switched Capacitor Filter............................................................313 14.5.1 Design Procedure from the Data Sheet ...........................................313

Appendix II...........................................................................................................319 Summary of Tolerance Analysis Methods ............................................................319 DC ................................................................................................................319 AC.................................................................................................................319 Transient .......................................................................................................319 Table of Subprograms............................................................................................320 Part I Nominal Analysis Subprograms .......................................................320 Part II Tolerance Analysis Subprograms (Used with Part I Subprograms) ..................................................................................320 In Case of Difficulty..............................................................................................320 Abbreviations .........................................................................................................321 Index......................................................................................................................323

This page intentionally left blank

TO MY WIFE LINDA Forever and Always

This page intentionally left blank

Part I Nominal Analysis

This page intentionally left blank

1

Introduction

1.1 NOMINAL ANALYSIS The features of this analysis are: • • •

• • •

Loop or nodal analysis math is not required. It uses SPICE-like node lists. All four types of controlled (dependent) sources can be used. It has DC and AC multiple-input-multiple-output (MIMO) capability. • Maximum number of inputs: 10 • Maximum number of outputs: No limit (all circuit nodes) Transient (time-domain) analysis. Three-phase circuit analysis. DC, AC, three-phase, and transient tolerance analysis methods (discussed in Part II).

1.1.1 INTRODUCTION Using state space methods, the circuit DC, AC, and transient response can all be obtained from the same initial analysis. Hence, there is an economy of effort that makes it worthwhile to learn state space techniques. However, conventional state space methods require an inordinate amount of circuit analysis algebra. This book shows a SPICE-like method for creating state space arrays with minimal effort. The numerical transfer function can also be a part of the solution using Leverrier’s algorithm. Hence, this method eliminates the algebra required for conventional circuit analysis techniques as taught in some undergraduate electrical engineering curriculums. The simple procedure entails creating node lists directly from the schematic, very much similar to early commercial versions of SPICE. This original method is called node list DC superposition (NDS). The purpose of presenting this material in Part I is to provide easy SPICE-like analysis methods for the working engineer if SPICE is not available owing to network downtime, network queuing (owing to limited site licenses), or, as sometimes happens in smaller companies, simply has not been purchased. Circuits of at least medium complexity can be simulated. (See Section 3.15 for a circuit with a component count of 68.) The primary goal, however, is to demonstrate correct tolerance analysis methods (Part II). The prerequisite nominal circuit analysis NDS method along with numerous examples is covered in Part I.

3

4

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1.1.2 THE NDS METHOD

OF

NOMINAL CIRCUIT ANALYSIS

It is assumed that electrical engineers are somewhat familiar with matrix analysis and state space methods; hence, the introductory material is not extensive. Familiarity with these subjects and Mathcad is necessary. As previously stated, a big advantage of state space analysis is that the DC output, AC frequency response, transient response, and circuit transfer function (using Leverrier’s algorithm) can all be obtained from one initial analysis. Another advantage is that state space matrices or arrays are real, not complex. Complex matrices obtained from loop or nodal analysis require a real array twice the size of a complex array to obtain a solution. Hence, state space methods decrease execution time for large arrays and increase solution accuracy. This becomes apparent when it is recalled that the number of arithmetic operations required to find a determinant is directly proportional to N!, where N is the dimension of the square array. The matrix equations used in state space analysis are dx dx = Ax + Bu, y = Dx + Eu + G dt dt where A, B, D, E, and G are arrays; x, a column vector of the state variables; u, a column vector of inputs; and y, the output. In most analyses, array G is a null (zero) array. (For an example using the G array, see Section 12.3.) Taking the Laplace transform of the first equation and substituting in the second gives the following with G = 0: y = D(sI – A)–1 Bu + Eu where I is an identity matrix. In the NDS method, the input u is included in B and E so that y = D(sI – A)–1 B + E The “state variables” are the capacitor voltages and inductor currents. Using N as the order of the circuit (number of L’s and/or C’s), M as the number of inputs, and K as the number of outputs, the arrays have the following dimensions (in {row column} format): Array A B D E G x u I

Rows N N K K K N M N

Columns N M N M N 1 1 N

Introduction

5

Using dimensional notation, {row col}, y is {K N}{N N}{N M} + {K M} = {K M}. Then, y is a transfer matrix with the dimensions {K M} or {output input} Note that in multiplying matrices, the inner dimensions in {row col} order must be the same. That is, if A is {N N} and B is {N M}, they cannot be multiplied as BA because {N M}{N N}, the inner dimensions, do not match. But they can be multiplied as AB = {N N}{N M}. The dimension of the product is the outside dimensions of both, i.e., {N M}. Hence, the dimension of the product {K N}{N N}{N M} is {K M}, which can be added to E = {K M} (The two arrays are then said to be “conformable” for multiplication if the inner dimensions are the same, and they are conformable for addition if the dimensions are equal.)

1.1.3 GENERAL GUIDELINES The SPICE node list text format is Ref Desig From node To node Component value. An example would be R3 6 9 10K. The node lists used in the NDS method are arrays of the form [From node To node Ref Desig], the component value having been specified prior to node list creation. Node numbering must start with 1 and be in numerical sequence up to 89. Nodes 99, 98, …, 91, 90 are reserved for inputs, and node 0 is for ground. There is no requirement for the resistor node list as to node sequence. That is, [4 5 R1] and [5 4 R1] are both accepted. For the capacitor node list and the inductor node list, however, the sequence must correspond to Kirchoff’s current law (KCL): current flow from left to right and from top to bottom. Hence, [3 6 C1] will work, but [6 3 C1] may give the wrong phase angle output and incorrect output polarity in DC and transient analyses. The open loop gain of opamps is set at 106 V/V or 120 dab. In the majority of circuit examples, no opamp frequency rolloff is used. However an example is given on how to create an opamp with rolloff using voltage-controlled voltage sources (VCVSs) (see Section 3.7 and Section 3.8). The Mathcad file in Section 3.18 demonstrates how to embed the opamp rolloff models into circuits, much like subcircuits in SPICE. Component values should generally be kept within the bounds of 1E+12 and 1E–12. Numbers outside this range run the risk of excessively increasing the A matrix condition number. This will cause solution accuracy to diminish. A guideline that can be used is the number of decimal places of accuracy, which is 15 – log10 × (condition number). If a solution appears incorrect or unreasonable, the condition number of matrix A should be checked using the Mathcad statement floor(15log(conde(A))). The reference paths for the subprogram files are localized for the author’s computer. In creating new files, the user must click on Insert, then on Reference, and then enter the correct local path or go to Browse. Two of the most important Mathcad subprogram files are named as follows: For DC: dccomm42.mcd (creates A1 and B2 arrays) For AC: comm42.mcd (creates A, B, D, and E arrays)

6

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

All of the necessary Mathcad subprograms are contained in the included CD. There is no error trapping. Users must ensure that the node lists correctly represent the circuit being analyzed and that all required input arrays are included. The version of the software used is Mathcad 11.0. (Note that due to internal bugs in Mathcad 8.0, some files will not run on that version. Intermediate versions have not been tested.) Some mathematical ability will be helpful for some advanced subjects such as the theory of the NDS method (Appendix I), stability analysis, Leverrier’s algorithm, and transient analysis.

1.2 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS The passive RCL circuit used to demonstrate the procedure is shown in the following figure: L3 R1

V1

C1

V2

R2

V3

Ein R4

1.2.1 RULES

AND

R3

C2

L4

DEFINITIONS

Calculated using the Mathcad subprogram file comm42.mcd: Ncap = number of capacitors Nind = number of inductors N = Ncap + Nind M = number of independent inputs (= 1 here, but can be up to 10) K = number of outputs (= 1, but can be up to U) User input: U = number of unknown nodes (= 3 here). Y = output node (can be any or all of the three nodes V1, V2, or V3). Number nodes sequentially from 1 to U (V1, V2, V3,…); 0 is ground. Maximum value of U = 89. Independent voltage input nodes are numbered from 99, 98, …, 90. (Note that if only one input source is present, use 99 as the node number; if two inputs, use 99, 98; if three inputs, use 99, 98, 97, etc.) Component reference designator sequence is optional. It can be R1, L2, Ra, Cx, R301, etc. A sequential numbering has been used for convenience.

Introduction

7

For AC analysis, log frequency sweep: BF = Beginning log frequency = 10BF Hz ND = Number of decades from BF PD = Points per decade Total number of frequency points NP = ND·PD + 1 Linear frequency sweep BF = Beginning frequency in Hz LF = Last frequency in Hz DF = Frequency increment LF − BF +1 DF Using the RCL circuit, creating the node lists is just as easy as in early versions of SPICE. For the resistors, we create the array RR: Total number of frequency points NP =

99 1 RR = 2 3

1 2 3 0

R1 R 4 R2 R3

The first column is one of the two nodes that the resistor is connected to, whereas the second column is the other node. The last column is the reference designator for the resistor, the value of which has been given previously. For the capacitors, we create the array CC: 1 CC = 3

2 0

C1 C2

For the inductors, we similarly create the array LL: 1 LL = 3

2 0

L3 L 4

The inputs are listed in the array Ein as Ein = (99 1). The first number indicates the node and the second, the amplitude in volts, which is usually set to 1. All independent inputs are referenced to ground. Because this circuit is passive with no controlled sources, this must be shown for VCVSs as EE = 0. No Voltage-Controlled-Current (VCCS) is shown as GG = 0.

8

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

REFERENCES 1. Seminal information for the method was obtained from DeRusso, P.M., Roy, R.J., and Close, C.M., State Variables for Engineers, John Wiley, NY, 1965.

2

Passive Circuits

2.1 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS (PART ONE) Analysis with output plots. Unit suffixes: K := 103

u := 10–6

m := 10–3

L3 R1

V1

C1

V2

R2

V3

Ein R3

R4

C2

L4

Component values: R1 := 10 C1 := 0.1·u

R2 := 100 C2 := C1

R3 := 50·K f1 := 10·K

R4 := 10·K f2 := 100·K

f1 and f2 are resonant frequencies for the values of L3 and L4. Calculate L3 and L4: L 3 :=

1

( 2 ⋅ π ⋅ f1) ⋅ C1 2

L 4 :=

1

( 2 ⋅ π ⋅ f 2 ) ⋅ C2 2

The eight inputs required for the subprogram comm42.mcd are: U, Y, EE, GG, RR, CC, LL, and Ein (see previous definitions). U := 3 Three unknown nodes. Y := 3 Take the output from node 3, V3.

9

10

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Set up node list arrays: Ein := (99 1) 99 1 RR : = 2 3

1 2 3 0

R1 R4 R2 R 3

(Ein = 1 V at node 99)

1 CC : = 3

EE := 0 (No VCVSs)

2 0

C1 C2

1 LL : = 3

2 0

L 3 L 4

GG := 0 (No VCCSs)

Insert reference for subprogram file comm42 to get state space arrays A, B, D, and E: → Reference:C:\mcadckts\CaNL11\comm42.mcd Display arrays: −91909.09 −90909.09 A= 394.78 0

−90909.09 −91109.009 0 39478.42

−1 × 10 7 0 0 0

0 −1 × 10 7 0 0

90909.09 90909.09 B= 0 0 D = (0

1

0)

0

E = (0) DC Analysis dx dx = Ax + B, the DC value is obtained by setting = 0. Then AX = −B and dt dt X = −A−1⋅B where the uppercase X is used for DC. Mathcad’s lsolve function provides the solution. When B has more than one column, the explicit solution form X = −A−1⋅B must be used. In

X : = 1solve(− A, B) VC1 VC 2 XT = ( 0

0

IL 3 9.091

IL 4 9.091) m

That is, IL3 = IL4 = 9.091 mA. The capacitors are short-circuited by the inductor.

Passive Circuits

11

DC output voltage at node Y: Y = 3 Vodc := D·X + E Vodc = (0) DC node voltages (inductors open-circuited) Vdc := 1solve(A11, A14) VdcT = (1 0.833 0.832) Ein1,2 ⋅ R 3 = 0.832 R1 + R 2 + R 3 + R 4

Confirming the last entry in vector Vdc: AC Analysis BF := 3

ND := 3

Li := BF +

i −1 PD

PD := 40

NP := ND·PD + 1

s := 2·π·10L· −1

i := 1..NP

cvi := D(si·I – A)–1·B + E

180 ·arg(cvi) π Note the two resonant frequency cusps at f1 and f2. Voi := db(cvi)

Vai :=

Output magnitude at node Y

0

Y=3

dBV

−20 Voi

−40 −60 −80

3

3.5

4

4.5

5

5.5

6

Li Log freq(Hz)

Phase angle at node Y

180 150 120 Degrees

90 (Vai)1

60 30 0 −30 −60 −90

3

3.5

4

4.5 Li Log freq(Hz)

5

5.5

6

12

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

2 Now take the output from both nodes 2 (V2) and 3 (V3): Y := 3 Call the subprogram comm42 again to get the new D and E arrays. → Reference:C:\mcadckts\CaNL11\comm42.mcd

−91909.091 −90909.091 A= 394.784 0

−90909.091 −91109.091 0 39478.418

0 −1 × 10 7 0 0

−1 × 10 7 0 0 0

90909.091 90909.091 B= 0 0 −0.909 D= 0

0.091 1

0 0

0 0

0.909 E= 0

Note that only D and E have changed. Sample of cv (complex value) for one output: cv10 = (0.001 + 0.002i) Dimension = {K M} = {1 1} Get the new AC outputs and plot: cvi = D·(si·I – A)–1·B + E 0.855 − 0.213i Sample of cv for two outputs: cv10 = 0.001 + 0.002 i Dimension = {K M} = {2 1} Plot both: Vo 2 i : = db ( cvi )1 Vo 3i : = db ( cvi )2

Passive Circuits

13 Output magnitude at node Y

0

2 Y = ( 3)

dBV

−20 Vo2i Vo3i

−40 −60 −80

3

3.5

4

V2 V3

4.5 Li

5

5.5

6

Log freq(Hz)

We can plot the ratio of V3 to V2 as follows: ( cvi )2 Vo 32 i : = db ( cvi )1

Va 32 i : =

( cvi )2 180 ⋅ arg π ( cvi )1

Magnitude of V3/V2

0

dBV

−20 Vo32i −40 −60 −80

3

3.5

4

4.5 Li

5

5.5

6

5

5.5

6

Log freq(Hz) Phase of V3/V2

180 120

Deg

60 Va32i

0 −60 −120 −180

3

3.5

4

4.5 Li Log freq(Hz)

14

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Introduction to NDS Method — SPICE Verification VEin 99 0 AC 1 R1 99 1 10 R4 1 2 10K R2 2 3 100 R3 3 0 50K * C1 1 2 0.1u C2 3 0 0.1u * L3 1 2 2.533m L4 3 0 25.33u * .PRINT AC V(2) V(3) VP(3) V(3,2) VP(3,2) .AC DEC 50 1E3 1E6 .OPTIONS NOMOD NOECHO NOPAGE .END Extracting the data from the SPICE *.out file and plotting: Fnom := READPRN(“c:\SPICEapps\datfiles\intro3.txt”) N := rows(Fnom) N = 151 k := 1..N

Spice veriﬁcation - magnitude

0

dBV

−20 db(Fnomk,2) db(Fnomk,3)

−40 −60 −80

3

3.5 V2 V3

4

4.5 log(Fnomk,1) Log freq(Hz)

5

5.5

6

Passive Circuits

15 Spice veriﬁcation - phase angle

180 150 120 Deg

90 Fnomk,4

60 30 0 −30 −60 −90

3

3.5

4

4.5

5

5.5

6

log(Fnomk,1) Log freq(Hz)

For further verification, we compare the accuracy of the A and B arrays obtained from the NDS method to that obtained from the algebraic solution in Section 2.2. Ax and Bx, shown in the following, are from that section. −1 1 1 C1 ⋅ R 4 + R1 + R 2 −1 C 2 ⋅ R 1 + R2) ( Ax := 1 L 3 0 −91909.09 −90909.09 Ax = 394.78 0 0 0 A − Ax = 0 0

0 0 0 0

0 0 0 0

−1 C1 ⋅ ( R1 + R 2 )

−1 C1

−1 1 1 ⋅ + C2 R1 + R 2 R 3

0

0

0

1 L4

0

−90909.09 −91109.09 0 39478.42 0 0 0 0

−1 × 10 7 0 0 0

0 −1 C2 0 0

0 −1 × 10 7 0 0

16

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 C1 ⋅ ( R1 + R 2 ) 0 90909.09 0 1 90909.09 Bx := Bx = B − Bx = 0 0 C2 ⋅ ( R1 + R 2 ) 0 0 0 0

2.2 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS (PART TWO) K := 103

u := 10–6

The algebraic solution of a sample RCL circuit is given to show the amount of labor saved using the NDS method. For those less mathematically inclined, the next three pages can be skipped. The advantages of the NDS method can be seen just by glancing at the amount of circuit analysis algebra given in the following: L3 R1

V1

C1

V2

R2

V3

Ein

R1 := 10 R4 := 10·K fl := 10·K

R2 := 100 C1 := 0.1·u f2 := 100·K L 3 :=

1

( 2 ⋅ π ⋅ f1)

C2

R3

R4

2

⋅ C1

L4

R3 := 50·K C2 := C1

L 4 :=

1

( 2 ⋅ π ⋅ f 2 ) 2 ⋅ C2

Format goal: eL and iC on LH side; Ein, iL, and vC on RH side. Must only use terms involving these unknowns. We thus need N = Ncap + Nind = 4 equations in the following format including constant coefficients. f(eL, iC) = g(iL, vC, Ein) in which e L = L ⋅

diL dt

iC = C ⋅

dvC dt

We first see that eL3 = vC1

eL4 = vC2

(1)

Passive Circuits

17

which are in the correct format. Two more equations are needed. KCL at node V1: Ein − V1 V1 − V2 = iL 3 + iC1 + R1 R4

V1 − V2 = vC1

(2)

Ein v V1 − iL 3 − C1 − R1 R 4 R1

(3)

Substituting: Ein − V1 v = iL 3 + iC1 + C1 R1 R4

iC1 =

Not done yet; need to eliminate V1. KCL at node V2: iL 3 + iC1 +

vC1 V2 − V3 = R4 R2

We see that: V3 = vC2 Substituting and rearranging: V2 vC 2 vC1 − − − iC1 − iL 3 = 0 R2 R2 R 4

(4)

Solving Equation 4 for V2: V2 = iL 3 ⋅ R 2 + vC 2 +

vC1 ⋅ R 2 + iC1 ⋅ R 2 R4

V1 = vC1 + V2 From Equation 2

(5) (6)

Substituting Equation 5 into Equation 6 V1 = vC1 + iL 3 ⋅ R 2 + vC 2 +

vC1 ⋅ R 2 + iC1 ⋅ R 2 R4

Collecting terms: R2 V1 = vC1 ⋅ 1 + + vC 2 + iL 3 ⋅ R 2 + iC1 ⋅ R 2 R4 Substituting Equation 7 into Equation 3:

(7)

18

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

iC1 =

Ein v v R 2 vC 2 iL 3 ⋅ R 2 iC1 ⋅ R 2 − − − iL 3 − C1 − C1 ⋅ 1 + − R1 R 4 R1 R 4 R1 R1 R1

Collecting terms: R 2 Ein R 2 vC 2 1 R2 1 iC1 ⋅ 1 + = − iL 3 ⋅ 1 + − − vC1 ⋅ + + R1 R 4 R1 ⋅ R 4 R1 R1 R1 R1 From Equation 2: V2 = V1 − vC1 Repeating Equation 5: V2 = iL 3 ⋅ R 2 + vC 2 +

vC1 ⋅ R 2 + iC1 ⋅ R 2 R4

KCL at node V3: V2 − V3 V3 = + iC2 + iL 4 R2 R3 Substituting V3 = vC2 −V2 1 1 + vC 2 ⋅ + + iC 2 + i L 4 = 0 R 2 R 3 R2 Multiplying by –1: V2 1 1 − vC 2 ⋅ + − iC 2 − i L 4 = 0 R 2 R 3 R2 Substituting Equation 5: iL 3 +

vC 2 vC1 1 1 + + iC1 − vC 2 ⋅ + − iC 2 − i L 4 = 0 R2 R 4 R2 R 3

Rearranging to the correct format: iC1 − iC 2 = − iL 3 − or finally

vC 2 vC1 1 1 − + vC 2 ⋅ + + iL 4 R 2 R 3 R2 R 4

(8)

Passive Circuits

19

iC1 − iC 2 = − iL 3 +

vC 2 vC1 − + iL 4 R2 R 4

(9)

Create two {N N} arrays W and Q from Equation 1, Equation 8, and Equation 9. Fill in the coefficients from the LH sides for W, and for the RH sides for Q per the column headings: iC1

iC 2

0 0 W := R2 1 + R1 1 vC1 1 0 1 1 R2 Q := − + + 1 4 1 ⋅ R4 R R R −1 R4

eL 3 eL 4

0 0

1 0

0

0

−1

0

0 1 0 0

vC 2

iL 3

iL 4

0 1

0 0

−1 R1 1 R3

R2 − 1 + R1

0 0 0 1

−1

S is created from the only Ein term in the third equation: P is an {N N} diagonal array in the same C and L order as W and Q. 0 0 S := 1 R1 0

C1 0 P := 0 0

0 C2 0 0

Now form A and B as follows: C:= (W·P)–1 −91909.091 −90909.091 A= 394.784 0

−90909.091 −91109.091 0 39478.418

−1 × 10 7 3.492 × 10 −10 0 0

0 0 L3 0

0 0 0 L 4

A := C·Q

B := C·S

90909.091 0 7 90909.091 −1 × 10 B= 0 0 0 0

20

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Because the output is vC2, we place a 1 in the second column of the {K N} array vC1 vC 2 iL 3 D := ( 0

1

0

iL 4 0)

Because there are no input terms Ein in the output: E := 0 Prior to this shortcut method [*], the algebra would have to continue as follows. Isolating iC1 in Equation 8: iC1 =

vC 2 Ein 1 1 − iL 3 − − vC1 ⋅ + R 4 R1 + R 2 R1 + R 2 R1 + R 2

Because iC1 = C1 ⋅ dvC1 − vC1 = dt C1

(10)

dvC1 , we get dt

1 vC 2 i Ein 1 ⋅ + − L3 + − R 4 R1 + R 2 C1 ⋅ ( R1 + R 2 ) C1 C1 ⋅ ( R1 + R 2 )

(11)

From Equation 9: iC 2 = i L 3 − i L 4 +

vC1 vC 2 − + iC1 R4 R3

(12)

Substituting Equation 10 into Equation 12: iC 2 = i L 3 − i L 4 +

iC 2 =

vC1 vC 2 vC 2 1 Ein 1 − − iL 3 − − vC1 ⋅ + + R 4 R1 + R 2 R1 + R 2 R4 R3 R1 + R 2 – vC1 Ein 1 1 − iL 4 + − vC 2 ⋅ + R1 + R 2 R 3 R1 + R 2 R1 + R 2

Again, because iC 2 = C2 ⋅

dvC 2 dt

− vC1 dvC 2 v = − C2 dt C2 ⋅ ( R1 + R 2 ) C2

1 1 iL 4 Ein ⋅ + − + R1 + R 2 R 3 C2 C2 ⋅ ( R1 + R 2 )

From Equation 1 above, repeated here: eL3 = vC1

eL4 = vC2

(13)

Passive Circuits

21

eL 3 = L 3 ⋅

diL 3 , dt

diL 3 vC1 = dt L3

(14)

Similarly: diL 4 vC 2 = dt L4

(15)

Using Equation 11, Equation13, Equation14, and Equation15, the general form matrix equation

dx = Ax + Bu becomes dt

1 dvC1 −1 ⋅ 1 + dt C1 R 4 R1 + R 2 −1 dvC 2 dt C2 ⋅ ( R1 + R 2 ) diL 3 = 1 dt L3 diL 4 0 dt

−1 C1 ⋅ ( R1 + R 2 )

−1 C1

−1 1 1 ⋅ + C2 R1 + R 2 R 3

0

0

0

1 L4

0

1 C1 ⋅ ( R1 + R 2 ) 1 + 2 1 2 ⋅ + C R R ( ) ⋅ Ein 0 0

2.3 ALL-CAPACITIVE CIRCUIT u := 10–6 R3

R1

1

C1

2

Ein C2 3 R2

0 −1 vC1 C2 ⋅ vC 2 iL 3 0 i L4 0

22

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R1 := 10 U := 3 99 RR := 1 3 tors) EE := 0

R2 := 100 R3 := 50 Y := 2 Ein := (99 1) 1 2 0

R1 R 3 R 2

C1 := 0.1·u C2 := 0.5·u Input 1 V at node 99.

1 CC := 2

2 3

C1 LL := 0 (No inducC2

GG := 0 (No controlled sources.)

Get A, B, D, and E arrays from subprogram comm42.mcd: → Reference:C:\mcadckts\CaNL11\comm42.mcd −290909.1 A= −18181.8

−90909.1 −18181.8

90909.1 B= 18181.8 D = ( −0.909

0.091)

E = ( 0.909 ) DC voltages at all U nodes in the order given by Vdc. If inductors are present, they are open-circuited: Vdc := lsolve(A11, A14) X := lsolve(–A,B) Vodc := D·X + E Y=2

VdcT = (1

1

0)

0 X= 1 Vodc = (1) DC output voltage at node Y given by Vodc.

AC Analysis BF := 3

ND := 3

i := 1..ND·PD + 1

PD := 40

cvi := D·(si·I – A)–1·B + E 180 ·arg(cvi)1 π (Phase angle) Y=2

Vai :=

i −1 s := 2·π·10L· −1 PD Voli := db(cvi)

Li := BF +

Passive Circuits

23 Magnitude at node Y

Degrees

dBV

−1 Vo1i −2 −3 −4

Phase at node Y

10

0

3

4

5

0

Vai

−10 −20

6

3

4

5

Li

Li

Log freq (Hz)

Log freq (Hz)

2.4 ALL-INDUCTIVE CIRCUIT u := 10–6

mA := 10–3 R3

R1

1

L1

2

Ein L2 3 R2

R1 := 10 U := 3 99 RR := 3 1

R2 := 100 R3 := 50 Y := 2 Ein := (99 1) 1 0 2

R1 R 2 R 3

1 LL := 2

L1 := 220·u

2 3

CC := 0 (No capacitors) EE := 0 GG := 0 (No controlled sources.) → Reference:C:\mcadckts\CaNL11\comm42.mcd

L1 L 2

L2 := 330·u

6

24

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

−2287272.7 A= 151515.2

227272.7 −484848.5

0 B= 3030.3 D = ( 50

−60 )

E = (1) VdcT = (1

Vdc := lsolve(A11, A14) 9.091 X= 9.091

iL1 mA iL 2

1

0)

X := lsolve(–A, B)

Vodc := D·X + E

Vodc = (0.909)

AC Analysis BF := 3

ND := 3

i −1 PD cvi := D·(si·I – A)–1·B + E Voli := db(cvi)

NP := ND·PD + 1

i := 1..NP

s := 2·π·10L· −1 Vai :=

PD := 50

180 ·arg(cvi)1 π

Li := BF +

Y=2

Amplitude at node Y 0

5 Degrees

dBV

−1 Vo1i −2 −3

Phase at node Y

10

Vai

0 −5

3

4

Li

5

6

−10

3

Log freq (Hz)

Li

5

Log freq (Hz)

2.5 TWIN-T RC NETWORK 60-Hz Notch Filter K :=103 u := 10–6

4

Meg := 106

m := 10–3

6

Passive Circuits

25 C2

C3

V1 R3

R4

V4

Ein

R1

R2

V2 C1

V3

R5

R1 := 267·K R2 := 267·K R3 := 133·K R4 := 0.01 C1 := 0.02·u C2 := 0.01·u U := 4 Y :=3 Ein := (99 1) 4 2 RR := 3 1 99

2 3 0 0 4

R1 R2 R5 R 3 R 4

2 CC : = 4 3

0 1 1

R5 := 10·Meg C3 := 0.01·u

C1 C2 C 3

GG : = 0 LL : = 0 EE : = 0

Resistor R4 is the output impedance of the external voltage source. → Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis

X := lsolve(–A, B)

0.975 VC1 X = 1 VC 2 0.949 V C3

Vodc := D·X + E

Vodc = (0.949) Ein1,2 ⋅ R 5 = 0.949 (Checks; same as Vodc.) R 4 + R1 + R 2 + R 5 DC node voltages: Vdc := lsolve(A11, A14) V1 Vdc T = ( 0

V2

V3

0.975

0.049

V4 1)

Note: The reader is encouraged to reverse 3 1 C3 to 1 3 C3 in the CC array and note the polarity change of VC3 above. Sign changes in the D array cancel the VC3 sign change and the output Vodc polarity remains the same. In SPICE the state variables X and the A, B, D, E arrays are not accessible. As will be seen later, access to these arrays can be useful.

26

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

AC Analysis BF := 0 DF :=

LF := 100

LF − BF NP

NP := 100

i := 1..NP + 1

s := 2·π·F· −1

DF = 1

(Linear frequency sweep) Fi := BF + DF·(i – 1)

cvi := D·(si·I – A)–1·B + E

180 ·arg(cvi) π Note: Most math software and scientific calculators limit phase angles of complex numbers to +/– 180 deg, or π+ to –π. SPICE phase angle outputs can be from 0 to + 360 (2 ) or 360 deg. For example, +300 deg is equivalent to –60 deg; –200 deg is equivalent to +160. Both are correct. Voli := db(cvi)

Vai :=

Output plots Y=3 Magnitude at node Y

0

dBV

−20 Voi −40

−60

0

10

20

30

40

50 Fi

60

70

80

90

70

80

90

100

Freq(Hz) Phase at node Y

100

Deg

50 (Vai)1

0 −50 −100

0

10

20

30

40

50 Fi Freq(Hz)

60

100

Passive Circuits

27

2.6 BROADBAND PULSE TRANSFORMER MODEL K := 103

p := 10–12

u := 10–6

n := 10–9

R6 R1

1

R2

6

L1

2

m := 10–3

R4

3

C2 4

L3

5

Ein C1

R7

R3

R5 L2

7

R1 := 10 R6 := 0.5 L2 := 2·m U := 7

R2 := 1.5 C1 := 20·p L3 := 1·u Y := 5

R3 := 20·K C2 := 5·p R7 := 1

Ein := (99

10)

99 1 3 RR := 3 5 1 3

C3

R4 := 1.5 C3 := 20·p

R5 := 1·K L1 := 1·u

10 Vac input. 1 2 0 4 0 6 7

R1 R2 R 3 R 4 R5 R6 R 7

1 CC : = 6 5

0 5 0

C1 C2 C 3

2 LL : = 7 4

3 0 5

L1 L2 L 3

EE : = 0 GG : = 0 L1 and L3 represent leakage inductance; L2 is the magnetizing inductance. Insert subprogram file: → Reference:C:\mcadckts\CaNL11\comm42.mcd

28

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

DC Analysis X := lsolve(–A,B) X Format: VC1

(

X T = 1.999

VC 2

VC 3

IL 1

IL 2

1, 201

0.7 798

0.8

0.799

Vodc := D·X + E

IL 3 7.98 × 10 −4

)

Vodc = (0.798)

Note that this DC analysis is certainly easier than deriving the following algebraic solution: Vdc5 : =

Ein1,2 ⋅ R 5 R1 + R 2 1 + ⋅ (R 4 + R5) (R 4 + R5) ⋅ R 3 ⋅ R 7 ⋅ + + ⋅ + R 3 R 7 R 4 R 5 R 3 R 7 ( )( )

Vdc5 = 0.798 DC node voltages (inductors open-circuited): VdcT = (10

Vdc := lsolve(A11, A14)

10

0

0

0

10

0)

AC Analysis BF := 2

ND := 6

i := 1..ND·PD +1

PD := 30 Li := BF +

cvi := D·(si·I – A)–1·B + E

i −1 PD

rd :=

s := 2·π·10L· −1

180 π

Voi := db(cvi) Vai := rd·arg(cvi) Note flat response from about 1 KHz to 10 MHz. Output amplitude at node Y

40

dBV

20 Voi

0 −20 −40

2

3

4

5 Li Log freq(Hz)

6

7

8

Passive Circuits

29 Phase at node Y

200 150 Degrees

100 50 (Vai)1

0 −50 −100 −150 −200

2

3

4

5 Li Log freq(Hz)

6

7

Broadband Pulse Transformer — SPICE Verification *File: c:\SPICEapps\Cirtext\xformer.cir VEin 99 0 AC 10 R1 99 1 10 R2 1 2 1.5 R3 3 0 20K R4 3 4 1.5 R5 5 0 1K R6 1 6 0.5 R7 3 7 1 * C1 1 0 20p C2 6 5 5p C3 5 0 20p * L1 2 3 1u L2 7 0 2m L3 4 5 1u * .AC DEC 20 100 1E8 .PRINT AC V(5) VP(5)

8

30

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

.OPTIONS NOMOD NOPAGE NOECHO .END Extracting the data from the SPICE *.out file: Fnom := READPRN(“c:\SPICEapps\datfiles\xformer.txt”) N := rows(Fnom) N = 121 k := 1..N Output amplitude at node Y

40

dBV

20 db(Fnomk,2)

0 −20 −40

2

3

4

5

6

7

8

Degrees

log(Fnomk,1) Log freq(Hz)

Fnomk,3

200 150 100 50 0 −50 −100 −150 −200

Phase at node Y

2

3

4

5 log(Fnomk,1) Log freq(Hz)

6

7

8

2.7 ALL-CAPACITIVE LOOPS (ACL) In a physical circuit, two or more capacitors in parallel can occur, such as in power supply decoupling circuits. However, in converting capacitors to ideal independent voltage sources (which is done using this method of analysis), we end up with a violation of Kirchoff’s laws. For example, in the circuit that follows:

C1

C2

C3

+ −

E1

+ −

E2

+ −

E3

Passive Circuits

31

If we assign arbitrary values to E1, E2, and E3, Kirchoff’s Voltage Law (KVL) is violated around any of the three possible loops. If we assign the value of +1 V to all three, because the resistance is zero, infinite current will flow around the loops unless all assigned values of 1.0 have an infinite number of zeros after the decimal point, e.g., if E1 – E2 = 10–9000 V divided by zero resistance is infinite current. Another example of an ACL is: C2

C1

C3

When converted to ideal voltage sources, KVL is again violated. For example, if the arbitrary values were C1 = E1 = 10 V, C2 = E2 = 7 V, and C3 = E3 = 20 V, KVL yields –10 + 7 + 20 = +17 V ≠ 0. Every “real-world” capacitor has a small amount of series resistance, termed equivalent series resistance (ESR). The cure in state space analysis of circuits with ACLs is to place a small ESR resistor (≈ 0.01 Ω) in series with all (or all but one) of the capacitors. E1

+ −

R2

R1

E2

+ −

E3 The cure

+ −

R3

2.8 ALL-INDUCTIVE CUTSETS (ICS) A similar problem occurs with circuits having two or more inductors connected to the same node. In this analysis method, the inductors become ideal current sources connected to the same node, and we end up with a violation of Kirchoff's Current Law (KCL), as shown in the following: L1 L2

I1 V1

L3

I2

+

−

+

−

V1 I3

+

−

Kirchoff’s Current Law at node V1 is I1 + I2 = I3. This law is violated regardless of the values of I1, I2, and I3. The term cut set comes from circuit topology. If we were to place a small “cookie cutter” at node V1, it would cut the wires of all three inductors. Thus, we are cutting a set of inductor wires.

32

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The cure is to place “de-Qing” resistors in parallel with at least one of the inductors as shown in the following. The values to be used will depend on the remainder of the circuit and the desired L/R time constants.

I1

+

I2

+

R1

R3

−

−

R2

The cure I3 V

+

−

In defense of the NDS method, it should be stated that ACLs and/or ICSs will cause any state space analysis method to fail if additional corrective steps are not taken. See, for example, Intermediate Network Analysis, Shlomo Karni, Allyn & Bacon, 1971.

2.9 ALL-CAPACITIVE LOOP EXAMPLE K := 103

u := 10–6

m := 10–3

R1

V1

KHz := 103

C3

V2

Ein C1

R3

C2 V3

L3

R1 := 1·K R2 := 0.1 R3 := 100 C1 := 1·u C2 := C1 C3 := C1 L3 := 25.33·m U := 3 Y := 3 Ein := (99 1) GG := 0 EE := 0 LL := (3 0 L3) 99 RR : = 2 1 CC : = 1 2

1 3 0 2 0

R1 R 3 C1 C 3 C2

Passive Circuits

33

Call reference subprogram: → Reference:C:\mcadckts\CaNL11\comm42.mcd A, B, D, and E are not returned. Due to the ACL, A is singular, i.e., the determinant of A is zero, and the inverse of A is undefined. Insert R2 to break ACL. R1

V1

R2

Ein

C3

V3

V2

R3

C2

C1

V4 L4

99 RR : = 1 3 1 CC : = 2 3 U := 4

Y := 4

LL := (4

0

1 2 4 0 3 0

R1 R 2 R 3 C1 C 3 C2

L3)

Reinsert subprogram for new node lists. → Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2

ND := 2

i := 1..ND·PD + 1

PD := 50 i −1 s := 2·π·10L· −1 PD Voi := db(cvi)

Li := BF +

cvi := D·(si·I – A)–1·B + E

34

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Output at node Y

−20

dBV

−30 Voi −40

−50

2

2.5

3 Li

3.5

4

Log freq(Hz)

Y=4

REFERENCES 1. R. Boyd, State Space Averaging with a Pocket Calculator, High Frequency Power Conversion Conference Proceedings, Santa Clara, CA, 1990, p. 283.

3

Controlled Sources

3.1 CONTROLLED (DEPENDENT) SOURCES 3.1.1 VOLTAGE-CONTROLLED CURRENT SOURCE (VCCS) SPICE convention: Gname Vp Vn Vcp Vcn Transconductance The units of transconductance are amperes/volts = 1/ohms = siemens (or mhos, for you old-timers). Vp and Vn are the node connections of the current source in the circuit. Current flows away from node Vp (into the + terminal of the source) and towards node Vn, going out of the source. Vcp and Vcn are the + and controlling voltage nodes. This convention is chosen because virtually all models of transistors and MOSFETs depict the current as flowing down and internally away from the collector or drain terminal of the device. Example: MOSFET drain current: Id = gm·Vgs = gm(Vg – Vs) Here Vg and Vs are Vcp and Vcn, respectively. Because Id is dependent by definition, it is unknown, as usually are Vg and Vs. In MathCAD, GG = (Vp Vn Vcp Vcn Gain) For a MOSFET, GG = (Vp Vn Vg Vs gm)

3.1.2 CURRENT-CONTROLLED CURRENT SOURCE (CCCS) SPICE convention: Fname Vp Vn Controlling Current Gain In the NDS analysis method, the controlling current is specified as I = f(V/R) Ein − V1 Example: Ic = B ⋅ lb = B R1

3.1.3 VOLTAGE-CONTROLLED VOLTAGE SOURCE (VCVS) SPICE convention: Ename Vp Vn Vcp Vcn Gain As in VCCS, Vp and Vn are the + and connections of the source in the circuit, and Vcp and Vcn are the + and controlling nodes. Example: V1 V2 = k(V3 V4), or in SPICE Ename V1 V2 V3 V4 k In MathCAD, EE = (Vp Vn Vcp Vcn Gain) = (V1 V2 V3 V4 k) For an opamp, which is usually a single-ended output, Vo = Ao(Vcp Vcn), where typically Ao = 106 V/V. For an inverter, Vcp = 0. For a voltage follower, Vo is connected to Vcn and

35

36

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Vo − AoVcp + AoVo = 0, Vo (1 + Ao ) = AoVcp Vo =

AoVcp Ao = Vcp, since ≈1 1+Ao 1 + Ao

and in MathCAD as EE = (Vo 0 Vcp Vcn Ao) = (Vo 0 Vcp Vo Ao)

3.1.4 CURRENT-CONTROLLED VOLTAGE SOURCE (CCVS) SPICE convention: Hname +V –V Controlling Current Transresistance The units of transresistance are volts/amperes = ohms. Only two types are used in NDS method, the VCVS and the VCCS. Conversions from the remaining two are easily accomplished as shown in the following subsections.

3.1.5 CCVS

TO

VCVS

To convert a CCVS to a VCVS, divide the controlling current nodes by the resistance in the controlling current branch. (This “resistance” could be that of a printed circuit board trace or wire, or a small current-sensing resistor.) Example: Assume the controlling current Ic is through a resistor or resistance R2, which is connected to nodes V2 and V1. Then V2 − V1 Rc Vh = Rc ⋅ Ic = Rc = (V2 − V1) Gain = Rc / R2 R 2 R 2 The gain is thereby converted from a “transresistance” in dimensions of ohms, to a dimensionless gain. MathCAD format: EE = (Vp Vn Vcp Vcn Gain) = (Vh 0 V2 V1 Rc/R2), which is very similar to the SPICE format.

3.1.6 CCCS

TO

VCCS

To convert a CCCS to a VCCS, divide the (dimensionless) gain by the resistance of the “controlling current.” Example: B Ein − V1 Ic = B ⋅ lb = B = ( Ein − V1) R1 R1 The controlling voltage is now Ein – V1, and the “gain,” with dimension 1/ohms or “transconductance,” is B/R1. In MathCAD format, GG = (Vp Vn Vcp Vcn Gain) = (Vp Vn Ein V1 B/R1).

Controlled Sources

37

To repeat, the first input Ein is given the node number 99. For a second input, Ein2 = 98, Ein3 = 97, etc., down to 90. For example, if Vp = 2, Vn = 1, Vcp = 99, Vcn = 1, then GG = (2 1 99 1 B/R1).

3.1.7 FOUR RULES THAT MUST BE OBSERVED 1. The output of a controlled source cannot be connected directly to an independent input source. That is, EE = (99 0 2 1 gain) is not allowed. Input voltage sources are specified, for example, as Ein = (99 5), the input connected from node 99 to ground, with an amplitude of +5 V. However, EE = (2 0 99 1 gain), one input being a controlling node, Vcp or Vcn, is allowed. Here and as earlier, “99” represents any of the nodes 99, 98, 97, … , etc., down to 90. An independent source can be created by having Vcp = 99, 98, etc., and Vcn = 0. For example, assume Ein = (99 5), and it is desired to connect an independent 15-mA current source at an internal node V2 to node V7. Then GG = (2

7

99

0

0.015/5)

For an independent 15 V source at the same nodes: EE = (2 7 99 0 15/5) 2. Vp in a VCVS is not allowed to be zero. That is, the output nodes of a VCVS must always be (Vp 0) or (Vp Vn). For example, EE = (0 2 3 0 gain) is not allowed. If a negative output is desired, use EE = (2 0 3 0 – gain) or EE = (2 0 0 3 gain). 3. If a capacitor C or inductor L in the circuit being analyzed is connected directly to an ideal input source, it must have an equivalent series resistance (ESR) resistor in series between it and the source. That is CC = (99 1 C1) or LL = (98 2 L1) are not allowed. This will be a minor inconvenience as every real-world capacitor and inductor has an ESR. Also, every real-world voltage source has some finite internal source impedance which includes resistance. Hence, the simulation will be more realistic with ESR included. If in doubt about what value of ESR to use, use 0.01 Ω for capacitors and 0.05 Ω for inductors. 4. The nodes Vp or Vn of two or more VCVS’s (EE) must not be common. That is 2 EE = 2

1 0

12 3

4 4

4 2

is not allowed. In the NDS method, this results in “node contention,” and the solution will not be correct. As in SPICE, every circuit must have at least one ground node (node 0).

38

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.2 FLOATING VCVS K := 103

uF := 10–6

m := 10–3

R1

uV1

V1

V2

− +

Ein C1

Gain of VCVS.

99 2 RR : = 2 3 LL := 0

Ein := (99

R1 R2 R 3 R 4

2)

R4

R4 := 2·K Y := 3

180 π

rd :=

1 0 3 0

V3 C2

R2

R1 := 1·K R2 := 3·K R3 := 4·K C1 := 0.01·uF C2 := 0.05·uF U := 3 u := 20

R3

1 CC : = 3

0 0

C1 C2

GG := 0

VCVS equation: uV1 = V2 – V1 or V2 = V1·(1 + u) Format: EE = (Vp

Vn

Vcp

Vcn gain), then: EE := (2

1

1

→ Reference:C:\mcadckts\CaNL11\comm42.mcd −1.325 × 10 6 A= 105000 D = (0

1)

25000 −15000

200000 B= 0

E = (0)

DC Analysis X := lsolve(–A, B) Vodc = (1.217)

XT = (0.174

1.217)

Vodc := D·X + E

DC node voltages: Vdc := lsolve(A11, A14)

VdcT = (0.174

3.652

1.217)

0

u)

Controlled Sources

39

Check VCVS equation: Vdc2 – Vdc1 = 3.478

u·Vdc1 = 3.478

Checks.

AC Analysis BF := 2

ND := 5

PD := 20

Lit := ND·PD + 1

i :=1..Lit

i−1 s := 2·π·10L· −1 db(x) := 20·log(|x|) PD cvi := D·(si·I – A)–1·B + E Voi := db(cvi) Vai := rd·arg(cvi)

Li := BF +

Plot marker: M1 := db(Vodc)

Y=3 Magnitude at node Y

20 M1

dBV

0

Voi

−20 −40 −60 −80

2

3

4

5 Li Log freq(Hz)

6

7

Phase at node Y

0

Deg

−45 (Vai)1

−90 −135 −180

2

3

4

5 Li Log freq(Hz)

6

7

40

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

SPICE Verification — Floating VCVS *File:

c:\Spicapps\Cirtext\vcvs1c.cir

VEin 99 0 AC 2 R1 99 1 1K C1 1 0 0.01u R2 2 0 3K R3 2 3 4K C2 3 0 0.05u R4 3 0 2K * EE 2 1 1 0 20; VCVS .AC DEC 20 100 1E7 .PRINT AC V(3) VP(3) .OPTIONS NOPAGE NOMOD NOECHO .END Fnom := READPRN(“c:\SPICEapps\datfiles\vcvs1c.txt”) N := rows(Fnom) N = 101 k := 1..N

Spice V3 magnitude

20

dBV

0 db(Fnomk,2)

−20 −40 −60 −80

2

3

4 5 log(Fnomk,1) Log freq(Hz)

6

7

Controlled Sources

41 Spice V3 phase angle

0

Deg

−45 Fnomk,3

−90 −135 −180

2

3

4

5

6

7

log(Fnomk,1) Log freq(Hz)

3.3 CIRCUITS WITH M > 1 The subprogram that constructs the A, B, D, and E arrays from the node lists also counts the number of rows in the Ein array and assigns this value to M. In most cases, the user is interested in the node voltages with all inputs active. In some cases, however, the separate superposed contribution of each independent input may be desired. Hence, there are two different subprograms to call, depending on the type of output desired. For DC, call dccomm42.mcd if the user wants all inputs active simultaneously. (Most frequently used.) Call dccomm42m.mcd if the separate contribution of each independent input, M > 1, one at a time, is desired. For AC, call comm42.mcd for all inputs active, and comm42m.mcd to separate the node voltages due to the M > 1 inputs. For a simple example, we use one “circuit” with M = 3 inputs and U = 3 unknown nodes: Ein1 Ein 2 Ein 3 0.1 A 3 : = −0.01 0

−0.01 0.2 −0.02

0 −0.02 0.3

1 B3 : = 0 0

Ein1

Eiin 2

10.05 V3 : = A 3 ⋅ B3 V3 = 0.51 0.03

1.01 10.12 0.67

−1

0 2 0

0 0 3

Ein 3 0.1 V1 1.01 V2 10.07 V3

42

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The aforementioned is what is returned if dccomm42m.mcd is called. The separate contributions of each column (independent input) in B3 is given. When this is not desired, calling dccomm42.mcd gives −0.01 0.2 −0.02

0.1 A3 : = −0.01 0 V1 : = A 3−1 ⋅ B1

0 −0.02 0.3

1 B1 : = 2 3

11.16 V1 V1 = 11.64 V2 10.78 V3

We could get the same answer by adding the columns of V3, but this requires additional statements in the worksheet. i : = 1..3 V1i : = V3i,1 + V3i,2 + V3i,2 + V3i,3 11.16 V1 = 11.64 10.78 For circuits in which M = 1, i.e., Ein array has one row, it does not matter which subprogram is called. This applies only to those circuits with more than one input, where Ein has more than one row and M > 1. Example DC circuit with M = 2: K := 103 R7

V99 R1

V1

R3

V2

R4

V3

Ein1

R8

V98

Ein2 R2

R5

R6

Controlled Sources

43

99 Ein : = 98

15 −5

99 1 1 2 RR : = 2 3 1 3

1 0 2 3 0 0 3 98

1⋅ K 1⋅ K 1⋅ K 1 ⋅ K 10 ⋅ K 1⋅ K 1.5 ⋅ K 1⋅ K

R1 R2 R3 R4 R5 R6 R7 R8

GG := 0 EE := 0 U := 3 Inputs separate. (M = 2) → Reference:C:\mcadckts\CaNL11\dccomm42.mcd Va : = A1−1 ⋅ B2 Ein1 5.3936 Va = 3.4884 1.9320

Ein 2 –0.6440 V1 −1.1628 V2 −1.7979 V3

In SPICE, one of two inputs would have to be zeroed, which requires two runs to get the same information as given earlier. If M = 3, SPICE would require three runs, and so forth. Inputs added. (M = 1) → Reference:C:\mcadckts\CaNL11\dccomm42.mcd Vb : = A1−1 ⋅ B2 4.7496 Vb = 2.3256 0.1342 Va1,1 + Va1,2 = 4.7496 etc.

44

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.4 FIRST-ORDER MOSFET MODEL K := 103

u := 10–6

n := 10–9

p := 10–12

mA := 10–3

Edd R4 V4

R1

V1

R5

V5 C3

M1

Eg R2 V2 C1

V3

R3

R1 := 4.99·K R5 := 1.96·K

R2 := 1·K C1 := 0.1·u

R3 := 10·K C3 := 4.7·n

R4 := 4.99·K

From MOSFET data sheet: gm := 0.001 Edd := 200 Eg := 20 Nodes: V1 — Gate; V3 — Source; V4 — Drain Model using VCCS: C2 := 400·p C2 represents the internal gate-source capacitance. (Nonlinear in higher-order models.) R1

Edd

V1

Eg

R4 R2 C1

C2

V2

V3

R3

V4 R5 + g1 −

V5 C3

Controlled Sources

45

(VCCS g1 is drain current Id) VCCS: gl = gm·Vgs = gm·(V1 – V3) VCCS format: GG = (Vp Vn Vcp Vcn GG := (4 3 1 3 gm) Eg = 20 Edd = 200

gain)

99 1 RR := 3 98 4 2 CC : = 1 5

R1 R2 R 3 R 4 R 5

1 2 0 4 5

C1 C2 C 3

3 3 0

Eg Edd

99 Ein : = 98 LL : = 0 U := 5 Y := 4

→ Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis VC1 VC2 VC3 DC voltages across C1, C2, and C3 X := –A–1·B

XT := (1.82

1.82

190.93)

DC output: Vodc := D·X + E

Vodc = (190.93)

DC voltage at all nodes: Vdc := A11–1·A14 Drain current Id: Vgs := Vdc1 – Vdc3

VdcT = (20

20

Vgs = 1.818

18.128

190.93

Id := gm·Vgs

1.82 × 10–3)

Id = 1.82mA

46

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Id := Vdc6 Id = 1.82mA = Vodc. Checks.

V4 := Edd – Id·R4

V4 = 190.93

AC Analysis BF := 2 Li := BF +

ND := 4 i−1 PD

PD := 25

Lit := ND·PD + 1

s := 2·π·10L· −1

i := 1..Lit

cvi := D·(si·I – A)–1·B + E

Voi := |cvi| Drain voltage V4

200

Y=4

Volts

150 Voi

100 50 0

2

3

4 Li Log freq(Hz)

5

6

mA := 10–3

n := 10–9

3.5 VCVS AND CCCS EXAMPLE K := 103

u := 10–6

m := 10–3

Hybrid-pi model of the Bipolar Junction Transistor (BJT). C1

l1 R1

R3

V1

V4

Ein R2 + −

V2 V3 R5

+ g1 −

R4

C2

Controlled Sources

R1 := 100 R5 := 10

47

R2 := 10 C1 := 80·n

R3 := 40·K C2 := 5·n

R4 := 2·K

Controlled source gains:

hre := 0.004

hie := 100

rd :=

180 π

99 1 RR := 1 4 3

1 2 4 0 0

R1 R2 R 3 R 4 R 5

1 CC : = 4

4 0

C1 C2

LL : = 0 Ein : = ( 99

0.1)

U := 4 Y := 4 VCVS: V2 – V3 = hre·(V1 – V4) Format for EE: EE = (Vc

Vn

Vcp

Vcn

gain)

then EE := (2

3

1

4

hre)

Convert g1 CCCS to a VCCS. g1 = hie ⋅ I1 I1 =

Ein − V1 hie g1 = ⋅ ( Ein − V1) R1 R1

48

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

GG = ( Vp

Vn

Vcp

Vcn

GG = 4

0

99

1

GG = ( 4

0

99

1

gain ) hie R1

1

)

→ Reference:C:\mcadckts\CaNL11\comm42.mcd −747812.5 A= 188040000

−75000 187900000

12500 B= −19800000 D = (0

1)

E = (0) DC Analysis X := lsolve(–A,B) XT = (24.226 –24.138) Vodc := D·X + E Vodc = (–24.14) Vdc := lsolve(A11,A14) VdcT = (0.09 0.09 –4.79 × 10–3 –24.14 0.01) Igl := Vdc5 Igl = 12.67mA (Igl = current thru souce gl) AC Analysis BF := 1

ND := 7

PD := 20

i := 1..ND·PD + 1

i−1 F := 10L s := 2·π·F· −1 PD Voi := D·(si·I – A)–1·B + E Vai := rd·arg(Voi)

Li : = BF +

NDS results and SPICE verification: Fnom := READPRN(“c:\SPICEapps\datfiles\vcvs_cccs4.txt”) N := rows(Fnom) N = 141 k := 1..N Hybrid-pi BJT Model *File: vcvs_cccs4.cir VEin 99 0 AC 0.1 R1 1 99 100 R2 1 2 10 R3 1 4 40K R4 4 0 2K R5 3 0 10

Controlled Sources

49

* C1 1 4 80n C2 4 0 5n * EE 2 3 1 4 0.004 * B = 100; Gain B/R1 = 1.0 in GG GG 4 0 99 1 1 .AC DEC 20 10 1E8 .PRINT AC V(4) VP(4) .OPTIONS NOECHO NOPAGE NOMOD .END Magnitude at node Y

30

dBV

20 db(Fnomk,2) db(Voi) − 4

10 0 −10 −20 −30

1

2

3

Spice NDS

4 5 log(Fnomk,1), Li Log freq(Hz)

6

7

6

7

8

Y=4 Traces are separated to show congruency. Phase angle at node Y

80 40

Deg

0 Fnomk,3

−40

(Vai)1− 10

−80 −120 −160 −200

1

2 Spice NDS

3

4

5

log(Fnomk,1), Li Log freq(Hz)

8

50

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.6 TWO INPUTS, THREE OUTPUTS K := 103

n := 10–9

R1 Ein1

V1

mA := 10–3

R2

V2

C1

R3

V3

R4

V4

+ GG C2 −

+ EE −

R7

R3 := 1·K R8 := 1·K

Ein2

R4 := 2·K R5 := 2.2·K C1 := 20·n C2 := 4·n

100 50

Gains: gm := 10

C3

R6

R8

Three outputs. 99 Ein := 98

V5

V7

V6

R1 := 1·K R2 := 2·K R6 := 2.2·K R7 := 1·K C3 := 6·n U := 7 Y := (1 3 5)T

R5

a := 5 99 1 2 3 RR := 4 5 6 7 1 CC : = 3 5 LL : = 0

1 2 3 4 5 98 0 0 0 0 0

R1 R2 R 3 R 4 R5 R6 R 7 R8 C1 C2 C 3

Controlled Sources

51

For VCVS EE: V4 – V7 = a·(Ein2 – V2)

EE := (4

7

98

2

a)

3

99

gm)

a=5

For VCCS GG: gl = gm·(V3 – Ein1)

GG := (2

6

gm = 10

→ Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis X : = − A −1 ⋅ B Vdc : = D ⋅ X + E 22.03 Vdc = 100.03 308.96 1 Y = 3 5 Vn : = 1solve ( A11, A14 ) V1

V2

V3

V4

V5

V6

V7

Ig1

Vn T = ( 22.03 – 133.92 100.03 567.93 308.96 311.92 – 351.66 0.331) Igl := Vn8

Igl = 311.92mA

AC Analysis BF := 3 Li := BF +

ND := 3 i−1 PD

PD := 40

i := 1..ND·PD + 1

s := 2·π·10L· −1

cvi := D·(si·I – A)–1·B + E

Sample of the three (complex) outputs: 21.37 − 6.19 i cv5 = 100.03 + 0 i 308.92 – 1.14 i

1 Y = 3 5

52

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Vo1i = db ( cvi )1 Vo 2 i = db ( cvi )2 Vo 3i = db ( cvi ) 3 SPICE Listing — Two In Three Out *File:

c:\SPICEapps\Cirtext\wizard.cir

VEin1 99 0 AC 100 VEin2 98 0 AC 50 * R1 99 1 1K R2 1 2 2K R3 2 3 1K R4 3 4 2K R5 4 5 2.2K R6 5 98 2.2K R7 6 0 1K R8 7 0 1K * C1 1 0 20n C2 3 0 4n C3 5 0 6n * GG 2 6 3 99 10 EE 4 7 98 2 5 .AC DEC 50 1E3 1E6 .OPTIONS NOMOD NOECHO NOPAGE .PRINT AC V(1) V(3) V(5) .OPTIONS NUMDGT 8 .END Fnom := READPRN(“c:\SPICEapps\datfiles\wizard.txt”) N := rows(Fnom) N = 151 k := 1..N

Controlled Sources

53

NDS and SPICE plots: Spice V1 magnitude

dBV

32

db(Fnomk,2)

30 28 26

3

3.5

4

4.5 log(Fnomk,1) Log freq(Hz)

5

5.5

6

NDS V1 magnitude

32

dBV

30 Vo1i 28 26

3

3.5

4

4.5 Li

5

5.5

6

Log freq(Hz)

Spice V3 magnitude

dBV

40.0028

db(Fnomk,3)

40.0024 40.0020 40.0016

3

3.5

4

4.5 log(Fnomk,1) Log freq(Hz)

5

5.5

6

54

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad NDS V3 magnitude

dBV

40.0028

Vo2i

40.0024 40.0020 40.0016

3

3.5

4

dBV

5

5.5

6

Spice V5 magnitude

50

db(Fnomk,4)

4.5 Li Log freq(Hz)

49.6 49.2 48.8

3

3.5

4

4.5 log(Fnomk,1) Log freq(Hz)

5

5.5

6

NDS V5 magnitude

50

dBV

49.6 Vo3i 49.2 48.8

3

3.5

4

4.5 Li Log freq(Hz)

5

5.5

6

3.7 THIRD-ORDER OPAMP MODEL This model has two poles and one zero. K := 103

uF := 10–6

pF := 10–12

MHz := 106

KHz := 103

Controlled Sources

55 R3

R1

1 +

EE1

2

3 +

C1

−

R2 EE2

5 C3 6

4 +

C2

−

R1 := 100

R2 := 100

EE3

−

R3 := 100

7 R4

+

EE4

−

R4 := 10

Pole frequencies: pl := 100

p2 := 1·MHz

Zero frequency C1 :=

zl := 100·KHz

1 2 ⋅ π ⋅ R1 ⋅ p1

Cl = 15.915uF

1 1 C 3 := C2 = 1591.549pF 2 ⋅ π ⋅ R 2 ⋅ p2 2 ⋅ π ⋅ R 3 ⋅ z1 C3 = 0.016uF U := 7 Y := 7 Ein := (99 1) Ao := 106 C2 :=

Third-stage transfer function: 1 R 3 ⋅ C3 F (s) = 1 s+ Rp ⋅ C 3 s+

Rp :=

R3 ⋅ R4 R3 + R4

Pole

Zero 1 log =5 2 ⋅ π ⋅ R 3 ⋅ C 3 1 3 RR := 5 6 LL := 0

2 4 6 0

R1 R2 R 3 R 4

1 log = 6.041 2 ⋅ π ⋅ Rp ⋅ C 3

2 CC := 4 5

0 0 6

C1 C2 C 3

GG := 0

56

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 3 EE := 5 7

0 0

99 2

0 0

0

4

0

0

6

0

1 1 R3 1+ R4 Ao

Note EE3 gain.

→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 1

ND := 6

i−1 PD Voi := db(cvi) Li := BF +

PD := 25

i := 1..ND·PD + 1

s := 2·π·10L· −1

cvi := D·(si·I – A)–1·B + E

Opamp open loop gain

140 120

dBV

100 Voi

80 60 40 20 0

1

2

3

4 Li Log freq(Hz)

5

Note zero at 105 Hz; and double pole at 106 = 1 MHz

3.8 A SUBCIRCUIT SCHEME Opamp model using both inverting and noninverting inputs K := 103

uF := 10–6

Differential Amplifier

nF := 10–9

MHz := 106

6

7

Controlled Sources

57

R2 R1

6(Vn) 2 −

Ein1 R3

11 V− 1

V+

7(Vp) 3 +

Ein2

5(Vo)

4

R4

Use the linear two-pole opamp model on page 58. R1 := 10·K R2 := 20·K R3 := 10·K CC := 0 GG := 0 LL := 0 99 98 RR := 6 7 Vo := 5

6 7 5 0

R1 R 3 R2 R 4

Vn := 6

99 Ein := 98

R4 := 20·K

−1 1

Vp := 7

Input nodes to subckt6.mcd Y := Vo

U=7

→ Reference:C:\mcadckts\CaNL11\subckt6.mcd → Reference:C:\mcadckts\CaNL11\comm42.mcd A1 := A

B1 := B

D1 := D

E1 := E

Save arrays.

Get response for opamp open-loop gain of Ao := 105

EE3,5 := Ao

→ Reference:C:\mcadckts\CaNL11\comm42.mcd A2 := A

B2 := B

D2 := D

E2 := E

Save new arrays.

ND := 3

PD := 50

i := 1..ND·PD + 1

AC Analysis BF := 4

i −1 s := 2·π·10L· −1 PD cv2i := D2·(si·I – A2)–1·B2 + E2 Li := BF +

cv1i := D1·(si·I – A1)–1·B1 + E1

58

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Magnitude at node Y 30

dBV

M1 db(cv1i)

20

Y=5

10 0

db(cv2i) −10 −20 −30 −40

4

4.5

5

5.5 Li Log freq(Hz)

Ao = 10^6 Ao = 10^5

6

6.5

7

Note the difference in high-frequency response with Ao = 10^5.

3.9 SUBCIRCUIT OPAMP MODEL MHz := 106 This file requires inputs from the “calling circuit” in order to provide solutions. These inputs are Vp, Vn, and Vo. Because Vo = V5 is common to the calling circuit, node numbers in the calling circuit must start with V5. Ra

1 +

EE1

2 +

C1

−

f1 := 10 Ca :=

Rb

3 EE2

4 C2

−

−

Ao := 106

f2 := 1·MHz

1 2 ⋅ π ⋅ Ra ⋅ f1

Cb :=

0 0 0

Vp 2 4

RR := stack(RR,RR1)

Vn 0 0

1 1 Ao

CC := CA

EE3

Ra := 10

1 2 ⋅ π ⋅ Rb ⋅ f 2

Ra 1 2 2 0 RR1 := CC1 := 3 4 Rb 4 0 CA = CC1 if no capacitors in main circuit. 1 EE := 3 Vo

5 +

Rb := 10

Vo = V5 Ca Cb

CA : = cc ← CC1 if CC = 0 cc ← stack (CC, CC1) otherwisee cc

Controlled Sources

59

→ Reference:C:\mcadwca\wcaref11\Find_U.mcd Find the maximum number of nodes U.

3.10 FIFTH-ORDER ACTIVE FILTER High Pass K := 103

u := 10–6

n := 10–9

C2 Ein

V1 C1

Meg := 106

V5 V2

R1

R3

V3 C3

R2

V5 C5

R4

R6 3

V4 C4

R5

m := 10–3

2

+

−

4 V+

V6 1

V− 11

R7 V7 R8

R1 := 0.01 R2 := 2·K R3 := 70·K R4 := 140·K R5 := 12·K R6 := 2.7·K R7 := 3.2·K R8 := 10·K C1 := 0.03·u C2 := 0.02·u C3 := 1.9·n C4 := 0.4·n C5 := 0.01·u Ao := 106 U := 7 Y := 6 Resistor R1 (0.01 Ω) serves two purposes: (1) acts as an ESR resistor so that C1 is not connected directly to independent input Ein, and (2) prevents an allcapacitive loop via ground, C4, C5, C2, and C1, and the zero-output impedance of Ein. 99 2 2 3 RR := 4 6 6 7 Ein := (99

1 0 3 4 0 5 7 0 1)

R1 R2 R 3 R 4 R5 R6 R 7 R8 LL := 0

1 2 CC := 3 4 5

GG := 0

2 5 0 0 4

C1 C2 C 3 C 4 C5

60

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

For the opamp: EE format: EE = (Vp Vn Vcp V6 = Ao·(V4 – V7)

Vcn gain) EE := (6 0

4

7

Ao)

→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2

ND :=2

i := 1..ND·PD + 1

PD := 50 i−1 s := 2·π·10L· −1 PD Voi := db(cvi) Y=6

Li := BF +

cvi := D·(si·I – A)–1·B + E

Output magnitude at node Y

10 0 −10 dBV

−20 Voi −30 −40 −50 −60 −70

2

2.2

2.4

2.6

3.11 STATE VARIABLE FILTER K := 103

n := 10–9

Ten outputs: V1 through V10.

2.8

3 3.2 Li Log freq(Hz)

3.4

3.6

3.8

4

Controlled Sources

R3

7

2 R1

C1

2

R2

Ein

61

1 3

11

−

3

V−

C2

4 2

1

V+

+

R4

4 3

−

11 V− 1

V+

+

5

6

R5

2

−

3

+

4

11

7

V−

1

V+ 4 R8

R6

1

9

R7

5

R9

8

2

−

3

+

11

4

R1 := 10·K R2 := 20·K R3 := 10·K R4 := 182·K R5 := 2.2·K R6 := 20·K R7 := 10·K R8 := 100·K R9 := 10·K R10 := 100·K C1 := 1.125·n C2 := C1 U := 10 Ao := 106 GG := 0 LL := 0 5 7

C1 C2

Ein := (99

1)

rd :=

180 π

Get all nodes: Y := (1

2

99 7 2 3 5 RR := 1 5 9 3 8

3 1 2 3 4 6 5 9 10 8 7

4

5

6 7

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10

8

9

10)T

Opamps :

Vp Vn Vcp Vcn Gain

3 5 EE := 7 10

0 0 0 0

1 0 0 8

2 4 6 9

1

V+ R10

4 CC := 6

10

V−

Ao Ao Ao Ao

7

62

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Note that the DC Analysis has been omitted AC Analysis BF := 3

ND := 1

PD := 200

i−1 PD

s := 2·π·10L· −1

rows ( A) rows (B) rows (D) rows (E )

cols ( A) 2 cols (B) 2 = cols (D) 10 cols (E ) 10

Li := BF +

i := 1..ND·PD + 1 cvi := D·(si·I – A)–1·B + E

2 1 2 1

N N Format : K K

N M N M

K = number of outputs; M = number of inputs. The dimensions of the complex output variable cv are always {K M}. From the schematic, V1 = V2; V8 = V9; V4 and V6 ≈ zero; hence, we omit V2, V9, V4, and V6. Get magnitude (dBV) and phase (deg) for single or multiple outputs: Vo : = for i ∈1..ND ⋅ PD + 1 if rows ( Y) = 0 vo i ← db ( cvi ) for i ∈1..ND ⋅ PD + 1 otherwise for K ∈1..rows ( Y) vo i,k ← db ( cvi )k vo Vai := rd·arg(cvi)

Controlled Sources

63 V1, V3, V5

40 20

dBV

Voi,1 Voi,3 Voi,5

0 −20 −40 −60

3

3.1

3.2

3.3

V1 V3 V5

3.4

3.5 3.6 Li Log freq(Hz)

3.7

3.8

3.9

3.7

3.8

3.9

4

V7, V8, V10

40 20

dBV

Voi,7 Voi,8 Voi,10

0 −20 −40 −60

3

3.1 V7 V8 V10

3.2

3.3

3.4

3.5 Li

3.6

Log freq(Hz)

3.12 SEVENTH-ORDER ELLIPTICAL LOW-PASS FILTER K := 103

nF := 10–9

4

Ein

3

2

R1 V12

+

−

V+

V−

11

R2

C1

4

V2

1

V1

R5

C2

R3

R4

R6

C4

V3

V4

V5

C3

R7 V6 3

2 +

− V+

V−

11

4

R11

V8

R10

R9 V4

1 C7

R12

R8

C5

V13 R13

V9

C6

V10

V7

V11 3

2 +

− V+

V−

11

4

R15

V10

R14

1

V14

64 Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Controlled Sources

65

R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Y := 14 99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10

12 1 2 5 0 3 6 7 4 8 0 10 11 10 0

1 EE := 13 14

0 0 0

Ein := (99

1)

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 0 6 11

12 3 6 CC := 5 9 11 7

12 13 14

LL := 0

Ao Ao Ao

1 2 3 4 8 9 10

C1 C2 C 3 C 4 C5 C6 C 7

(opamps)

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd The DC analysis has been omitted. AC Analysis BF := 2 Li := BF +

ND := 2 i−1 PD

Voi := db(cvi)

PD := 100 s := 2·π·10L· −1

i := 1..ND·PD + 1 cvi := D·(si·I – A)–1·B + E

180 ·arg(cvi) π Vbi := –210·log(10Li–3)

Vai :=

Equation of asymptote:

A 210 dB/decade rolloff with a seventh-order (140-dB Butterworth) circuit.

66

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Elliptical Seventh-Order LPF — SPICE Verification * File: c:\SPICEapps\Cirtext\Ellipt7.cir * 5/06/05 VEin 99 0 AC 1 R1 99 12 19.6K R2 12 1 196K R3 1 2 1K R4 1 5 147K R5 2 0 71.5 R6 4 3 37.4K R7 5 6 154K R8 13 7 110K R9 13 4 260 R10 4 8 740 R11 8 0 402 R12 9 10 27.4K R13 7 11 110K R14 14 10 40 R15 10 0 960 * C1 12 1 2.67n C2 3 2 2.67n C3 6 3 2.67n C4 5 4 2.67n C5 9 8 2.67n C6 11 9 2.67n C7 7 10 2.67n * EE1 1 0 0 12 1E6 EE2 13 0 6 13 1E6 EE3 14 0 11 14 1E6

Controlled Sources

67

* .OPTIONS NOMOD NOPAGE NOECHO .AC DEC 100 100 10K .PRINT AC V(14) VP(14) .END Fnom := READPRN(“c:\SPICEapps\datfiles\Elliptf7.txt”) N := rows(Fnom) N = 201 k := 1..N Output at node Y

40 20

dBV

Voi + 5 Vbi

0 −20

db(Fnomk,2) −40 −60 −80

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

4

Li, Li, log(Fnomk,1) Log freq(Hz)

NDS Asymptote Spice V(14)

Traces separated to avoid overlay and show congruency. Phase at node Y

200

Deg

100 (Vai)1 Fnomk,3 − 20

0 −100 −200

2

2.2

2.4

NDS Spice VP(14)

2.6

2.8

3

3.2

Li, log(Fnomk,1) Log freq(Hz)

3.4

3.6

3.8

4

68

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.12.1 STEPPING ONE RESISTOR VALUE K := 103

nF := 10–9

For the schematic, see Section 3.12. R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Y := 14 New resistor values for R4: Rx := (100

150

99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10

12 1 2 5 0 3 6 7 4 8 0 10 11 10 0

1 EE := 13 14

0 0 0

Ein := (99

1)

250)T·K

200 R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 0 6 11

12 13 14

LL := 0

Ndc := rows(Rx)

12 3 6 CC := 5 9 11 7

Ao Ao Ao

1 2 3 4 8 9 10

C1 C2 C 3 C 4 C5 C6 C 7

(Opamps)

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Collect all arrays into one multidimensional array VAB:

Ndc = 4

Controlled Sources

69

Vn(U, Y, EE, GG, RR, CC, LL, Ein ) : = for i ∈1..Ndc RR 4 ,3 ← Rx i AE ← G(U, Y, EE, GG, RR, CC, LL, Ein ) A i ← AE1 Bi ← AE 2 D i ← AE 3 E i ← AE 4 A B D E

Row 2 comment: Stuff new Rx values into R4. Row 3 comment: Recompute and store the arrays. (The G function comes from subprogram comm42.mcd previously called.) VAB := Vn(U, Y, EE, GG, RR, CC, LL, Ein) Note: Except for the second line in the Vn routine (given earlier), this routine, the VAB statement (given earlier), and the Vo routine below are universal. That is, they can be used to step values in column 3 of RR, CC, or LL and column 5 of GG or EE in any AC circuit. Similar statements apply for stepping resistor values in DC circuits. AC Analysis BF := 2

ND := 2

Li := BF +

i−1 PD

PD := 100

i := 1..ND.PD +1

70

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Vo : = for k ∈1..Ndc A ← ( VAB1 )k B ← ( VAB2 )k D ← ( VAB3 )k E ← ( VAB4 )k for i ∈1..ND ⋅ PD + 1 L i ← BF +

i −1 PD

si ← 2 ⋅ π ⋅ 10 L i ⋅ −1 cvk ,i ← D ⋅ ( si ⋅ I − A ) ⋅ B + E −1

vo k ,i ← db ( cvk ,ii ) vo

Ndc diﬀerent resistor values

40

dBV

Vo1,i Vo2,i

20 0

Vo3,i −20 Vo4,i −40 −60 −80 2.6

2.7

2.8

R4 = 100 K 150 K 200 K 250 K

Ndc = 4 Note the scale change.

2.9

3

3.1 3.2 Li Log freq(Hz)

3.3

3.4

3.5

3.6

Controlled Sources

71

3.12.2 STEPPING ALL SEVEN CAPACITOR VALUES K := 103

nF := 10–9

For the schematic, see Section 3.12. R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Step C1 through C7 from 1nF to 3 nF: Cx := (1.8 99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10 Y := 14

2.2 12 1 2 5 0 3 6 7 4 8 0 10 11 10 0

2.6

3.0)T·nF

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15

Ndc := rows(Cx)

12 3 6 CC := 5 9 11 7

Ncap := rows(CC)

1 EE := 13 14

0 0 0

Ein := (99

1)

0 6 11

12 13 14

LL := 0

1 2 3 4 8 9 10

Ncap = 7

Ao Ao Ao

(Opamps)

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd

C1 C2 C 3 C 4 C5 C6 C 7

Ndc = 4

72

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Collect all arrays into one multidimensional array VAB:

Vn(U, Y, EE, GG, RR, CC, LL, Ein ) : = for i ∈1..Ndc for j ∈1..Ncap CC j,3 ← Cx i AE ← G(U, Y, EE, GG, RR, CC, LL, Ein ) A i ← AE1 Bi ← AE 2 D i ← AE 3 E i ← AE 4 A B D E

Row 3 comment: Fill CC column 3 with the ith capacitor value. Row 4 comment: Recompute the arrays for each new value and store. VAB := Vn(U, Y, EE, GG, RR, CC, LL, Ein) AC Analysis Bf := 2

ND := 2

Li := BF +

i−1 PD

PD := 100

i := 1..ND·PD + 1

Controlled Sources

73

Vo : = for k ∈1..Ndc A ← ( VAB1 )k B ← ( VAB2 )k D ← ( VAB3 )k E ← ( VAB4 )k for i ∈1..ND ⋅ PD + 1 L i ← BF +

i −1 PD

si ← 2 ⋅ π ⋅ 10 L i ⋅ −1 cvk ,i ← D ⋅ ( si ⋅ I − A ) ⋅ B + E −1

vo k ,i ← db ( cvk ,ii ) vo Four diﬀerent values for C1 thru C7

40 20

dBV

Vo1,i Vo2,i Vo3,i

0 −20

Vo4,i −40 −60 −80

2

2.2

2.4

2.6

C1 thru C7 = 1.8 nF 2.2 nF 2.6 nF 3.0 nF

2.8

3 3.2 Li Log freq(Hz)

1.8 2.2 Cx = nF 2.6 3

3.4

3.6

3.8

4

74

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.13 SQUARE ROOT OF FREQUENCY (+10 dB/DECADE) CIRCUIT K := 103 Hz := 1

u := 10–6

R1

V1

n := 10–9

R2

V2

R3

p := 10–12

V3

R4

kHz := 103

R5

V4

V5

Ein C1

C2

C3

C4

C5 V9

V5 R6

V6 C6

R7

V7 C7

R8

V8

R9

R10

V9

V10

C9

C8

V9 2 3

−

+

11 V− 1

V+ 4

R1 := 523 R2 := 1.54·K R3 := 3.16·K R4 := 6.19·K R5 := 12.4·K R6 := 24.9·K R7 := 49.9·K R8 := 100·K R9 := 200·K R10 := 49.9·K C1 := 330·p C2 := 680·p C3 := 1.2·n C4 := 2.7·n C5 := 4.7·n C6 := 0.01·u C7 := 0.022·u C8 := 0.039·u C9 := 22·p Ao := 106 Ein := (99 1) U := 10 Y := 10 GG := 0 LL := 0 db(x) := 20·log(|x|) S1 : = 100

S1 = 10

db(S1) = 20

S2 : = 1000

S2 = 31.623

db(S2 ) = 30

S3 : = 10000

S3 = 100

db(S3) = 40

Hence, a slope of +10 dB/decade is the square root of frequency.

Controlled Sources

99 1 2 3 4 RR := 5 6 7 8 9 EE := (10

75

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10

1 2 3 4 5 6 7 8 9 100 0

0

9

1 2 3 4 CC := 5 6 7 8 9

9 9 9 9 9 9 9 9 10

C1 C2 C 3 C 4 C5 C6 C7 C8 C9

Ao)

→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 0

ND := 6

Li := BF +

i−1 PD

PD := 20

i := 1..ND·PD +1

F := 10L

Insert a non-inverting opamp gain stage after V10 with a gain of: 118 ⋅ K dBG := 20 ⋅ log 1 + 8.5 ⋅ K dBG = 23.453 s := 2·π·F· −1 cvi := D·(si·I – A)–1·B + E Voi := db(cvi) + dBG Vai := 10·log(Fi) Y = 10 Output at node Y

60 50

dBV

40 Voi Vai

30 20 10 0

0

1 V10 +10 dB/dec

2

3 4 Li Log freq(Hz)

5

6

76

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3.14 HV (200 V) SHUNT MOSFET REGULATOR K := 103

n := 10–9

mA := 10–3 Ehv R4

R7

V8

V1 V3

R8 Eref

R10

C1

V7 2 3

− +

11 V−

V1

R1

V2

M1

M2 C2 V9

1

V+ 4

R2

V4

V6 R5

R9

V5

R3 R6

R1 := 10K R2 := 10K R3 := 5.1K R4 := 51K R5 := 215K R6 := 6878 R7 := 562K R8 := 10K R9 := 1.96K R10 := 0.01 C1 := 2.7n C2 := 4.7n Eref := 6.2 Ehv := 400 Y := 6 U := 10 LL := 0 From MOSFET data sheet: gm := 0.001 99 1 2 4 98 RR := 6 5 7 9 988

R8 R1 R2 R 3 R4 R5 R6 R7 R9 R10

7 2 0 0 3 5 0 8 0 10

3 GG := 10

4 6

99 Ein := 98

Eref Ehv

2 3

4 6

8 CC := 3

gm gm

1 9

Ao := 106

Two inputs, M = 2.

C1 C2

EE := (1 0 5 7 Ao) Opamp

99 Ein = 98

6.2 400

Controlled Sources

77

(Note: C1 and C2 are for stability purposes. See Section 5.3, page 107 for analysis.) → Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis −41.43 VC1 X := lsolve(–A,B) X = Vodc := D·X + E 200.91 VC 2

Vodc = (200.01)

DC drain currents of MOSFETs M1 and M2: Vdc := lsolve(A11,A14) Id2 := Vdc12 Id1 := Vdc11

Id1 := 3.904mA

Id2 := 0.901mA

AC Analysis BF := 0

ND := 5

PD := 30

Lit := ND·PD + 1

i := 1..Lit

s := 2·π·10L· −1 log(20) = 1.3

Li := BF +

cvi := D·(si·I – A)–1·B + E

i−1 PD Voi := |cvi|

200 V regulation is maintained up to about 20 Hz. Output at V5

250

Volts

200 Voi

150 100 50 0

0

1

2

3 Li Log freq(Hz)

4

Due to the opamp, a short expression for the DC output is: R5 Vo := Eref ⋅ 1 + R6 Vo := 200.01

5

78

3.15 LTC 1562 BAND-PASS FILTER IC IN A QUAD IC R21

Ein

V1 2

−

3

+

R1A

V2 11 V−

2

−

3

+

1

V+ 4

C1A

V3

V4

R5

11 2

V− 1

V+

3

4

R6

V5 − +

V6

C2B RQ2

RIN2 V7

11 V−

2

1

V+ 4

3

−

R1B

V8

11

2

V− 1

V+

+

3

4

C1B

V9 − +

V10

R7

11 2

V−

R8

V11 −

1

V+

3

4

+

V12

11 V− 1

V+ 4

To RIN3 R23

C2C RQ3

RIN3 V13

2

−

3

+

R1C

V14 11 V− 4

C1C

V15

2

−

3

+

1

V+

R24

V16

R9

11 2

V− 1

V+ 4

R10

V17

3

− +

V18

RIN4

C2D RQ4

V19

11 V− 1

V+ 4

2 3

− +

R1D

V20

11

2

V− 1

V+

3

4 Vout

C1D

V21 − +

V22

R11

11 2

V−

R12

V23 −

1

V+ 4

3

+

V24

11 V− 1

V+ 4

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

C2A RQ1

RIN1

R22

Controlled Sources

79

Opamp rolloff for the first four stages of this circuit is shown following. The remaining stages have infinite bandwidth at gain Ao. V25

R13

+

V26 C3

−

V33 +

V27

R14

+

V28 C4

−

R17

V34 C7

−

V35

R18

+

V36 C8

−

V2

V29

+

+

−

−

V14

+

−

−

V30 C6

V31

R16

+

V32 C5

−

V37

+

R15

R19

V38 C9

V39 +

V8 + −

R20

V40

C10

−

V20 + −

Output plot — see following Mathcad file. Resistor values for fo = 100 KHz are from LTC data sheet [1]. Total circuit has 40 unknown nodes and 68 components. See Section 3.16 following.

3.16 LTC 1562 QUAD BAND FILTER IC K := 103

m := 10–3

u := 10–6

n := 10–9

p := 10–12

See Section 3.15 for a schematic of the four connected sections and the opamp rolloff subcircuit. First-stage resistor values for 100-KHz fo: RIN1 := 42.2·K C1A := 159.15·p

RQ1 := 42.2·K C2A := C1A

R21 := 10·K R5 := 10·K

R1A := 10·K R6 := 10·K

Second-stage resistor values for 100-KHz fo: RIN2 := 42.2·K C1B := 159.15·p

RQ2 := 42.2·K C2B := C1B

R22 := 10·K R1B := 10·K R7 := 10·K R8 := 10·K

Third-stage resistor values for 100-KHz fo: RIN3 := 42.2·K C1C := 159.15·p

RQ3 := 42.2·K C2C := C1B

R23 := 10·K R1C := 10·K R9 := 10·K R10 := 10·K

Fourth-stage resistor values for 100-KHz fo: RIN4 := 42.2·K C1D := 159.15·p

RQ4 := 42.2·K C2D := C1B

R24 := 10·K R11 := 10·K

R1D := 10·K R12 := 10·K

80

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

These component values were obtained from Reference 1. Opamp frequency rolloff components: R13 := 1 R14 := 1 R15 := 1 R16 := 1 R17 := 1 R18 := 1 R19 := 1 R20 := 1 Cx1 := 15.91·m Cx2 := 159·n (10-Hz and 1-MHz poles) (Note: These poles, and Ao (given in the following), are estimates because the vendor chose not to put this information in the data sheet.) C3 := Cx1 C8 := Cx2 Ein := (99

C4 := Cx2 C9 := Cx1 1)

C5 := Cx1 C6 := Cx2 C10 := Cx2

C7 := Cx1

Lao 20

Ao := 10

Lao := 130

Component node lists: LL := 0

GG := 0

Y := 20

U := 40

Quad 1 of 4 quads 99 1 2 RR1 := 6 4 5

25 27 EE1 := 2 4 6

RIN1 RQ1 R1A R 21 R5 R6

1 2 3 1 5 6

0 0 0 0 0

0 26 28 0 0

1 0 0 3 5

1 CC := 3

2 4

C2 A C1A

1 1st opamp inv input. 1 1st opamp 10 Hz pole Ao 1st opamp 1MHz pole Ao 2nd opamp, no roolloff Ao 3rd opamp, no rolloff

Controlled Sources

81

Quad 2 of 4 2 7 8 RR 2 := 12 10 11

29 31 EE 2 := 8 10 12

RIN 2 RQ 2 R1B R 22 R7 R8

7 8 9 7 11 12

0 0 0 0 0

0 30 32 0 0

7 0 0 9 11

7 CC2 := 9

1 1 Ao Ao Ao

8 10

C2 B C1B

4th opamp inv input. 4th opampp 10 Hz pole 4th opamp 1MHz pole 5th opamp, no rolloff 6th opamp, no rolloff

Quad 3 of 4 8 13 14 RR 3 := 18 16 17

33 35 EE 3 := 14 16 18

13 14 15 13 17 18

0 0 0 0 0

RIN 3 RQ 3 R1C R 23 R9 R10

0 34 36 0 0

13 0 0 15 17

13 CC 3 := 15

1 1 Ao Ao Ao

14 16

C2C C1C

7th opamp inv input. 7th opamp 10 Hz pole 7th opamp 1MHz pole 8th opam mp, no rolloff 9th opamp, no rolloff

82

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Quad 4 of 4 14 19 20 RR 4 := 24 22 23 37 39 EE 4 := 20 22 24

RIN 4 RQ 4 R1D R 24 R11 R12

19 20 21 19 23 24 0

0

19

0 0 0 0

38 40 0 0

0 0 21 23

19 CC 4 := 21

20 22

C2 D C1D

1 10 th opamp inv input. 1 10tth opamp 10 Hz pole Ao 10th opamp 1MHz pole Ao 11thh opamp, no rolloff Ao 12th opamp, no rolloff

R and C’s for rolloff poles: 25 27 29 31 RR 5 := 33 35 37 39

26 28 30 32 34 36 38 40

R13 R14 R15 R16 R17 R18 R19 R 20

26 28 30 32 CC5 := 34 36 38 40

0 0 0 0 0 0 0 0

C3 C4 C5 C6 C7 C8 C9 C10

Stack into one array: RR := stack(RR1,stack(RR2,stack(RR3,stack(RR4,RR5)))) CC := stack(CC1,stack(CC2,stack(CC3,stack(CC4,CC5)))) EE := stack(EE1,stack(EE2,stack(EE3,stack(EE4,CC5)))) → Reference:C:\mcadckts\CaNL11\comm42.mcd rows ( A) rows (B) rows (D) rows (E )

cols ( A) 16 cols (B) 16 = cols (D) 1 cols (E ) 1

16 1 16 1

N N Format : K K

N M N M

Controlled Sources

83

AC Analysis

BF := 40·K

LF := 180·K

i := 1..NP + 1 s := 2·π·F· −1

NP := 101

DF :=

LF − BF NP

Fi := BF + DF·(i – 1) cvi := D·(si·I – A)–1·B + E

voi := db(cvi)

Get SPICE output (see SPICE listing below) Fnom := READPRN(“c:\SPICEapps\datfiles\ltc1562_nom.txt”) N := rows(Fnom) N = 101 k := 1..N LTC1562 output at node Y

30 20 10

dBV

0 Voi db(Fnomk,2) − 5

−10 −20 −30 −40 −50 −60 −70 40

60 NDS Spice

80

100 120 Fi Fnomk,1 , K K Freq(KHz)

140

160

180

SPICE plot separated by 5 dBV from NDS plot to show both. Also see Amplitude Response plot in Reference 1. Y = 20 SPICE listing for Itc1562.med LTC1562 Analysis * File: Itc1562A.cir VEin 99 0 AC 1 * * Quad 1 of 4 quads *

84

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

RIN1 99 1 4.22K RQ1 1 2 42.2K R1A 2 3 10K R21 6 1 10K R5 4 5 10K R6 5 6 10K C1A 3 4 159.15p C2A 1 2 159.15p EE1 25 0 0 1 1 EE2 27 0 26 0 1 EE3 2 0 28 0 3.162E6 EE4 4 0 0 3 3.162E6 EE5 6 0 0 5 3.162E6 * Quad 2 * RIN2 2 7 42.2K RQ2 7 8 42.2K R1B 8 9 10K R22 12 7 10K R7 10 11 10K R8 11 12 10K C2B 7 8 159.15p C1B 9 10 159.15p EE6 29 0 0 7 1 EE7 31 0 30 0 1 EE8 8 0 32 0 3.162E6 EE9 10 0 0 9 3.162E6 EE10 12 0 0 11 3.162E6 * * Quad 3

Controlled Sources

* RIN3 8 13 42.2K RQ3 13 14 42.2K R1C 14 15 10K R23 18 13 10K R9 16 17 10K R10 17 18 10K C2C 13 14 159.15p C1C 15 16 159.15p EE11 33 0 0 13 1 EE12 35 0 34 0 1 EE13 14 0 36 0 3.162E6 EE14 16 0 0 15 3.162E6 EE15 18 0 0 17 3.162E6 * Quad 4 * RIN4 14 19 42.2K RQ4 19 20 42.2K R1D 20 21 10K R24 24 19 10K R11 22 23 10K R12 23 24 10K C2D 19 20 159.15p C1D 21 22 159.15p EE16 37 0 0 19 1 EE17 39 0 38 0 1 EE18 20 0 40 0 3.162E6 EE19 22 0 0 21 3.162E6 EE20 24 0 0 23 3.162E6 *

85

86

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

* R’s & C’s for opamp poles * R13 25 26 1 R14 27 28 1 R15 29 30 1 R16 31 32 1 R17 33 34 1 R18 35 36 1 R19 37 38 1 R20 39 40 1 C3 26 0 15.915M C4 28 0 159.15n C5 30 0 15.915M C6 32 0 159.15n C7 34 0 15.915M C8 36 0 159.15n C9 38 0 15.915M C10 40 0 159.15n * .OPTIONS NOMOD NOPAGE NOECHO .AC LIN 101 40000 180000 .PRINT AC V(20) .END

Controlled Sources

87

3.17 BJT CONSTANT CURRENT SOURCE — A SIMPLE LINEAR MODEL USING THE NDS METHOD Constant Current Source Ein

Q1

Explanatory schematic Ein

R1 +

R4

V1

V4

Ic

− +

D1

V3 R3

R1

−

V3

V2 R2

V4

R4

V1

Vbe

R3

+

Ix

+

Vd

Iy

−

−

V2 R2

K := 103 mA := 10–3 uA := 10–6 pA := 10–12 R1 := 10·K R2 := 1.4·K R3 := 300 R4 := 0.01 Ein := (99 Ecc) beta := 100 U := 4

Ecc := 15

Use Roe = 1/hoe = 50 K in linear model — simulates Early voltage. Roe := 50K 99 2 RR := 3 1 99

1 0 0 4 3

R1 R2 R3 R 4 Roe

Id = Ix + Iy =

V2 R2

Ib flows through Vbe. The values of Ix and Iy are not needed, only Id. Vbe initial guess: Vbe := 0.6 Vbe refinement; see next page. Vbe := 0.705 Match Vd

88

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Vd := Vbe 1 GG := 99

2

2

0

3

1

4

1 R2 beta R4

1 EE := 4

Id =

V2 R2

V1 − V4 Ic = beta ⋅ Ib = beta ⋅ R 4

2

99

0

3

99

0

Vd Ecc Vbc Ecc

→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := Isolve (A1, B2) 2.395 1.69 Get node voltages from nodes 1 to U: k := 1..U Vk = 1.69 2.395 Get VCCS currents set by GG: Ngg := rows (GG) n := 1..Ngg 1.21 Vn+ U = ⋅ mA 5.31

Isrc = 5.31 mA

V2 Id = 1.207mA Id := V5 R2 Id = 1.207 mA Id := V5 Checks. Id :=

Refine Vbe: V1 − V4 R4

ml := 0.068

b1 := 0.588

Isrc = 100 Ib Ie = 5.63 mA

Ib + b1 Vbe : = ml ⋅ log uA

Iroe :=

Ib :=

Ic := le – lb

Ecc − V3 Roe

Ib

Ib + Id = 1.26mA

Id

Vbe = 0.705

Ie :=

V3 R3

Ic = 5.58 mA

Iroe = 266.19uA

Ecc − V1 V1 − V4 V2 = + R1 R4 R2

Ib = 53.15uA

Ic – Iroe = 5.31mA

Ecc − V1 V1 − v4 V2 + = 1.26 mA = 1.26 mA R1 R4 R2

Checks.

Controlled Sources

89

3.18 uA733 VIDEO AMPLIFIER K := 103

mA := 10–3

uA := 10–6

pA := 10–12

Also see NE592 Video Amplifier (http://onsemi.com) Rs := 0.01 R1 := 2.4·K R2 := 2.4·K R3 := 50 R4 := 590 R5 := 50 R6 := 590 R7 := 1.1·K R8 := 1.1·K R9 := 7·K Ein1 := 4.1 Ein2 := 4.0 Ein3 := 15 beta := 100 R10 := 7·K Roe := 50·K (Simulates 1/hoe of transistors. Not shown on schematic.) Rg := 20·K

R7 R1

Q3 V13

V4 Rs

V3

R3

V5

Ein1

Q2

R6

Q4

V15

Q6

V1 Rs

V1 Rs V3

V2

V10

Out

R9 V4

Out2

V11 R10

Ein2

V7 I1 +

Q5

Rs

V8

V6 R5

Rg

R4

V16

V9

R2

Q1 V1

Ein

R8

+

I2

+

−

I3

−

+

I4

−

−

Current source values obtained from analysis on the previous page. I1 := 5.31·mA I3 := 4.54·mA Initialize Vbe:

(R3 = 300)

I2 := I1

99 Ein := 98 97

Ein1 Ein 2 Ein 3

(R3 = 350) I4 := I3 Vbe := (0.6 0.6 0.6 0.6 0.6 0.6)T Vbe := (0.68 0.68 0.69 0.68 0.70 0.70)T Vbe refinements; see next page.

U := 16

90

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

99 98 97 97 5 6 97 97 3 4 RR := 4 3 9 8 5 3 4 8 9 97 97

1 2 3 4 7 7 8 9 10 11 13 14 16 15 6 5 6 12 12 10 11

R3 R5 R1 R 2 R4 R6 R7 R8 R9 R10 Rs Rs Rs Rs Rg Roe Ro oe Roe Roe Roe Roe

R 3 external R 5 external

Rg externall

Vbe voltage sources 1 2 13 EE := 14 16 15

5

97

0

6

97

0

12

97

0

12

97

0

10

97

0

11

97

0

Vbe1 Ein 3 Vbe 2 Ein 3 Vbe 3 Ein 3 Vbe 4 Ein 3 Vbe 5 Ein 3 Vbe 6 Ein 3

Controlled Sources

7 12 10 11 3 GG := 4 8 9 97 97

91

0

97

0

0

97

0

0

97

0

0

977

0

5

99

1

6

98

2

12

4

13

12

3

14

10

9

16

11

8

15

I1 Current source I1 (Ic = beta ⋅ Ib) Ein 3 I2 Current source I2, etc. Ein 3 I3 Ein 3 I4 Ein 3 Q1 current source frrom V3 to V5, beta Ein1–V1 R 3 controlled by Ib = R3 beta Q22 current source from V4 to V6, Ein2–V2 R5 controlled by Ib = beta R5 Rs Q3 current source from V8 to V12, beta controlled by Ib = V4–V13 , etc Rs Rs beta Rs beta Rs

→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := lsolve(A1,B2) Get all node voltages from 1 to U: k := 1..U

Vnk := Vk

See the following. Get VCCS currents set by GG: Ngg := rows(GG) ViT = (5.31 5.31

n := 1..Ngg Vin := Vn+U 4.54 4.54 2.6 2.42 3.09 2.04

4.8

4.62)mA

92

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Get base currents to refine Vbe:

IbT = (26.01

24.21

30.87

Ib1 : =

Ein1 − V1 R3

Ib 2 : =

Ein 2 − V2 R5

Ib 3 : =

V4 − V13 Rs

Ib 4 : =

V3 − V14 Rs

Ib 5 : =

V9 − V16 Rs

Ib 6 : =

V8 − V15 Rs

20.35

48.02

46.19)uA

From Vbe curve-fit data: m1 :=0.068

b1 := 0.588

Ib Vbe W : = ml ⋅ log w + b1 uA VbeT = (0.68

0.68

0.69

0.68

Copy to Vbe in the previous text. Repeat if necessary. (Converges very rapidly.)

0.70

0.70)

w := 1..rows(Ib)

Controlled Sources

93

NDS (Mathcad) 4.0987 3.9988 9.3186 9.3286 3.4187 3.3188 1.8023 11.4909 Vk = 12.6208 11.9208 10.7909 8.6386 9.3286 9.3186 11.4909 12.6208

Spice using 2N3904 4.0991 3.9992 9.3188 9.32999 3.4085 3.3104 1.7930 11.4960 Vspice : = 12.6350 11.9280 10.7900 8.6342 9.3299 9.3188 11.4960 12.6350

pe k : =

Vk −1 Vspice k

Percent error, each node −0.01 −0.01 −0.00 −0.01 0.30 0.25 0.52 min(pe) = −0.11% −0.04 pe = % −0.11 max(pe) = 0.52% −0.06 0.01 0.05 −0.01 −0.00 −0.04 −0.11

94

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

SPICE Comparison of uA733 Video Amplifier Analysis uA733 Video Ampl * File: uA733_va.cir VEin1 99 0 DC 4.1 VEin2 98 0 DC 4.0 VEin3 97 0 DC 15 * R3 99 1 50; External input resistor R5 98 2 50; External gain resistor R1 97 3 2.4K R2 97 4 2.4K R4 5 7 590 R6 6 7 590 R7 97 8 1.1K R8 97 9 1.1K R9 3 10 7K R10 4 11 7K Rg 5 6 20K; External gain resistor * Rs1 4 13 0.01 Rs2 3 14 0.01 Rs3 9 16 0.01 Rs4 8 15 0.01 * Current sources I1 7 0 DC 5.31mA I2 12 0 DC 5.31mA I3 10 0 DC 4.54mA I4 I1 0 DC 4.54mA * * C B E Q1 3 1 5 Q2N3904

Controlled Sources

95

Q2 4 2 6 Q2N3904 Q3 8 13 12 Q2N3904 Q4 9 14 12 Q2N3904 Q5 97 16 10 Q2N3904 Q6 97 15 11 Q2N3904 * * Bf=416.4 .model Q2N3904 NPN(Is=6.734f Xti=3 Eg=1.11 Vaf=74.03 +Bf=416.4 Ne=1.259 Ise=6.734f Ikf=66.78m Xtb=1.5 +Br=.7371 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=3.638p Mjc=.3085 +Vjc=.75 Fc=.5 Cje=4.493p Mje=.2593 Vje=.75 Tr=239.5n +Tf=301.2p Itf=.4 Vtf=4 Xtf=2 Rb=10) * OPTIONS NOMOD NOECHO NOPAGE .END

NODE

VOLTAGE

NODE

VOLTAGE

NODE

VOLTAGE

NODE

VOLTAGE

(1) (5) (9) (13) (97)

4.0991 3.4085 12.6350 9.3299 15.0000

(2) (6) (10) (14) (98)

3.9992 3.3104 11.9280 9.3188 4.0000

(3) (7) (11) (15) (99)

9.3188 1.7930 10.7900 11.4960 4.1000

(4) (8) (12) (16)

9.3299 11.4960 8.6342 12.6350

REFERENCES 1. LTC1562 Data Sheet, p. 18, www.linear.com.

This page intentionally left blank

4

Leverrier’s Algorithm

4.1 NUMERICAL TRANSFER FUNCTION [1] The transfer matrix G is a matrix of output/input transfer functions. It has the dimensions {K M}, or {output input}. The desired numerical transfer function is an element of the transfer matrix G. For example, output 1 / input 2 would be G12. Leverrier’s algorithm finds both. Note that in the following sequence, the symbol tr( ) indicates the trace of a matrix, i.e., the sum of the diagonal elements. General subscripts are given in parentheses, but specific ones are not. That is, FN – 1 is designated F(N – 1). However, F2 would be designated by F2. This is to prevent double subscript sets in later equations. For a given matrix A of dimension {N N}, the general sequence is: I = identity(N) F = (N – 1) = I T(N − 1) =

− tr A ⋅ F ( N − 1) 1

F = (N − 2 ) = A ⋅ F (N − 1) + T(N − 1) ⋅ I T(N − 2 ) =

− tr A ⋅ F ( N − 2 )

F = (N − 3) = A ⋅ F (N − 2 ) + T(N − 2 ) ⋅ I T(N − 3) =

− tr A ⋅ F ( N − 3)

2

3

F1 = A ⋅ F 2 + T2 ⋅ I T1 =

− tr ( A ⋅ F1) N −1

F 0 = A ⋅ F1 + T1 ⋅ I T0 =

− tr ( A ⋅ F 0 ) N

The numerator coefficients are then: Y(N − 1) = D ⋅ F (N − 1) ⋅ B + E ⋅ T(N − 1) Y(N − 2 ) = D ⋅ F (N − 2 ) ⋅ B + E ⋅ T(N − 2 )

Y1 = D ⋅ F1 ⋅ B + E ⋅ T1 Y0 = D ⋅ F 0 ⋅ B + E ⋅ T0

97

98

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The output I / input J transfer function extracted from the {K M} transfer matrix G is then: GI J (s) =

E I J sN + Y ( N − 1)I J s N−1 + Y ( N − 2 )I J s N− 2 + + Y1I J s + Y0 I J sN + T ( N − 1) sN−1 + T ( N − 2 ) sN− 2 + + T1s + T0

A simple example will help clarify the procedure. Let −1 A=0 0

0 −4 −1

0 1 4 , I = 0 0 0

0 1 0

0 0 1

in which N = 3 The trace of A = 5; the trace of I = 3. Sequence is: F2 = I

T2 =

4 − tr ( A ⋅ F 2 ) = 5, F1 = A ⋅ F 2 + T2 ⋅ I = 0 1 0

T1 =

4 − tr ( A ⋅ F1) = 8, F 0 = A ⋅ F1 + T1 ⋅ I = 0 2 0

T0 =

− tr ( A ⋅ F 0 ) =4 3

0 1 −1

0 4 4

0 0 −1

The denominator of GI,J is then D(s) = s3 + T2s2 + T1s + T0 = s3 + 5s2 + 8s + 4 Let the D, B, and E arrays be, with {K M} = {2 2}. −1 D= 0

0 0

1 1 , B = 0 1 1

We compute the numerator of G using:

0 1 1 , E = 0 −1

0 4 5

0 1

Leverrier’s Algorithm

99

5 Y2 = D ⋅ F 2 ⋅ B + E ⋅ T2 = 1

−1 4

9 Y1 = D ⋅ F1 ⋅ B + E ⋅ T1 = 5

−66 2

4 Y0 = D ⋅ F 0 ⋅ B + E ⋅ T0 = 4

−5 −1

The numerator of G is a matrix polynomial: 1 N(s) = Es 3 + Y2s2 + Y1s + Y0 = 0

0 3 5 s + 1 1

−1 2 s 4

9 + 5

−6 4 s+ 2 4

−5 −1

G I,J =

N (s) D (s)

Then:

G1,2 =

(

− s 2 + 6s + 5

)

s 3 + 5s 2 + 8s + 4

and G2,2 is G 2 ,2 =

s 3 + 4 s 2 + 2s − 1 , s 3 + 5s 2 + 8s + 4

etc. Another way to find D(s) is by using eigenvalues: −1 A=0 0

0 −4 −1

0 −2 4 , eigenvals( A) = −2 −1 0

then D(s) = (s + 1)(s + 2)(s + 2) = s3 + 5s2 + 8s + 4 A circuit example is given in Section 4.2.

100

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

4.2 TRANSFER FUNCTION USING LEVERRIER’S ALGORITHM FOR TWIN-T RC NETWORK → Reference:C:\mcadckts\CaNL11\TwinT2.mcd See schematic in Section 2.5. Display A, B, D, and E arrays: −374.53 A = −374.53 −374.53

−187.27 −1136.41 −384.53 D = (0

–1

−187.27 −384.553 −384.53 –1)

374.53 B = 1136.41 384.53

E = (1)

The {N N} identity matrix is obtained from the referenced subprogram: 1 I = 0 0

0 1 0

0 0 1

{K M} = {1 1} here. Step 1 − tr ( A ⋅ F 2 ) T2 = 1895.48 1 Y2 := D·F2·B + E·T2 Y2 = (374.53) F2 := I

T2 :=

Step 2

F1 := A·F2 + T2·I Y1 := D·F1·B + E·T1

− tr ( A ⋅ F1) T1 = 718489.21 2 Y1 = (140274.07)

T1 :=

Step 3

F0 := A·F1 + T1·I Y0 := D·F0·B + E·T0

− tr ( A ⋅ F 0 ) 3 Y0 = (5.27 × 107)

T0 :=

T0 = 5.56 × 107

Leverrier’s Algorithm

101

Transfer function: G (s) :=

E ⋅ s 3 + Y2 ⋅ s2 + Y1 ⋅ s + Y0 s 3 + T2 ⋅ s2 + T1 ⋅ s + T0

Compare the following plot with that of the twin-T network in Section 2.5: Transfer function magnitude

0 −10 dBV

−20 db(G(si)) −30 −40 −50 −60

0

20

40

60

80

100

Fi Freq(Hz)

REFERENCES 1. D.M. Wiberg, Schaum’s Outline Series, State Space and Linear Systems, McGrawHill, 1971, p. 102.

This page intentionally left blank

5

Stability Analysis

5.1 UNITY GAIN DIFFERENTIAL AMPLIFIERS The NDS Method can be used for stability analysis problems. Techniques illustrated are, (1) Α and β slope intersection method, and (2) gain-phase plots of loop gain Αβ. Several examples are contained in this chapter. (In control theory, the symbols G and Η are used for Α and β respectively.) K := 103

u := 10–6

p := 10–12

Meg := 106

Hz := 1

MHz := 106

Compensated unity gain differential amplifier R1

R2 Ein1

R5

R3

11 2 − V−

C3

3 +

V0 1

V+ 4

Ein2 R6

R1 R4 R5 C3

:= := := :=

30·K R2 := 30·K R3 := 100·Meg 10·Meg (R4 internal to opamp) 30·K R6 := 30·K 0.01·u C4 := 5·p (Stray package capacitance)

Beta equivalent circuit (R4 and C4 internal to opamp) Note that Vo becomes the input, or Ein. R2

R1

V1

V0 (Ein) R3

R4

V2

C4

C3 R5

V3 R6

103

104

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

By definition: Beta =

V1 − V3 Ein

The inverse of this is: InvBeta =

Ein V1 − V3

For opamp poles: f1 := 20·Hz rd :=

f2 := 1·MHz

180 π

ω1 := 2·π·f1

ω2 := 2·π·f2

U := 3

1 Y := 3

Two outputs are V1 and V3

99 1 1 RR := 1 3 3

1 0 2 3 0 0

LL := 0

R1 R2 R 3 R 4 R5 R6

GG := 0

2 CC := 1

EE := 0

3 3

C 3 C 4

Ein := (99

1)

One input.

→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2 L i = BF +

ND := 5 i −1 PD

PD := 20

F := 10L

i := 1..ND·PD + 1

s := 2 ⋅ π ⋅ F ⋅ −1

For the opamp: Ao si si 1 + ⋅ 1 + ω1 ω2

Ao := 105.5

Ao1i =

V1i := (cvi)1

V3i := (cvi)2

cvi := D·(si·I – A)–1·B + E

Stability Analysis

105

1 Recall that Y = Vai := V1i – V3i 3 Aold := A (for future reference) This is with the compensation R3 and C3 (sometimes called the “beta killer”) disabled by setting R3 = 100 Meg. To enable it, we now set R3 = 2K, RR3,3 := 2·K, and call the reference template again to get the new A matrix value. → Reference:C:\mcadckts\CaNL11\comm42.mcd Anew := A 1 50000 −1 −50000 Aold = Anew = 6 8 −1.067 × 10 8 2000 −6.689 × 10 1 × 10 cvi := D·(si·I – A)–1·B + E V1i := (cvi)1 V3i := (cvi)2 Vbi := V1i – V3i Net slope of intercept is >20 dB/decade implies unstable (R3 = 100 Meg). Net slope of intercept = 20 dB/decade implies stable (R3 = 2 K). With and without compensation

80 70 60

dBV

50 db(Aoli)

40

−db(Vai)

30

−db(Vbi)

20 10 0 −10 −20

2

3

4

Aol R3 = 100 Meg R3 = 2 K

Li

5

6

7

Log freq(Hz)

Plot Loop Gain as a Gain–Phase Plot: Loop gain is defined as (Aol)(Beta) AB1i := db(Aoli·Vai) AB2i := db(Aoli·Vbi) φi := rd·arg(Aoli·Vai) θi := rd·arg(Aoli·Vbi) φi := if(φi > 0, φi – 360, φi) θi := if(θ > 0, θi – 360, θi) Zero crossover markers: F1 := –192 F2 := –103

106

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Phase margin (R3 = 100 Meg) = 180 + F1 = −12 implies unstable. Phase margin (R3 = 2 K) = 180 + F2 = 77 implies stable. Gain-phase plot

50

F2

Gain (dBV)

F1

AB1i

0

AB2i

−50 −230

−210

−190

−170

−150 φi, θi Phase angle (Deg)

R3 = 100 Meg R3 = 2 K

−130

−110

−90

5.2 STABILITY OF LM158 OPAMP MODEL In this section, the stability of an LM158 opamp model embedded in a feedback circuit is analyzed. Meg := 106

R3

K := 103

U := 106

MHz := 106

Original circuit C1 V3 Rs

R3

0.1 uF

1.13 K

1.13 K R2

V1

R1

Ein 2.26 K

LM158 opamp

Ein

10 K 2 −

3

+

1

Feedback (beta) circuit C1 V3 Rs R3

R2 2.26 K

0.1 uF V1

R1 10 K

(V2) Ein1

X V2

LM158 model

R4 V4

4

Ein

(V2)

10 K

V− V+

Rs

R1

V1

11

p := 1012

0.1 uF V1

2.26 K

V5 C2

1.13 K

Using LMI 58 model C1 V3

R2

V2

N := 109

+ −

R5

EE2

V7

V6 C3

+ −

R6

EE3

V8 C4 EE4

+ −

Stability Analysis

107

R1 := 10·K R2 := 2.26·K R3 := 1.13·K R4 := 99.47·Meg R5 := 10 R6 := 10 C1 := 0.1·u C2 := 80·p C3 := 13.263·n C4 := 7.958·n Rs := 0.01 Ao := 105 U := 8 1 Y= 2 The feedback circuit consists of R1, R2, R3, and C1. The opamp model consists of R4, C2, R5, C3, R6, C4, and VCVSs EE2 through EE4. When analyzing the feedback factor beta, the output V2 becomes an input Ein1. For the opamp model, inverting input V1 becomes a new input Ein1. f1, f2, and f3 are the three pole frequencies (Hz) of the opamp model.

1 f1 : = 2 ⋅ πR 4 ⋅ C2

Ein := (99

1)

99 1 1 RR := 99 5 7 99 5 EE := 7 2

1 1 f2 : = f3 : = 2 ⋅ πR 5 ⋅ C 3 2 ⋅ πR 6 ⋅ C 4

LL := 0 R1 R2 R 3 R 4 R5 R6 Rs

1 0 0 4 6 8 3 0 0 0

4 6 8

0 0 0

GG := 0

3 4 CC := 6 8

1 0 0 0

C1 C2 C 3 C 4

1 1 Ao

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aold := A

Bold := B

Save arrays. New value for C2 C2 := 250·p Insert into CC array: CC2,3 := C2

1.3 log ( f ) = 6.08 6.3

108

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Call reference again with new value of C2: New pole frequency f1:

f1 :=

0.81 log ( f ) = 6.08 6.3

1 2 ⋅ πR 4 ⋅ C2

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Anew := A

Bnew := B

AC Analysis BF := 0

ND := 7

PD := 20

i := 1..ND·PD + 1

i −1 s := 2 ⋅ π ⋅ 10 L ⋅ −1 PD Vai := D·(si·I – Aold)–1·Bold + E Vai := (vai)1 L i = BF +

Vbi := D·(si·I – Anew)–1·Bnew + E

A3i := (vai)2

A4i := (vbi)2

rd :=

180 π

Loop gain: AB1i := A3i·Vai AB2i := A4i·Vai φi := rd·arg(A3i·Vai) αi := rd·arg(A4i·Vai) φi := if(φi > 0, φi – 360, φi) αi := if(αi > 0, αi – 360, αi) Zero crossover markers: F1 := –165

F2 :=–129

Phase margins: PM1 := 180 + F1

PM1 = 15

PM2 := 180 + F2

PM2 = 51

Stability rule of thumb: Phase margin should be greater than 45°. 80

Gain-phase plot of loop gain AB F1

dBV

60 db(AB1i)

40

db(AB2i)

20

F2

0

0 −20 −300

−250 C2 80 pF C2 250 pF

−200

−150 φi, αi Deg

−100

−50

0

Stability Analysis

109 Opamp open loop gain and inverse beta

120 100 80

dBV

db(A4i)

60

db(A3i)

40

−db(Vai)

20 0 −20

0

1

2

3

4

5

6

7

Li

C2 250 pF

Log freq(Hz)

C2 80 pF Inv Beta

Note: Net slope of intercept of Inv Beta with opamp Aol should be 20 dB/dec.

5.3 HIGH-VOLTAGE SHUNT REGULATOR — STABILITY ANALYSIS In this section, the stability analysis of the HV Shunt Regulator presented in Section 3.14 is given. K := 103

nF := 10–9

Hz := 1

MHz := 106

V := 1

Ehv R10

R4 R7 V8

C1

V10 V3

R8 Eref

V7

2

−

3 +

M2

11 V1 R1

V− V+

V2

C2

M1

V3

1 4

R2

V4

R9

V6 R5 V5

R3 R6

R1 R5 R9 C2

:= := := :=

10·K 215·K 1.96·K 4.7·nF

R2 := 10·K R6 := 6878 Ehv := 400

db(x) := 20·log(|x|)

R3 := 15·K R4 := 150·K R7 := 562·K R8 := 14.7·K Eref := 6.2 C1 := 2.7·nF

110

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Calculate poles, zeros, and critical gain points in dBV: T1 := C1·(R7 + R8) T6 := R9·C2

T3 := R8·C1

T2 := C2·(R4 + R9)

Breakpoint (bp) of loop gain 1 (lg1): F1 :=

1 2 ⋅ π ⋅ T1

F1 = 102.2 Hz

LF1 := log(F1)

LF1 = 2.01

LF2 := log(F2)

LF2 = 2.348

LF6 := log(F6)

LF6 = 4.24

First bp of lg2 (see plot marker): F 2 :=

1 2 ⋅ π ⋅ T2

F1 = 222.8 Hz

Second bp of lg2: 1 F6 = 17.3 KHz 2 ⋅ π ⋅ T6 BF := 0 ND := 7 PD := 20 F 6 :=

L i = BF +

i −1 PD

i := 1..ND·PD +1

s := 2 ⋅ π ⋅ 10 L ⋅ −1

Minor loop inverse beta (see the following derivation). s ⋅ T3 1g1i := − db i si ⋅ T1 + 1 Major loop inverse beta s ⋅ T6 + 1 R 4 ⋅ R6 ⋅ 1g 2 i : = – db i si ⋅ T2 + 1 R 3 ⋅ ( R 5 + R 6 ) High-frequency gain of lg1 R7 G1 := db 1 + R8

G1 = 31.87

High-frequency gain of lg2 R 3 ⋅ (R 4 + R9) ⋅ (R5 + R6) G 4 := db R 4 ⋅ R6 ⋅ R9

G4 = 47.96

Stability Analysis

111 Inverse betas & break points

80

LF2

70

LF6

60

G4

dBV

50 lg1i

40

lg2i

30

G1

20 10 0 −10

0

1

Minor loop Major loop

2

3 Li

4

Log freq(Hz)

Note: Net slope of intercept = 20 dB/dec. Opamp DC open loop gain in V/V: Ao := 106 Goa := db(Ao) Goa = 120 Foa := 30·Hz Foa = First opamp breakpoint. ω1 := 2·π·Foa ω2 := 2·π·2·106 (Opamp poles) Ao Ao1i = db 1 + si ⋅ 1 + si ω1 ω 2 Opamp open loop gain: R 3 ⋅ (R5 + R6) IG 2 := db R 4 ⋅ R6 LF 3 := LF 2 + LF 4 : =

G1 − IG 2 20

Goa − G1 + log ( Foa ) 20

IG2 = 10.17

LF3 = 3.43

LF4 = 5.88

5

6

112

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Ao1i lg1i lg2i

Stability intercepts

130 120 110 100 90 80 70 60 50 40 30 20 10 0 −10

LF3

LF4

G4 G1

0

0.5

1

1.5

Opamp Minor loop Major loop

2

2.5

3

3.5 Li

4

4.5

5

5.5

6

6.5

7

Note that at each intercept LF3 and LF4, the net slope is approximately 20 dB/decade, which implies stability. Calculate loop gain GH:

F 7 i :=

si ⋅ R 7 ⋅ C1 + 1 si ⋅ R 8 ⋅ C1

F 8 i :=

1 R 4 ⋅ ( si ⋅ R 9 ⋅ C2 + 1) R 6 ⋅ ⋅ R 3 s i ⋅ C2 ( R 4 + R 9 ) + 1 R 5 + R 6

GHi := db(F7i·F8i) + Ao1i

M1 = 37

− F 7 ⋅ F 8 ⋅ Ao 180 i i PH I := ⋅ arg π 1 + si ⋅ 1 + si ω1 ω 2

Stability Analysis

113 Gain vs. phase

200 M1

Gain

100 GHi 0

−100

0

20

40

60

80

100

phi Deg

Note: phasemargin := M1 phasemargin := 37 Voltage divider R1, R2 not included. Derivation of minor loop gain 1 (lg1) and major loop gain 2 (lg2): R7

C1

Ein = 1V 562 K

2.7 nF R8

lg1 derivation

1V

−

14.7 K

C2

R5

4.7 nF

215 K

Vb

+

lg1 R3

Va

15 K

R4

+

R9

150 K

1.96 K

Ebuﬀ

−

lg2 derivation

Ebuff represents source follower M2. Ig1 is the drain current of M1, For lg1 derivation: Va =

R8 1 R8 + R 7 + sC1

For inverse, use –dBV

=

s ⋅ R 8 ⋅ C1 s ⋅ C1 ⋅ ( R 7 + R 8 ) + 1

Vc

R6

6.878 K

114

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

For lg2 derivation: Ig1 current =

1⋅ V R3

ZL =

R 4 ⋅ ( s ⋅ R 9 ⋅ C2 + 1) s ⋅ C2 ⋅ ( R 4 + R 9 ) + 1

of Ig1 Vb =

ZL 1 R 4 ⋅ ( s ⋅ R 9 ⋅ C2 + 1) = ⋅ R 3 R 3 s ⋅ C2 ⋅ ( R 4 + R 9 ) + 1

Vc =

Vb·R 6 R5 + R6

6

Transient Analysis

6.1 INTRODUCTION One method of transient analysis is based on the following equation: ∆x = Ax + Bu or ∆x = (Ax + Bu)·∆t ∆t Because A and B are already known using the NDS method, the task is to determine ∆t. If ∆t is too large, the solution will not be accurate. If ∆t is excessively large, the solution will not converge. If too small, a longer-than-necessary execution time may be required. The time increment ∆t generally should be less than the smallest time constant in the A matrix. This should be used as a guide in selecting the initial value of ∆t. Some adjustment may be required for circuits with very fast and very slow time constants. A simple circuit is used as the first example. R1

V1

Ein R2

R1 := 20·K

R2 := 40·K

C1

C1 := 0.5·uF

Ein := 4.5

The time constant of this circuit is easily found to be:

Rp := τ := Rp· C1

R1 ⋅ R 2 R1 + R 2

τ = 6.667 ms

To confirm this, KCL at the node V1 gives: Ein − V1 V1 = + iC1 R1 R2 1 Ein 1 iC1 = −V1 ⋅ + + R1 R 2 R1 115

116

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Noting that V1 = vC1 and substituting iC1 = C1 ⋅ dvC1 − vC1 = dt C1

dvC1 dt

Ein 1 1 , ⋅ + + R1 R 2 R1 ⋅ C1

which is in the state space form dx = Ax + Bu dt Then

A := u := Ein

−1 1 1 ⋅ + C1 R1 R 2

A = –150

B = 100

B :=

1 R1 ⋅ C1

u = 4.5

The time constant of A is 1 = 6.667 ms A which is τ as in the preceding text. We then chose ∆t = 1 ms < τ. Using ∆x = (Ax + Bu)⋅∆t we initialize: Vc1 := 0 (can be an initial condition other than zero) ∆Vc1 := (A·Vc1 +B·Ein)·∆t Vc1 = 0.45 Vc2 = ∆Vc1 +Vc1 Vc2 = 0.45 ∆Vc2 := (A·Vc2 +B·Ein)·∆t Vc2 = 0.383 Vc3 = ∆Vc2 +Vc2 Vc3 = 0.832 Combining: Vc2 := (A·Vc1 +B·Ein)·∆t + Vc1 Vc3 := (A·Vc2 +B·Ein)·∆t + Vc2

Vc2 = 0.45 Vc3 = 0.832

Setting the maximum number of iteration to kmax : = 50 and indexing k := 2..kmax, Vck : = (A·Vck-1 +B·Ein)·∆t + Vck-1 The total sweep time is: kmax⋅∆t = 50 ms, which should be sufficient because 5⋅τ = 33.33 ms.

Transient Analysis

117

We plot Vc and compare this to the continuous solution F ( t ) :=

−t Ein ⋅ Rp ⋅ 1 − exp R1 Rp ⋅ C1

t := 0, 0.005·ms..50·ms Widening the span of k to include k = 1 (Vc1 = 0): k := 1..kmax Time plot

Volts

3

Vck

2

F(t) 1

0 0

10

20

30 . k ∆t , t ms ms Time(ms)

40

50

Ein ⋅ Rp =3 R1 Note the lag of Vc behind the continuous time function F(t). We can decrease this lag by decreasing Dt to 0.5 ms and by increasing kmax from 50 to 100 to maintain the same sweep time: The steady-state value is

∆t := 0.5·ms

kmax :=

50 ⋅ ms ∆t

kmax = 100

k := 2..kmax (for computing) Vc1 := 0 Vck := (A·Vck–1 + B·Ein·∆t + Vck–1 k := 1..kmax (for plotting)

118

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Time plot

Volts

3

Vck

2

F(t) 1

0 0

10

20

30

40

50

k . ∆t , t ms ms Time(ms)

Further reduction of ∆t would result in the two plots approaching congruency. The reader is encouraged to select larger values of ∆t and note the deleterious effect on the solution. As will be shown, this method applies irrespective of whether A and B are scalars as in the preceding text or arrays.

6.2 SWITCHED TRANSIENT ANALYSIS A more complicated example is now shown to further illustrate the utility of the method. R1 Ein

V1 Q1

R2

V2

C1

V3

1 R3

R4

2

R1 := 10·K R2 := 10·K R3 := 2·K Qloff := 10·Meg Qlon := 0.5 (Q1 is a CMOS SPST switch.) C1 := 0.1·u

U := 3

1 Y := 2 3

R4 := 10·K

Ein := (99

Analytical Q1off and Q1on time constants: R 3 ⋅ ( R1 + R 2 ) τ1 := R 4 + ⋅ C1 R1 + R 2 + R 3

τ1 = 1.182m

1)

Transient Analysis

119

R2 ⋅ R 3 τ 2 := R 4 + ⋅ C1 R2 + R 3 V3pk :=

τ2 = 1.167m

10 ⋅ R 3 ⋅ R 4 R 3 ⋅ R 4 + ( R1 + R 2 ) ⋅ ( R 3 + R 4 )

99 1 RR := 1 2 3 LL := 0

1 0 2 0 0

R1 Q1off R2 R 3 R 4

EE := 0

CC:= (2

3

V3pk = 0.769

C1)

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Close sw Q1

Boff := B

Doff := D

Eoff := E

RR2,3 := Q1on

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A

Bon := B

Don := D

Eon := E

Compare time constants: t1 :=

1 Aoff

t1 = 1.182m

From above: 1 Aon

τ1= 1.182m

t 2 :=

From above: τ2 = 1.167m

∆t := 0.02·m

Per k max := floor ∆t

t2 = 1.167m

Per := 20·m

kmax = 1000

Ein := 10

Create input pulse from Mathcad’s unit step function φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w, Ein) := Ein·pulse(x – f, w) Eapp(t) := bpf(t, 0.05·Per, 0.9·Per, Ein) k := 2..kmax Initialize: V11 := 0 Switch time: Sw := 0.45·kmax Sw·∆t = 9m

120

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

V1k := if(k < Sw, Aoff·V1k–1·∆t + Boff·Eapp(k·∆t)·∆t + V1k–1, Aon·V1k–1·∆t + Bon·Eapp(k·∆t)·∆t + V1k–1) Vok := if(k < Sw, Doff·V1k + Eoff·Eapp(k·∆t), Don·V1k + Eon·Eapp(k·∆t)) Input & output waveforms

1.5

Sw . ∆t m

1

Volts

(Vok)2 − (Vok)3 (Vok)3 Eapp(k . ∆t)

V3pk

0.5 0

10

–V3pk

–0.5 –1

0

10 k . ∆t m Time(ms)

5 Vc1 V3 (Input pulse)/10

15

20

6.3 N = 2 SWITCHED CIRCUIT TRANSIENT RESPONSE In this section, a circuit with two capacitors (N = 2) with multiple time constants and a synchronously switched inputs is analyzed. K := 103

u := 10–6

Meg := 106

m := 10–3

R1

V1

Ein1 R3

R2 V2 1

C1

R4

V3 C2

Q1 2 Ein2

R1 := 10·K R2 := 10·K R3 := 20·K R4 := 100·K Q1off := 10·Meg Q1on := 0.5 C1 := 0.02·u C2 := 0.5·u U := 3 Y := (1 2 3)T 99 Ein := 98

1 1

LL := 0

GG := 0

EE := 0

Transient Analysis

121

Two inputs. To be changed to +25 V and −10 V later. Switch Q1 OFF 99 1 RR := 2 1 1

R1 R2 Q1off R 3 R 4

1 2 98 3 0

1 CC := 3

C1 C2

0 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Switch Q1 ON

Boff := B

Doff := D

Eoff := E

Save OFF arrays.

RR3,3 := Qlon

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A tau1 : =

Bon := B

Don := D

Eon := E

Save ON arrays.

1 1 1 1 tau 4 : = tau 2 : = tau 3 : = max ( Aoff ) min ( Aoff ) max ( Aon ) min ( Aon )

tau1 := (400

124.9

400

76.9)u

tau4 := 76.9 u

This is the shortest time constant; ∆t must be less than this. Choose ∆t := 50·u

Per1 := 20·m

Per2 := 40·m

Per 2 kmax := floor ∆t

kmax = 800 pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w, Ein) := Ein·pulse(x – f, w) Ein1 := 25 Ein2 := –10 Eapp1(t) := bpf(t, 0.05·Per1, 0.95·Per1, Ein1) Eapp2(t) := bpf(t, 0.4·Per1, 0.95·Per1, Ein2) Eapp1( t ) Eapp( t ) : = Eapp 2( t )

0.95·Per1 := 19m

k := 2..kmax Initialize: 0 V11 := 0

0.5·Per1 = 10m

122

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Switch time: Sw := 0.25·kmax Sw = 200 Sw·∆t = 10m V1k := if(k < Sw, Aoff·V1k–1·∆t + Boff·Eapp(k·∆t)·∆t + V1k–1, Aon·V1k–1·∆t + Bon·Eapp(k·∆t)·∆t + V1k–1) Vok := if(k < Sw, Doff·V1k + Eoff·Eapp(k·∆t), Don·V1k + Eon·Eapp(k·∆t)) 30 25

Sw . ∆t m

20

(Vok)1

15

(Vok)3

10

Eapp(k . ∆t)1

5

Eapp(k . ∆t)2

0 –5 –10 –15

0

5 V1 V3 Ein1 Ein2

10

15

20 k . ∆t m

25

30

35

40

SPICE Verification N=2 Switched Circuit Transient Response *File: n2tran.cir V1 99 0 PWL(0,0 1m,0 1.001m,25 19.99m,25 20m,0) V2 98 0 PWL(0,0 7.99m,0 8m,-10 17.99m,-10 18m,0) R1 99 1 10K R2 1 2 10K R3 1 3 20K R4 1 0 100K * C2 3 0 0.5u C1 1 0 0.02u * * Build separate switch control

Transient Analysis

123

* V3 97 0 PWL(0,0 9.99m,0 10m,+5 47.99m,+5 48m,0) RL 97 0 10K SQ1 2 98 97 0 SMOD .MODEL SMOD VSWITCH(RON=0.5 ROFF=10MEG VON=+5 VOFF=0) .TRAN 0.1m 40m 0 50u .PRINT TRAN V(99) V(98) V(1) V(3) .OPTIONS NOMOD NOECHO NOPAGE .END Tnom := READPRN(“c:\SPICEapps\datfiles\n2tran.txt”) N := rows(Tnom) N = 401 k := 1..N

Spice veriﬁcation 30 25

Volts

Tnomk,2 Tnomk,3

20 15 10

Tnomk,4

5

Tnomk,5

0 –5 –10 –15

0

5

10

15

Ein1 Ein2 V1 V3

20 25 Tnomk,1 m Time(ms)

6.4 COMPARATOR 100-HZ OSCILLATOR K := 103 V := 1

u := 10–6 Hz := 1

Meg := 106

m := 10–3

30

35

40

124

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

LM339 comparator circuit

Redrawn explanatory circuit Ein

C1

2

3 R1 Ein +5V

Vp

Ein R5 +5V

Vn – +

R5 Vn

R4 11 V– V+

1

Vc

C1

R4

Vc

R3

Vp

R1 Ein

1 R2

Q1 2

4

R3 Q1 internal

R2

R1 := 100·K R5 := 3.3·K

R2 := 100·K Q1on := 150

R3 := 100·K R4 := 5.75·K Qloff := 10·Meg C1 := 1.15·u

Switch Q1 is the open-collector (OC) transistor output of an LM339 comparator. Vn is the inverting input, and Vp is the noninverting input to the LM339. Hence, when Vn > Vp, Q1 will be ON (switch closed), and when Vn < Vp, Q1 will be OFF (switch open). When power is applied (Ein = +5 V DC), C1 will charge up to a voltage greater than Vp, closing switch Q1, and then discharging C1 towards a voltage less than Vp, which opens the switch, and the cycle repeats. Hence, the output of the LM339 will go high (Q1 OFF) and low (Q1 ON) at a rate determined by the circuit time constants. With the given, component values the frequency of oscillation is about 100 Hz. From the plot in the following text, the falling edges of Vc are about 10 ms apart, for a period of 100 Hz. Note that max Vce(sat) is given on the LM339 data sheet as 0.25 V. This is simulated by setting the ON resistance of Q1 to 150 Ω. U := 3 LL := 0

Y := (1 2 EE := 0

3)T CC := (1 0 C1) GG := 0 Ein := (99 5)

Note: Vn = V1 = VC1 = minus input to LM339, Vc = V2 = Vcollector, Vp = V3 = plus input to LM339.

Transient Analysis

125

99 3 3 RR := 2 99 2

3 0 2 0 2 1

R1 R2 R3 Q1off R5 R4

with switch Q1 OFF → Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Boff := B Save OFF arrays.

Doff := D

Eoff := E

RR4,3 := Q1on

Repeat with switch Q1 ON.

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A Bon := B Save ON arrays. ∆t := 0.05·m

Don := D

Per := 50·m

Eon := E

Per kmax = floor ∆t

kmax = 100 pulse(x) := φ(x) (φ(x) is Mathcad’s unit step function.) bpf(x, f, Ein) := pulse(x – f) Eapp(t) := bpf(t, 0.005·Per,1)

126

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Program

Comments

Vo := V11 ← 0

Initialize

Vn1 ← 0 Vc1 ← 0 Vp1 ← 0 for k ∈ 2..kmax if Vn k −1 > Vp k −1 V1k ← Aon ⋅ V1k −1 ⋅ ∆t + Bon ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V1k −1

Iterate from 2 to kmax Q1 to switch ON

Vn k ← Don1 ⋅ V1k + Eon1 ⋅ Eapp ( k ⋅ ∆t ) Vc k ← Don 2 ⋅ V1k + Eon 2 ⋅ Eapp ( k ⋅ ∆t ) Vp k ← Don 3 ⋅ V1k + Eon 3 ⋅ Eapp ( k ⋅ ∆t ) otherwise V1k ← Aoff ⋅ V1k −1 ⋅ ∆t + Boff ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V1k −1 Vn k ← Doff1 ⋅ V1k + Eoff1 ⋅ Eapp ( k ⋅ ∆t ) Vc k ← Doff2 ⋅ V1k + Eoff2 ⋅ Eapp ( k ⋅ ∆t ) Vp k ← Doff3 ⋅ V1k + Eoff3 ⋅ Eapp ( k ⋅ ∆t ) Vn Vc Vp

Q1 to swittch OFF

Transient Analysis

127 Oscillator waveforms

5

Volts

4 |(Vo1)k| 3 |(Vo2)k| 2 1 0

0

10

20

Vn Vc

k . ∆t m Time(ms)

30

40

50

Oscillator waveforms

5

Volts

4 |(Vo1)k| 3 |(Vo3)k| 2 1 00

10

20

Vn Vp

k . ∆t m Time(ms)

30

40

6.5 TRANSIENT ANALYSIS OF PULSE TRANSFORMER ns := 10–9

ps := 10–12

MHz := 106

For the schematic, see Section 2. 6. Insert AC circuit analysis file: → Reference:C:\mcadckts\CaNL11\xformerrs5.mcd Y := (1

3

5)T

Insert subprogram file: → Reference:C:\mcadckts\CaNL11\comm42.mcd

50

128

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Time constants of A: 1 max ( A )

tau1 : =

tau 2 : =

Specify time parameters: Choose ∆t < tau, ∆t := 2·ps m := 1..Npp Tper kmax := floor ∆t

1 min ( A )

2.5 tau ps 2.5

Tper := 200·ns

Npp := 200

kmax = 100000

kmax Npp = number of plotting points. rto := floor Npp Create delayed input pulse using Mathcad’s unit step function φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.02·Ter, 0.5·Tper) Vo : = V11 ← ( 0

0

0

0

0

0)

T

for k ∈ 2..kmax V12 ← A ⋅ V11 ⋅ ∆t + B ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V11 Vx1 ← D ⋅ V11 + E ⋅ Eapp ( k ⋅ ∆t ) V11 ← V12 tx ←

k rto

vo tx ← Vx1 if tx = floor ( tx ) vo

Volts

Delayed input pulse 1.2 1 0.8 Eapp(m. ∆t ⋅rto) 0.6 0.4 0.2 0 −0.2

0

50

100 m. ∆t ⋅rto n Time(ns)

150

200

Transient Analysis

129 Output at node Y

15

Volts

(Vom)1 (Vom)2

10 5

(Vom)3 0 –5

0

Length(Vo) = 200

25

50

75

100 125 m. ∆t⋅rto ns

V1 V3 V5

Time(ns)

Npp = 200

1 Y := 3 5

150

175

200

Note the distortion on V3 and V5. Because the bandwidth is approximately 10 MHz (see Section 2.6), the rise or fall times of the input pulse should be greater than

Tr :=

ln ( 3) π ⋅ 10 ⋅ MHz

Tr = 34.97ns

The rise or fall time used here is 10 ps. SPICE Verification TRANSFORMER PULSE RESPONSE * File: xformer_tran.cir VEin 99 0 PWL(0,0 4ns,0 4.012ns,10 104.012ns,10 104.022ns,0) * 10ps rise & fall time; 100ns PW * 4.012ns - 4ns = 0.012ns = 12ps; 10% to 90% = 10ps * R1 99 1 10 R2 1 2 1.5 R3 3 0 20K

130

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R4 3 4 1.5 R5 5 0 1K R6 1 6 0.5 R7 3 7 1 * C1 1 0 20pF C2 6 5 5pF C3 5 0 20pF * L1 2 3 1uH L2 7 0 2mH L3 4 5 1uH * .TRAN 1ns 200ns 0ns 2ps .PRINT TRAN V(99) V(1) V(3) V(5) .OPTIONS ITL5=0 .OPTIONS NOECHO NOPAGE NOMOD .END Tnom := READPRN(“c:\SPICEapps\datfiles\xformer_tran.txt”) N := rows(Tnom) N = 201 k := 1..N Spice veriﬁcation

15

Volts

Tnomk,3 Tnomk,4

10 5

Tnomk,5 0 –5

0

50 V1 V3 V5

100 Tnomk,1 ns Time(ns)

150

200

Transient Analysis

131

6.6 PASSIVE RCL CIRCUIT TRANSIENT ANALYSIS The same circuit was used in Section 2.1 (Introduction). L3 R1

V1

C1

R2

V2

V3

Ein

R1 := 10 C1 := 0.1·u

R2 := 100 C2 := C1

99 1 RR := 2 3

1 2 3 0

Ein := (99

1)

R1 R4 R2 R 3

C2

R3

R4

L4

R3 := 50·K R4 := 10·K L3 := 2533.03·u L4 := 25.3303·u 1 CC := 3

EE := 0

2 0

GG := 0

C1 C2

1 LL := 3

U := 3

L 3 L 4

2 0

Y := (1

2

3)T

→ Reference:C:\mcadckts\CaNL11\comm42.mcd 1 = 25.33 u max ( A )

1 = 0.1 u min ( A )

Select ∆t as: ∆t := 0.02·u Set period: Tper := 100·u

Tper kmax := floor ∆t

kmax = 5000

Create delayed input pulse as before: pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Pulse width = Tper (0.5) = 50 u

Eapp(t) := bpf(t, 0.05·Tper, 0.5·Tper)

Instead of looking at the output voltage nodes Y, we have the option of looking at the capacitor voltages and inductor currents using the following seeded iteration method. V1 is the voltage across C1, V2 on C2, I3 is the current in L3, and I4 in L4.

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

k := 2..kmax Initialize: V11 0 V21 0 := I31 0 I4 0 1 Iterate: V1k V1k −1 V1k −1 V2 k V2 k −1 V2 k −1 := A ⋅ ⋅ ∆t + B ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + I3k I3k −1 I3k −1 I4 I4 I4 k k −1 k −1 Output plots: Input pulse and transients on C1 & C2

1.2 0.8 V1k Volts

132

Eapp(k . ∆t) 5 . V2k

0.4 0 –0.4 –0.8

0

20

V1 Input pulse 5 x V2

V2 is scaled by 5

40

60

k . ∆t u Time(us)

80

100

Transient Analysis

133 Transient currents thru L3 & L4

15

Current (mA)

12.5 10

I3k

7.5

m

5

I4k

2.5

m

0 –2.5 –5

0

20

40

I3 I4

60

80

100

k . ∆t u Time(us)

6.7 MATHCAD’S DIFFERENTIAL EQUATION SOLVERS Consider passive RCL circuits (compare with the NDS method). For schematic and component values, see Section 6.6. → Reference:C:\mcadckts\CaNL11\LCtran.mcd Transient Analysis Using rkfixed or Rkadapt Functions Only step functions can be used. Pulse, ramp, and triangular input waveshapes require use of the NDS transient analysis method. Set time period T as: T := 100·u Set maximum number of time points: kmax := 200 Initialize x and form the {N 1}array D(t,x) from elements of the A and B arrays obtained from comm42.mcd. 0 0 x := 0 0

A1,1x1 + A1,2 ⋅ x 2 + A1,3 ⋅ x 3 + A1,4 ⋅ x 4 + B1 A 2,1x1 + A 2,2 ⋅ x 2 + A 2,3 ⋅ x 3 + A 2,4 ⋅ x 4 + B2 D ( t, x ) : = A 3,1x1 + A 3,2 ⋅ x 2 + A 3,3 ⋅ x 3 + A 3,4 ⋅ x 4 + B3 A x + A ⋅ x + A ⋅ x + A ⋅ x + B 4 ,1 1 4 ,2 2 4 ,3 3 4 ,4 4 4

134

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Call rkfixed: Z := rkfixed(x, 0, T, kmax, D) “rkfixed” uses a constant internally calculated ∆t. The Mathcad ordinary differential equation (ODE) solver “Rkadapt” uses a variable ∆t that can be faster because ∆t is large for slowly-varying outputs and small for fast-varying outputs. It is called in the same manner as “rkfixed.” Z : = Rkadapt(x, 0, T, kmax, D)

n := 1..kmax

(Note: To verify identical outputs with rkfixed and Rkadapt, right-click on Z statement, and then click “Disable Evaluation.” A black square will appear denoting disabled. Then compare with the following plots.) C1 & C2 voltage waveforms 1.2

Volts

0.8 Zn,2

0.4

5 . Zn,3

0 −0.4 −0.8

0

20

40

60

80

100

Zn,1 u Time(us)

Vc1 Vc2

L3 & L4 inductor current

15

Current (mA)

12.5 Zn,4 mA Zn,5 mA

10 7.5 5 2.5 0 −2.5 −5

0

20 L3 L4

40

60 Zn,1 u Time(us)

80

100

Transient Analysis

135

Stiff ODEs can be defined as a large disparity between absolute minimum and maximum values of the elements of the A matrix, i.e., very slow and very fast time constants in the circuit (the slow ones are “stiff”). This circuit is not stiff, but the pulse transformer model given earlier is, and the function rkfixed did not provide the correct output. For stiff circuits, use “Stiffb” as follows: initialize and form the {N N+1} Jacobian array function J(t,x) using the elements from the A matrix: 0 0 x := 0 0

0 0 J ( t, x ) : = 0 0

A1,1

A1,2

A1,3

A 2,1

A 2 ,2

A 2,3

A 3,1

A 3,2

A 3,3

A 4 ,1

A 4 ,2

A 4 ,3

A1,4 A 2,4 A 3,4 A 4 ,4

Call the function: Z := Stiffb(x, 0, T, kmax, D, J) Same output: Compare these step input waveforms with the plots in Section 6.6. C1 & C2 voltage waveforms

1.2

Volts

0.8 0.4

Zn,2 5 . Zn,3

0 −0.4 −0.8 0

20

40

60

80

100

Zn,1 u Time(us)

6.8 A MATHEMATICAL PULSE WIDTH MODULATOR (PWM) us := 10–6

KHz := 103

This PWM will be used as the switching function for the power supply presented in Section 6.9.

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

User inputs: Fsw := 50·KHz

Nper := 4 (number of periods)

Du := 0.5 (duty cycle)

Per :=

1 Fsw

Per = 20us

Nper ⋅ Per + 0.5 kmax : = floor ∆t

∆t := 0.1·us

kmax = 800

(1 − Du ) ⋅ kmax Du ⋅ kmax K2 : = floor + 0.5 K1 : = floor + 0.5 Nper Nper K1 = 100 K2 = 100 kper := K1 + K2 kper = 200 po : = c ← 1 p1 ← 1 for k ∈ 2..kmax p k ← 1 if k ≥ 1 + ( c − 1) ⋅ kper ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← 0.05 otherwise c ← c + 1 if k ≥ c ⋅ kper p k := 1..kmax PWM output 1 Switch on/oﬀ

136

pok

Du = 0.25

0.5 0

0

10

20

30

40 50 k . ∆t us Time(us)

60

70

80

Transient Analysis

137 PWM output

Switch on/oﬀ

1

pok

0.5 0

0

10

20

30

40 50 k ⋅ ∆t us Time(us)

60

70

80

Du = 0.5

6.9 SWITCHING POWER SUPPLY OUTPUT STAGE — BUCK REGULATOR This section analyses the turn-on (start-up) transient of a switched-mode power supply. us := 10–6 ms := 10–3

uF := 10–6 mV := 10–3

uH := 10–6 Meg := 106 3 KHz := 10

Sw1 represents the switch internal to the pulse width modulator (PWM). Sw2 represents the flywheel diode. When Sw1 is ON, Sw2 will be OFF, and vice versa. This section utilizes the Pulse Width Modulator (PWM) of Section 6.8. Ein

1

Sw1

2

V1

R1

V2

L1

1

R2

−

Sw2 2

V3 R3 V4

+ C1

R1 := 0.3 R2 := 0.085 R3 := 38 L1 := 20·uH U := 4 Y := 3

C1 := 47·uF

User inputs:

Fsw := 50·KHz

Nper := 20

Du := 0.5 (50% duty cycle)

Per :=

1 Fsw

Per = 20us

138

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

∆t = 1·us

Nper ⋅ Per kmax : = floor + 0.5 ∆t

kmax = 400

Ein := (99

1)

(1 − Du ) ⋅ kmax K1 := floor + 0 Nper

Du ⋅ kmax K2 : = floor + 0.5 Nper kper := K1 + K2 Switch ON/OFF resistances: Q1on := 1

Q1off := 10·Meg

99 1 RR := 1 3 3

1

EE := 0

0 2 4 0

Q1on Q 2 off R1 R 2 R 3

Q2on := 1

CC := (4

0

Q2off := 10·Meg

C1)

LL := (2

3

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A

B := B

Don := D

Eon := E

Change switch positions: RR1,3 := Q1off

RR2,3 := Q2on

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A

Boff := B

Doff := D

Eoff := E

Ein := 15

L1)

Transient Analysis

139

Vo : = c ← 1 0 Vc1 ← 0 Vo1 ← 0 p1 ← 1 for k ∈ 2..kmax p k ← 5 if k ≥ kper ⋅ ( c − 1) + 1 ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← 0 otherwise c ← c + 1 if k ≥ c ⋅ kper if p k = 5 Vc k ← Aon ⋅ Vc k −1 ⋅ ∆t + Bon ⋅ Ein ⋅ ∆t + Vc k −1 Vo k ← Don ⋅ Vc k + Eon ⋅ Ein if p k = 0 Vc k ← Aoff ⋅ Vc k −1 ⋅ ∆t + Boff ⋅ Ein ⋅ ∆t + Vc k −1 Vo k ← Doff ⋅ Vc k + Eoff ⋅ Ein Vo p Pulse height is set to 5 V, see on the following plot. K := 1..kmax

M1 := Ein·Du

M1 = 7.5

Theoretical output = M1 = input times duty cycle.

140

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad 10 M1

|(Vo1)k| (Vo2)k

5

0

0

50

100

150

200 k . ∆t us

250

300

350

400

M3 := 7.42 M2 := 7.08 Ripple amplitude M3 – M2 = 340 mV 7.5

|(Vo1)k| (Vo2)k

M3

7.25 M2 7 300

320

340

360

380

400

k ⋅∆t us

6.10 STATE SPACE AVERAGING State Space Averaging was developed by Dr. R.D. Middlebrook of the California Institute of Technology in the early 1980’s. The concept itself is not difficult, but in those days the difficult part was the amount of algebra one had to resort to in obtaining the state space arrays. (See Section 1.1.1., Introduction, and Section 2.2). The NDS method now provides a painless method of obtaining the state space arrays, A, B, D, & E, greatly simplifying the process of State Space Averaging, as will be seen in this section. uF := 10–6 mV := 10–3 C1 := 47·uF

uH := 10–6 Meg := 106 us := 10–6 V := 1 R1 := 0.3 R2 := 0.085 L1 := 430·uH U := 6 Y := 6

V99 1

2

V1

Ein1 Sw1

Vs

R1

V2

+ −

+

V98

L1

V6

1 R2

Sw2 Ein2

V4

ms := 10–3 R3 := 38

V3

2

C1

−

− +

+

Vf

R3 V5

Transient Analysis

141

User inputs: 15 1

99 Ein := 98

Du := 0.63

Switch ON/OFF resistances: Q1on := 0.001 99 2 RR := 2 6 6 GG := 0

Q1off := 10·Meg

1 3 4 5 0

Q1on Q 2 off R1 R 2 R 3

Vs := 0.1

Q2on := 0.001

CC := (5

0

C1)

1 EE := 3

Vf := 0.7

Q2off := 10·Meg

LL := (4

2 0

98 0

0 98

6

L1)

Vs Vf

Vs is switch drop (e.g., Vcesat) Vf is diode forward drop. → Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A

Bon := B

Don := D

Eon := E

Change switch positions: RR1,3 := Q1off

RR2,3 := Q2on

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A

Boff := B

Doff := D

Eoff := E

Averaging the arrays with duty cycle Du: A := Du·Aon + (1 – Du)·Aoff D := Du·Don + (1 – Du)·Doff

B := Du·Bon + (1 – Du)·Boff E := Du·Eon + (1 – Du)·Eoff

Multiplying the state space arrays by the duty cycle (Du) and (1 – Du) as above, is the essence of the State Space Averaging concept. DC Analysis

X := –A–1·B

9.06 X= 0.24

vC1 i L1

Vodc := D·X

Vodc = 9.056V

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Theoretical no-loss output: Vt := Ein1,2·Du

Vt = 9.45V

AC Analysis BF := 2

ND := 2

i −1 PD Voi := db(cvi) L i := BF +

PD := 40

i := 1..ND·PD + 1

s := 2 ⋅ π ⋅ 10 L ⋅ −1

cvi := D·(si·I – A)–1·B + E

M3 := db(Vodc) DC & AC buck converter output y/u

40 30

M3

20 dBV

142

Voi

10 0 −10 −20

2

2.5

3 Li

3.5

4

Log freq(Hz)

Compare results with conventional state space methods [1] [2]: R2 W := −R 3 Ein1,2 u : = Vs Vf

B1 := C·S1·U B2 := C·S2·u

1 1

−1 Q := 0

C1 P := 0 15 u = 0.1 0.7

0 L1

− R1 − ( R1 + R 3)

1 S1 := 1

C := (W·P)–1

0 S2 := 0

0 0

−1 −1

A1 := C·C

−1 −1

A2 := A1

Compare arrays from conventional and NDS methods:

0 0

Transient Analysis

143

As := Du·A1 + (1 – Du)·A2 −558.66 As = −2320.39

Bs := Du·B1 + (1 – Du)·B2 −558.66 A= −2320.39

21229.11 −894.91

1.04 × 10 −12 Bs = 21227.91

21229.11 −897.23

0 B= 21227.91

6.11 SIMPLE TRIANGULAR WAVEFORM GENERATOR This section shows the implementation of a simple triangular wave generator that can be used as an input for transient analysis of other circuits. This analysis uses the PWM given in Section 6.8. K := 103

uF := 10–6

us := 10–6

Meg := 106

ms := 10–3

Hz := 1

C1 V2 Ein1

Ein2

2 2

1

V1 R1

11 2 − V−

1

3 +

V3 1

V+ 4

R1 := 10·K C1 := 0.05·uF U := 3 Y := 3 CC := (2 GG := 0 EE := (3 0 0 2 106) LL := 0

3

C1)

Switch is a SPDT CMOS type.

Fsw := 500·Hz ∆t := 5·us 99 Ein := 98

Du := 0.5

Nper := 5

Per :=

Nper ⋅ Per kmax : = floor + 0.5 ∆t 1 −1

1 Fsw

Per = 2ms

kmax = 2000

Du ⋅ kmax K2 : = floor + 0.5 Nper

(1 − Du ) ⋅ kmax K1 := floor + 0 Nper

kper := K1 + K2

Switch ON/OFF resistances: Q1on := 50

Q1off := 10·Meg

kmax·∆t = 10 ms

Einampl := 5

144

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 RR := 99 98

2 1 1

R1 Q1on Q1off

→ Reference:C:\mcadckts\CanL11\comm42.mcd Aon := A

Bon := B

Don := D

Eon := E

Bon = (1990)

Change switch positions: RR2,3 := Q1off

RR3,3 := Q1on

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A

Boff := B

Doff := D

Eoff := E

Boff = (–1990)

Vo : = c ← 1 Vc1 ← 0 Vo1 ← 0 p1 ← 1 Hi ← 4.8 Lo ← 0.2 for k ∈ 2..kmaax p k ← Hi if k ≥ kper ⋅ ( c − 1) + 1 ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← Lo otherwise c ← c + 1 if k ≥ c ⋅ kper Vc k ← Aon ⋅ Vc k −1 ⋅ ∆t + Bon ⋅ Einampl ⋅ ∆t + Vc k −1 if p k = Hi Vc k ← Aoff ⋅ Vc k −1 ⋅ ∆t + Boff ⋅ Einampl ⋅ ∆t + Vc k −1 if p k = Lo Vc p k := 1..kmax (switch position shown for reference)

Transient Analysis

145 Output at node Y

Volts

10 |(Vo1)k|

5

(Vo2)k

0

1

0

2

3

4

5 6 . k ∆t ms Time(ms)

7

8

9

10

6.12 QUADRATURE OSCILLATOR This section shows how the NDS transient analysis method can be used to analyze oscillators. Since there is no independent inputs in oscillator circuits, we must provide non-zero initial voltage conditions on the capacitors. This is illustrated below. K := 103

Hz := 1

nF := 10–9

us := 10–6

ms := 10–3

C1 R1 V1

2 − 3 +

11 V−

V2 1

V+ 4

R2 V3

3

C2

2 R3

V5

+ −

4 V+

1

V− 11

V4 C3

V4

R1 := 10·K

R2 := R1

4 Y := 4 RR := 2 0

C3 := C1

U := 5

Ao := 106

GG := 0

2 EE := 4

0 0

R3 := R1

0 3

LL := 0 1 5

Ao Ao

C1 := 1 3 5

Ein := (99

100 ⋅ nF 2⋅π R1 R 2 R 3

C2 := C1 1 CC := 3 4

2 0 5

C1 C2 C 3

0) Ein is a dummy variable here.

146

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\mcadckts\CaNL11\comm42.mcd 0 B = 0 0

D = (0

1

1)

E = (0)

Because there is no independent input, B is a null array. tau1 : =

1 max ( A )

V11 1 V21 : = 1 V3 1 1

tau 2 : =

1 min ( A )

159.16 tau = us 159.15

Initial capacitor voltages = 1 V.

∆t := 5·us

kmax := 500

V1k V1k −1 V1k −1 V2 k : = A ⋅ V2 k −1 ⋅ ∆t + B ⋅ ∆t + V2 k −1 V3 V3 V3 k k −1 k −1

k := 2..kmax

V1k Vo k := D ⋅ V2 k V3 k

Per := kmax·∆t

Per = 2.5 ms

Capacitor voltages 4

Volts

V1k V2k V3k

2 0 −2 −4

0

500

V1 V2 V3

1000

1500 k ⋅ ∆t us Time(us)

2000

2500

Transient Analysis

147

All values are initialized at 1 V as before. M1 := 690

M2 := 1690

F := M2 – M1

F = 1000Hz

Output at node Y 5

Volts

M1 Vok

M2

0

−5

0

500

1000

1500

2000

2500

k⋅ ∆t us Time(us)

Verification of A matrix using algebraic method

1 W := 0 0

0 1 0

0 0 1

0 −1 Q := R2 0

1 R1 −1 R2 1 R3

1 R1 0 0

C1 P := diag C2 C 3

As := (W·P)–1·Q 0 As = −6283.185 0 −0.006 A = −6283.179 0 eigenvals ( A ) Le := 2⋅π

6283.185 −6283.185 6283.185 6283.179 −6283.185 6283.179

6283.185 0 0 6283.179 0 −0.006

−0 + 1000 i Le = −0 − 1000 i −1000

|Le1| = 1000

Eigenvalues indicate the frequency of oscillation (triple pole at 1000 Hz).

148

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

6.13 WEIN BRIDGE OSCILLATOR This section shows one more example of oscillator transient analysis using the NDS method. K := 103

nF := 10–9

KHz := 103

us := 10–6

R5

R6

V1

11 2 − V− + V+

3 V2

C4 := 10·nF

EE := (4

0

R6 := 20·K R1 :=

2

1

V3 R1

R2

ms := 10–3

1 2 ⋅ π ⋅ fo ⋅ C 3

106)

4

C3

C4

R5 := 10·K

V4 1

fo := 10·KHz C3 := 10·nF

R2 := R1

1 4 RR := 4 2

LL := 00

GG := 0

R 5 R 6 R1 R 2

0 1 3 0

3 2 C 3 CC := U := 4 Y := 4 2 0 C 4 (Ein is a dummy variable) Ein := (99 0) → Reference:C:\mcadckts\CaNL11\comm42.mcd −62831.9 A= −62831.9

125663.1 62831.3

0 B= 0

D = (0

3) E = (0)

No independent input, B = 0. ∆t := 0.01·us Per := 500·us

kmax :=

Per ∆t

kmax = 50000

k := 2..kmax There is no independent input; hence, an initial condition voltage to start the oscillation must be given to one or both capacitors.

Transient Analysis

V11 := (1

149

1)T

V1k := A·V1k–1·∆t + V1k–1 1 = 100 us 10 ⋅ KHz

Vok := D·V1k

Volts

Output at node Y

Vok

4 3 2 1 0 −1 −2 −3 −4

0

50

100

150

200

250

300

350

400

450

500

k⋅ ∆t us Time(us)

Verification of A matrix (assumes ideal opamp):

1 W := R1

−1 0

0 Q := −1

1 R2 R6 R5

C3 P := diag C 4

As := (W·P)–1·Q −62831.9 As = −62831.9

125663.7 62831.9

−62831.9 A= −62831.9

125663.1 62831.3

The oscillation frequency is the geometric mean of the two eigenvalues:

Le := eigevals(A)

−0.283 + 62831.853i Le = −0.283 − 62831.853i

fo :=

Le1 ⋅ Le 2 2⋅π

fl = 10KHz

REFERENCES 1. R.D. Middlebrook, et al., Using Small Computers to Model and Measure Magnitude and Phase of Regulator Transfer Functions and Loop Gain, Advances in SwitchedMode Power Conversion, Vols I & II, TESLACo, 1983. 2. R. Boyd, State Space Averaging with a Pocket Calculator, Proceedings of High Frequency Power Conversion Conference, Santa Clara, CA, 1990, p. 283.

This page intentionally left blank

7

DC Circuit Analysis

DC analysis has been demonstrated in the introductory RCL circuit (see Section 2.1). What follows are DC analyses that will further illustrate how to use the NDS method.

7.1 RESISTANCE TEMPERATURE DETECTOR (RTD) CIRCUIT R8 Eref

V6

R9

11 2 − V− 3 +

Eref

V7

R2

R1

V+

1 4

R3

V1 R4 V3 RT V2 R5 R6

V4

11 2 − V− 3 +

V5 1

V+ 4

R7

Eref

R1 := 4.53 R2 := 34.8 R3 := 132 R4 := 9.09 R7 := 27.4 R8 := 20 R9 := 20 RT := 1.915 Eref := 5

R5 := 9.09

R6 := 4.53

Values in kohms: Opamp open loop gain: Ao := 106 RTD value (RT) varies from 1 K (Vo is approximately –5 V at 0°C) to 2 K (Vo is approximately +5 V at +260°C).

151

152

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

7 99 3 1 2 RR := 99 4 99 6 1 U := 7

R1 R2 R 3 R 4 R5 R6 R 7 R8 R9 RT

1 3 5 3 4 2 0 6 7 2

Y := 5

7 EE := 5

GG := 0

0 0

Ein := (99

0 4

Ao Ao

6 3

Eref)

Note: For DC analysis, CC and LL component arrays are not required. Hence, only six inputs, RR, EE, U, Y, GG, and Ein, are now required for the subprogram dccomm42.mcd. Get A1 and B2 DC arrays, and solve for node voltages Vn. → Reference:C:\mcadckts\CaNL11\comm42.mcd Vn :=1solve(A1, B2) V1

(

Vn T = −0.535

V2

V3

1.07

0.803

Vo = 4.326

Vo := VnY

V4

V5

V6

V7

0.803

4.326

5 × 10 −6

−5

)

Y=5

Note that nodes V3 (Vn3) and V4 (Vn4) are equal owing to the opamp, and that node V6 is approximately zero as expected.

7.2 AN UNDERGRADUATE EE TEXTBOOK PROBLEM Unit suffixes: V := 1

Amps := 1

All four types of controlled sources: VCVS, CCVS, CCCS, VCCS. R7

EE1

Ein

V1

+ −

V2

EE2

V3

+ −

V4 R3

V6

R4 R5

+

GG1

+

−

−

R6

R1 := 2 R7 := 1

R2

V5

R2 := 2 R3 := 4 Ein := (99 24.5)

R4 := 3

R5 := 6

R6 := 2

GG2

R1

DC Circuit Analysis

153

The controlled source equations are as follows:

EE1 = (VCVS)

EE2 = 8.la (CCVS)

Ia =

V6 R1

GG1 := 6.la (CCCS)

GG2 = 2·V6 (VCCS)

7.2.1 MATRIX SOLUTION TO DEMONSTRATE NDS METHOD

THE

UTILITY

OF THE

Igg1 is the current of GG1, Igg2 is GG2 current. Note column headers for A. V1

1 R5 A :=

+

1 R6

V2 +

1

1

R7

R4

V3 −

1 R4

−1

−1

1

R5

R4

R4

0

0

0

+ +

V4 1

R5

0

1 0

0

1

−1 R3

1

−1

−1

R3

R3

R1

0

0

0

0

1

1

−1

0

R3

0

1

0

−1

0

0

0

0

−

Igg1 Igg 2

0

1

R2 0

V6

R5

0

0

0

V5

1 + R1

0

R2 1

−8

0

0

R1

0

−3

9

−6

1

R1 0

Ein1,2 R7 0 0 B := 0 0 0 0 0 V1 Vn T = (14.50

0

0

0

0

−2

0

Vn := 1solve(A, B)

V2

V3

V4

V5

V6

13.00

8.00

6.00

1.00

0.50

Igg1 1.50

Igg 2 1.00 )

0 −1 0 0 0 0 1 0

154

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Using the NDS method: 1 EE := 3

2

6

0

4

6

0

6 5 4 RR := 2 1 1 99

3 8 R1

R1 R2 R 3 R 4 R5 R6 R 7

0 6 5 3 3 0 1

3 GG := 5

0

6

0

0

6

0

6 R1 2

U := 6

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Vdc := 1solve(A1, B2) V1 VDC T = (14.5 Igg1 := Vdc7

V2

V3

V4

V5

13.0

8.0

6.0

1.0

Igg2 := Vdc8

V6

Igg1 Igg 2

0.5

Igg1 = 1.5 Amps

1.0 )

1.5

Igg2 = 1 Amps

7.3 DC TEST CIRCUIT This section exercised the NDS method using a DC circuit with multiple inputs and four VCVS’s and three VCCS’s embedded in a resistive network. The solutions are then compared to a SPICE simulation. K := 103

mA := 10–3 R12

V10 R15 V11

Ein4 (96) GG3

EE4 + −

R1 Ein1 (99)

Ein3 (97)

−

R2

V2

− +

EE3

R13

V14 +

V1

V4 R6

R17

R16

V13

R5

V5

− +

R9

R7

V12

GG1 V3 R3

GG2

V6 + −

EE2

R4

V9 +

Ein2 (98)

−

V7 R11 V8 EE1

+ −

R14

DC Circuit Analysis

155

R1 := 1·K R2 := R1 R3 := R1 R4 := R1 R5 := R1 R6 := R1 R7 := R1 R9 := R1 R11 := R1 R12 := R1 R13 := R1 R14 := R1

R15 := R1

R16 := R1 U := 14

99 2 3 9 5 4 3 RR := 2 7 96 4 12 10 13 5

1 3 9 98 4 97 0 6 8 10 12 0 11 0 14

R1 R2 R3 R 4 R5 R6 R7 R9 R111 R12 R13 R14 R15 R16 R17

14 GG : = 7 13

3 9 10

12 3 96

R17 := R1

8 6 EE := 2 5

0 0 0

0 0 1 11

0.02 0.04 0.01

→ Reference:C:\mcadckts\CaNL11\comm42.mcd Vn := 1solve(A1,B2) p := 1..U Vndsp := Vnp See SPICE listing in the following section.

99 98 EIN := 97 96

4 3 12 4

0 4 4 0

5 −3 8 13

10 2 4 −2

156

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

NDS 2.8613 −9.2842 −2.8539 6.0727 7.1818 −17.8532 174.8829 Vnds p = 60.7273 −60.0048 81.1636 19.3273 3.0364 −130.0000 −53.5455

SPICE 2.8613 −92842 −28539 6.0727 7.1818 −17.8530 174.8800 Vsp : = 60.7270 −60.0050 81.1640 19.3270 3.0364 −130.0000 −53.5450

Vnds −1 pce := Vsp

Percent error −0.001 −0 −0 0 0 0.001 0.002 pce = 0 −0 −0 0.001 −0.001 0 0.001 The last three entries (not shown) in Vn are the currents through GG1, GG2, and GG3, respectively. Igg1 := Vn15 Igg2 := Vn16 Igg3 := Vn17

Igg1 = 60.73 mA Igg2 = –114.16 mA Igg3 = 130 mA

DC Circuit Analysis

SPICE Comparison Testdc4a VEin1 99 0 DC 5 VEin2 98 0 DC -3 VEin3 97 0 DC 8 VEin4 96 0 DC 13 R1 99 1 1K R2 2 3 1K R3 3 9 1K R4 9 98 1K R5 5 4 1K R6 4 97 1K R7 3 0 1K R9 2 6 1K R11 7 8 1K R12 96 10 1K R13 4 12 1K R14 12 0 1K R15 10 11 1K R16 13 0 1K R17 5 14 1K * EE1 8 0 4 0 10 EE2 6 0 3 4 2 EE3 2 1 12 4 4 EE4 5 11 4 0 -2 * GG1 14 3 12 0 0.02 GG2 7 9 3 0 0.04 GG3 13 10 96 0 0.01 *

157

158

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

.OPTIONS NOMOD NOPAGE NOECHO .END **** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE (1) 2.8613 (2) -9.2842 (3) -2.8539 (4) 6.0727 (5)

7.1818

(6)

-17.8530

(9)

-60.0050

(10)

81.1640

(11)

(13) -130.0000

(14)

-53.5450

(96)

(98)

(99)

5.0000

-3.0000

(7) 174.8800

(8)

60.7270

19.3270

(12)

3.0364

13.0000

(97)

8.0000

VOLTAGE SOURCE CURRENTS NAME

CURRENT

VEin1

-2.139E-03

VEin2

-5.700E-02

VEin3

-1.927E-03

VEin4

6.816E-02

7.4 STACKING VCVS’s AND PARALLELING VCCS’s This DC circuit shows that VCCS’s can be paralleled and VCVS’s can be connected in series (stacked). K := 103

mA := 10–3 R1 Ein1

V1 + −

GG2

R2

V2

Ein2

GG1 R4 −

+

R5 V3

+ −

V4

+ −

R1 := 1·K

R2 := R1

R3 := R1

R3

R4 := R1

EE1 EE2

R5 := R1

U := 4

DC Circuit Analysis

99 1 RR := 2 1 2 1 GG : 1

0 0

159

1 2 98 0 3 2 3

0 0

R1 R2 R 3 R 4 R 5 0.1 0.2

3 EE : = 4

4 0

2 1

0 0

2 3

99 Ein : 98

2 −3

→ Reference:C:\mcadckts\CaNL11\comm42.mcd

Vn := A1–1·B2

0.5768 −06930 0.3444 Vn = 1.7303 −0.0693 0.0689

Igg1 is the current in GG1, and Igg2, the current in GG2. Igg1 := Vn5

Igg2 := Vn6

−69.30 Igg = mA 68.87

7.5 DC VOLTAGE SWEEP (RTD CIRCUIT) For the schematic and component values, see Section 7.1. (Get circuit data from Section 7.1.) → Reference:C:\mcadckts\CaNL11\dctrd.mcd Ein := (99 1) Reset Ein to 1 V for new inputs u: → Reference:C:\mcadckts\CaNL11\comm42.mcd Sweep the DC input (always initialized at 1 V as mentioned earlier) from 4.8 V to 5.2 V in 0.1V increments:

160

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

u : = for j ∈1..5 u1, j ← 4.7 +

j 10

u Vn := A1–1·B2·u

k := 1..cols(u)

Display node Y: Y=5 Input 4.8 4.9 u T = 5.0 5.1 5.2 Output

Vn Y,k

4.153 4.239 = 4.326 4.412 4.499

Nominal value of u is 5.0 V Display for all U nodes: u = (4.8

4.9

5.0

−0.514 1.027 0.771 Vn = 0.771 4.153 −6 4.9 × 10 −4.8

5.1

5.2)

−0.525 1.048 0.787 0.787 4.239 4.9 × 10 −6 −4.9

−0.535 1.07 0.803 0.803 4.326 5 × 10 −6 −5

−0.546 1.091 0.819 0.819 4.412 5.1 × 10 −6 −5.1

−0.557 1.113 0.835 0.835 4.499 5.2 × 10 −66 −5.2

DC Circuit Analysis

161

7.6 RTD CIRCUIT — STEP RESISTOR VALUE R8

R9

V6

Eref

11 2 − V− 3 +

Eref

V7

R2

R1

V+

1 4

R3

V1 R4 V3 RT V2 R5 R6

V4

11 2 − V− 3 +

V5 1

V+ 4

R7

Eref

R1 := 4.53 R6 := 4.53

R2 := 34.8 R7 := 27.4

R3 := 132 R4 := 9.09 R5 := 27.4 R8 := 20 R9 := 20 RT := 1.915

Values in kohms: RTD value (RT) varies from 1 K (Vo is approximately –5 V at 0°C) to 2 K (Vo is approximately +5 V at +260°C). 7 99 3 1 2 RR := 99 4 99 6 1

1 3 5 3 4 2 0 6 7 2

R1 R2 R 3 R 4 R5 R6 R 7 R8 R9 RT

Ao := 106

7 EE := 5

0 0

0 4

6 3

U := 7 Y := 5 GG := 0 Ein := (99 5) Get A1 and B2 DC arrays, and solve for node voltages Vn. → Reference:C:\mcadckts\CaNL11\comm42.mcd vn := 1solve(A1, B2)

Vo := VnY

Vo = 4.326

Now, sweep RT value from 1 K to 2 K in 0.1 K increments. RT := (1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2)T

Ao Ao

162

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Ndc := rows(RT)

k := 1..Ndc

Vn ( U, EE, GG, RR, Ein ) : = for k ∈1..Ndc RR10,3 ← RTk AE ← G ( U, EE, GG, RR, Ein ) A1 ← AE1 B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v5 k ← ( vn k )5 vr The line RR10,3 ← RTk loads new values of RT into the RR array. For the line AE ← G(U, EE, GG, RR, Ein); the G function is from the dccomm42.mcd subprogram. Plot: V5 := Vn(U, EE, GG, RR, Ein) Check linearity with straight line equation:

V5k yk

5 3.75 2.5 1.25 0 −1.25 −2.5 −3.75 −5

RTD Ckt linearity

Linearity delta

0.3 0.2 Volts DC

Volts DC

yk := 10(RTk – 1) – 5

yk − V5k

0.1 0 −0.1 −0.2

1

1.2 1.4 1.6 1.8 RTk RT (K Ohms)

2

−0.3

1

1.2 1.4 1.6 1.8 RTk RT (K Ohms)

The maximum linearity temperature error is 260 ⋅ deg C maxerr : = 0.3 ⋅ V ⋅ 10 ⋅ V

maxerr = 7.8 degC

2

DC Circuit Analysis

163

We can step two resistor values simultaneously as shown here: Step R4 and R5 from 8K to 10K in 0.2 K increments: Ra := (8

8.2

8.4

8.6

Ndc := rows(Ra)

8.8

9

9.2

k := 1..Ndc

9.4

9.6

9.8

10)T

(Ra in kohms)

Vn ( U, EE, GG, RR, Ein ) : = for k ∈1..Ndc RR 4 ,3 ← Ra k RR 5,,3 ← Ra k AE ← G ( U, EE, GG, RR, Ein ) A1 ← AE1 B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v5 k ← ( vn k )5 v5 Plot: V5 := Vn(U, EE, GG, RR, Ein) Marker for nominal values: M1 := 9.09

M2 := 4.326 V5 vs. R4 & R5

8

Volts DC

M1 6 V5k

M2 4

2

8

8.5

9 9.5 Rak R4, R5 (K Ohms)

10

164

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

7.7 FLOATING 5-V INPUT SOURCE K :=103 At times it may be desired to have an input voltage source floating. The restriction of all Ein inputs being single-ended can be overcome as shown. R1

V6 +

V1

R4

V2

EE1

11 2 − V−

R2

−

V7 R3

+ −

R6

V4

V3

V99

R5

3 +

V5 1

V+ 4

R7

Ein

R1 := 1·K R2 := 20 R3 := 1·K R4 := 20·K R5 := 200·K R6 := 20·K R7 := 200·K Ao := 106 U := 7 Y := 5 6 1 7 RR := 1 2 3 4

1 3 3 2 5 4 0

R1 R2 R 3 R 4 R5 R6 R 7

6 EE := 5

7 0

99 4

GG := 0

0 2

Ein := (99

1)

5 Ao

→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := 1solve(A1, B2) VT = (–0.223 –0.247

–0.272

–0.247

Input voltage: V6 – V7 = 5

Vo := VY

Vo = –0.495

–0.495

2.253

–2.747)

DC Circuit Analysis

165

Matrix solution: 1 1 1 R1 + R 3 + R 2 + R 4 −1 R4 Am := 1 1 − + R 2 R1 + R 3 0 0

−1

1 1 + R 2 R1 + R 3

−

R4 1 R4

+ 0

1

0

R5 1 R1 + R 3

0 Ao

+

1 R2

+

0

Vm := 1solve(Am, Bm)

−1

0

R5

1

−1

R6

R6

0

−1 R6 0

1 1 + R6 R 7 − Ao

5 R1 + R 3 0 Bm := −5 R1 + R 3 0 0 −0.223 −0.247 Vm = −0.272 −0.247 −0.495

0

Vo := Vm5

Vo = –0.495

0 1

This page intentionally left blank

8

Three-Phase Circuits

8.1 CONVERT ∆ FLOATING VOLTAGE INPUTS TO SINGLE-ENDED Y INPUTS Circuits with single-ended inputs are easier to solve than those with floating inputs. Setup: pr(E, θ) := E·(cos(θ) + i·sin(θ)) 180 (convert radians to degrees) π mp(x) := (|x| rd·arg(x)) (get magnitude and phase) Line-to-line voltages are (in polar form): (convert polar to rectangular) rd :=

A – B = 115<0 B – C = 115<–120 C – A = 115<120 (counterclockwise phase rotation ABC) Convert from polar form to rectangular form: EAB := pr(115, 0) EBC := pr(115, –120·deg) ECA := pr(115, 120·deg) EAB := 115 EBC := –57.5 – 99.59i ECA := –57.5 + 99.59i Find an equivalent phasor pair, i.e., line-to-neutral equivalent to line-to-line: 1 Am := 0 −1

−1 1 0

0 0 1

E AB Bm := E BC E CA

Cm := 1solve(Am, Bm)

57.5 – 99.59 i Cm = −57.5 – 99.59 i −0 EA := Cm1 EB := Cm2 EC := Cm3 mp(EA) = (115 – 60) mp(EB) = (115 – 120) |EA – EB| = 115 arg(EA – EB) = 0deg Hence equal to |EAB| = 115 arg(EAB) = 0deg A |EB – EC| = 115 arg(EB – EC) = –120deg Hence equal to |EBC| = 115 arg(EBC) = –120deg B 167

168

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

|EC – EA| = 115 arg(EC – EA) = 120deg arg(ECA) = 120deg C

Hence equal to |ECA| = 115

and, thus, equivalent as seen by the load. Subsequent circuit examples will verify this. A second equivalent phasor pair is obtained from: 1 Am := 0 −1

0 1 0

0 −1 1

E AB Bm := E BC E CA

Cm := 1solve(Am, Bm)

115 Cm : −5.68 × 10 −14 57.5 + 99.59 i EA := Cm1 EB := Cm2 EC := Cm3 mp(EA) = (115 0) mp(EC) = (115 60) |EA – EB| = 115 arg(EA – EB) = 0deg Hence equal to |EAB| = 115 arg(EAB) = 0deg A |EB – EC| = 115 arg(EB – EC) = –120deg Hence equal to |EBC| = 115 arg(EBC) = –120deg B |EC – EA| = 115 arg(EC – EA) = 120deg Hence equal to |ECA| = 115 arg(ECA) = 120deg C A third equivalent phasor pair is: 1 Am := 0 0

−1 1 0

0 −1 1

E AB Bm := E BC E CA

Cm := 1solve(Am, Bm)

−0 Cm : = −115 −57.5 + 99.593i EA := Cm1 EB := Cm2 EC := Cm3 mp(EB) = (115 180) mp(EC) = (115 120) |EA – EB| = 115 arg(EA – EB) = 0deg Hence equal to |EAB| = 115 arg(EAB) = 0deg A |EB – EC| = 115 arg(EB – EC) = –120deg Hence equal to |EBC| = 115 arg(EBC) = –120deg B |EC – EA| = 115 arg(EC – EA) = 120deg Hence equal to |ECA| = 115 arg(ECA) = 120deg C

Three-Phase Circuits

169 Phasor pair A & B 90 120 150 60 100

150

30

50 180

0

0

210

330 240

270

300

A B

Phasor pair A & C 90 60 120 150 100

150

30

50 180

0

0

210

330 240

270

300

A C

Phasor pair B & C 90 120 60 150 100

150

30

50 180

0

0

330

210 240 B C

270

300

170

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

8.2 THREE-PHASE NDS SOLUTION 8.2.1 UNBALANCED DELTA LOAD — SINGLE-ENDED INPUTS ON A AND B R5 EinA +

4

R1

−

R2

1 R6

3

C1

L2

5 C

−

R2 := 10

R3 := 15

6

R4 +

R1 := 12

C2

R3

2

EinB

R4 := 0.01

R5 := 0.01

R6 := 0.01

R4 to R6 are line impedances.

F := 60

rd :=

ω := 2·π·F

s := ω ⋅ −1

4 4 6 RR := 99 98 5

180 π

Y := (1

2

3

4

EE := 0

GG := 0

5

1 3 2 4 6 0 6)T

R1 R2 R 3 R 5 R4 R6

C1 :=

1 12 ⋅ ω

L2 :=

C1 C2

1 CC := 3

5 6

1 1

LL := (2

99 Ein := 98

→ Reference:C:\mcadckts\CaNL11\comm42m.mcd For three-phase circuits, comm42m.mcd must be used.

20 ω

0

U := 6

L2)

Three-Phase Circuits

rows( A) rows(B) rows(D) rows(E )

171

cols( A) 3 cols(B) 3 = cols(D) 6 cols(E ) 6

3 2 3 2

N N Format : K K

N M N M

K = number of outputs; M = number of inputs. Complex input at A and B: 3 ⋅i 0.5 − 2 u : = 208 ⋅ 3 ⋅ i −0.5 − 2 cv := D·(s·I – A)–1·B·u + E·u

−60 rd ⋅ arg ( u ) = −120

A B

Get magnitude (V) and phase (deg) when Y is a scalar (one output) or a column vector (multiple outputs): mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

1 2 3 mp = 4 5 6

146.9 166.3 207.8 207.8 0.1 207.8

−105 −83.1 −119.9 −60.1 −15.1 −119.9

magφ(x) := (|x| rd·arg(x)) (convert rectangular to polar form).

172

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The textbook given as Reference 1 answers using floating delta inputs: Iab :=

Ibc := Ica :=

cv4 − cv6 magφ(Iab) := (20.74 1 R2 + ω ⋅ C2 ⋅ i

0.01) Text answer: 20.8A/_0 deg.

cv6 − cv5 magφ(Ibc) := (8.32 – 173.09) Text answer: 8.32A/_–173.13 deg. R 3 + ω ⋅ L2 ⋅ i − cv4 magφ(Ica) := (12.25 164.93) Text answer: 12.26A/_165 deg. 1 R1 + ω ⋅ C1 ⋅ i

8.2.2 UNBALANCED DELTA LOAD — SINGLE-ENDED INPUTS ON A AND C R5 EinA +

4

R1

−

R2

1 EinC

C1 R6 5

+

R2 := 10

L2 B

−

R1 := 12

3

R3 := 15

R3

2

C2 6

R4

R4 := 0.01

R5 := 0.01

R6 := 0.01

R4 to R6 are line impedances

rd :=

180 π

C2 := 1000 EE := 0

L2 :=

20 ω

LL := (2

4 4 6 RR := 6 99 98 Y := (1

ω := 2·π·F

F := 60

2

1 3 2 0 4 5 3

U := 6 5

L2)

s := ω ⋅ −1 99 Ein := 98 GG := 0

R1 R2 R3 C1 1 5 CC := R4 3 6 C2 R 54 R6 4 5 6)T (column vector)

C1 := 1 1

1 12 ⋅ ω

Three-Phase Circuits

173

→ Reference:C:\mcadckts\CaNL11\comm42m.mcd For polyphase circuits, comm42m.mcd must be used. Subprogram comm42.mcd will not work. rows( A) rows(B) rows(D) rows(E )

cols( A) 3 cols(B) 3 = cols(D) 6 cols(E ) 6

3 2 3 2

N N Format : K K

N M N M

K = number of outputs; M = number of inputs. Complex input at A and C: 1 0 u : = 208 ⋅ rd ⋅ arg ( u ) = 3 ⋅ i 0.5 + 60 2 cv := D·(s·I – A)–1·B·u + E·u

A C

Get magnitude (V) and phase (deg) when Y is a scalar or a column vector: mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

1 2 3 mp = 4 5 6 magφ(x) := (|x| rd·arg(x))

76.1 125 0.3 207.7 208 0.3

30.2 6.9 2 0 60 2

(Convert rectangular to polar form.)

174

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The textbook given as Reference 1 answers using floating delta inputs: Iab :=

Ibc := Ica :=

cv4

magφ(Iab) := (20.77

1 R2 + ω ⋅ C2 ⋅ i

0.01) Text answer: 20.8A/_0 deg.

− cv5 magφ(Ibc) := (8.32 – 173.14) Text answer: 8.32A/_–173.13 deg. R 3 + ω ⋅ L2 ⋅ i cv5 − cv4 magφ(Ica) := (12.25 164.93) Text answer: 12.26A/_165 deg. 1 R1 + ω ⋅ C1 ⋅ i

8.3 THREE-PHASE Y — UNBALANCED LOAD Single-ended two-phase Y input at A and B. R5 EinA

V1

+

R1

−

V2

C1

R3 EinC = 0

V4

V3

R2

EinB

L1

R4

+

V5

−

F := 1000

ω := 2·π·F

s := ω·i R1 := 12

R4 := 0.01

R5 := 0.01

L1 :=

Y := (1

3

5)T

rd :=

2

99 1 RR := 3 4 98

1 2 0 3 5

4

R5 R1 R2 R 3 R 4

4 ω

C1 :=

180 π

CC := (2

dr :=

3

R2 := 20 1 ω ⋅ 16

R3 := 3

U := 5

1 rd

C1) LL := (4

5

L1)

Three-Phase Circuits

EE := 0

175

99 Ein := 98

GG := 0

1 1

pr(E,θ) := E·(cos(θ·dr) + i·sin(θ·dr)) (polar to rectangular conversion) magφ(x) := (|x| rd·arg(x)) (rectangular to polar conversion) 1 − 1.73205 ⋅ i u : = 100 ⋅ −1 − 1.73205 ⋅ i magφ(u2) = (200 –120)

magφ(u1) = (200

–60)

→ Reference:C:\mcadckts\CaNL11\comm42m.mcd rows( A) rows(B) rows(D) rows(E )

cols( A) 2 cols(B) 2 = cols(D) 5 cols(E ) 5 cv := D·(s·I – A)–1·B·u + E·u

2 2 2 2

N N Format : K K

N M N M

Get magnitude (V) and phase (deg) when Y is a scalar or a column vector: mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

Node Magnitude Phase 1 2 mp = 3 4 5

200 236.9 130.1 181.1 199.8

−60 −92.8 −137.6 −139.9 −120

176

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Im 1 : =

cv1 − cv2 magφ(Im1) = (10.696 R1

Im 2 : =

cv3 R2

magφ(Im2) = (6.506

29.55) –137.64)

cv4 − cv3 magφ(Im3) = (17.102 –145.611) R3 See SPICE comparison in the following text.

Im 3 : =

* SPICE Verification * Convert to single-ended Y input on A & B; C = 0 * Same load as 3phasewye2 with floating delta input * VEinA 99 0 AC 200V –60 VEinB 98 0 AC 200V –120 * R1 1 2 12 R2 3 0 20 R3 4 3 3 R4 98 5 0.01 R5 99 1 0.01 * C1 2 3 9.947UF L1 5 4 0.637MH * .AC LIN 1 1KH 1KH .PRINT AC IM(R1) IP(R1) .PRINT AC IM(R2) IP(R2) .PRINT AC IM(R3) IP(R3) .OPTIONS NOECHO NOPAGE NOMOD .END **** AC ANALYSIS TEMPERATURE = 27.000 DEG C

Three-Phase Circuits

FREQ

177

IM(R1)

IP(R1)

1.000E+03 1.070E+01 2.954E+01 FREQ

IM(R2)

IP(R2)

1.000E+03 6.506E+00 –1.377E+02 FREQ

IM(R3)

IP(R3)

1.000E+03 1.710E+01 -1.456E+02

8.4 THREE-PHASE Y-CONNECTED UNBALANCED LOAD — FLOATING DELTA INPUT Same load as in Section 8.3. V1

R5

R6

V8

+

+

+ EinAB

−

R2

−

+

1 16 ⋅ ω CC := (2 0 C1 :=

V3

EinBC

L1

V6

s := ω·i R1 := 12

R5 := 0.01 U := 9 C1)

R3

V5 +

R4 := 0.01

C1

R4

R7

ω := 2·π·F

EinCA

V4

V7

F := 1000

V2

V9 −

+

R1

R2 := 20

R6 := 0.01

R7 := 0.01

Y := (1

3

LL := (3

2 6

4

L1 :=

5)T

L1)

Note generator polarities.

rd :=

180 π

dr :=

1 rd

R3 := 3

(radians–degree conversions)

4 ω

178

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

8 1 4 RR := 3 5 9 7

1 2 0 0 4 1 6

R5 R1 R2 R 3 R4 R6 R 7

Floating generators: 8 EE := 6 4

7 5 9

99 98 97

0 0 0

1 1 1

99 Ein := 98 97

1 1 1

GG := 0

→ Reference:C:\mcadckts\CaNL11\comm42m.mcd rows( A) rows(B) rows(D) rows(E )

cols( A) 2 2 N N cols(B) 2 3 = Format : cols(D) 5 2 K K cols(E ) 5 3 K = number of outputs; M = number of inputs.

N M N M

pr(E,θ) := E·(cos(θ·dr) + i·sin(θ·dr)) (polar to rectangular conversion) magφ(x) := (|x| rd·arg(x)) (rectangular to polar conversion) u1 := pr(200,0)

u2 := pr(200,–120) u3 := pr(200,120)

Create ∆-connected inputs. 200 u = −100 − 173.205 i −100 + 173.205 i

cv := D·(s·I – A)–1·B·u + E·u

Three-Phase Circuits

179

Get magnitude (V) and phase (deg) when Y is a scalar or a column vector: mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

Node Magnitude Phase 1 2 mp = 3 4 5

214 171.2 51.3 130.2 130.3

−23.6 −60.4 −145.6 42.3 42.3

Current through R1: I 1m : =

cv1 − cv2 R1

Current through R2: I 2m : =

cv4 R2

I 3m : =

cv3 R3

Current through R3:

180

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Rectangular Form I1m = 9.307 + 5.281i I2m = 4.811 + 4.384i I3m = –14.118 – 9.665i Polar Form magφ(I1m) = (10.701 29.571) magφ(I2m) = (6.509 42.34) magφ(I3m) = (17.11 –145.606) SPICE solution is as follows: * SPICE Verification * Three phase floating delta input VEinAB 8 7 AC 200V 0; + *R21 6 1 1M VEinBC 6 5 AC 200V –120; + VEinCA 4 9 AC 200V 120; + * R1 1 2 12 R2 4 0 20 R3 3 0 3 R4 5 4 0.01 R5 8 1 0.01 R6 9 1 0.01 R7 7 6 0.01 * C1 2 0 9.947UF L1 3 6 0.637MH * .AC LIN 1 1KH 1KH .PRINT AC IM(R1) IP(R1) .PRINT AC IM(R2) IP(R2) .PRINT AC IM(R3) IP(R3) .OPTIONS NOECHO NOPAGE NOMOD

Three-Phase Circuits

181

.END **** AC ANALYSIS TEMPERATURE = 27.000 DEG C FREQ

IM(R1)

IP(R1)

1.000E+03 1.070E+01 2.956E+01 FREQ

IM(R2)

IP(R2)

1.000E+03 6.508E+00 4.233E+01 FREQ

IM(R3)

IP(R3)

1.000E+03 1.711E+01 -1.456E+02

8.5 BALANCED Y- LOAD This section illustrates the single-ended input method (on phase A and phase B inputs) with a balanced Y load. Answers are compared to a SPICE analysis of the same circuit. uF := 10–6

uH := 10–6

mH := 10–3

R7

Meg := 106

V1

EA

R1

C1

R2

R3

C2

L1 L3

R9 V5

V8

R5

3 L2 := L1 ω R5 := R4 R3 := R1 R10 := 1·Meg

R4

C3

V7

V6

R8

EB

L1 :=

V10 R10

R6

ω := 2·π·F

L2

V9

EC = 0

F := 60

V4

V3

V2

s := ω·i

C1 :=

L3 := L1 R2 := R4

Y := (1 2

3

4

1 ω⋅8

C2 := C1

C3 := C1

R1 := 6

R6 := R1

R4 := 4

R7 := 0.001

R8 := R7

R9 := R7

5

6)T

99 Ein := 98

1 1

U : = 10

182

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

rd :=

180 π

1 1 4 10 9 RR := 5 99 98 5 8

2 3 6 6 5 7 1 6 0 0

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10

R10 eliminates an all-inductive cutset at node V8. 1 CC := 2 6

4 5 7

C1 C2 C 3

3 LL := 8 8

8 10 9

L1 L 2 L 3

EE := 0

magφ(x) := (|x| rd·arg(x)) → Reference:C:\mcadckts\CaNL11\comm42m.mcd 3 0.5 − 2 ⋅ i u : = 200 ⋅ 3 i −0.5 − 2

EA magφ(u1) = (200

–60)

N N Format : K K

N M N M

EB

magφ(u2) = (200 –120) cv := D·(s·I – A)–1·B·u + E·u rows( A) rows(B) rows(D) rows(E )

cols( A) 6 cols(B) 6 = cols(D) 6 cols(E ) 6

6 2 6 2

GG := 0

Three-Phase Circuits

183

Get magnitude and phase (deg) when Y is a scalar or a column vector: mp : = if rows( Y) = 0 vo ← cv ph ← rd ⋅ arg ( cv) for k ∈1..rows( Y)

otherwise

vo k ← cvk ph k ← rd ⋅ arg ( cvk )

(Y

vo ph )

Node Magnitude Phase 1 2 3 mp = 4 5 6

200 160 108.9 82.1 0 200

−60 −96.9 −54.2 −109.9 −70.6 −120

Get currents: I 1m : =

cv1 − cv2 R1

I 2m : =

(Magnitude phase angle) magφ(I1m) = (19.99 magφ(I2m) = (23.09 magφ(I3m) = (19.99

–6.88) –66.88) 53.12)

cv1 − cv3 R2

I 3m : =

cv4 − cv6 R3

184

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

See the following SPICE comparisons for both single-ended Y and floating delta inputs. SPICE Y input SPICE Verification. * File:

Fig23_25p941y.cir

* Compare with Mathcad file Fig23_p941s.mcd * Delta-Wye Load * SINGLE ENDED Y INPUT VEA 99 0 AC 200 -60 VEB 98 0 AC 200 -120 * R7 99 1 0.001 ; ESR for input R8 98 6 0.001 R9 5 0 0.001 * R1 1 2 6 R2 1 3 4 R3 4 6 6 R4 6 10 4 R5 5 9 4 R6 5 7 6 R10 8 0 1MEG; Not required for SPICE. ICS compensated for internally. * C1 1 4 331.573UF C2 5 2 331.573UF C3 6 7 331.573UF * L1 3 8 7.958MH L2 10 8 7.958MH L3 9 8 7.958MH

Three-Phase Circuits

185

* .AC LIN 1 60 60 .PRINT AC IM(R1) IP(R1) .PRINT AC IM(R2) IP(R2) .PRINT AC IM(R3) IP(R3) .OPTIONS NOPAGE NOECHO NOMOD **** AC ANALYSIS TEMPERATURE = 27.000 DEG C FREQ 6.000E+01

IM(R1) 1.999E+01

FREQ 6.000E+01

IM(R2) 2.309E+01

FREQ 6.000E+01

IM(R3) 1.999E+01

IP(R1) -6.877E+00 IP(R2) -6.688E+01 IP(R3) 5.312E+01

SPICE ∆ Input SPICE Verification. * Compare with Mathcad file Fig23_p941s.mcd * DELTA INPUT VAB 100 98 AC 200 0; Floating Delta RS 100 99 0.001; ESR VBC 98 97 AC 200 -120; Floating Delta VCA 97 99 AC 200 +120; Floating Delta * R7 99 1 0.001 ; ESR for input R8 98 6 0.001 R9 97 5 0.001 * R1 1 2 6 R2 1 3 4 R3 4 6 6 R4 6 10 4 R5 5 9 4

186

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R6 5 7 6 R10 8 0 1MEG * C1 1 4 331.573UF C2 5 2 331.573UF C3 6 7 331.573UF * L1 3 8 7.958MH L2 10 8 7.958MH L3 9 8 7.958MH * .AC LIN 1 60 60 .PRINT AC IM(R1) IP(R1) .PRINT AC IM(R2) IP(R2) .PRINT AC IM(R3) IP(R3) .OPTIONS NOPAGE NOECHO NOMOD **** AC ANALYSIS TEMPERATURE = 27.000 DEG C FREQ 6.000E+01 FREQ 6.000E+01 FREQ 6.000E+01

IM(R1) 1.999E+01 IM(R2) 2.309E+01 IM(R3) 1.999E+01

IP(R1) -6.877E+00 IP(R2) -6.688E+01 IP(R3) 5.312E+01

REFERENCES 1. Boylestad, Introductory Circuit Analysis, 7th ed., Macmillan Publishing Co., New York, 1994, p. 946.

Appendix I BACKGROUND THEORY OF NDS METHOD The method evolves from writing the circuit equations after converting all capacitors to ideal 1 V voltage sources and inductors to ideal 1 A current sources. We begin with the passive RCL circuit used to introduce the method. Original circuit: L3 R1

C1

V1

V2

R2

V3

Ein R3

R4

C2

L4

Note that for those less mathematically inclined, this appendix may be skipped without loss of continuity. Converted circuit: I3 R1 Ein

V1

+

−

+

−

E1

V2

R2

V3 L4

E2 R4

R3

+ +

−

−

Remembering that these are now known sources with values 1 V and 1 A, we can write the circuit equations based on this configuration: The input voltage Ein is also known and is usually set to 1 V, but can have other values. These are DC equations; no AC or LaPlace equations in s are required. DC circuit equations: KCL at node V1 gives: (Ein – V1)·G1 = (V1 – V2)·G4 + I3 + iC1 iC1 is the unknown current through capacitor C1, now the voltage source E1.

187

188

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

The G’s are the conductances of the resistors R. This is done to make the arrays more compact. Rearranging all unknowns on the left-hand side and knowns on the right-hand side: V1·(G1 + G4) – V2·G4 + iC1 = Ein·G1 – I3 The ideal current source I3 has the known value of 1 A, but we will retain the reference designator temporarily for tutorial purposes. The same is done for I4 and for the 1 V values of E1 and E2. KCL at node V2 gives: (V1 – V2)·G4 + iC1 + I3 = (V2 – V3)·G2 Rearranging: –V1·G4 + V2·(G2 + G4) – V3·G2 – iC1 = 13 KCL at node V3 gives: (V2 – V3)·G2 = V3·G3 + iC2 + I4 = 0 Rearranging: –V2·G2 + V3·(G2 + G3) + iC2 = –I4 V1 – V2 = eL3 eL3 and eL4 are the unknown voltages across L3 and L4. This equation is then: V1 – V2 – eL3 = 0 V3 = eL4

or

V3 – eL4 = 0

For E1 and E2: V1 – V2 = E1

V3 = E2

Next we set the component values: K := 103 1 10 C2 := C1 G1 :=

u := 10–6

m := 10–3

V := 1

A := 1

mA := 1

1 1 1 G 3 := G 4 := C1 := 0.1·u 100 50 ⋅ K 10 ⋅ K L3 := 2533.03·u L4 := 25.3303·u Ein := 1 G2 :=

Appendix I

189

Letting U = the number of unknown nodes, M the number of inputs (1 in this case), and N the number of capacitors (1 V sources) and inductors (1 A sources), the following matrices are created from the preceding equations. Note column headings for coefficients: Matrix A1 contains the coefficients of the left-handed sides of the preceding equations and has the dimensions {U+N U+N}. U := 3

N := 4

M := 1

We form array A1 from left-hand sides of the preceding equations: (Note column headings.) V1 G1 + G 4 −G 4 0 1 A1 := 0 1 0

V2

V3

iC1 iC2 eL 3 eL 4

−G 4 G2 + G 4 −G 2 −1 0 −1

0 −G 2 G2 + G 3 0 1 0

1 −1 0 0 0 0

0 0 1 0 0 0

0 0 0 0 0 −1

0

1

0

0

0

0 0 0 0 0 0 −1

From the equations: V1·(G1 + G4) – V2·G4 + iC1 = Ein·G1 – I3 –V1·G4 + V2·(G2 + G4) – V3·G2 – iC1 = I3 –V2·G2 + V3·(G2 + G3) + iC2 = –I4 V1 – V2 = E1 V3 = E2 V1 – V2 – eL3 = 0 V3 – eL4 = 0 We next form {U+N N+M} array B2 for the right-hand sides of the preceding equations and set the sources to their unity values: E1 := 1

E2 := 1

I3 := 1

I4 := 1

190

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

E1 0 0 0 B2 := E1 0 0 0

E2

I3

I4

Ein

0 0 0 0

− I3 I3 0

0 0 − I4

0 0 0 0

0 0 0 0

Ein ⋅ G1 0 0 0 0 0 0

E2 0 0

Note that every row and column of A1 must have at least one entry, and that every column of B2 must have at least one entry. We can now partition array A1 into four submatrices A11, A12, A21, and A22 as follows: V1 G1 + G 4 A11 := −G 4 0 1 0 A21 := 1 0

−1 0 −1 0

V2

V3

−G 4 G2 + G 4 −G 2

0 −G 2 G 2 + G 3

0 0 A22 := 0 0

0 1 0 1

iC1 iC2 eL 3 eL 4 1 A12 := −1 0 0 0 0 0

0 0 −1 0

0 0 1

0 0 0

0 0 0

0 0 0 −1

From the circuit, we see that current through C1 (E1) leaves node V1 and enters node V2. If we mentally assign –1 for current leaving a node, and +1 for current entering a node, and compare this to –A12: −1 − A12 = 1 0

0 0 −1

0 0 0

0 0 0

V1 V2 V3

Because column 1 represents C1, the coding here tells us which nodes C1 is connected to and the current polarity. In the same manner, column 2 represents C2, and we can see without looking at the schematic that C2 is connected from (–1) node V3 to ground. We next split array B2 into four submatrices A13, A14, A23, and A24:

Appendix I

191

E1 E 2

I3

I4 0 0 −1

0 A13 := 0 0

0 0 0

−1 1 0

1 0 A23 := 0 0

0 1 0 0

0 0 0 0

0 0 0 0

Ein ⋅ G1 A14 := 0 0 0 0 A24 := 0 0

Similar to A12, array A13, with column 3 and column 4 representing L3 and L4, respectively, gives us the same information about these two components: which nodes they are connected to and the current polarity, –1 leaving a node and +1 entering. Repeating A12, A13, and A21 iC1 iC2 eL 3 eL 4 1 A12 = −1 0 V1 1 0 A21 = 1 0

0 0 1

0 0 0

0 0 0

E1 E 2 0 A13 = 0 0

0 0 0

I3

I4

−1 1 0

0 0 −1

V2 V3 −1 0 −1 0

0 1 0 1

Next, we take the transpose (interchange rows and columns) of A12 and –A13 1 0 A12 T = 0 0

−1 0 0 0

0 1 0 0

0 0 –A13T = 1 0

0 0 −1 0

0 0 0 1

and we see that we can pull out the first two rows of A12T and the last two rows of –A13T and, combining them, we have A21.

192

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Ncap is the number of capacitors, and Nind is the number of inductors, so that N = Ncap + Nind For A22: Ncap := 2

Nind := 2 iC1 iC2 eL 3 eL 4 0 0 A22 = 0 0

0 0 0 0

0 0 −1 0

0 0 0 −1

If the equations are taken in the order given earlier, we can see that the –1’s will go in the locations shown. These –1’s will be at A22Ncap+1, Ncap+1 and A22N,N. They represent the unity coefficients of eL3 and eL4. E1 E 2 I3 I4 1 0 A23 = 0 0

0 1 0 0

0 0 0 0

0 0 0 0

The +1’s here are located at A231,1 and A232,2. They represent the values of E1 = +1 and E2 = +1. Again, taking the equations in the order given earlier, A24 will always be an {N M} array of zeros. (Matrices or vectors filled with all zeros are called null arrays.) 0 0 A24 = 0 0 These procedures can be coded in software that will automate the construction of these submatrices individually (see comm42.mcd or dccomm42.mcd). They then can be formed into A1 and B2 as follows: A1 := stack(augment(A11,A12), augment(A21,A22))

Appendix I

193

0.1001 −0.0001 0 1 A1 = 0 1 0

−0.0001 0.0101

0 −0.01

1 −1

0 0

0 0

−0.01 −1 0 −1 0

0.01 0 1 0 1

0 0 0 0 0

1 0 0 0 0

0 0 0 −1 0

0 0 0 0 0 0 −1

B2 := stack(augment(A13,A14), augment(A23,A24)) 0 0 0 B2 = 1 0 0 0

0 0 0 0 1 0 0

−1 1 0 0 0 0 0

0 0 −1 0 0 0 0

0.1 0 0 0 0 0 0

Solving: V := A1–1·B2 What is contained in V? V is dimension {U+N N+M} 0.0909 −0.9091 0 −0.0092 V= −0.0091 1 0

0.0909 0.0909 1 −0.0091 −0.0091 0 1

0 0 0 −1 0 0 0

0 0 0 0 −1 0 0

0.9091 0.9091 0 0.0091 0.0091 0 0

Concentrating on the top U = 3 rows of V: V1,1 is the node voltage at node V1 due to E1 = 1, E2 = I3 = I4 = Ein = 0. V1,2 is the node voltage at V1 with E2 = 1, E1 = I3 = I4 = Ein =0. V1,3 is the V1 node voltage with I3=1, E1 = E2 = I4 = 0. V1,4 is V1 with I4 =1, E1 = E2 = Ein =0 = I3 = 0. V1,5 is V1 with Ein = 1, E1 = E2 = I3 = I4 = 0. And correspondingly for row 2 (V2) and row 3 (V3)

194

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Getting the R’s from the G’s: R1 := G1–1

R2 :=G2–1

R3 := G3–1

R4 := G4–1

To check this:

V1,5 :=

Ein ⋅ R 2 R1 + R 2

V1,5 = 0.9091

R4 and R3 are shorted by inductors L3 and L4. E1 ⋅ R1 R1 + R 2 and so forth. V1,1 :=

V1,1 = 0.0909

V1,2 :=

E 2 ⋅ R1 R1 + R 2

V1,2 = 0.0909

Extracting the last N = 4 rows of V and calling it H: H := submatrix(V, U + 1, U + N, 1, N + M) −0.0092 −0.0091 H= 1 0

−0.0091 −0.0091 0 1

−1 0 0 0

0 −1 0 0

0.0091 0.0091 0 0

Row 1 is current iC1 with the five sources active one at a time as above. − E1 H1,1 = –0.0092 R 4 ⋅ ( R1 + R 2 ) R1 + R 2 + R 4 := –0.0091 H1,3 := –I3 H1,3 = –1

−E2 R1 + R 2

H1,1 =

H1,2 =

H1,2

H1,4 := 0

because I4 is shorted by E2 = 0. H1,5 =

Ein R1 + R 2

H1,5 = 0.0091

Row 2 is iC2 with the five sources separately active; row 3 is eL3 and row 4 is eL4 under the same circumstances. We next form the {N N}diagonal array P, with C1, C2, L3, and L4 in that order.

Appendix I

195

C1 0 P := 0 0

0 C2 0 0

0 0 0 L 4

0 0 L3 0

which has same order as the columns of A12 and A22. The next operation is to solve H and P simultaneously and label the result AB. The array AB will have the dimensions {N N+M}. AB := P–1·H −91909.091 −90909.091 AB = 394.784 0

−90909.091

−1 × 10 7

0

0 0 0

−1 × 10 0 0

−91109.091 0 39478.411

90909.091 90909.091 0 0

7

In effect, we are dividing the top row of H by C1: H1,1 = −91909.091 C1

H1,2 = −90909.091 C1

etc.

and dividing the second row of H by C2: H 2,1 = −90909.091 C2

H 2 ,2 = −91109.091 C2

etc.

and, similarly, the third row by L3, and the fourth row by L4. We now extract A from the first N columns of AB: A := submatrix(AB, 1, N, 1, N) and extract B from the last M columns of AB: B := submatrix(AB, 1, N, N + 1, N + M) −91909.091 −90909.091 A= 394.784 0

−90909.091 −91109.091 0 39478.411

−1 × 10 7 0 0 0

−1 × 10 0 0 0

7

196

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

90909.091 90909.091 B= 0 0 As for output arrays D and E, we extract these from row Y of V, where Y := 3. D := submatrix(V, Y, Y, 1, N)

D = (0

1

0

0)

The column labels of D are vC1, vC2, iL3, and iL4. Hence, the 1 in column 2 tells us that the output is being taken directly from C2 or VY = V3. See the schematic. E := submatrix(V, Y, Y, N + 1, N + M)

E = (0)

A-I.1 THEORY OF NDS METHOD A DC voltage-controlled voltage source (VCVS) K := 103

mA := 10–3 lx R1

V1

Ein

EE1

R5

R1 := 1·K

R2 := 3·K

R3 := 4·K

Nodal Equations Ein – V1 V1 = + Ix R1 R5 Ix =

V2 V 2 − V 3 + R2 R3

V2 − V3 V3 = R3 R4

R3

V2

− +

R2

V3 R4

R4 := 2·K

R5 := 1.5·K

Ein := 5

Rearranged 1 Ein 1 V1 ⋅ + + Ix = R1 R 5 R1 1 V3 1 V2 ⋅ + − − Ix = 0 R 2 R 3 R 3 1 −V2 1 + + V3 ⋅ =0 R3 R4 R3

Appendix I

197

VCVS equation: V2 – V1 = k·V3

V2 – V1 – k·V3 = 0

k := 2

Insert into arrays A1 (per column headings) and B2 (M = 1, so B2 has only one column). V1 1 1 + R1 R 5 0 A1 := 0 −1

V2

V3

0

0

1 1 + R2 R 3 −1 R3 1

−1 R3 1 1 + R3 R4 −k

1.579 4.737 V := 1solve(A1,B2) V= 1.579 0.002 Ix := V4 Ix = 2.368mA V2–V1 = 3.158 VCVS equation checks.

Ix −1 0 0 1

Ein R1 B2 := 0 0 0

k·V3 = 3.158

Optimizing: Add row 2 (Vp) to row 1 (Vn). 1 1 + R1 R 5 0 A1 := 0 −1

1 1 + R2 R 3 1 1 + R2 R 3 −1 R3 1

−1 R3 −1 R3 1 1 + R3 R4 −k

−1 0 0 0

Ein R1 B2 := 0 0 0

1.579 4.737 V := 1solve(A1,B2) V= 1.579 0.002 Now insert VCVS equation into row 2 (Vp), and then delete the fourth row and fourth column.

198

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 1 R1 + R 5 −1 A1 := 0

V := 1solve(A1,B2) Save A1:

−1 R3 −k

1 1 + R3 R4

1 1 + R2 R 3 1 −1 R3

Ein R1 B2 := 0 0

1, 579 V = 4.737 1.579

A1a := A1

Ix is missing, but the node voltages are the same. If needed, Ix can be found from the node V1 equation. Ix : =

Ein 1 1 − V1 ⋅ + R1 R 5 R1

Ix = 2.368 mA

or from the node V2 equation: 1 V3 1 Ix : = V2 ⋅ + − R 2 R 3 R 3

Ix = 2.368 mA

Using the NDS method: 99 1 RR := 2 2 3 GG := 0

1 0 0 3 0

R1 R5 R2 R 3 R 4

EE := (2

U := 3

1

3

0

Ein := (99

5)

k)

→ Reference:C:\mcadckts\CaNL11\dccomm42.mcd

V := 1solve(A1,B2)

1.579 V = 4.737 1.579

0.002 A1 = −1 0

−0 −2 0.001

0.001 1 −0

0.002 A1a = −1 0

0.001 1 −0

−0 −2 0.001

Appendix I

199

A-I.1.1 AN AC FLOATING VCVS See Section 3.2 for NDS solution. mA := 10–3

K := 103

uF := 10–6 lx

R1

V1

Ein

uV1

V2

− +

C1

R3

R2

V3 C2

R4

1 1 1 1 G 2 := G 3 := G 4 := 1⋅ K 3⋅ K 4⋅K 2⋅K C1 := 0.01·uF C2 := 0.05·uF u := 20 Ein := 2 U := 3 N := 2 M := 1 G1 :=

Resistances are converted to conductances to make the arrays more compact. VCVS equation: uV1 = V2 – V1 In the NDS method, this would be specified as: EE = (Vp

Vn

Vcp

Vcn

Gain)

or EE := (2

1

1

0

20)

Let Ix be the current through the VCVS, a fourth unknown in addition to the U = 3 voltage nodes. Temporarily increase U to add the unknown Ix. U := 4 Circuit equations: From schematic: (Ein – V1)·G1 = Ix + iC1 Ix = V2·G2 + (V2 – V3)·G3 (V2 – V3)·G3 = iC2 + V3·G4 uV1 = V2 – V1 V1 = E1 = 1 V3 = E3 = 1

200

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Rearranged: V1·G1 + Ix + iC1 = Ein·G1 V2·(G2 + G3) – V3·G3 – Ix = 0 –V2·G3 + V3·(G3 + G4) + iC2 = 0 V2 – V1·(1 + u) = 0 Insert the coefficients of these equations into {U+N U+N} array A1 and {U+N N+M} array B2. Note the column headers. V1 G1 0 0 A1 := − (1 + u ) 1 0

V2

V3

0 G2 + G 3 −G 3 1 0 0

0 −G 3 G3 + G4 0 0 1

E1 E 2 0 0 0 B2 := 0 1 0

0 0 0 0 0 1

Ix iC1 iC2 1 −1 0 0 0 0

1 0 0 0 0 0

0 0 1 0 0 0

Ein Ein ⋅ G1 0 0 0 0 0

C1 P := diag C2

Note that it is important to keep the column order of A1 and B2 as shown when inserting the equation coefficients into the arrays. Also note that column 5 and column 6, iC1 and iC2, are in the same order as C1 and C2 in P, as are E1 and E2 in B2. Get A, B, D, and E from A1 and B2 as before: V := A1–1·B2 H := submatrix(V, U + 1, U + N, 1, N + M) AB := P–1·H A := submatrix(AB, 1, N, 1, N) B := submatrix(AB, 1, N, N + 1, N + M)

Appendix I

201

25000 −15000

−1.325 × 10 6 A= 105000

200000 B= 0

0.174 X= 1.217

X := 1solve(–A,B)

Dc voltage on C1 Dc voltagee on C2

Reducing the order by the number of VCVSs can significantly decrease execution time and increase accuracy in circuits with many opamps. To reduce the order by 1: Add row Vp (2) to row Vn (1). Zero out row Vp (2) and insert VCVS equation V2 – V1(1 + u) = 0. G1 − 1 + u ) ( A1 := 0 1 0

G2 + G 3 1 −G 3

−G 3 0 G3 + G4

0 0

0 1

0 0 1 0 0

1 0 0 0 0

0 0 B2 := 0 1 0

0 0 0 0 1

Ein ⋅ G1 0 0 0 0

Reduce U by 1. U := 3 The numerical values in A1 and B2 are: 0.001 −21 A1 = 0 1 0

0.001 1 −0 0 0

−0 0 0.001 0 1

1 0 0 0 0

0 0 1 0 0

0 0 B2 = 0 1 0

0 0 0 0 1

0.002 0 0 0 0

For programming purposes, we partition A1 into A11, A12, A21, and A22, as follows. A11 A12 A21 A22

:= := := :=

submatrix(A1, submatrix(A1, submatrix(A1, submatrix(A1,

0.001 A11 = −21 0

0.001 1 −0

1, U, 1, U) 1, U, U + 1, U + N) U + 1, U + N, 1, U) U + 1, U + N, U + 1, U + N) −0 0 0.001

1 A12 = 0 0

0 0 1

202

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

1 A21 = 0

0 0

0 1

0 0

0 A22 = 0

Note that A21 is the transpose of A12. Partition B2 into four subarrays: A13 A23 A14 A24

:= := := :=

submatrix(B2, submatrix(B2, submatrix(B2, submatrix(B2,

0 A13 = 0 0

0 0 0

1, U, 1, N) U + 1, U + N, 1, N) 1, U, N + 1, N + M) U + 1, U + N, N + 1, N + M

0.002 A14 = 0 0

1 A23 = 0

0 1

0 A24 = 0

We obtain the inductors-open (if present) DC node voltages using A11 and A14: V1 Vdc := 1solve(A11, A14)

Vdc T = ( 0.174

V2

V3

3.652

1.217 )

If required, we can find DC value of Ix by adding the currents through R2 and R3. Ix := Vdc2·G2 + (Vdc2 – Vdc3)·G3

Ix = 1.826mA

After creating these subarrays from the node lists the software program comm42.mcd or comm42m.mcd, then finds A, B, D, and E as follows: A1 := stack(augment(A11,A12), augment(A21,A22)) and B2 := stack(augment(A13,A14), augment(A23,A24)) V := A1–1·B2 H := submatrix(V, U + 1, U + N, 1, N + M) A := submatrix(AB, 1, N, 1, N) B := submatrix(AB, 1, N, N + 1, N + M) −1.325 × 10 6 A= 105000

25000 –15000

200000 B= 0

We get D and E from V at output node: Y := 3 D := submatrix(V, Y, Y, 1, N) D = (0 1) E := submatrix(V, Y, Y, N + 1, N + M) E = (0)

Appendix I

203

A-I.1.2 VCVS

AND

CCCS

See Section 3.5 for NDS solution. K := 103

u := 10–6

Meg := 106

mA := 10–3

uA := 10–6

mV := 10–3

C1

l1 R1

R3

V1

V4

Ein +

R2

−

g1

R4

C2

V2 + −

V3

R5

1 1 1 1 1 G2 := G 3 := G 4 := G5 := 100 10 40 ⋅ K 2⋅K 10 C1 := 0.08·u C2 := 0.005·u a := 0.004 B := 100 N := 2 U := 4 + 2 Y := 4 M := 1 Ein := 100·mV G1 :=

Ix is current through the VCVS (V2 – V3) VCVS: V2 – V3 = a·(Vcp – Vcn) Controlling nodes: Vcp = V1

Vcn = V4

–a·V1 + V2 – V3 + a·V4 = 0

Convert g1 CCCS to a VCCS. gl = B·I1 gl =

I1 =

Ein − V1 R1

B ⋅ ( Ein − V1) = B ⋅ G1 ⋅ ( Ein – V1) R1

gl + B·G1·V1 = B·G1·Ein

From the schematic: (Ein – V1)·G1 = (V1 – V2)·G2 + (V1 – V4)·G3 + iC1 (V1 – V2)·G2 = Ix Ix = V3·G5

204

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

(V1 – V4)·G3 + iC1 = g1 + V4·G4 + iC2 V1 – V4 = E1 V4 = E2 Rearranged: V1·(G1 + G2 + G3) – V2·G2 – V4·G3 + iC1 = Ein·G1 –V1·G2 + V2·G2 + Ix = 0 V3·G5 – Ix = 0 –V1·G3 + V4·(G3 + G4) – iC1 + iC2 + g1 = 0 Insert coefficients into A1 and B2: V1 G1 + G 2 + G 3 −G 2 0 −G 3 A1 := −a B ⋅ G1 1 0

V2

V3

−G 2 G2 0 0 1 0 0 0

0 0 G5 0 −1 0 0 0

E1 E 2 0 0 0 0 B2 := 0 0 1 0

0 0 0 0 0 0 0 1

V4 −G 3 0 0 G3 + G4 a 0 −1 1

Ix

gl

iC1 iC2

0 1 −1 0 0 0 0 0

0 0 0 1 0 1 0 0

1 0 0 −1 0 0 0 0

0 0 0 1 0 0 0 0

Ein Ein ⋅ G1 0 0 0 0 B ⋅ G1 ⋅ Ein 0 0

C1 P := diag C2

Add row 2 and row 3; insert row 5 (VCVS equation) in row 2; delete row 5 and column 5: U := 5

Appendix I

205

V1 G1 + G 2 + G 3 −a −G 2 −G 3 A1 := B ⋅ G1 1 0

V2

V3

V4

g1

iC1 iC2

−G 2 1 G2 0 0 0

0 −1 G5 0 0 0

−G 3 a 0 G3 + G4 0 −1

0 0 0 1 1

1 0 0 −1 0

0

0

1

0 0

0 0

0 0 0 B2 := 0 0 1 0

0 0 0 1 0 0 0

Ein ⋅ G1 0 0 0 B ⋅ G1 ⋅ Ein 0 0

0 0 0 0 0 0 1

We partition A1 and B2 as before: A11 A12 A21 A22

:= := := :=

submatrix(A1, submatrix(A1, submatrix(A1, submatrix(A1,

1, U, 1, U) 1, U, U + 1, U + N) U + 1, U + N, 1, U) U + 1, U + N, U + 1, U + N)

0.11 −0.004 A11 = −0.1 −0 1

−0.1 1 0.1

0 −1 0.1

−0 0.004 0

0 0

0 0

0.001 0

1 A12 T = 0

0 0

0 0

0 A22 = 0

0 0

−1 1

0 0

0 0 0 1 1

1 A21 = 0

1 0 A12 = 0 −1 0 0 0

0 0

−1 1

0 0 0 1 0 0 0

Again note that A12T is identical to A21. With no inductors (Nind = 0), A22 is merely an {N N} null array.

206

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

And similarly for B2: A13 A14 A23 A24

:= := := :=

submatrix(B2, submatrix(B2, submatrix(B2, submatrix(B2,

0 0 A13 = 0 0 0

0 0 0 0 0

1, U, 1, N) 1, U, N + 1, N + M) U + 1, U + N, 1, N) U + 1, U + N, N + 1, N + M

0.001 0 A14 = 0 0 0.1

1 A23 = 0

0 1

0 A24 = 0

A24 is always an {N M} null array. The row–column order of A1 is: V1, V2, ..., V(U), g1, g2, ..., g(Ngg), iC1, iC2, ..., iC(Ncap), eL1, eL2, ..., eL(Nind). The row order of B2 will be the same as A1; the column order of B2 will be: E1, E2, ..., E(Ncap), I1, I2, ..., I(Nind), Ein1, Ein2, ..., Ein(M). U is increased in the subprogram comm42.mcd to U + Ngg. During this process, A11 and A14 can be used to find the inductors-open (if present) DC node voltages and current g1. Vdc := 1solve(A11,A14) VdcT = (0.087 0.092 –4.789 × 10–3 V1 := Vdc1 V1 = 87.33mV V2 :=Vdc2 V2 = 92.11mV

–24.138

0.013)

and so forth. g1 := Vdc5

gl = 12.675mA

Once the partitioned arrays are created by the program comm42.mcd or comm42m.mcd, A1 and B2 are created as: A1 := stack(augment(A11,A12), augment(A21,A22)) and B2 := stack(augment(A13,A14), augment(A23,A24)) And A, B, D, and E are obtained as before: V := A1–1·B2 H := submatrix(V, U + 1, U + N, 1, N + M) AB := P–1·H A := submatrix(AB, 1, N, 1, N) B := submatrix(AB, 1, N, N + 1, N + M)

Appendix I

207

D := submatrix(V, Y, Y, 1, N) E := submatrix(V, Y, Y, N + 1, N + M) −750000 −747812.5 A= 188040000 187900000 D = (0 1) E = (0)

12500 B= −19800000

See Section 3.5 and compare the arrays.

This page intentionally left blank

Part II Tolerance Analysis

This page intentionally left blank

9

Introduction

9.1 INTRODUCTION Most of the tolerance analysis examples given here are passive or idealized opamp circuits. Discrete devices such as BJTs and MOSFETs, except for some linear firstorder models, are not emphasized. The reason for this is as follows.

9.1.1 TOLERANCE ANALYSIS COMPONENTS

OF

CIRCUITS

WITH

DISCRETE

In well-designed opamp circuits, the opamp can be considered ideal. (Thirty years ago this would not have been possible with opamps such as the uA709. But modernday opamps, which have bandwidths up to 400 MHz, offsets measured in nV and pA, and with negligible error, can be taken as ideal.) However, in circuits with discrete components such as MOSFETs and BJTs, a problem arises. Volumes have been written describing discrete device model parameters. Indeed, the forte of the commercial versions of SPICE is using these models for nominal circuit analysis. (See Reference 1, for example.) However, to the author’s knowledge, no one has published data on worst-case tolerances of model parameters such as reverse beta or other parameters as described in the following text. A typical BJT, 2N2222A, has the following SPICE model with 27 constants: .MODEL 2N2222 NPN(Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=255.9 Ne=1.307 + Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 + Cjc=7.306p Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 + Tr=46.91n Tf=411.1p Itf=.6 Vtf=1.7 Xtf=3 Rb=10) In this model, Bf is hfe or the forward beta DC gain; Br, the reverse beta; Vaf, the Early voltage; and so forth (see reference 1). If an analyst wanted to do a worst-case analysis on a circuit using one or more of these devices, he or she might vary hfe from the data sheet minimum and maximum, taking the device operating point into account. However, there is no data available that describes how other parameters such as Vaf vary from transistor to transistor, given 1000 2N2222’s, for example. Is the Early voltage dependent on hfe in some way? That is, if we arbitrarily change hfe, do we have to change Vaf by

211

212

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

some amount? Is it independent? If so, by what percentage and in which direction does it vary? It appears that nobody has done the work of putting a statistically significant number of these devices on a curve tracer or embedded them in test circuits and extracted the data. To do a worst-case analysis that truly reflects the minimum and maximum performance of circuit boards with one or more 2N2222’s in the design, we must have statistics on all 27 parameters, just as we have statistics (tolerances) on passive components such as resistors. For a DC analysis, we may not need to know how the AC and switching parameters such as Cjc, Cje, Tr, and Tf vary, but we certainly need to know how the DC parameters vary from transistor to transistor. Hence, trying to make an accurate prediction of the worst-case performance of circuits with discrete devices is a dubious if not futile exercise.

9.1.2 ANALYSIS METHODS Included here are the worst-case analysis methods of root sum square (RSS) and extreme value analysis (EVA). Circuit types for which these methods will give incorrect results include band-pass and band-reject filters and any circuit in which nonmonotonic components are present. In some cases, however, valuable economic and technical information can be obtained about circuit performance by analyzing sensitivities; they are included for this reason. Monte Carlo analysis (MCA) will produce realistic results for virtually any circuit that has a reasonably accurate and stable mathematical model. The proviso is that a large number of samples must be used. The larger the sample, the more accurate the results. A rule of thumb is to use no less than 1000 samples.

9.2 SOME FACTS ABOUT TOLERANCE ANALYSIS 9.2.1 DC ANALYSIS There are two types of EVA: (1) sensitivity-based analysis and (2) analysis based on all possible tolerance combinations. The second type has a somewhat awkward label, fast Monte Carlo analysis (FMCA) [2]. Sensitivity-based EVA uses the signs of the component sensitivities to determine which combination of signs will yield the maximum output and then reverses those signs to obtain the minimum output. The FMCA method examines all possible 2Nc combinations, where Nc is the number of components, and selects the maximum and minimum from this set. This method can get cumbersome when Nc is large. For example, in a circuit with 15 components, there are 215 = 32,768 combinations, or circuit solutions, that must be performed. Both types of EVA give the same answers in the majority of cases (circuits). One simple exception is the following balanced bridge:

Introduction

213 Ein R2

R1 V1 R3

R5

V2 R4

When the nominal value of R1 = R2 = R3 = R4, sensitivity-based EVA, when perturbing R5 (multiplying R5 by 1 + dpf = 1.0001), will not show a change in output because V1 – V2 = 0. The contribution of R5 will be included when all 25 = 32 tolerance combinations are examined using FMCA. The author has come across two other DC circuits in which this occurs. Needless to say, there are others. SPICE uses the sensitivity-based method. A true and complete EVA, however, requires that FMCA also be performed if the circuit has a small-to-medium component count to include inputs. 9.2.1.1 Monte Carlo Analysis MCA uses random number generators (RNGs) to obtain various random distributions, the most common of which are the uniform and normal (Gaussian) distributions. The normal distribution is used to approximate RSS analyses, whereas the uniform distribution will generate wider tolerance bands between RSS and EVA. Uniform RNGs create random numbers, rn, between zero and one, or 0 < rn < 1. Using a component tolerance of ±5%, rn creates the random component with tolerance range T = 10%(rn) – 5%. Then, T varies from –5% < T < +5% No good uniform RNG will ever come up with exactly 0 or exactly 1, no matter how many samples are taken. With a unique random tolerance 0.95R < R < 1.05R assigned to each of, say, Nc = 6 components (using the aforementioned 5% example), the odds of obtaining a set of random component values that will approach one extreme or the other are very high. As Nc increases, the odds sharply increase. Hence, MCA will never duplicate EVA results. But with a large enough number of samples, it will provide tolerance bands that will be greater than those of RSS but less than those of EVA. This will later be empirically demonstrated by examples (for example, see Section 10.4).

9.2.2 AC ANALYSIS The considerations for DC circuits are applicable to AC circuits also. One additional aspect is nonmonotonic components. That is, increasing the value of a component (within its tolerance range) causes the output to both increase and decrease in different portions on the frequency band. Monotonic components will result only in either increasing or decreasing the output, not both. Circuits with nonmonotonic components are usually band-pass or band-stop filters or any circuit in which the output increases and decreases across the frequency

214

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

band. Circuits such as Butterworth low-pass and high-pass filters will usually contain only monotonic components. SPICE uses a sensitivity-based EVA that does not take monotonicity into account. A 500-Hz multiple-feedback active band-pass filter will be used as a case in point. C2

R3 C1

R1 Ein

V1

11 2 − V− V2

R2 3

+

V3 1

V+ 4

The public domain SPICE listing for EVA analysis is given along with the incorrect results: Band-pass Filter WCA VEin 99 0 AC 1 R1 99 1 RA 6.34K R2 1 0 RA 80.6 R3 3 2 RA 127K C1 1 2 CA 0.1uF C2 3 1 CA 0.1uF E1 3 0 0 2 1E6 * As in Mathcad, an ideal VCVS is used. *.MODEL RA RES(R=1 DEV/GAUSS=0.667%) *3 sigma = 2% *.MODEL CA CAP(C=1 DEV/GAUSS=3.333%) *3 sigma = 10% .MODEL RA RES(R=1 DEV/UNIFORM=2%) .MODEL CA CAP(C=1 DEV/UNIFORM=10%) .WCASE AC V(3) MIN VARY DEV *.WCASE AC V(3) MAX VARY DEV *.WCASE AC V(3) YMAX VARY DEV .AC LIN 100 400 600

Introduction

215

.PRINT AC V(3) .OPTIONS NOECHO NOPAGE NOMOD .END Plotting the results from the SPICE *.out file: Spice AC “.WCASE” results

15

Volts

Anomk,2 10 Ahik,2 Alok,2

5

0 400

425

450

475

Nom EVA Hi EVA Lo

500 525 Anomk,1 Freq(Hz)

550

575

600

One can see there is definitely something amiss here. The algorithm that SPICE uses takes sensitivities at only two frequencies, 400 Hz and 501 Hz, in this circuit. The correct method of EVA will take sensitivities across the entire frequency band, from 400 Hz to 600 Hz. Doing this in Mathcad [3] or MATLAB results in the following plot: Nominal & EVA output

15

446 Hz

568 Hz

Volts

10

5

0 400

420

440

460

480

500 Freq(Hz)

520

540

560

580

600

216

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

These results are somewhat better, but not good enough to get the whole picture. FMCA (which SPICE is not capable of) gives the following plot: FMCA of BPF

11.465 15

568 Vfpk

446 Vfhii Voi

1.102

10

5

0 400 400

420

440

460

480

500 Fi

520

540

560

580

600 600

Nine of the 32 possible tolerance combinations yield the extrema shown in the preceding plot. We still get the worst-case center frequencies of 446 Hz and 568 Hz, but what about at, say, 480 Hz? Is this the maximum amplitude we will get at this frequency? The answer is no, and the MCA plot clearly shows this superimposed on the FMCA results: 11.465 15 447 Voi

568

Vpk

10

Vmaxi Vfhii

1.102

5

0 400 400

420

440

460

480

500 Fi

520

540

560

580

600 600

The number of samples used here was Nk = 1000. As Nk is increased, the skirts of the tolerance band creep out toward the FMCA extremes. Diminishing returns are at work here because using Nk = 10,000 does not move the skirts much farther. As implied previously, the skirts will never be congruent with the FMCA extremes, no matter how large Nk is. This is true of any AC or DC circuit by the very nature of uniform distribution RNGs.

Introduction

217

9.2.3 TRANSIENT ANALYSIS Time-domain tolerance analysis requires that MCA be used. Many, if not most, transient analyses results involve a transitory damped ringing oscillation wherein EVA and RSS analyses give incorrect answers.

9.2.4 ASYMMETRIC TOLERANCES Asymmetric tolerances occur regularly in some commercial and most military applications. This is due to some components having asymmetric tolerances at room temperature (e.g., aluminum electrolytic capacitors), but more frequently due to asymmetric temperature ranges. For example, on the International Space Station, temperature requirements were from –60ºC to (∆T = –85) to +50ºC (∆T = +25). SPICE has no convenient way to specify asymmetric tolerances (and no RSS capability). The Mathcad programs in this book can easily accommodate asymmetric tolerances.

REFERENCES 1. Ian Getreu, Modeling the Bipolar Transistor, Tektronix, Inc., Beaverton, OR.,

1976. 2. Boyd, R., Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 87. 3. Boyd, R., Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 44.

This page intentionally left blank

10

DC Circuits

10.1 RESISTANCE TEMPERATURE DETECTOR (RTD) CIRCUIT In this section, the DC RSS and EVA limits of the following circuit are shown. R8

R9

V6

Eref 2

−

3 +

V7

11

Eref R2

R1

V−

R3

V1 R4

1

V+

V3

4

RT V2 R5 R6

V4

11 2 − V− 3 +

V5 1

V+ 4

R7

Eref

R1 := 4.53 R6 := 4.53

R2 := 34.8 R7 := 27.4

R3 := 132 R4 := 9.09 R5 := 9.09 R8 := 20 R9 := 20 RT := 1.915

Values given in kohms: Ao := 106 7 99 3 1 2 RR := 99 4 99 6 1 Y := 5

1 3 5 3 4 2 0 6 7 2

GG := 0

R1 R2 R 3 R 4 R5 R6 R 7 R8 R9 RT

7 EE := 5

Ein := (99

0 0

0 4

6 3

Ao Ao

U := 7

5)

219

220

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd Calculate “real-world” asymmetric tolerances as decimal percentages. Tinit := 0.001 Tlife := 0.002 ppm := 10–6 TC1 := 50·ppm TC2 := 25·ppm Thi := Tinit + Tlife + 35·TC1 Tlo := –Tinit – Tlife – 80·TC1 Trhi := 8.1·10–4 Trlo := –Trhi Treflo := –0.02 – 80·TC2 Trefhi := 0.02 + 35·TC2 p := 1..9 T1,p := Tlo T2,p := Thi T1,10 := Trlo T2,10 := Trhi T1,11 := Treflo T2,11 := Trefhi Display asymmetric tolerance array T: R1

R2

R3

R4

R5

R6

−0.7 T= 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

R7

R8

R9

RT

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.081 0.081

Eref −2.2 % 2.0875

Call RSS/EVA WCA subprogram. → Reference:C:\mcadwca\wcaref11\dcwa.mcd SensT = (–2.41 3.68 0.81 –4.13 –0.82 –2.11 0.89 –2.7 2.7 4.09 1) Tolerance array T and sensitivities are in the same order as the RR array, i.e., the normalized sensitivity of R4 is –4.13 %/%, Eref sensitivity is 1 %/%, etc. 4.1277 Vrss = V 4.5589

3.7379 Veva = V 4.9848

Va = 4.3433V

Va is the average output, not the nominal output. With symmetric tolerances, the nominal output Vo and the average output Va would be the same (see Section 10.2). ∆rss := Vss2 – Vrss1 ∆eva :=Veva2 – Veva1 ∆rss = 0.431 ∆eva = 1.247 As expected, the tolerance spread of RSS is less than EVA. Note that when using the reference program dcwca.mcd, the user must supply the complete tolerance array T as shown in the preceding text. This facilitates using asymmetric tolerances. In other programs, the user supplies only the symmetric tolerances, namely, resistor tolerance Tr, capacitor tolerance Tc, and the inductor tolerance Ti, and in some cases, the input voltage source tolerance Te.

DC Circuits

221

10.2 A NOTE ON ASYMMETRIC TOLERANCES The NOS method of handling a symmetric tolerances is described in this section. Example: Ra = 1000 For Ra, let the asymmetric tolerances be: T1 := – 0.01

T2 := 0.03

The average value of the two asymmetric tolerances plus one is Mr: Mr := 1 +

T2 + T1 2

Mr = 1.0100

For symmetric tolerances, Mr = 1.0000 Statistically, the average value of Ra is no longer 1000; it is: Rb := Mr·Ra

Rb = 1010

Ra has the limits: Ra1 := Ra·(1 + T1)

Ra1 = 990

Ra2 := Ra·(1 + T2) Ra2 = 1030

Because the asymmetric tolerance is Ra1 = 990 and Ra2 = 1030, the symmetric tolerance of these two extremes about the average value Rb is:

Tv :=

T2 − T1 2 ⋅ Mr

Tv = 1.98% Rb1 := Rb·(1 – Tv) Rb2 := Rb·(1 + Tv) Symmetric vs. asymmetric

0.5

Ra

Bin height

0.4

Rb

0.3 0.2 0.1 0 970

980

990

1000 1010 R value (Ohms)

1020

Symmetric Asymmetric

Ra = 1000 Rb = 1010 Ra1 = 990 Ra2 = 1030 Rb2 = 1030

Rb1 = 990

1030

1040

222

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Normally distributed inputs will yield a Gaussian curve of Rb, as shown in the preceding figure. By definition, there is no Gaussian curve for a resistor with a mean of 1000 and –1%, +3% tolerances. But there is one with exactly the same tolerance range (40 Ω) averaged about Rb. The components with asymmetric tolerances are then given a new average value with symmetric tolerances, from which the EVA and RSS values are calculated. From statistics:

(

If F = g(x1,x2,…,xn), then F = g x1 , x 2 , …, x n

)

where the overbars indicate average value. The average output Va is then calculated with these average values, whereas the nominal output Vo is calculated using the nominal component values. These calculations are used in the routines for Ta, Va, and Vrss in the subprogram dcwca.mcd.

10.3 CENTERED DIFFERENCE APPROXIMATION — SENSITIVITIES The following demonstrates a more accurate method of calculating numerical derivatives and sensitivities [1].

True derivative

Fore shot

Back shot

Better approximation

The example function used here is two resistors with a parallel resistance of Rp = 75Ω. A third resistor R3 is added to make Rp slightly less than 75Ω at Rp = 74.8Ω. First, we determine the value of R3 required for Rp = 74.8Ω, and then a more accurate sensitivity of R3 is calculated using the centered difference method: R1 := 100

R2 := 300

R1 ⋅ R 2 = 75 R1 + R 2

Rp := 74.8

Solving for R3: 1 H ( Rp, R1, R 2 ) := 1 1 1 EQHERE − − Rp R1 R 2

R3 := H(Rp,R1,R2) R3 = 28050

The required value of R3 for Rp = 74.8.

DC Circuits

223

We find the numerical derivative of H with respect to Rp as follows: dpf := 0.0001

Q := 1 + dpf B := 1 – dpf

(dpf = derivative perturbation factor) Rr := H(Rp·Q,R1,R2) (fore shot) Rr = 29143 This is equivalent to y + ∆y = f(x + ∆x) in calculus. Rr := H(Rp·B,R1,R2) (back shot) Rb = 27036 Equivalent to y – ∆y = f(x – ∆x) Then 2·∆y = f(x + ∆x) – f(x – ∆x)

The approximate derivative is then usual

∆y f ( x + ∆x ) − f ( x − ∆x ) instead of the = ∆x 2 ⋅ ∆x

∆y f ( x + ∆x ) − f ( x ) Rr − Rb = , which here is D := ∆x ∆x 2 ⋅ Rp ⋅ dpf

D = 140822

1 1 The exact derivative dr3 = dR3/dRp is with Ra := Rp ⋅ + R1 R 2 dr 3 :=

1

Ra

+

(1 − Ra ) (1 − Ra )2

is

dr3 = 140625

Normalized sensitivities are defined as S =

x dy ⋅ and are in (dimensionless) y dx

Rp ( Rr − Rb ) Rr − Rb = ⋅ R 3 2 ⋅ Rp ⋅ dpf 2 ⋅ R 3 ⋅ dpf The centered difference approximation method gives:

units of %/%. Then Sr =

Sr =

Rr − Rb 2 ⋅ R 3 ⋅ dpf

Sr = 375.525

The exact sensitivity is: Sre :=

Rp ⋅ dr 3 R3

Sre = 375

Just using the fore shot: Su :=

Rr − R 3 R 3 ⋅ dpf

Su = 389.57

224

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Percentage error: Su − 1 = 3.89% Sre

Sr − 1 = 0.14% , Sre

which is much more accurate.

10.4 RTD CIRCUIT MONTE CARLO ANALYSIS (MCA) For the schematic, see Section 10.1. Call circuit information from Section 10.1. → Reference:C:\crc_book_ms\wca_mcd\dctdwca.mcd The same asymmetric tolerances are used: R1

R2

R3

R4

R5

R6

−0.7 T= 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

R7

R8

R9

RT

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.081 0.081

Eref −2.2 % 2.0875

Nk := 20000 nb := 30 nb = number of histogram bins. Call normal and uniform DC MCA subprograms. → Reference:C:\mcadwca\wcaref11\dc_mca_un.mcd Vrss and Veva from Section 10.1 are: 4.3258 4.3440 4.0482 4.6576 Vstat = 0.2159 4.3439 3.9365 4.8538 0.3750

Nominal Norm_mean Norm_min Norm_max Norm_3σ Unif_mean Unif_min Unif_max Unif_3σ

4.1277 Vrss = 4.5589

3.7379 Veva = 4.9848

DC Circuits

225 Histogram - uniform dist input

0.12

Bin height

Veva1 pvnh E(binnh)

Veva2

0.08

0.04

0 3.7

3.8

3.9

4

4.1

4.2

Unif dist

4.3 4.4 4.5 binnh volts DC

4.6

4.7

4.8

4.7

4.8

4.9

5

Ideal Guassian dist Histogram - normal dist input

0.12

Vrss2

Bin height

Vrss1 pvnh E(binnh)

0.08

0.04

0 3.7

3.8

3.9

4

4.1

Norm dist Ideal Guassian dist

4.2

4.3

4.4

4.5

4.6

4.9

5

binnh volts DC

Note the difference in the two outputs. The normal distribution is very close to RSS values. The uniform distribution, although wider than RSS, does not and will not approach EVA values no matter how large Nk is. The reason the output is approximately normal when all components have a uniform distribution is because of the central limit theorem from statistics [3]. When this occurs, the ratio of 3σU to 3σN averages 3 [2]. To show that EVA may be an unrealistic analysis for circuit specification limits, the following plot shows uniform distribution input MCA extremes (minimum and maximum) with increasing Nk compared to EVA limits (Veva) in percent. For example, at 5%, the MCA voltage extremes are Vmc1 : = 3.9346 Vmc = 4.7474

3.7379 Veva = 4.9848

Veva1 Veva 2 Vmc 2 : = 1 − 0.05 1.05

226

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Percent MCA vs EVA vs Nk

10 8 6

Percent

4 Dnav1,r Dnav2,r

2 0 −2 −4 −6 −8 −10

1

2

3

4

5

6

7

r+1 Nk = 10^(r + 1)

Note that at Nk = 1 million samples, the percentage deviation is still not close to zero. (These ten plotting points are the average of seven.)

10.5 RTD MCA WITH R4 TOLERANCE = 10% Call circuit information from Section 10.1. → Reference:C:\mcadwca\caNLwca11\dcrtdwca.mcd T1,4 := –0.1

T2,4 := 0.1

Set R4 at 10% tolerance. Nk := 20000 number of MCA samples nb := 30 nb = number of histogram bins. → Reference:C:\mcadwca\wcaref11\dc_mca_un.mcd By no means will all DC circuits have a normal distribution output with a uniform distribution input. If one component has a large sensitivity and tolerance, it will tend to dominate, and the output will be more uniform in appearance. As an example, assigning a tolerance of ±10% to R4 (sensitivity 4.13 %/% being the largest), the following histogram results: (Note scale changes.)

DC Circuits

227 R4 tolerance 10%

0.08

Bin height

0.06 pvnh E(binnh)

0.04 0.02 0

2

2.5

3

3.5

Unif dist Ideal guassian dist

4

4.5 5 binnh volts DC

5.5

6

6.5

7

10.6 RTD CIRCUIT FAST MONTE CARLO ANALYSIS (FMCA) For the schematic, see Section 10.1. Call circuit data from Section 10.1. → Reference:C:\mcadwca\CaNLwca11\dcrtdwca.mcd Call the FMCA subprogram: → Reference:C:\mcadwca\wcaref11\dc_fmca.mcd U=7

Nf := 211

Nf = 2048

The output shown in the following text is the minimum and maximum voltage at all U nodes and using all Nf possible tolerance combinations. Because there are ten resistors and one reference voltage in the RTD circuit, Nf has the value shown in the preceding text. Min −0.603 1.0038 0.7516 0.7516 Va = 3.7379 −6 4.8328 × 10 −5.1648

Max −0.4711 1.1379 0.8569 0.8569 4.9848 5.1648 × 10 −6 −4.8328

Node V1

Node V5 Node V7

228

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

As before, we select the output voltage: Y=5 3.7379 Vfmca := (VaT)〈Y〉 Vfmca = 4.9848 From the previous EVA (Section 10.1): 3.7379 Veva = 4.9848 Hence, no difference between EVA and FMCA is found in this circuit. This is not true for all DC circuits.

10.7 A CASE FMCA GREATER THAN EVA Another circuit in which the FMCA limits are greater than the EVA limits is analyzed in this section. K : = 103

V := 1 R1

RF

V1

E1 R3 R2

V2

E2

V3

11 2 − V− 3 +

1

V+ 4

R4

R1 := 1·K RF := 10·K R2 := 1·K R3 := 10·K R4 := 10·K E1 := 4·V E2 := 4·V U := 3 Y := 3 EE := (3 0 2 1 106) 99 98 RR := 1 2 3

1 2 0 0 1

R1 R2 R 3 R 4 RF

99 Ein := 98

E1 E 2

GG := 0

→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd

DC Circuits

229

3.636 V = 3.636 3.636

V := 1solve(A1, B2)

Tr := 0.01 − Tr T := Tr

V3 := VY

V3 = 3.636

Te := 0.05 − Tr Tr

− Tr Tr

− Tr Tr

− Tr Tr

− Te Te

− Te Te

→ Reference:C:\mcadwca\wcaref11\dcwca.mcd S1 := Sens S1T = (1.00001

–1.09091

–1

1.09091

–0.00001

–11

12)

Approximate sensitivities are obtained using the centered difference approximation (CDA) method. RSS/EVA results: −0.7733 Veva = 7.8958

0.6756 Vrss = 6.597

→ Reference:C:\mcadwca\wcaref11\dc_fmca.mcd 3.448 Va = 3.448 −0.773

3.825 3.825 7.983

−0.7733 Vfmca = 7.9831 pce :=

Vfmca 2 −1 Veva 2

c := 1..2

Vfmcac := VaY,c

−0.7733 Veva = 7.8958 pce = 1.106%

Although the difference is only 1.1%, there is no guarantee that this will always be the case. Exact Sensitivities for Comparison 1 1 + E 2 ⋅ 1 + R1 ⋅ 3 R RF RF − E1 Vo = 3.636 ⋅ Vo := R2 R1 1+ R4

230

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Derivatives and exact sensitivities:

dR1 :=

− RF ⋅ E 2 ⋅ R 4 − E1 ⋅ ( R 2 + R 4 )

Sens1 :=

R12 ⋅ ( R 2 + R 4 )

1 1 − E 2 ⋅ RF ⋅ R 4 ⋅ 1 + R1 ⋅ + RF R 3 dR 2 := 2 R1 ⋅ ( R 2 + R 4 ) dR 3 : =

− E 2 ⋅ RF ⋅ R 4 R 32 ⋅ ( R 2 + R 4 )

Sens 3 : =

R3 ⋅ dR 3 Vo

Sens 4 : =

dRF :=

E 2 ⋅ R 4 ⋅ ( R1 + R 3) − E1 ⋅ R 3 ⋅ ( R 2 + R 4 ) R1 ⋅ R 3 ⋅ ( R 2 + R 4 )

dE1 : =

− RF R1

RF dE 2 : = ⋅ R1

R2 ⋅ dR 2 Vo

Sens 2 : =

1 1 1 + R1 ⋅ RF + R 3 E 2 ⋅ RF ⋅ R 2 dR 4 := ⋅ R1 ( R 2 + R 4 )2

Sens 6 : =

R1 ⋅ dR1 Vo

R4 ⋅ dR 4 Vo

Sens 5 : =

RF ⋅ dRF Vo

E1 ⋅ dE1 Vo

1 1 1 + R1 ⋅ + RF R 3 R2 1+ R4

Sens 7 : =

E2 ⋅ dE 2 Vo

Compare approximate and exact values: ppm := 10–6 SensT = (1 –1.0909091 –1

1.0909091

0

–11

12)

which are the exact sensitivities. S1T = (1.00001 –1.0909091 –0.999999 1.0909091 –0.000011 –11 12) which are approximate values obtained using CDA. The difference in parts per million: Ec := ( Sens − S1) EcT = (–10.01

0

–0.99 –0.009

11

6.15 × 10–6

–6.267 × 10–6) ppm

DC Circuits

231

10.8 TOLERANCING INPUTS K := 103 This example shows the necessity of applying tolerances to independent inputs when M > 1. The difference between EVA and RSS computations with the inputs at zero tolerance and again at 5% tolerance are shown in the following text. Note that there is no direct or convenient method of tolerancing inputs in SPICE. R1

RF

V1

E1 R3

2 R2

V2 3

E2

− 11 V−

V3

V+

1

+

4

R4

R1 := 1·K RF := 10·K R2 := 1·K R3 := 10·K R4 := 10·K E1 := 4·V E2 := 4·V U := 3 Y := 3 EE := (3 0 2 1 106) 99 98 RR := 1 2 3

1 2 0 0 1

R1 R2 R 3 R 4 RF

E1 E 2

99 Ein := 98

GG := 0

→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd

V := 1solve(A1,B2)

3.636 V = 3.636 3.636

R1

R2

R3

R4

− Tr T := Tr

− Tr Tr

− Tr Tr

− Tr Tr

V3 := VY

V3 = 3.636

RF E1 E 2 − Tr Tr

0 0

0 0

Both inputs (last two columns) at zero tolerance. → Reference:C:\mcadwca\wcaref11\dcwca.mcd SensT = (1

–1.091

–1 1.091

–0

–11

12)

Note the very high sensitivities for inputs E1 and E2. V1r := Vrss V1e := Veva

Tr := 0.02

232

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

We repeat with the inputs given a tolerance of Te := 0.05. − Tr − Tr − Tr − Tr − Tr T := Tr Tr Tr Tr Tr Call the wca reference function again:

− Te Te

− Te Te

→ Reference:C:\mcadwca\wcaref11\dcwca.mcd V2r := Vrss V2e := Veva 3.484 V1r = 3.789

3.321 V1e = 3.930

Inputs 0% tolerance.

0.673 −1.008 Inputs +/– 5% tolerance. V2 r = V2 e = 6.600 7.970 Note that the V2r and V2e tolerances spreads (Te = 5%) are much wider than those of V1r and V1e (Te = 0%).

10.9 BETA DISTRIBUTIONS [4–6] Beta functions can be used in Mathcad to generate skewed random distributions. These skewed input distributions are then used as MCA inputs and output histograms examined. First, Beta functions are mathematically described and plotted by the y programming sequence below. n := 1..100 y : = for k ∈1..7 s1 ← k + 1 s2 ← 10 – s1 Bk ← 2 ⋅

∫

π 2

0

sin ( x )

2⋅s1−1

⋅ cos ( x )

for n ∈1..101 x←

n −1 100

y s1,nn ← y

x s1−1 ⋅ ( x − 1) Bk

s 2 −1

2⋅s 2 −1

dx

DC Circuits

233 Beta functions, y(s1, n)

4

y2,n

3

y4,n y5,n y6,n y8,n

2

1

0

0 s1 = 2 s1 = 4 s1 = 5 s1 = 6 s1 = 8

50 n

100

Among other things, beta functions have been used to describe manpowerloading forecasts for new projects or contracts. “Front loaded,” s1 = 2; “rear loaded,” s1 = 8. Beta (Skewed) Distributions Uses Mathcad’s built-in “rbeta” function. nb := 50 q := 1..nb + 1 nh := 1..nb Nk := 30000 s1 := 2 z := rbeta(Nk,s1,10 – s1) σ2 := stdev(z) BH := max(z) BL := min(z) BH − BL bin2q := BL + intv·(q – 1) pb2 := hist(bin2,z) nb s1 := 4 z := rbeta(Nk,s1,10 – s1) σ4 := stdev(z) BH := max(z) BL := min(z) intv :=

BH − BL bin4q := BL + intv·(q – 1) pb4 := hist(bin4,z) nb s1 := 5 z := rbeta(Nk,s1,10 – s1) σ5 := stdev(z) BH := max(z) BL := min(z) intv :=

intv :=

BH − BL nb

bin5q := BL + intv·(q – 1) pb5 := hist(bin5,z)

234

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Beta distributions (smoothed)

2000

pb5nh pb4nh

1500 1000

pb2nh 500 0

0

0.1

0.2

0.3

s1 = 5 s1 = 4 s1 = 2

σ2 = 0.122

σ4 = 0.148

0.4 0.5 0.6 0.7 bin5nh, bin4nh, bin2nh

0.8

0.9

σ5 = 0.151

Note the increase in the standard deviation σ as s1 increases.

10.10 RTD MCA — BETA (SKEWED) DISTRIBUTION For the schematic, see Section 10.1. Call circuit data from Section 10.1: → Reference:C:\mcadwca\CaNLwca11\dctrdwca.mcd The same tolerances are used: −0.7 T= 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.4 475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.081 0.081

−2.2 % 2.087

Overwrite R4 tolerance at 10%: T1,4 := –0.1

T2,4 := 0.1

(disabled when not used) For beta distributions skewed left: s1 := 2 (see Section 10.9) nb := 30 (number of histogram bins) Nk := 20000

−0.7 0.475

1

DC Circuits

235

Call beta distribution subprogram dc_beta.mcd: → Reference:C:\mcadwca\wcaref11\dc_beta.mcd With original tolerances: R4 10% 4.3258 4.3409 Vstat = 4.1377 4.5474 0.1551

Nominal Average Min Max 3σ

4.3258 5.3857 Vstat = 3.3089 6.3131 1.3997

Vavg := Vstat2

Note that the beta distribution output is not skewed to the left as is the input. This is due to the central limit theorem from statistics, with all rv’s approximately equally weighted. Nk = 20000 Output Histogram-beta (skewed) Input

0.12

Vavg

Bin height

0.1 pvnh E(binnh)

0.08 0.06 0.04 0.02 0

4

4.05

4.1

4.15

Histogram Ideal gaussian

4.2

4.25 4.3 4.35 binnh Volts DC

4.4

4.45

4.5

4.55

4.6

With R4 10% tolerance again, the beta distribution output is skewed to the right, whereas the input is beta-skewed to the left. This is due to the large-tolerance high-sensitivity resistor (R4, –4.13 %/%) dominating the output. Because the sensitivity is negative, the output is skewed opposite to the input. As with the uniform distribution input given earlier (see Section 10.4), the output will approach the normal (Gaussian) only when the random variables are approximately equally weighted. Also, note the expected change of the horizontal-axis scale.

236

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad With R4 10% tolerance

0.12

Vavg

Bin height

0.1 0.08 pvnh

0.06 0.04 0.02 0

3

3.5

4

4.5

5 5.5 binnh volts DC

6

6.5

7

From the preceding histogram, a principle of statistics, “The mean does not equal the mode” is illustrated.

10.11 MCA OF RTD CIRCUIT USING BIMODAL (GAPPED) DISTRIBUTION INPUTS These distributions will occur when vendors prescreen components for tighter tolerances. For the schematic, see Section 10.1. Call circuit data from Section 10.1: → Reference:C:\mcadwca\CaNLwca11\dcrtdwca.mcd The same tolerances are used: −0.7 T= 0.475

−0.7 0.475

−0.7 0.475

−0.7 0.4 475

−0.7 0.475

−0.7 0.475

−0.7 0.475

−0.081 0.081

Create “gapped” Normal distribution input: Set gap width equal to 0.5 on either side of zero. sp := 0.5

nb := 30

Nk := 20000

−0.7 0.475

−0.7 0.475

−2.2 % 2.087

DC Circuits

237

z := k ← 0 while k < Nk y ← sin ( 2 ⋅ π ⋅ rnd (1) ) ⋅ −2 ⋅ ln ( rnd (1) ) if ( y < −sp ) ∨ ( y > sp ) k ← k +1 zk ← y z q := 1..nb + 1 intvz :=

nh := 1..nb

VH − VL nb

VL := min(z) VH := max(z)

binzq := VL + intvz·(q– 1) pz := hist(binz,z)

The expression for y is known as the Box–Muller transformation for normal distributions [7]. Bimodal (gapped) input

3000

pznh

2000 1000 0 −4

−2

0

2

4

binznh

Apply gapped inputs to all Nc = 10 components of the RTD circuit using subprogram dc_gap.mcd: → Reference:C:\crc_book_ms\Ref_files_v11\dc_gap.mcd Note that the bimodal output in the following text is approximately normal and not gapped as is the input. This is due to the central limit theorem from statistics, with the rv’s approximately equally weighted.

238

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

4.3258 4.3419 Vstat = 4.0302 4.6878 0.2690

Nk = 20000

Nominal Average Min Max 3σ

Gapped Input - R4 Original Tolerance

0.16

Vstat2

0.14

Bin Height

0.12 pvnh

0.1

E ( binnh) 0.08 0.06 0.04 0.02 0 3.8

3.9

4

4.1

4.2

4.3

4.4

4.5

4.6

binnh Volts DC Bimodal Dist Ideal Normal

Set R4 tolerance at 10%, and call the dc\_gap subprogram again: T1,4 := –0.1

T2,4 := 0.1

→ Reference:C:\crc_book_ms\Ref_files_v11\dc_gap.mcd R4 10% tolerance. 4.3258 4.3597 Vstat = 2.0577 7.1057 2.2509

Nominal Average Min Max 3σ

4.7

4.8

DC Circuits

239

Gapped Input - R4 +/-10%

0.16

Vstat2

0.14

Bin Height

0.12 pvnh

0.1

E ( binnh) 0.08 0.06 0.04 0.02 0

2

2.5

3

3.5

4

4.5

5

5.5

6

6.5

7

binnh Volts DC Bimodal Dist Ideal Normal

Note the larger horizontal scale. The larger tolerance on R4 causes the output distribution to be much wider. As in the case of the beta distribution inputs, the gap is now evident because the gapped R4 distribution dominates. In terms of volts DC, the gap width is k := 1..2

Vgap k := Vstat 2 +

( −1)k ⋅ sp ⋅ Vstat 5 3

3.985 Vgap = V 4.735

REFERENCES 1. S.C. Chapra, R.P. Canale, Numerical Methods for Engineers, 3rd ed, McGraw-Hill, Boston, MA, 1998, p. 93. 2. R. Boyd, Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 188. 3. H. Arkin and R. R. Colton, Statistical Methods, Barnes & Noble COS, New York, 1970, p. 144. 4. Abramowitz and Stegun, Handbook of Mathematical Functions, Dover, New York, 1970, p. 258. 5. Erwin Kreyszig, Advanced Engineering Mathematics, John Wiley & Sons, New York, 2nd ed, 1968, p. 714. 6. M. Spiegel, Advanced Mathematics for Engineers & Scientists, Schaum’s Outline Series, New York, p. 211. 7. Eric W. Weisstein, Box-Muller Transformation, From http://mathworld.wolfram.com/ Box-Muller Transformation.html.

This page intentionally left blank

11

AC Circuits

11.1 CIRCUIT OUTPUT VS. COMPONENT VALUE In this section the definition of monotonicity is given and illustrated with the DC circuit shown in the schematic below. Then on page 243, an example of nonmonotonicity in an AC circuit is given for comparison. Examine the components for monotonicity: V := 1

K := 103

Definition of monotonicity: A function or series is monotonic increasing if X1 ≤ X2 ≤ X3, etc. Example: 1.0, 2.0, 2.0, 2.5, 2.6, 2.601, ... A function or series is monotonic decreasing if X1 ≥ X2 ≥ X3, etc. Example: 9.0, 9.0, 8.8, 8.7, 8.7, 8.69, ... We examine the component slopes (derivatives) of a DC differential amplifier by stepping two resistor values, R1 and R2: R1

R2

1

Ein2

11 2 − V−

R3 Ein1

Ein1 := 1

Ein2 := 1

3 + R4

1

V+ 4

Ao := 106

R1 := 1·K

Ein1 Ein 2

EE := (2

R4 := 10·K

99 Ein := 98

98 1 RR := 99 3

1 2 3 0

R1 R2 R 3 R 4

3

2

U := 3

R2 := 10·K 0

3

1

R3 := 1·K

Ao)

GG := 0

241

242

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\mcadwca\wcaref11\dcomm42.mcd Vn := 1solve(A1,B2)

VnT = (0.909

20

0.909)V

Vary R1 and R2 from 80 to 120%: ml := 0.8 A K :=

m2 := 1.2

W := 500

k := 1..W + 1

m 2 − m1 ⋅ ( k − 1) + m1 W

Component multiplier: A1 = 0.8

AW+1 = 1.2

Vn ( U, EE, GG, RR, Ein ) : = for k ∈1..W + 1 RR1,3 ← R1 ⋅ A k

Vaary R1

AE ← G ( U, EE, GG, RR, Ein ) AE routine from A1 ← AE1

dccomm42.mcd

B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v2 a k ← ( vn k )2 RR1,3 ← R1 for k ∈1..W + 1

Restore R1 to

RR 2,3 ← R 2 ⋅ A k

nominal value

AE ← G ( U, EE, GG, RR, Ein )

Vary R2

A1 ← AE1 B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v2 a k ← ( vn k )2 v2 a v2 b V2a := Vn(U, EE, GG, RR, Ein)1

V2b := Vn(U, EE, GG, RR, Ein)2

AC Circuits

243

Plot of output vs. component value change: R1

25

V2ak 20

15 0.8

R2

25

V2bk 20

0.9

1 R1·Ak

15

1.1

8

9

K

10 R2 ·Ak

11

12

K

Hence, resistors are monotonic in virtually all DC circuits because DC circuits are functions of R and/or 1/R. They can be nonlinear as R1. They can be bipolar but remain monotonic. Find the component slope for multiple-feedback-band pass filter (BPF) capacitor C1: R1 := 6366.2 uF := 10–6 C2 := 0.1·uF C1 := 0.1·uF

R2 := 80.5

R3 := 127324

Plot the output of the BPF at four constant frequencies (F1) while varying only C1. F1 := (470

480

490 500)T

e := 1..rows(F1)

S1 := 2 ⋅ π ⋅ F1 ⋅ −1 Instead of the NDS method, it is quicker to use the BPF transfer function:

G ( R1, R 2, R 3, C1, C2, s ) : =

s R1 ⋅ C1

s2 +

1 1 s 1 1 1 ⋅ + ⋅ + + R 3 ⋅ C1 ⋅ C2 R1 R 2 R 3 C1 C2

Clvk := C1·Ak Vary C1 80% to 120% V1k,e := |G(R1, R2, R3, C1vk, C2, sle)|

244

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad C1 varied from 0.08 uF to 0.12 uF

15 V1k,1 V1k,2 V1k,3 V1k,4

10

5 0 0.08

0.1 C1vk

470 Hz 480 Hz 490 Hz 500 Hz

0.12

uF

Frequency is constant for each trace. Only C1 varies. Next, we find the C1 slopes (derivatives) for the frequencies of 470 through 500 Hz to show the relationship between bipolar sensitivities and nonmonotonic components. These slopes are measured at the nominal value of C1, 0.1 uF, as shown by the plot vertical gridline. Note the slope gets steeper (at the 0.1 vertical grid line) from 470 to 480 to 490, and is zero for 500 Hz. h := 0.5·W + 1 h = 251 x2 = 0.10008uF x2 := C1vh+1 ∆x := x2 – x1 y2 := V1hh+1,1 y1 = 3.716V ∆y := y2 – y1

x1 := C1vh y2 = 3.735V

Approximate derivative: ∆y V = 239.51 ∆x uF Sensitivity: x1 ∆y ⋅ = 6.45 y1 ∆x Continuing: y2e := V1h+1,e

Sensle :=

y1e := V1h,e

x1 ∆y e ⋅ y1e ∆x

∆ye := y2e – y1e

6.45 8.41 Sens1 = 9.35 −0.24

x1 := 0.1uF y1 = V1h,1

AC Circuits

245

New set of frequencies, from 510 Hz to 530 Hz: F2 := (510 520 530)T e := 1..rows(F2) V1k,e := |G(R1, R2, R3, C1vk, C2, s2e)|

C1 varied from 0.08 uF to 1.2 uF

Output of BPF (volts)

15 V1k,1 V1k,2

S2 := 2 ⋅ π ⋅ F 2 ⋅ −1

10

V1k,3

5

0 0.08 510 Hz 520 Hz 530 Hz

0.1 C1vk uF Capacitance(uF)

0.12

Frequency is constant for each trace. Only C1 varies. y2e := V1h+1,e

y1e := V1h,e

x1 ∆y e Sens2 e := ⋅ y1e ∆x

∆ye := y2e – y1e

−10.16 Sens2 = −9.56 −7.76

Plot all seven sensitivities: Sens := stack(Sens1, Sens2)

F := stack(F1,F2)

Hence, bipolar sensitivities indicate nonmonotonic components. Do not use EVA, RSS, or FMCA tolerance analysis. Results will be erroneous. Use MCA.

246

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Sensitivities vs. frequency

15 10

%/%

5 Sens

0 −5 −10 −15 460

470

480

490

500 510 F Freq(Hz)

520

530

540

If more frequency points were used, this plot would duplicate the sensitivity plot of C1 shown in the BPF EVA, Section 11.10. As shown, bipolar sensitivities indicate the presence of nonmonotonic components. Hence, nonmonotonicity can be detected by calculating the normalized sensitivities, which is part of the normal tolerance analysis procedure given here. EVA, RSS, or FMCA should not be used if nonmonotonic components are present. The magnitude of the errors is a function of the maximum magnitudes of the bipolar sensitivities. For circuits such as the Butterworth low-pass filter, the errors may be negligible. If in doubt, use MCA. Some quotes from the literature on monotonicity are germane: From Improving the Manufacturability of Electronic Designs,[2] “Nonparametric boundary analysis … selects only those components in the tails of the distributions — the combinations most likely to cause yield problems — for a complete circuit simulation. An important constraint is that the functions … must be approximately monotonic… the author conjectures that the vast majority of practical circuit designs are approximately monotonic.” (Present author’s note: Guessing is not necessary now.) From Spence and Soin [1]: “Unfortunately, there is no straightforward procedure for testing whether monotonicity is obeyed.” (Present author’s note: True in 1988; not true in 1999.) From PSPICE user’s manual on worst-case analysis: “Worst-case (.WCASE) analysis … will show the true worst-case results when the collating function is monotonic with all tolerance combinations. Otherwise, there is no guarantee. Usually you cannot be certain if this condition is true, but insight into the operation of the circuit may alert you to possible anomalies.” (Present author’s note: Now you can be certain that this condition [nonmonotonicity] is true by looking for bipolar sensitivities. See the EVA of the band-pass filter [Section 11.10] for an example of “no guarantee.”)

AC Circuits

247

11.2 EXACT VALUES OF C1 SENSITIVITY In this section the exact expression for the sensitivity of C1 is calculated and plotted for comparison with the rough plot just shown on page 246 and the sensitivity plots in Section 11.10, page 258. fo := 500

wo := 2·π·fo DF :=

NP := 100 ωi := 2·π·fi

Q := 20

LF − BF NP

BF := 400

i := 1..NP

LF := 600

Fi := BF + DF·(i –1)

From Reference 3, SC1 ( ω ) : =

(

)

ω 2 ⋅ 2 ⋅ Q 2 ⋅ wo 2 − ω 2 + wo 2

(

2 ⋅ Q ⋅ wo − ω 2

2

2

)+ω

2

⋅ wo 2

[1] F36 = 470 SC1 ( ω 36 ) = 6.60 F41 = 480 SC1 ( ω 41 ) = 8.69 Sensitivity of C1

10 8 6

%/%

4 SC1(ωi)

2 0 −2 −4 −6 −8 −10 400

420

440

460

480

Value at ω = ωo: SC1(wo) = 0.5 Zero-crossing frequency:

fz := fo ⋅ 1 +

1 2 ⋅ Q2

fz = 500.31

500 520 Fi Freq(Hz)

540

560

580

600

248

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Peak amplitudes with Q:

k := 1..8

Qk := 5·(k – 1) + 5

( Q k )2

Vc1a k :=

( )

4 ⋅ Q2

k

−1

Vc1Q := augment(Q, Vc1a) Peak magnitude of C1 sensitivity in %/%: 5 Vc1Q T = 2.51

10 5.01

15 7.5

20 10

25 12.5

30 15

35 17.55

40 20

Note that the peak magnitude of C1 sensitivity is approximately Q/2.

11.3 MULTIPLE-OUTPUT EVA An example is the third-order Butterworth low-pass filter. uF := 10–6 K := 103 R1 Ein

V1 C1

V2

R2

C2

11 2 − V−

1

V+

3 +

4

V4

R3

V3 C3

R1 := 1·K

R2 := 1·K

C2 := C1

C3 := C1

99 RR := 2 4

1 3 3

LL := 0 BF := 2

R1 R 2 R 3

GG := 0 ND := 2

1 ⋅ uF 2⋅π Ein := (99 1)

R3 := 1·K U := 4

C1 :=

1 CC := 1 3 EE := (4 0 PD := 50

C1 C2 C 3

2 4 0 0

2

106)

AC Circuits

249

→ Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Call the wca function acwcalog.mcd with Y = 1, and store as Veva1. Y := 1 → Reference:C:\mcadwca\wcaref11\acwcalog.mcd Vev11 := MPeva1

Vev12 := MPeva2

Y := 4

Call the wca function acwcalog.mcd with Y = 4, and store as Veva2. → Reference:C:\mcadwca\wcaref11\acwcalog.mcd Vev21 := MPeva1

Vev22 := MPeva2

Y := 3

Call the wca function acwcalog.mcd with Y = 3, and store as Veva3. → Reference:C:\mcadwca\wcaref11\acwcalog.mcd Veva31 := MPeva1

Veva32 := MPeva2

EVA for V1

10

dBV

0 db[(Veva12)i] −10 db[(Veva11)i] −20 −30 −40

2

2.5

EVA Hi V1 EVA Lo V1

3 Li Log freq(Hz)

3.5

4

250

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA for V4

10

dBV

0 db[(Veva22)i] −10 db[(Veva21)i] −20 −30 −40

2

2.5

3 Li EVA Hi V4 Log freq(Hz) EVA Lo V4

3.5

4

3.5

4

EVA for V3

10

dBV

0 db[(Veva32)i] −10 db[(Veva31)i] −20 −30 −40

2

2.5

3 Li EVA Hi V3 Log freq(Hz) EVA Lo V3

11.4 BUTTERWORTH LOW-PASS FILTER CIRCUIT The schematic and components are given here. The various worst-case analyses, MCA, EVA, and FMCA, will refer to this circuit via a subprogram call.

R2 R1 Ein

C2

V1 R3

C1 11 2 − V− V2 3 +

V3 1

V+ 4

Unit suffixes: K := 103 uF := 10–6 nF := 10–9 R1 := 1.43·K R2 := 14.3·K R3 := 9.09·K

C1 := 2·nF

AC Circuits

251

C2 := 0.1·uF 99 RR := 3 1 LL := 0

U := 3 1 1 2

R1 R 2 R 3

GG := 0

Y := 3

Ein := (99

3 CC := 1 EE := (3

0

C1 C2

2 0 0

1)

2

106)

11.5 BUTTERWORTH LOW-PASS FILTER MCA For the schematic and component values, see Section 11.4. Call that circuit for data via a reference subprogram: → Reference:C:\crc_book_ms\wca_mcd\bwlpf_ckt.mcd Next, call comm42 to get the state space arrays A, B, D, and E: → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Specify the component tolerances before calling the tolerance array subprogram: Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

Variables: Tr — resistor tolerances in decimal percentage Tc — capacitor tolerances in decimal percentage Ti — inductor tolerances in decimal percentage (set to zero if there are no inductors) Te — input (Ein) tolerance Nk — number of Monte Carlo samples For single inputs (M = 1), Te can be set to zero as the output extremes can be later multiplied by a nonzero 1 + Te if desired. Te should not be set to zero when M > 1, because the sensitivities are no longer 1.0 %/% Call tolerance array subprogram TolArray: → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd Display tolerance array T as a check: The tolerances are in the order RR, CC, LL (if any) and Ein.

252

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R1

R2

R3

C1

C2 Ein

Tr

Tr

Tr

Tc

Tc

Te

−0.02 0.02

−0.02 0.02

−0.1 0.1

−0.1 0.1

0 0

−0.02 T= 0.02

Specify log AC frequency sweep and number of Monte Carlo samples Nk: BF := 2

ND := 2

PD := 50

Nk := 2000

Call the AC MCA subprogram: → Reference:C:\crc_book_ms\Ref_files_v11\mcalog.mcd Create plots: Note the plot parameters — MPmca (for magnitude/phase MCA) column 1 is the output due to uniform distribution inputs; column 2 is for the normal distribution. Nk = 2000

dBV

db[(MPmca1,1)i] db[(MPmca2,1)i] db[(MPmca3,1)i]

Y=3 25 20 15 10 5 0 −5 −10 −15 −20 −25

Uniform MCA at node Y

2

2.25

2.5

Unif MCA Lo Nom Unif MCA Hi

2.75

3 3.25 Li Log freq(Hz)

3.5

3.75

4

AC Circuits

253

dBV

db[(MPmca1,2)i] db[(MPmca2,2)i] db[(MPmca3,2)i]

25 20 15 10 5 0 −5 −10 −15 −20 −25

Normal MCA at node Y

2

2.25

2.5

Norm MCA Lo Nom Norm MCA Hi

2.75

3 3.25 Li Log freq(Hz)

3.5

3.75

4

11.6 BUTTERWORTH LOW-PASS FILTER EVA See Section 11.4 for the schematic. The calculation sequence is the same as that of MCA except for the last analysis subprogram called. → Reference:C:\crc_book_ms\wca_mcd\bwlpf_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2

ND := 2

PD := 50

Call EVA analysis subprogram for log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\acwcalog.mcd Plot sensitivities: Note the slight bipolarity of R2 and C2 sensitivities — more on this later.

254

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Sensitivities, R1, R2, R3

1 0

%/%

%/%

Sensi,1 Sensi,2 Sensi,3

−1 −2

2

2.5

3 3.5 Li Log freq(Hz)

R1 R2 R3

Sensitivities, C1, C2

0.5 Sensi,4 Sensi,5

0 −0.5 −1 −1.5

4

2

2.5 C1 C2

3 3.5 Li Log freq(Hz)

4

Y=3 EVA at node Y

25 20 15

dBV

db[(MPeva1)i] db[(MPeva2)i] db[(MPa1)i]

10 5 0 −5 −10 −15 −20 −25

2

2.25

2.5

EVA Lo EVA Hi Nom

2.75

3 3.25 Li Log freq(Hz)

3.5

3.75

4

This plot is virtually the same as the uniform MCA plot in Section 11.5.

11.7 BUTTERWORTH LOW-PASS FILTER FMCA See Section 11.4 for the schematic. The calculation sequence is the same as that of MCA except for the last analysis subprogram called. → Reference:C:\crc_book_ms\wca_mcd\bwlpf_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

AC Circuits

255

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2

ND := 2

PD := 50

Call FMCA analysis subprogram for log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Y=3 FMCA at node Y

25 20 15 10 dBV

db[(MPfmca1)i]

5

db[(MPfmca2)i]

0

db[(MPfmca3)i]

−5 −10 −15 −20 −25

2

2.25

2.5

2.75

FMCA Lo Nom Norm Hi

3 3.25 Li Log freq(Hz)

3.5

3.75

4

Because the sensitivities are not significantly bipolar, there is no discernible difference between (uniform input) MCA, EVA, and FMCA.

11.8 MULTIPLE-FEEDBACK BAND-PASS FILTER (BPF) CIRCUIT A Multiple-Feeback Band-Pass filter circuit is now used for another example. This band-pass filter has a center frequency of 500 Hz, and Q of 20. The same calculation sequence as in Section 11.7 for the Butterworth low-pass filter will be performed. C2

R3 C1

R1 Ein

V1 R2

K :=103

uF := 10–6

Hz := 1

V2

11 2 − V− 3 +

V3 1

V+

V := 1

4

256

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R1 := 6.34·K R2 := 80.6 R3 := 127·K C2 := C1 U := 3 Y := 3 Ein := (99 99 RR : 1 3

1 0 2

R1 R 2 R 3

GG := 0

EE := (3

1 CC := 3 0

0

2

2 1

C1 := 0.1·uF 1)

C1 C2

LL := 0

106)

11.9 MULTIPLE-FEEDBACK BPF MCA See Section 11.8 for the schematic and component values. The same calculation sequence (except for the last subprogram) is called. → Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Display T for tutorial purposes: R1 −0.02 T= 0.02

R2

R3

C1

−0.02 0.02

−0.02 0.02

−0.1 0.1

C2 Ein −0.1 0.1

0 0

This can be overwritten by an asymmetric T array if desired: −0.02 T= 0.02

−0.02 0.02

−0.03 0.05

−0.05 0.15

−0.05 0.15

0 0

Specify linear frequency sweep and Nk: BF := 400

LF := 600

DF := 2

Nk := 2000

Call the MCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd Extreme center frequency markers from EVA analysis: M1 := 447

M2 := 568

Y=3

Nk = 2000

AC Circuits

257 Uniform MCA at node Y

12 M1

Volts

10 (MPmca3,1)i

8

(MPmca2,1)i

6

(MPmca1,1)i

4

M2

2 0 400

420

440

460

480

Uniform MCA Hi Nominal Uniform MCA Lo

F41 = 480Hz

500 520 Fi Freq(Hz)

540

560

580

600

(MPmca3,1)41 = 10.794V

This is to be compared with the EVA at this same 480-Hz frequency of 3.38 V (see Section 11.10) and the FMCA value of 7.73 V (Section 11.11). Hence, MCA gives the best answer. Normal MCA at node Y

12

M1

Volts

10 (MPmca3,2)i

8

(MPmca2,2)i

6

(MPmca1,2)i

4

M2

2 0 400

420

440

460

480

Normal MCA Hi Nominal

500 520 Fi Freq(Hz)

540

560

580

600

Normal MCA Lo

F41 = 480

(MPmca3,2)41 = 10.586V

The normal distribution maximum is at 480 Hz.

11.10 MULTIPLE-FEEDBACK BPF EVA See Section 11.8 for the schematic and component values. The same calculation sequence except for the last subprogram is called.

258

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Specify linear frequency sweep: BF := 400

LF := 600

DF := 2

Call the EVA analysis subprogram for linear frequency sweep. → Reference:C:\mcadwca\wcaref11\acwcalin.mcd

Sensi,1

5

Sensi,2

0

Sensi,3

−5

Sensitivities, R1, R2, R3

−10 400

450 R1 R2 R3

500 550 Fi Freq(Hz)

Sensitivities, C1, C2

10

%/%

%/%

10

5

Sensi,4 Sensi,5

0 −5 −10 400

600

450 C1 C2

500 550 Fi Freq(Hz)

600

With the exception of R1, note the significant bipolarity of the aforementioned sensitivities. Extreme center frequency markers for symmetric tolerances: M1 := 447

M2 := 568 EVA Outputs

12

M1

Volts

10 (MPeva1)i

8

(MPeva2)i

6

(MPa1)i

4

M2

2 0 400

420

440

460

480

500 520 Fi Freq(Hz)

540

560

580

600

AC Circuits

259

This plot indicates that maximum amplitudes will only be obtained at 447 and 568 Hz. What about at, say, 480 Hz? F41 = 480Hz

(MPeva2)41 = 3.38V

Is 3.38 V the maximum this circuit will ever see at 480 Hz? The answer is no. See the FMCA analysis in Section 11.11.

11.11 MULTIPLE-FEEDBACK BPF FMCA See Section 11.8 for the schematic and component values. The same calculation sequence as in Section 11.8, except for the last subprogram, is called. → Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Specify linear frequency sweep: BF := 400 LF := 600 (1-Hz increments)

DF := 1

Call FMCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=3 Extreme center frequency markers: M1 := 447

M2 := 568

480-Hz amplitude marker: M3 := 7.73·V

260

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Band pass filter FMCA

14 M1

12

Volts

(MPfmca1)i

M2

10

M3

8

(MPfmca2)i

6

(MPfmca3)i

4 2 0 400

420

440

460

FMCA Lo Nom FMCA Hi

F81 = 480

480

500 520 Fi Freq(Hz)

540

560

580

600

(MPfmca3)81 = 7.73V

Peak responses are shown here for 9 of the 32 possible tolerance combinations. This analysis says that 7.73 V is the maximum we will ever see at 480 Hz. This obviously contradicts the EVA, where 3.38 V was predicted as the maximum amplitude. The FMCA, although showing interesting plots, is also incorrect. For the best answer, see the previous MCA (Section 11.9).

11.12 SWITCHING POWER SUPPLY COMPENSATION CIRCUIT A switching power supply compensation circuit is now used for a third example. Again, the same calculation sequence as in Section 11.7 for the Butterworth lowpass filter will be perfomed. K := 103 Meg := 106 u := 10–6 n := 10–9 p := 10–12 C4 R3 V4 C2 R1 Ein

L1

R4

V2

R5 V6 C3 V5

R6

V1 R2

RL V3

C1

V7

11 2 − V− 3 +

1

V+ 4

R1 := 0.2 RL := 9 R2 := 0.01 R3 := 4.99·K R4 := 100·K R5 := 100·K R6 := 1·Meg C1 := 47·u C2 := 1·n C3 := 1·n C4 := 100·p L1 := 180·u U := 7 Y := 7 LL := (1 2 L1) Ein := (99 1)

AC Circuits

261

99 2 2 RR := 2 2 5 5

1 3 0 4 5 6 7

Ao := 106

EE := (7

R1 R2 RL R 3 R4 R5 R 6

3 4 CC := 6 5

0

0

5

0 5 7 7

C1 C2 C 3 C 4

GG := 0

Ao)

11.13 SWITCHING POWER SUPPLY COMPENSATION MCA For the schematic and component values, see Section 11.12. Call data from that circuit. → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Component tolerances: Tr := 0.02

Tc := 0.1

Ti := 0.2

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Display tolerance array T from TolArray.mcd: Tr −2 T= 2

−2 2

−2 2

Tc −10 10

−2 2

−2 2 Ti

−10 10

−10 10

−20 20

−2 2

−2 2

−10 10

Te 0 % 0

Tolerance array T in RR, CC, LL, and Ein order. R1 R2 RL R3 R4 R5 R6 C1 C2 C3 C4 L1 Ein BF : = 2

ND : = 2

PD : = 40

Nk : = 2000

262

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

→ Reference:C:\crc_book_ms\Ref_files_v11\mcalog.mcd Y=7 Uniform & normal MCA at node Y

20

dBV

15 db[(MPmca3,1)i]

10

db[(MPmca2,1)i]

5

db[(MPmca1,1)i]

0

db[(MPmca3,2)i]

−5

db[(MPmca1,2)i] −10 −15 −20

2

2.2

2.4

2.6

Uniform MCA Hi Nominal Uniform MCA Lo Normal MCA Lo Normal MCA Hi

2.8

3 3.2 Li Log Freq(Hz)

3.4

11.14 SWITCHING POWER SUPPLY COMPENSATION EVA See Section 11.12 for the schematic. Call circuit data from that file: KHz = 103 → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0.2

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2

ND := 2

PD := 50

→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Notch marker: Mn := 3.23

3.6

3.8

4

AC Circuits

263

Plot sensitivities on same vertical scale: R1, R2, RL, R3

2

R4, R5, R6, C1

2

Mn

Sensi,2 Sensi,3 Sensi,4

0

Sensi,6

2

3 Li

R1 R2 RL R3

0

Sensi,7 Sensi,8

−1 −2

1

Sensi,5 0 %/%

%/%

Sensi,1

Mn

1

−1 −2

4

2 R4 R5 R6 C1

3 Li

4

C2, C3, C4, L1

2

Mn

%/%

Sensi,9 Sensi,10 Sensi,11 Sensi,12

1 0 0 −1 −2

2 C2 C3 C4

3 Li

4

L1

Note that C1 and L1 are significantly bipolar and, therefore, nonmonotonic. Also note that in the following plot, there is a notch in the EVA Hi trace, which is due to the nonmonotonicity of C1 and L1. Hence, the EVA is incorrect in the vicinity of the notch. The notch is at Mn = 3.23 Y=7

fnotch := 10Mn

fnotch = 1.698KHz

264

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA at node Y

20

Mn

15

dBV

db[(MPeva2)i] db[(MPeva1)i] db[(MPa1)i]

10 5 0 −5 −10 −15 −20

2

2.2

2.4

2.6

EVA Hi EVA Lo Nom

2.8

3 3.2 Li Log Freq(Hz)

3.4

3.6

11.15 SWITCHING POWER SUPPLY COMPENSATION FMCA For the schematic see Section 11.12. Call circuit data from that file. → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0.2

Te := 0

Specify component tolerances. → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 2

ND := 2

PD := 50

Specify AC log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Call AC FMCA subprogram. Y=7

3.8

4

AC Circuits

265

FMCA at Node Y

20 15 10

dBV

db (MPfmca3)i

5

db (MPfmca2)i

0

db (MPfmca1)i

5 10 15 20

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

4

Li

Log Freq (Hz)

FMCA Hi Nom FMCA Lo

11.16 SALLEN AND KEY BAND-PASS FILTER (BPF) CIRCUIT This circuit will show an unusual response to MCA with common component tolerances but not with precise component tolerances. An explanation for this anomaly will be given. uF := 10–6

K := 103 R2 R1 Ein

V1 C1

C2

V2

3

R3

+

2 − V3 R4

4 V+

V4

1

V− 11 R5

R1 := 15.8·K R2 := 5.11·K R3 := 2.61·K C1 := 0.1·uF C2 := C1 U := 4 Y := 4

R4 := 3.32·K R5 := 13.3·K Ein := (99 1)

99 4 RR := 2 3 4

C1 C2

GG := 0

1 1 0 0 3

R1 R2 R 3 R 4 R 5

EE := (4

1 CC := 1

0 2

3

106)

0 2

LL := 0

266

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

11.17 SALLEN AND KEY BPF MCA See Section 11.16 for the schematic and component values. Call subprograms per previous sequences: → Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd The MCA outputs are first given using precision tolerances and then with common tolerances: Precision tolerances: Tr := 0.002

Tc := 0.01

Ti := 0.

Te := 0

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd R1

R2

R3

R4

R5

C1

−02 T= 0.2

−02 0.2

−02 0.2

−02 0.2

−02 0.2

−1 1

C2 Ein −1 1

0 % 0

Displayed in percentage. Specify linear frequency sweep and Nk: BF := 400

LF := 600

DF := 1

Nk := 2000

Call MCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd 10

Volts

(MPmca3,1)i (MPmca2,1)i (MPmca1,1)i

Precision tolerances

8 6 4 2 0 400 425 450 475 500 525 550 575 600 Fi Freq(Hz) MCA Hi Nom MCA Lo

AC Circuits

267

Note that the center frequency of 500 Hz does not vary. Only the amplitude varies. Change to common tolerances: Tr := 0.02

Tc := 0.1

Call tolerance array subprogram again: → Reference:C:\mcadwca\wcaref11\TolArray.mcd −2 T= 2

−2 2

−2 2

−2 2

−2 2

−10 10

−10 10

0 % 0

Call MCA subprogram again. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd Note change of vertical scale! Nk = 2000 1500

Volts

(MPmca3,1)i (MPmca2,1)i (MPmca1,1)i

Common tolerances

1200 900 600 300 0 400 425 450 475 500 525 550 575 600 Fi Freq(Hz) MCA Hi Nom MCA Lo

See the following text for an explanation of what causes the MCA spikes with common tolerances.

11.17.1 SALLEN AND KEY BPF — MCA AND PRECISION TOLERANCES

WITH BOTH

COMMON

This circuit is designed for a center frequency fo of 500 Hz, a peak gain of 10 V/V, and a Q of 10. Two output plots were shown. The first is with precision resistor tolerances of 0.2% and capacitor tolerances of 1%.

268

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Compare this plot with the second one, which uses common tolerances of 2% and 10% for resistors and capacitors, respectively. The common tolerance plot becomes “pathological” in that there are numerous spikes in the output. The reason for this can be found by looking at the transfer function for this circuit. The standard form of the band-pass transfer function is: G (s) =

N1s s2 + D1s + D 0

in which for this circuit, D1 =

1 1 2 R5 R 4 + R5 + − and N i = R1 ⋅ R 4 ⋅ C1 C1 R1 R 3 R 2 ⋅ R 4

The peak gain is given by Gpk =

N1 . Obviously, if D1 is ever zero or close to D1

it, Gpk will “blow up.” 1 2 R5 + = . R1 R 3 R 2 ⋅ R 4 By assigning tolerance multipliers of 0.982 for R2, 0.9816 for R4, and 1.02 for R5 (all at or within the ±2% tolerance), it will be found that D1 = 0.166, N1 = 3267.56, and Gpk = 19,688 or about 85 dBV. Given Nk Monte Carlo samples, it can be seen from the second plot that there are many more random tolerance combinations that will cause Gpk to become extremely high. Hence, the culprit here is the minus sign in D1, for which the analog circuit designer should be wary of in band-pass filter circuits using this topology. Because of the random nature of MCA, the size of the spikes will be different for each run. It was stated in the introduction to Part II that Monte Carlo analysis (MCA) will produce realistic results for virtually any circuit that has a reasonably accurate and stable mathematical model. Because one term (D1) of the transfer function can become negative, this causes unstable roots in the right-half s-plane. Hence, with the common tolerances, this circuit does not qualify. The reader is cautioned that in using the NDS method, this instability would not have been foreseen. Hence, the transfer functions G(s) still serve a useful purpose and should be examined when any erratic circuit analysis behavior is observed. D1 will be zero when

11.18 SALLEN AND KEY BPF EVA See Section 11.16 for the schematic and component values.

AC Circuits

269

→ Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 400

LF := 600

DF := 2

→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd R1 is the middle trace in the following plot. Sign-change markers: M1 := 456

20 Sensi,1 Sensi,2 Sensi,3

M2 := 554

Sensitivities, R1 thru R5 10

10

M2

M1

5 Sensi,6

0

Sensi,7

Sensi,4

Sensi,5 −10 −20 400

Sensitivities, C1 & C2

0 −5

450 R1 R2 R3 R4 R5

500 Fi

550

600

−10 400

450 C1 C2

500 Fi

550

600

The following large ugly gap is caused by the sign changes of C1 and C2 sensitivities. Note markers M1 and M2. Again, nonmonotonic components = bipolar sensitivities, and EVA results are rendered meaningless.

270

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA output at node Y

20

M1

Volts

(MPeva1)i

M2

15

(MPeva2)i 10 (MPa1)i

5 0 400

425

450

475

EVA Lo EVA Hi Nom

500 525 Fi Freq(Hz)

550

575

600

11.19 SALLEN AND KEY BPF FMCA See Section 11.16 for the schematic and component values. → Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 400

LF := 600

DF := 2

→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=4 FMCA at node Y

80

Volts

(MPfmca3)i 60 (MPfmca2)i 40 (MPfmca1)i

20 0 400

425

450

FMCA Hi Nom FMCA Lo

475

500 525 Fi Freq(Hz)

550

Number of components in this circuit including the input: Nc := 8

575

600

AC Circuits

271

With common tolerances, some of the 2Nc = 256 tolerance combinations will cause Gpk (FMCA Hi) to be large.

11.20 STATE VARIABLE FILTER CIRCUIT This circuit is used to show the affects of increasing the number of Monte Carlo samples Nk. It will be shown that Nk and the tolerance band are of course directly proportional, but nonlinear. For example, doubling Nk does not double the width of the tolerance band. n := 10–9 K := 103 R3

V7

C1 R2

V2 2

R1 V1 Ein

3

− +

11

V3

V−

1

V+ 4

C2

V4 R4 2

−

3 +

11

V6

V5 R5

V− 1

V+

2

4

−

3 +

11

V7

V−

1

V+ 4 R8

V9 V1

R6

V5

R7 2 R9 V8 3

− +

11

V10

V− V+

1 4

R10

V7

R1 := 10·K R2 := 20·K R3 := 10·K R4 := 182·K R5 := 2.2·K R6 := 20·K R7 := 10·K R8 := 100·K R9 := 10·K R10 := 100·K C1 := 1.125·n C2 := C1 U := 10 Y := 10 Ao := 106 LL := 0 GG := 0 99 7 2 3 5 RR := 1 5 9 3 8

1 2 3 4 6 5 9 10 8 7

R1 R2 R3 R 4 R5 Ein := (99 R6 R7 R8 R9 R10

1)

4 CC := 6

5 7

C1 C2

272

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

3 5 EE := 7 10

0 0 0 0

1 0 0 8

Ao Ao Ao Ao

2 4 6 9

11.21 STATE VARIABLE FILTER MCA For the schematic and component values see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd T=

−2 2

−2

−2

−2

−2

−2

−2

−2

−2

−2

−10

−10

2

2

2

2

2

2

2

2

2

10

10

BF := 3000

LF := 7000

NP := 100

DF :=

LF − BF NP

0

0

%

Nk := 2000

→ Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd The following plots show the effects of increasing Nk on the tolerance bands. Extreme center frequency markers from EVA 11.22: M1 := 4388 M2 := 5795 Nk = 20 Y = 10

Volts

140 120

Uniform MCA at node Y M1

M2

(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz) MCA Lo Nom MCA Hi

AC Circuits

273

Nk = 200 140

Volts

120

Uniform MCA at node Y M1

M2

(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz)

Nk = 2000

Volts

140 120

Uniform MCA at node Y

M1

M2

(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz)

11.22 STATE VARIABLE FILTER EVA For the schematic and component values, see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 3000

LF := 7000

DF := 20

→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd

274

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Sensitivities

10

Sensi,3 Sensi,4 Sensi,5

5

Sensi,11 %/%

%/%

Sensi,2

0 −5 −10

3

4

R2 R3 R4 R5

Sensitivities

10

5 6 Fi K Freq(KHz)

5

Sensi,12

0

Sensi,13

−5 −10

7

3

4

C1 C2 Ein

5 Fi

6

7

K Freq(KHz)

The preceding plots show that 6 of the 13 components are nonmonotonic. Ein sensitivity is +1 as expected. Extreme center frequency markers: M1 := 4388

M2 := 5795 EVA at node Y

140

Volts

(MPeva2)i (MPeva1)i (MPa1)i

M2

M1

120 100 80 60 40 20 0 3000

3500

4000

EVA Hi EVA Lo Nom

4500

5000 5500 Fi Freq(Hz)

6000

6500

7000

The “spike” at 5 KHz is caused by the asynchronous polarity change of the nonmonotonic components. From the zoomed sensitivity plots below, all zero crossovers do not take place at the same frequency.

AC Circuits

275 Sensitivities

10 Sensi,3

5

Sensi,4

0

Sensi,5

−5 −10 4.9

5 %/%

%/%

Sensi,2

Sensitivities

10

Sensi,11

0

Sensi,12

−5 4.95

R2 R3 R4 R5

5 5.05 Fi K Freq(KHz)

−10 4.9

4.95

C1

5 5.05 Fi K Freq(KHz)

C2

Hence, at 5.00 KHz to 5.02 KHz, the polarity of the sensitivities are not changing sign together. This causes the EVA process, which detects sensitivity sign changes, to show a different magnitude in this 20-Hz frequency band.

11.23 STATE VARIABLE FILTER FMCA AND MCA COMBINED For the schematic and component values see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 3000

LF := 7000

DF := 20

Nk := 2000

→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd

276

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad FMCA & MCA at node Y

140 120

Volts

(MPmca3,1)i (MPfmca2)i (MPfmca3)i

100 80 60 40 20 0 3000

3500

4000

MCA Hi Nom FMCA Hi

4500

5000 5500 Fi Freq(Hz)

6000

6500

7000

Another telltale sign of nonmonotonic components is that MCA is greater than FMCA. This occurs at about 5400 Hz, as the following plot shows.

140

FMCA & MCA (Zoomed)

Volts

(MPmca3,1)i (MPfmca2)i 120 (MPfmca3)i 100 4000

4500

5000

5500

6000

Fi Freq(Hz)

11.24 HIGH-Q HUM NOTCH FILTER CIRCUIT The following circuit has an extremely sharp notch. This notch would be very difficult to realize on a circuit board due to temperature drift of the components. In spite of this, the circuit is interesting to analyze and show the response to component tolerance variation. K := 103

nF := 10–9

AC Circuits

277 RS RB

R7

V10

V5 2

−

3+

FNOTCH R1

C1

11

V6

V−

V7

R9

R10 V8

1

V+ 4

2

C2

1K R3

4 V+

1

V−

− 11 V9

R2

V4

3 +

R4

Ein 2 QNOTCH R6A

−

3+ V3

11 V− V+ 4 R6B

1 V9

R1 := 4.73·K R2 := 100·K R3 := 100·K R4 := 200·K R6 := 100·K R7 := 100·K R8 := 4.99·K R9 := 681·K R10 := 681·K Rs := 0.01 C1 := 3.9·nF C2 := C1 a := 0.01 (Qnotch (R6) pot setting factor can be set from 0.01 to 0.99.) R6A := a·R6 R6B := (1 – a)·R6 U := 10 Y := 9 Ao := 106 Ein :=(99 1) 99 4 99 1 3 RR := 3 5 5 6 7 99 2 EE := 6 9

R1 R2 R3 R 4 R 6 A R 6B R7 R8 R9 R10 Rs

4 0 1 2 0 9 0 6 7 8 10 0 0 0

3 4 8

1 5 9

10 CC := 2

Ao Ao Ao

8 7

C1 C2

LL := 0

GG := 0

278

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

11.25 HIGH-Q HUM NOTCH FILTER MCA For the schematic and component values, see Section 11.24. Get circuit data. → Reference:C:\crc_book_ms\wca_mcd\hiqhum_ckt.mcd Get A, B, D, and E state space arrays. → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

Component tolerances in decimal percent → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd Display tolerance array T: −2 2

−2

−2

−2

−2

−2

−2

−2

−2

−2

−2

−10

−10

2

2

2

2

2

2

2

2

2

2

10 0

10

BF := 50

LF := 70

DF := 0.1

0

0

Nk := 2000

→ Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd The following plot shows both uniform and normal minimums. Y=9 MCA at node Y

−10 −30 db[(MPmca1,1)i] dBV

T=

db[(MPmca2,1)i] db[(MPmca3,1)i] db[(MPmca1,2)i]

−50 −70 −90 −110 50

52

54

56

Uniform MCA Lo Nominal Uniform MCA Hi Normal MCA Lo

58

60 62 Fi Freq(Hz)

64

66

68

70

%

AC Circuits

279

11.26 HIGH-Q HUM NOTCH FILTER EVA See Section 11.19 (MCA) for schematic. Get circuit data → Reference:C:\crc_book_ms\wca_mcd\hiqhum_ckt.mcd Get A, B, D, & E state space arrays → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

Component tolerances in decimal percent → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 50

LF := 70

DF := 0.1

→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd 200

C1 sensitivity

200

Sensi,12

100 %/%

%/%

100

C2 sensitivity

0

Sensi,13

0

−100

−100

−200 54 56 58 60 62 64 66 Fi Hz

−200 54 56 58 60 62 64 66 Fi Hz

Note the extreme bipolarity. Also note that Vo approaches zero at F = 60 Hz. Hence, dividing by Vo here causes the sensitivities to be very large. Extreme notch frequency markers: M1 := 53.5 Y=9

M2 := 68.3

280

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA at node Y

−10

dBV

db[(MPeva1)i] db[(MPeva2)i] db[(MPa1)i]

M2

M1

−30 −50 −70 −90 −110 50

52

54

56

58

EVA Lo EVA Hi Nom

60 62 Fi Freq(Hz)

64

11.27 HIGH-Q HUM NOTCH FILTER FMCA For the schematic and component values, see Section 11.24. → Reference:C:\crc_book_ms\wca_fmcd\hiqhum_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\crc_book_ms\Ref_files_v11\tolArray.mcd BF := 50

LF := 70

DF := 0.1

EVA notch markers: M1 := 53.5

M2 := 68.3

→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=9

Y=9

66

68

70

AC Circuits

281

−10

FMCA at node Y

M2

M1

−30

dBV

db[(MPfmca1)i] db[(MPfmca2)i] db[(MPfmca3)i]

−50 −70 −90 −110 50

52

54

56

FMCA Lo Nom FMCA Hi

58

60 62 Fi Freq(Hz)

64

66

68

70

11.28 LTC 1562 MCA See Part I (Section 3.15) for a schematic of the four connected sections and opamp rolloff subcircuit. Component count = 68. → Reference:C:\mcadckts\CaNL11\ltc1562.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

Nk := 2000

→ Reference:C:\mcadwca\wcaref11\tolArray.mcd Markers for EVA extreme center frequencies (see Section 11.29): → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd M1 := 87

M2 := 116

Y = 20

282

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad LTC 1562 MCA at node Y

30 20

dBV

db[(MPmca3,1)i]

Y = 20

M2

M1

10 0

db[(MPmca2,1)i] −10 −20 db[(MPmca1,1)i] −30 db[(MPmca3,2)i] −40 −50 −60 −70 40

60

80

Uniform MCA Hi Nominal Uniform MCA Lo Normal MCA Hi

100

120 Fi K Freq(KHz)

140

160

180

11.29 LTC 1562 EVA In this section an Extreme Value Analysis (EVA) of the 68-component LTC 1562 circuit is performed. The EVA markers M1 and M2, used in the previous section, are calculated here for MCA comparison. → Reference:C:\mcadckts\CaNL11\ltc1562.mcd Tr := 0.02

Tc := 0.1

Ti := 0

Te := 0

→ Reference:C:\mcadwca\wcaref11\tolArray.mcd → Reference:C:\mcadwca\wcaref11\acwcalin.mcd

AC Circuits

283 Some (Bipolar) sensitivities

%/%

4 Sensi,3

2

Sensi,6

0

Sensi,39

−2 −4

40

60

80

R1A R6 C2D

M1 := 87

100

120 Fi K Freq(KHz)

140

160

180

M2 := 116

These are the extreme frequency markers. Y = 20 EVA at node Y

dBV

30 20 10 0

db[(MPeva1)i] −10 db[(MPeva2)i] −20 −30 db[(MPa1)i] −40 −50 −60 −70 40

M2

M1

60

EVA Lo EVA Hi Nom

80

100

120 Fi K Freq(KHz)

140

160

180

284

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

REFERENCES 1. Spence and Soin, Tolerance Design of Electronic Circuits, Addison-Wesley, Wokingham, England, 1988, p. 31. 2. Improving the Manufacturability of Electronic Designs, IEEE Spectrum, June 1999, p. 70. 3. Boyd, R., Tolerance Analysis of Electronic Circuits Using MATLAB, CRC Press, Boca Raton, FL., 1999, p. 115.

12

Transient Tolerance Analysis

12.1 TRANSIENT MCA — TWIN-T RC NETWORK Tolerance analysis in the time domain is explored in this and subsequent sections. The first circuit analyzed is a passive 60-Hz notch filter. C2 V4

C3

V1 R5

Rs R1

R3

V2

V3

Ein C1

R7

K := 103 u := 10–6 Meg := 106 m := 10–3 R1 := 265·K R3 := 265·K R5 := 133·K R7 := 10·Meg Rs := 0.01 C1 := 0.02·u C2 := 0.01·u C3 := 0.01·u U := 4 Y := 3 Ein := (99 1) 99 2 RR := 1 3 99 LL := 0

R1 R 3 R5 R 7 Rs

2 3 0 0 4

2 CC := 4 1

0 1 3

C1 C2 C 3

GG := 0

EE := 0

→ Reference:C:\mcadwca\wcaref11\comm42.mcd See Part I for a review of the nominal Mathcad transient analysis method. 1 = 877.78 u min ( A ) kmax :=

Tper ∆t

1 = 5.3m max ( A )

∆t := 50·u

Tper := 80·m

Nk := 500

285

286

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Note that ∆t is << 878us because of output spikes. Create an input pulse using Mathcad’s unit step function Φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.01·Tper, 0.5·Tper) Tr := 0.05 Tc := 0.01 Ti := 0 (Input tolerance Te not used for transient analysis.) → Reference:C:\mcadwca\wcaref11\tranlin.mcd MCA at node Y

1

Y=3

Volts

(Vnj)1 vminj vmaxj

0.5

Eapp(j⋅ ∆t) 0

0

10

20

30

Nom MCA Lo MCA Hi Input

40 50 j⋅ ∆t m Time(ms)

60

70

80

Y=3

12.2 TRANSIENT MCA — MULTIPLE FEEDBACK BPF The Multiple Feedback Bandpass Filter, previously analyzed in the frequency domain in Section 11.8, is now examined to show the effects of component variation in response to a pulse input. The first plot shows the MCA for Nk = 10, while the second shows the response variation for Nk = 1000; Nk being the number of samples. C2 R1 Ein

V1 R2

R3 C1 V2 2

−

3 +

11

V3

V−

1

V+ 4

K := 103 uF := 10–6 us := 10–6 ms := 10–3 C1 := 0.1·uF C2 := C1 R1 := 6.34·K R2 := 80.6 R3 := 127·K U := 3 Y := 3 Ein := (99 1)

Transient Tolerance Analysis

99 RR := 1 3 EE := (3

1 0 2 0

0

287

R1 R 2 R 3 2

1 CC := 3

C1 C2

2 1

LL := 0

GG := 0

106)

→ Reference:C:\mcadwca\wcaref11\comm42.mcd 1 = 12.68 ms min ( A )

1 = 7.964 us max ( A )

∆t := 5·us

Tper := 5·ms

Create a delayed input pulse using Mathcad’s unit step function Φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.001·Tper, 0.1·Tper) Tr := 0.02

Tc := 0.01

Ti := 0

Nk := 1000

→ Reference:C:\mcadwca\wcaref11\tranlin.mcd Nk = 10

1.2 0.8

Volts

(Vnj)1 vminj vmaxj

0.4 0

Ein1,2 . Eapp(j ·∆t) −0.4 −0.8 −1.2

0

1

Nom Min Max Pulse input

2 j · ∆t ms Time(ms)

3

4

5

288

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Nk = 1000 1.2 0.8

Volts

(Vnj)1

0.4

vminj

0

vmaxj

Ein1,2 . Eapp(j ·∆t) −0.4 −0.8 −1.2

0

1

2

3

4

5

j · ∆t ms Time(ms)

Nom Min Max Pulse input

Initial output is negative because of the inverting opamp.

12.3 AC AND TRANSIENT MCA — BESSEL HPF The next circuit chosen to illustrate transient tolerance analysis is a Bessel highpass filter. A nominal AC analysis is also given here, as well as an example of using the G array introduced in Section 1.1.2. K := 103

u := 10–6

n := 10–9

MHz := 106

Hz = 1

R1

V3 R4

V1 C1

V2

C2

C3

V4

3

Ein R2

V6 + −

R5 EE1

R3

V7 C4

V8 + −

R6 EE2

p := 10–12

2

V9 C5

+

−

4 V+

V5 1

V− 11

V5 +

EE3

−

Controlled sources EE1 through EE3 model the opamp of the Bessel highpass filter.

Transient Tolerance Analysis

289

R1 := 52·K R2 := 75·K R3 := 287·K R4 := 0.01 R5 := 1·K R6 := 1·K C1 := 1.55·n C2 := C1 C3 := C1 fp1 := 100·Hz fp2 := 1·MHz 1 1 C5 := 2 ⋅ π ⋅ fp1 ⋅ R 5 2 ⋅ π ⋅ fp 2 ⋅ R 6 Y := 5 Ein := (99 1) C 4 :=

3 2 4 RR := 99 6 8

5 0 0 1 7 9

R1 R2 R 3 R 4 R5 R6

6 EE := 8 5

Vp : = 4 Ao := 10

1 2 CC := 3 7 9

6

Vn : = 5

2 3 4 0 0 0 0 0

U := 9

C1 C2 C 3 C 4 C5

Vp 7 9

Vn 0 0

LL := 0

GG := 0

1 1 Ao

→ Reference:C:\mcadwca\wcaref11\comm42.mcd BF := 2

ND := 6

PD := 25

NP :=ND·PD + 1

i := 1..NP

i −1 s := 2 ⋅ π ⋅ 10 L ⋅ −1 cvi := D·(si·I – A)–1·B + E PD Voi := db(cvi) fo := 1000·Hz log(fo) = 3 L i := BF +

Asymptote equation: Vmi := 60·log(10Li–3) Output magnitude at node Y

dBV

20 Voi Vmi

0 –20 –40 –60

2

3

4

5 Li Log freq(Hz)

6

7

8

Note gain peaking and rolloff due to opamp. Transient MCA: 1 = 80.6 p min ( A )

1 = 159.155 n max ( A )

∆t := 50·p

Tper := 500·n

290

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

kmax :=

Tper ∆t

Nk := 200

pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.001·Tper, 0.1·Tper) Tr := 0.02

Tc := 0.01

Ti := 0

Nk := 1000

→ Reference:C:\mcadwca\wcaref11\tranlin.mcd Transient response MCA at node Y

2 1

Volts

(Vnj)1 vminj

0

vmaxj Eapp(j ·∆t)

−1 −2

0

100

200

Nom Min Max Pulse input

Nk = 200

300 j · ∆t n Time(ms)

400

500

Y=5

Verification of state space arrays: R2 W := 0 0

0 R 3 − R1 R 3

C1 P := diag C2 C 3

1 S = 1 1 D := (0

−R2 R1 0

0

0)

1 Q := ( −1) ⋅ 1 1

C := (W·P)–1

0 1 1

0 0 1

A := C·Q

E := 0

Use G array: Because V4 = V5 = Vo = iC3·R3 (Ideal opamp) F := (0 0 R3) G := F·P G = (0 0 444.85)u I := identity(3) cvi := (D + G·A)·(si·I – A)–1·B + E + G·B Vai := 20·log(|cvi|)

Ein1,2 S : = Ein1,2 Ein 1,2

B := C·S

Transient Tolerance Analysis

291

20 0 Vai Vmi

–20 −40 −60

2

3

4

5 Li

Ideal output Asymptote

6

7

8

The previous plot shows the response with an ideal opamp with no frequency rolloff or gain peaking.

12.4 TRANSIENT MCA — STATE VARIABLE FILTER Here the state variable filter, previously analyzed in the frequency domain in Section 11.20, is used again to show the oscillatory, ringing response to a pulse input. The tolerance bands of this oscillatory response due to component value variation are also shown. K := 103

n := 10–9

u := 10–6

m := 10–3

R3

V7

C1 R2

V2 2

R1 Ein

V1 3

− +

11

V3

V−

R4

1

V+ 4

C2

V4 2

−

3 +

V1

11

V5

V−

R5

V6

1

V+

2

4

R6

−

3 +

V5

R7

11

2 3

4 R8

− +

11

R4 := 182·K R8 := 100·K

V10

V− V+

1 4

R10

R3 := 10·K R7 := 10·K

1

V+

V9

R9 V8

R1 := 10·K R2 := 20·K R5 := 2.2·K R6 := 20·K R9 := 10·K R10 := 100·K

V7

V−

V7

292

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

C1 := 1.125·n 99 7 2 3 5 RR := 1 5 9 3 8

LL := 0

C2 := C1 1 2 3 4 6 5 9 10 8 7

GG := 0

R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10

U := 10

Ein := (99

3 5 EE := 7 10

0 0 0 0

Ao := 106

Y := 10

4 CC := 6

1)

1 0 0 8

5 7

Ao Ao Ao Ao

2 4 6 9

→ Reference:C:\mcadwca\wcaref11\comm42.mcd 1 = −2.475 u min ( A ) kmax := 2000

1 = 409.501u max ( A )

∆t := 1·u

Tper := kmax·∆t

pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(x, 0.01·Tper, 0.5·Tper) Tr := 0.02

Tc := 0.01

Ti := 0

Nk := 300

→ Reference:C:\mcadwca\wcaref11\tranlin.mcd

Tper = 2m

C1 C2

Transient Tolerance Analysis

293 Transient output at node Y

15 10

Volts

(Vnj)1

5

vminj

0

vmaxj 10 . Eapp(j · ∆t)

–5 −10 −15

0

0.2

0.4

0.6

Nom Min Max Input pulse x 10

Y = 10

Nk = 300

0.8

1 j·∆t m Time(ms)

1.2

1.4

1.6

1.8

2

This page intentionally left blank

13

Three-Phase Circuits

13.1 THREE-PHASE Y-CONNECTED UNBALANCED LOAD MCA uH := 10–6

uF := 10–6

Single-ended two-phase Y input on A and B as before. R5 +

V1

EinA

R1

−

C1

V2 R3

R2

V4

V3

L1

EinC= 0

EinB

+

R4

V5

−

R1 := 12 R2 := 20 R3 := 3 R4 := 0.01 L1 := 636.62·uH C1 := 9.947·uF 99 1 Ein := CC := (2 3 C1) 98 1 EE := 0 GG := 0 U := 5 Y := 3 99 1 RR := 3 4 98

1 2 0 3 5

R5 := 0.01

LL := (5

4

L1)

R5 R1 R2 R 3 R 4

→ Reference:C:\mcadwca\wcaref11\comm42.mcd BF := 2 ND := 3 PD := 40 Tr := 0.02 Tc := 0.1 Ti := 0.2 Te := 0.05

295

296

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Unif := 1 Unif = 1 calls uniform distribution; Unif = 0 calls normal distribution. Nk := 1000 → Reference:C:\mcadwca\wcaref11\TolArray.mcd → Reference:C:\mcadwca\wcaref11\3ph_ac_mcalog.mcd Display input amplitude and phase: 100 − 173.205 i u= |u1| = 200 −100 − 173.205 i |u2| = 200 rd·arg(u2) = –120 deg Nk = 1000

rd·arg(u1) = –60 deg

MCA magnitude

200

Volts

(Vmca1)i 150 (Vmca2)i

100

(Vmca3)i

50 0

2

2.5

3

MCA Lo Nom MCA Hi

3.5 Li Log freq(Hz)

4

4.5

5

MCA phase angle

−50 −70

Deg

(Vmca4)i (Vmca5)i

−90

(Vmca6)i −110 −130 −150

2

2.5 MCA Lo Nom MCA Hi

3

3.5 Li Log freq(Hz)

4

4.5

5

Three-Phase Circuits

297

13.2 THREE-PHASE Y-CONNECTED UNBALANCED LOAD EVA deg := 1

uH := 10–6

uF := 10–6

See Section 13.1 for the schematic. R1 := 12 R2 := 20 R3 := 3 R4 := 0.01 R5 := 0.01 L1 :=636.62·uH C1 := 9.947·uF U := 5 Y := 3 fo :=

1 2 ⋅ π ⋅ L1 ⋅ C1

CC := (2

EE := 0

3

C1)

GG := 0

fo = 2000

LL := (5

4

1 3 RR := 4 98 99

log(fo) = 3.3

L1) 2 0 3 5 1

99 Ein := 98

1 1

R1 R2 R 3 R 4 R 5

→ Reference:C:\mcadwca\wcaref11\comm42.mcd BF := 2 ND := 3 PD := 40 Tr := 0.02 Tc := 0.1 Ti := 0.2 Te = input (Ein) tolerance.

Te := 0.05

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd → Reference:C:\mcadwca\wcaref11\3ph_ac_evalog.mcd Display input amplitude and phase: 100 − 173.205 i u= |u1| = 200 −100 − 173.205 i |u2| = 200 rd·arg(u2) = –120 deg M1 := 3.34 M2 := 3.55 (Plot markers)

rd·arg(u1) = –60 deg

298

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Magnitude sensitivities

%/%

2 Sensi,1

1

Sensi,2

0

M1

M2

Sensi,3 −1 −2

2

2.5

3

R1 R2 R3

3.5 Li

4

4.5

5

Log freq(Hz)

Note bipolarity and zero crossing of sensitivities at M1 and M2. Magnitude sensitivities

3

M1

%/%

2 Sensi,6

1

Sensi,7

0

M2

−1 −2

2

2.5

3

3.5 Li

4

4.5

5

4

4.5

5

Log freq(Hz)

C1 L1

Magnitude sensitivities

3

M1

%/%

2 Sensi,8

1

Sensi,9

0

M2

–1 –2

2

2.5 EinA EinB

3

3.5 Li Log freq(Hz)

Three-Phase Circuits

299

The sensitivity plot of EinA and EinB requires some comment: If Ein were 99 1 changed to Ein := , i.e., EinB at node 98 = 0, the sensitivity of EinA 98 0 would +1 across the entire frequency band, or any frequency band. But, because there are two inputs, one via the capacitor C1 (EinA) and the second via the inductor L1 (EinB), the sensitivity of each varies with frequency. Because C1 becomes a short at high frequency, the sensitivity of EinA goes from zero to +1 as the frequency is increased. Because L1 becomes open at high frequency, it does just the opposite, namely, the sensitivity goes from +1 to zero, and conversely for low frequencies. Hence, when there is more than one input (M > 1), the tolerance analysis answers cannot merely be multiplied by 1 + Te, as they can for the M = 1 case. Thus, input tolerances become significant when M > 1. Te = 0.05 EVA magnitude

200

M1

M2

150 Volts

(MPeva1)i (MPeva2)i 100 (MPa1)i 50 0

2

2.5

3

M1

−70

Deg

(MPeva4)i (MPa2)i

4

4.5

5

EVA phase angle

−50

(MPeva3)i

3.5 Li Log freq(Hz)

M2

−90 −110 −130 −150

2

2.5

3

3.5 Li Log freq(Hz)

4

4.5

5

300

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

13.3 THREE-PHASE Y-CONNECTED UNBALANCED LOAD FMCA deg := 1

uH := 10–6

uF := 10–6

Single-ended two phase Y input as before. For the schematic, see Section 13.1. R1 := 12

R2 := 20

L1 := 636.62·uH

R3 := 3

C1 := 9.947·uF 99 1 RR := 3 4 98

log (fo) = 3.3

LL := (5

4

U := 5

Y := 3

R4 := 0.01

L1)

1 2 0 3 5

99 Ein := 98

fo :=

R5 := 0.01

1 2 ⋅ π ⋅ L1 ⋅ C1

fo = 2000

R5 R1 R2 R 3 R 4

CC := (2

3

1 1

EE := 0

GG := 0

C1)

→ Reference:C:\mcadwca\wcaref11\comm42m.mcd BF := 2 ND := 3 PD := 40 Tr := 0.02 Tc := 0.1 Ti := 0.2

Te := 0.05

→ Reference:C:\mcadwca\wcaref11\TolArray.mcd → Reference:C:\mcadwca\wcaref11\3ph_ac_fmcalog.mcd Display input amplitude and phase: 100 − 173.205 i u= |u1| = 200 −100 − 173.205 i |u2| = 200 rd·arg(u2) = –120 deg

rd·arg(u1) = –60 deg

Three-Phase Circuits

301 FMCA magnitude

200 150 Volts

(Vfmca1)i (Vfmca2)i 100 (Vfmca3)i

50 0

2

2.5

3

3.5 Li Log freq(Hz)

FMCA Lo Nom FMCA Hi

4

4.5

5

FMCA phase angle

−50 −70 Deg

(Vfmca4)i (Vfmca5)i

−90

(Vfmca6)i −110 −130 −150

2

2.5

3

3.5 Li Log freq(Hz)

4

4.5

5

This page intentionally left blank

14

Miscellaneous Topics

14.1 COMPONENTS NOMINALLY ZERO Section 14.1 is background information for tolerance analysis of opamp offsets given in Section 14.2. mV := 10–3 Let the function be: G(A, B, C) := (A + B)·C Let the nominal component values be: A := 0

B := 0

C := 20

Vo := G(A, B, C)

Vo = 0

Then

Let the tolerances of the components be: Va := 0.02

Vb := 0.01

Tc := 0.03

The tolerances of A and B are in component units, e.g., Volts; the tolerance of C is in %. The tolerances of A and B cannot be in percentages, because X% of zero is zero. The derivatives of Vo wrt the components are: da := C

db := C

dc := A + B

Formal definition of RSS, the variance: Var := (da·A·Va)2 + (db·B·Vb)2 + (dc·C·Tc)2

Var = 0

We cannot use this form because A = B = 0. 3σA is Va, not the product of A and Va. Hence, Var := (da·Va)2 + (db·Vb)2 + (dc·C·Tc)2 Vs := Var

Var = 0.200

Vs = 0.447

303

304

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

RSS: −Va T := Va

Nc := 3

−Vb Vb

− Tc Tc

0.0001 Q= 0 0

Q := dpf·identity(Nc)

Vrp := G[Qp,1, Qp,2, C·(Qp,3 + 1)]

dpf := 0.0001 0 0.0001 0

p := 1..Nc

0 0 0.0001

2 Vr = 2 mV 0

Vr contains the nonnormalized sensitivities. It cannot be normalized, because the nominal value of Vo = 0. The RSS values are: Vrss : =

1 ⋅ dpf

∑ (Vr ⋅ T p

2 ,p

)2

Vrss = 0.447

p

This is the same as the formal definition Vs. MCA w := 1..Nc

Nk := 30000

zw := rnorm(Nk, 0, 1)

(Mathcad’s normal distribution function) k := 1..Nk Normally distributed random tolerances: T2,w − T1,w ⋅ ( z w )k + 3 + T1,w 6 Vmcak := G[Trnk,1, Trnk,2, C·(Trnk,3 + 1)] Vavg := mean(Vmca) Vavg = 0.407 mV Vsm := 3·stdev(Vmca) Vsm = 0.449 Trn k ,w =

The value Vsm = 0.449 is very close to the value of Vrss = 0.447. Hence, this is another example of how MCA with normal distribution inputs very closely approximates RSS. By repeating the MCA ten times, for example, Vs will show an average closer to Vrss = 0.447. EVA m :=1..2

Mm,p := if(m = 1, if(Vrp < 0, T2,p, T1,p), if(Vrp ≥ 0, T2,p, T1,p))

Miscellaneous Topics

−0.02 M= 0.02

305

−0.01 0.01

−0.03 0.03 −0.582 Vev = 0.618

Vevm := G[Mm,1, Mm,2, C·(Mm,3 + 1)]

FMCA Nf := 2Nc

Nf = 8

m := 1..Nf

Re Re w+1,m : = floor w,m 2 0 Dr = 0 0

1 0 0

0 1 0

1 1 0

Rew,m := m – 1

Drw,m := Rew,m – 2·Rew+1,m 0 0 1

1 0 1

0 1 1

1 1 1

Binary array counting from 0 to Nf – 1. Tf is all eight possible tolerance combinations based on binary array Dr: Tfw,m := if(Drw,m = 0, T1,w, T2,w) −0.02 Tf = −0.01 −0.03

0.02 −0.01 −0.03

−0.02 0.01 −0.03

0.02 0.01 −0.03

−0.02 −0.01 0.03

0.02 −0.01 0.03

−0.02 0.01 0.03

0.02 0.01 0.03

Vfm := G[Tf1,m, Tf2,m, C·(Tf3,m + 1)] min ( Vf ) Vfmca : = max ( Vf ) VfT = (–0.582

0.194

−0.618 Vfmca : = 0.618 –0.194

0.582

–0.618

−0.582 Vev = 0.618 0.206

0.618)

Hence, FMCA is correct in choosing Vf5 = –0.618 as the minimum and not Vf1 = –0.582 as in EVA. Why did FMCA produce a slightly wider tolerance band than EVA? 2 Hint: Vr = 2 mV . 0

14.2 TOLERANCE ANALYSIS OF OPAMP OFFSETS Input sources nominally zero. K := 103 nA := 10–9 mV := 10–3

306

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad R1

R2 V1

Vos +

V2

−

2

lb1

−

V−

+ −

3 R3

V4

11

+

1

V+ 4

V3 lb2 +

R4

−

R1 := 10·K R2 := 200·K R3 := 10·K R4 := 200·K Ib := 100·nA los := 20·nA Vos := 5·mV (LM156 data sheet) Maximum offsets: los los Ib 2 := Ib + 2 2 Ib1 = 90nA Ib2 = 110nA Ib1 := Ib −

The Resistor tolerance is Tr := 0.02 Ein := (99

1)

Ao := 106

U := 4

Y := 4

Under the broad assumption that the average value of Vos = 0 and that the average bias currents are half of the maximum: Vos := 0 1 1 RR := 3 3

0 4 0 0

R1 R2 R 3 R 4

4 EE := 1

0 2

3 99

2 0

Ao Vos

Miscellaneous Topics

1 GG := 3

307

0

99

0

0

99

0

Ib1 2 Ib 2 2

→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd Vn := 1solve(A1, B2) VnY = –2mV Ig1 := Vn5 Ig1 = 45nA Ig2 := Vn6 (bias currents)

Ig2 = 55nA

Neither the NDS method nor SPICE is designed for tolerance analysis with nominal zero value components. Hence, we must resort to “manual” methods. Circuit function: Ib1 ⋅ R1 ⋅ R 2 Ib 2 ⋅ R 3 ⋅ R 4 R2 G ( R1, R 2, R 3, R 4, Vos, Ib1, Ib 2 ) : = Vos + − ⋅ 1 + R1 + R 2 R3 + R4 R1 Reset Vos to maximum: Vos := 5·mV Tolerance array T: − Tr − Tr − Tr T := Tr Tr Tr Nc := cols(T) Nc = 7

− Tr Tr

−Vos Vos

0 Ib1

0 Ib 2

p := 1..Nc

RSS dpf := 0.0001

Q := dpf·identity(Nc)

Again, under the assumption that the average value of Vos = 0 and that the average bias currents are half of the maximum: Ib1 Ib 2 Va : = R1, R 2, R 3, R 4, 0, , 2 2

Va = –2mV

This confirms the aforementioned NDS answer. Nonnormalized sensitivities: Vrp := G[R1·(Qp,1 + 1), R2·(Qp,2 + 1), R3·(Qp,3 + 1), R4·(Qp,4 + 1), Qp,5, Qp,6, Qp,7] VrT = (0 0 0 0 0.002 20 –20)

308

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Ta := Tr Vrssm :=

Tr

( −1)m ⋅ dpf

Tr

Tr

Vos

∑ (Vr ⋅ Ta ) p

2

p

p

Ib1 2

Ib 2 2

T

m := 1..2

−106 Vrss = mV 106

MCA w := 1..Nc Nk := 30000 (normal distribution) k := 1..Nk

zw := rnorm(Nk, 0, 1)

T2,w − T1,w ⋅ ( z w )k + 3 + T1,w 6 Vmk = G[R1·(Tnk,1 + 1), R2·(Tnk,2 + 1), R3·(Tnk,3 + 1), R4·(Tnk,4 + 1), Tnk,5, Tnk,6, Tnk,7] Vavg := mean(Vm) Vavg = –2mV Vsm := (–1)m·3·stdev(Vm) Tn k ,w :=

−106 Vs = mV 106 Compare this with RSS. EVA Mm,p := if[(m) = 1, if(Vrp < 0, T2,p, T1,p), if(Vrp ≥ 0, T2,p, T1,p)]

1 m= 2

Vevam := G[R1·(Mm,1 + 1), R2·(Mm,2 + 1), R3·(Mm,3 + 1), R4·(Mm,4 + 1), Mm,5, Mm,6, Mm,7] −127 Veva = mV 123 FMCA Nf := 2Nc

Nf = 128

Rew,k := k – 1

k := 1..Nf

Re Re w+1,k : = floor w,k 2

Drw,k := Rew,k – 2·Rew+1,k Tfw,k := if(Drw,k = 0, T1,w, T2,w Vmfk := G[R1·(Tf1,k + 1), R2·(Tf2,k + 1), R3·(Tf3,k + 1), R4·(Tf4,k + 1), Tf5,k, Tf6,k, Tf7,k]

Miscellaneous Topics

309

Vfmca1 := min(Vmf)

Vfmca2 := max(Vmf)

−132 Vfmca = mV 127

A slightly wider tolerance band than EVA is obtained.

14.3 BEST-FIT RESISTOR RATIOS Find the best parallel resistor values for Rp out of all the 96 or 192 resistor value combinations (choice 1), find the best noninverting gain values for gain Gp (choice 2), find the best inverting gain values for gain –Gn (choice 3), or find the best voltage divider values for gain D (choice 4). Choose B: B = 48 (2% values), or B = 96 (1% values), or B = 192 (0.1% values). B := 96 Required functions: frac(x) := x – trunc(x) Rx ( x ) : = 10

x trunc B

Lx(x) := round(B·log(x))

frac x ⋅ round 10 B , 2

User input: (choice = 1, or choice = 2, or choice = 3, or choice = 4) choice := 2 Rp := 55.86 Gp := 9.56 Gn := –3.861 D := 0.26 (example inputs for choices 1 to 4.)

310

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Rv : = E ← 10 6 for m ∈1..B + 1 R1x ← Rx ( B + m ) if choice = 1 R1x ← Rx ( Lx ( Rp ) + m ) R2t ←

Rp ⋅ R1x R1x − Rp

R2t ←

R1x if choice = 2 Gp − 1

R2t ←

R1x if choice = 3 −Gn

R2t ←

R1x ⋅ D if choice = 4 1− D

R 2 x ← Rx ( Lx ( R 2 t ) ) E1 ← R 2 x − R 2 t if E1 < E E ← E1 R1 ← R1x R 2 ← R 2x R1 R 2 11.8 Rv = 1.37 Use appropriate decade values.

Miscellaneous Topics

311

Ans := R ←

Rv1 ⋅ Rv2 Rv1 + Rv2

R ←1+

Ans = 9.613

Rv1 Rv2

if choice = 1 iff choice = 2

R←

− Rv1 Rv2

R←

Rv2 Rv1 + Rv2

if choice = 3 if choice = 4

Gp = 9.560

Percentage error: pce := 1 −

Ans Gp

pce = —0.56%

Changing B to 192 yields pce = 0. Using a “convenient value” method: Gpx : = 1 +

14.4

10 1.15

Gpx = 9.696

pce := 1 −

Gpx Gp

pce = –1.42%

TRUNCATED GAUSSIAN DISTRIBUTION

In this distribution, Gaussian probability densities less than –3σ and greater than 3σ are rejected. It does not use transcendental functions as does the Box–Muller form (see Reference 1) and is hence faster. This could be useful in manufacturing yield analyses to simulate using all in-spec components.

312

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

R := k ← 1 while k ≤ Nk x1 ← 2 ⋅ rnd (1) − 1 x 2 ← 2 ⋅ rnd (1) − 1 w ← x1 ⋅ x1 + x 2 ⋅ x 2 if w < 1 w←

−2 ⋅ 1n ( w ) w

y 2 ← w ⋅ x1 if ( y 2 > −3) ∧ ( y 2 < 3) y1k ← y 2 k ← k +1 y1 Create histogram: nb := 30 Nk := 30000 q := 1..nb + 1 nh := 1..nb VL := min(R) VH := max(R) VL = –2.995 VH = 2.988 VH − VL binq := VL + intv·(q – 1) pr := hist(bin,R) nb Vs := stdev(R) Vavg := mean(R) Vavg = 0.012 3·Vs = 2.966 E(R) := Nk·intv·dnorm(R, Vavg, Vs) intv :=

3000 3.Vs

−3.Vs prnh E(binnh)

2000 1000 0 −5

−4

−3

−2

Histogram Ideal Gaussian

−1

0 binnh

1

2

3

4

5

Miscellaneous Topics

313

14.5 LTC1060 SWITCHED CAPACITOR FILTER MCA with one and three stages K := 103

Hz := 1

KHz := 103

There are times when no circuit topology is available to construct the node list arrays. An example is the LTC1060 switched capacitor filter. Here, we must rely on information from the data sheet to perform a worst-case analysis. The diagram from the vendor’s data sheet is shown in the following. R4 R3 R2 R1 VIN

4 (17)

N S1A 3 (18) 5 (16)

–

+

+

∑

LP 1 (20)

– –

∫

SA/B 6

BP 2 (19)

∫

TLC1060-MO006

1/2 LTC1060

15

V– f0 =

fCLK 100(50)

R2 R3 ;Q= R4 R2

R2 ;H = –R2/R1; H0BP = –R3/R1; H0LP = –R4/R1 R4 0HP

Mode 3: 2nd order filter providing highpass, bandpass, lowpass.

14.5.1 DESIGN PROCEDURE

FROM THE

DATA SHEET

H := 1

fc := 51·KHz

fo := 640·Hz

Q1 := 100

wo := 2·π·fo

R1 := 412·K

wc R 4 := R 2 ⋅ wo

R 2 :=

H ⋅ R1 ⋅ wo Q1 ⋅ wc

wc := R 3 :=

2 ⋅ π ⋅ fc 50

wc ⋅ Q1 ⋅ R 2 wo

2

R2 = 2.585K

R3 = 412K

R4 = 6.566K

AC Analysis BF := 560

LF := 720

NP := 160

i := 1..NP + 1

DF :=

LF − BF NP

314

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Fi := BF + DF·(i – 1) Tr := 0.02 Resistor tolerance 2% Twc := 0.075 Switching frequency tolerance 7.5% Construct component vector X and tolerance array T: X := (R1

R2

− Tr T := Tr

R3

− Tr Tr

R4 wc)T − Tr Tr

− Tr Tr

− Twc Twc

Magnitude function:

G ( X, ω ) : =

X5 ⋅ X2 ⋅ ω X1 ( X 5 )2 ⋅ X 2 X ⋅ X ⋅ω2 − ω2 + 5 2 X3 X4 2

Convert to rad/sec: ω := 2·π·F MCA V1i := G(X, ωi) Nominal output. Nc := length (X) w := 1..Nc Nk := 4000 k := 1..Nk Tnw,k := (T2,w – T1,w)·rnd (1) + T1,w + 1 Random tolerance array, dim {Nc Nk} Uniform distribution. BWw,k := Xw·Tnw,k Random component array, dim {Nc Nk} Vck,1 := G(BW〈k〉,ωi) Random output array, dim {Nk NP + 1} Vmca1i := max(Vc〈i〉) The maximums of the output array at each of NP + 1 frequencies. Three stages Q3 := 51.1096 Design for overall Q of 100 for the three stages. H ⋅ R1 ⋅ wo Q 3 ⋅ wc

R1 := 412·K

R 2 :=

R3 = 412 K

wc R 4 := R 2 ⋅ wo

R5 := R1

R6 := R2

R2 = 5.058K

2

R7 := R3

R4 = 12.847 K R8 := R4

R 3 :=

wc ⋅ Q 3 ⋅ R 2 wo

Miscellaneous Topics

315

Same values for second stage. R9 := R1

R10 := R2

R11 := R3

R12 := R4

Same values for third stage. X := (R1

R2

R3

R4

R5

R6

R7

R8

R9

R10

wc)T

Magnitude function for the three stages

G 3 ( X, ω ) : = a ←

b←

c←

X13 ⋅ X 2 ⋅ ω X1 ( X13 )2 ⋅ X 2 X ⋅ X ⋅ω2 − ω 2 + 13 2 X4 X3 2

X13 ⋅ X 6 ⋅ ω X5 ( X13 )2 ⋅ X 6 X ⋅ X ⋅ω2 − ω 2 + 13 6 X8 X7 2

X13 ⋅ X10 ⋅ ω X9 ( X13 )2 ⋅ X10 X ⋅ X ⋅ω2 − ω 2 + 13 10 X12 X11 2

Tf ← a ⋅ b ⋅ c − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr – Twc T := Tr Tr Tr Tr Tr Tr Tr Tr Tr Tr Tr Twc Tr V3i := G3(X, ωi) Nominal output for three stages. Nc := length(X) w := 1..Nc Tnw,k := (T2,w – T1,w)·rnd (1) + T1,w + 1 BXw,k := Xw·Tnw,k Vck,1 := G3(BW〈k〉,ωi) Vmca3i := max(Vc〈i〉) EVA markers: M1 := 580.3·Hz

M2 := 701.9·Hz

316

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

Bandpass Filter MCA

1.2 1

Volts

V1i

M1

M2

0.8

Vmca1i Vmca3i V3i

0.6 0.4 0.2 0 560

580

600

620

640 Fi Freq (Hz)

660

680

700

720

Nom_1 1 Stage MCA 3 Stage MCA Nom_3

Nk = 4000 This plot illustrates an important principle of statistical tolerance analyses. The question may well be asked as to why one stage with 5 components or variables has a wider frequency tolerance band than three stages with 13 variables. Also, note that the amplitude of the three stages shows a higher variance than the single stage, but the average is lower. The center frequency in Hz is given by fo =

D0 wc 2 ⋅ R 2 , in which D01 = for 2⋅π R4

wc 2 ⋅ R 6 wc 2 ⋅ R10 for the second, and D0 3 = for the third stage. R8 R12 Due to the separate tolerances on R2 through R12, each of these fo’s will be different for one frequency sweep, and different again for subsequent Nk frequency sweeps because of new random tolerances assigned by the Monte Carlo process. When ω2 = D01, the first term in the transfer function denominator radical

the first stage, D0 2 =

R3 , but D02 and D03 in the R1 second and third stages will not equal ω2, and the denominators here will be larger, pulling down the average peak gain of the three combined stages. The nominal peak gain is: becomes zero, and the peak gain is given by Gpk =

G 3pk :=

R 3 R 7 R11 ⋅ ⋅ R1 R 5 R 9

G3pk = 1

A numerical example will help illustrate.

Miscellaneous Topics

317

In the transfer function G ( s ) =

N1 :=

wc ⋅ R 2 R1

N1 = 78.7

D1 :=

wc ⋅ R 2 R3

D1 = 78.7

N1 ⋅ s s2 + D1 ⋅ s + D0

Assume the following random values for wc, R2, R4, ... , R12: R2 := R2·(1.015) R4 := R4·(0.998) R6 := R6·(1.006) R8 := R8·(0.991) R10 := R10·(0.993) R12 := R12·(0.982) wc := wc·(1.071) Then:

f1 :=

wc R2 ⋅ 2 ⋅ π R4

f1 = 691.3Hz

f 2 :=

wc R6 ⋅ 2 ⋅ π R8

f2 = 690.6Hz

f 3 :=

wc R10 ⋅ 2 ⋅ π R12

f3 = 689.3Hz

Use nominal values for the other components and convert to rad/sec: ω1 := 2·π·f1 Tfa :=

Tfb :=

N1 ⋅ ω1 2

wc 2 ⋅ R 2 2 2 R 4 − ω1 + ( D1 ⋅ ω1) N1 ⋅ ω1 2

wc 2 ⋅ R 6 2 2 R 8 − ω1 + ( D1 ⋅ ω1)

318

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

N1 ⋅ ω1

Tfc :=

2

wc 2 ⋅ R10 2 2 R12 − ω1 + ( D1 ⋅ ω1)

Tfa = 1 Tfb = 0.995 Tfc = 0.953 Tf := Tfa·Tfb·Tfc Tf = 0.948 Tfa = 1, but the product of all three is less. As to the wider center frequencies for the single stage, the chances of wc, R2, and R4 having random values approaching the minimum and maximum center frequencies are much greater than the likelihood of wc, R2, R4, R6, R8, R10, and R12 all having one set of random values for an extreme center frequency. The larger variance, not the mean, of the three-stage gain is again due to the larger number of components involved. Showing that the overall Q for the three stages is 100:

Q1 = 100

1 M 3 := fo ⋅ 1 − 2 ⋅ Q1

1 M 4 := fo ⋅ 1 + 2 ⋅ Q1

M3 = 636.8

M4 = 643.2

M5 :=

1 2

1 0.9 0.8 M5

V3 i 0.7 0.6 0.5 630

632

634

636

638

640 Fi

fo Q2 := M4 – M3

100 Q = 100 51.11

REFERENCES 1. www.taygeta.com/random/gaussian.html.

642

644

646

648

650

Appendix II SUMMARY OF TOLERANCE ANALYSIS METHODS DC It has been demonstrated that the conventional sensitivity-sign-based method of extreme value analysis (EVA) does not always yield the “extreme values.” Hence, the fast Monte Carlo analysis (FMCA) method must be used to guarantee accurate and reliable output tolerance spreads. However, this method may not be practical for large DC circuits because the number of required iterations is 2Nc, where Nc is the number of components. For small-to-medium-sized circuits, however, it is the preferred method. Normal distribution input MCA can be used to closely approximate RSS tolerance bands (Nk > 5000 as a guideline) but not for EVA or FMCA, as has been empirically demonstrated.

AC With AC circuits that have nonmonotonic components, RSS, EVA, and FMCA methods become unreliable and should not be used. Hence, prudence dictates that these methods should not be used for any AC circuit. That leaves MCA as the method of choice. A large number of samples of Nk must be used to obtain tolerance bands greater than those in RSS but less than those in EVA, using uniform distribution inputs. As in DC circuits, the normal (Gaussian) distribution will approximate the RSS 3 σ values for monotonic circuits. A rule of thumb is to use no less than Nk = 1000 samples for large circuits and Nk greater than 10,000 for small circuits.

TRANSIENT Several examples of transient Monte Carlo analysis have been given. The author has discovered that EVA, RSS, or FMCA methods, when applied to transient analysis, yield erroneous results. This is due to the bipolar sensitivities encountered with oscillatory waveforms, which many RC and RCL circuits exhibit. Hence, MCA is once again the recommended method. The execution time is a direct function of kmax (the total number of time increments), Nk (number of Monte Carlo samples), and N (the total number of capacitors and inductors in the circuit). The number N determines the dimensions of the A matrix to be {N N}, which, of course, has a direct effect on execution time.

319

320

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

TABLE OF SUBPROGRAMS PART I NOMINAL ANALYSIS SUBPROGRAMS Lin or Log Frequency

File Namea

Function

comm42 comm42m dccomm42 dccomm42m FindU

AC Nominal AC Nominal DC Nominal DC Nominal Finds total number of circuit nodes

Either Either N/Ab N/A N/A

PART II TOLERANCE ANALYSIS SUBPROGRAMS (USED SUBPROGRAMS) File Namea

Function

Lin or Log Frequency

acwcalin acwcalog dc_beta dc_fmca dc_gap dc_mca

AC EVA AC EVA DC DC FMCA DC DC MCA

Lin Log N/A N/A N/A N/A

dcwca fmcalin fmcalog mcalin mcalog TolArray tranlin 3_ph_ac_evalog 3_ph_ac_fmcalog 3_ph_ac_mcalog

DC EVA AC FMCA AC FMCA AC MCA AC MCA T Array TA 3-Phase EVA 3-Phase FMCA 3-Phase MCA

N/A Lin Log Lin Log N/A N/A Log Log Log

a b

Comments

Superposed outputs for M > 1 Superposed outputs for M > 1 Optional use WITH

PART I

Comments Sensitivity outputs included Sensitivity outputs included Uses Mathcad rbeta functions Uses bimodal input distributions Histogram outputs; normal and uniform distributions EVA and sensitivity outputs

Normal and uniform distribution inputs Normal and uniform distribution inputs Creates symmetric tolerance array T Transient analysis; pulse input Sensitivity outputs included Magnitude and phase outputs Magnitude and phase outputs

All have the file extension mcd. Not applicable.

For required inputs, see example worksheet files.

IN CASE OF DIFFICULTY A checklist if comm42.mcd will not return A, B, D, and E: 1. Check nodes for sequence, i.e., they must be 1, 2, 3, 4, …, U. Make sure no node numbers are skipped or omitted.

Appendix II

321

2. The input source node sequence must be in descending order from 99, 98, …, 90. 3. Check that U is the same as the maximum number of nodes in the circuit. 4. Make sure that Y is at least one of the nodes in the circuit. 5. For AC, make sure that RR, CC, LL, U, Y, Ein, EE, and GG are all created or set to zero as required. 6. For DC, make sure that RR, U, Y, Ein, EE, and GG are all created or set to zero. 7. U, Y, RR, and Ein must all be nonzero. 8. Make sure that all the node numbers in RR, CC, LL, EE, Ein, and GG exist in the circuit and are connected properly. 9. Ensure that autocalculate is ON (Tools, Calculate). As a check, press CTRL + F9. 10. Check for all-capacitive loops and all-inductive cutsets. 11. Check for at least one ground (node 0) in the circuit (also a SPICE requirement). 12. Ensure that none of the four rules of circuit construction given on p. 37 are being violated.

ABBREVIATIONS BPF BJT dpf EVA FMCA HPF HV LPF MCA MFB MOSFET RNG RSS rv TA TTA WCA

Band-pass filter Bipolar junction transistor Derivative perturbation factor Extreme value analysis Fast Monte Carlo analysis High-pass filter High-voltage Low pass filter Monte Carlo analysis Multiple feedback Metal-oxide semiconductor field effect transistor Random number generator Root sum square Random variable Tolerance analysis Transient tolerance analysis Worst-case analysis (a generic term that includes EVA, RSS, FMCA, and MCA)

This page intentionally left blank

Index A A and ß slope intersection method, 103 to 105 AC analysis ACLs, 33 to 34 all-capacitive circuits, 22 to 23 all-inductive circuits, 23 to 24 broadband pulse transformer models, 28 fifth-order active filter, 60 floating VCVSs, 39 HV (200 V) shunt MOSFET regulator, 77 LTC 1562 quad band filter IC, 83 MOSFET model (first-order), 46 output plots, 11 to 13 seventh-order elliptical low-pass filters, 65, 69 to 70, 72 to 73 square root of frequency (+10dB/decade) circuits, 75 State Space Averaging, 142 state variable filters, 62 subcircuits schemes, 57 to 58 third-order opamp models, 56 tolerance analysis, 213 to 216 twin-T RC networks, 26 two inputs, three outputs, 51 unity gain differential amplifiers, 104, 108 to 109 VCVS example, 48 AC and transient MCA — Bessel HPF, 288 to 291 AC circuits, tolerance analysis, 241 to 284 Butterworth low-pass filter circuits, 250 to 255 circuit output vs. component value, 241 to 246 CI sensitivity, exact values, 247 to 248 high-Q hum notch filter circuits, 276 to 281 LC 1562, 281 to 283 multiple-feedback BPF circuits, 255 to 260 multiple output EVA, 248 to 250 Sallen and Key BPF circuits, 265 to 271 state variable filter circuits, 271 to 276 switching power supply compensation circuits, 260 to 265 AC floating VCVS (voltage controlled voltage current), 199 to 202 ACLs (all-capacitive loops), 30 to 31, 32 to 34 Algorithms, Leverrier’s, 97 to 101 All-capacitive circuits, 21 to 23 All-capacitive loops, see ACLs

All-inductive circuits, 23 to 24 All-inductive cutsets, see ICS Amplifiers, video (uA733), 89 to 95, 212 Asymmetric tolerances, 217, 221 to 222

B Balanced Y-load, 181 to 186 Bessel HPF, AC and transient MCA, 288 to 291 Beta distributions [4-6], 232 to 234 Bimodal (gapped) distribution inputs, 236 to 239 Bipolar junction transistors, see BJTs BJTs (bipolar junction transistors), 46 to 47, 87 to 88, 211 to 212 Broadband pulse transformer models, 27 to 30 Buck regulator, switching power supply output stage, 137 to 140 Butterworth low-pass filter circuits, 250 to 255

C CASE FMCA greater than EVA, 228 to 230 CCCS (current-controlled current source), 35, 36 to 37 CCVS (current-controlled voltage source), 36 Centered difference approximation — sensitivities, 222 to 224 Circuit output vs. component value, 241 to 246 Circuits, discrete components, 211 to 212 Circuits with M<1, 41 to 43 CI sensitivity, exact values, 247 to 248 Comparator 100-Hz oscillator, 123 to 127 Component value vs. circuit output, 241 to 246 Constant current source model, 87 to 88 Controlled sources, nominal analysis, 35 to 95 BJT constant current source model, 87 to 88 circuits with M<1, 41 to 43 dependent, 35 to 37 fifth-order active filters, 59 to 60 first-order MOSFET model, 44 to 46 floating VCVS, 38 to 41 HV (200 V) shunt MOSFET regulator, 76 to 77 LTC 1562 band-pass filter IC in a quad IC, 78 to 79 LTC 1562 quad band filter IC, 79 to 86

323

324

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

seventh-order elliptical low-pass filters (see Seventh-order elliptical low-pass filters) square root of frequency (+10dB/decade) circuits, 74 to 75 state variable filters, 60 to 63 subcircuit schemes, 56 to 58 third-order opamp models, 54 to 56 two inputs, three outputs, 50 to 54 uA733 video amplifier, 89 to 95 VCVS,CCCS examples, 46 to 49 Conversions CCCS to VCCS, 36 to 37 CCVS to VCVS, 36 D floating inputs to single-ended Y, 167 to 169 Current-controlled current source, see CCCS

D DC analysis broadband pulse transformer models, 28 floating VCVSs, 38 to 39 HV (200 V) shunt MOSFET regulator, 77 MOSFET model (first-order), 45 to 46 output plots, 9 to 11 State Space Averaging, 141 to 142 tolerance analysis, 212 to 213 twin-T RC networks, 25 two inputs, three outputs, 51 VCVS example, 48 DC circuit analysis, nominal, 151 to 165 floating 5-V input source, 164 to 165 problem, textbook, 152 to 154 RTD circuit, 151 to 152 RTD circuit, step resistor value, 161 to 163 stacking VCVSs and paralleling VCCSs, 158 to 159 test circuit, 154 to 158 voltage sweep (RTD circuit), 159 to 160 DC circuits, tolerance analysis, 219 to 239 asymmetric tolerances, 221 to 222 beta distributions [4-6], 232 to 234 CASE FMCA greater than EVA, 228 to 230 centered difference approximation-sensitivities, 222 to 224 MCA of RTD, bimodal (gapped) inputs, 236 to 239 RTD circuits, 219 to 220, 224 to 228, 234 to 236 tolerancing inputs, 231 to 232 Dependent controlled sources, 35 to 37 Differential equation solvers, Mathcad, 133 to 135 Discrete component circuits, 211 to 212

E Equivalent series resistance, see ESR ESR (equivalent series resistance), 31 EVA (extreme value analysis), 212 to 215, 217 Butterworth low-pass filters, 253 to 254 high-Q hum notch filters, 279 to 280 LC 1562, 282 to 283 less than CASE FMCA, 228 to 230 multiple-feedback BPFs, 257 to 259 Sallen and Key BPFs, 268 to 270 state variable filters, 273 to 275 switching power supply compensation, 262 to 264 Extreme value analysis, see EVA

F Fast Monte Carlo analysis, see FMCA Fifth-order active filters, 59 to 60 First-order MOSFET model, 44 to 46 Floating 5-V input source, 164 to 165 Floating delta input, Y-connected unbalanced load, 177 to 181 Floating VCVSs (voltage-controlled voltage sources), 38 to 41 FMCA (fast Monte Carlo analysis), 212 to 213, 216 Butterworth low-pass filters, 254 to 255 high-Q hum notch filters, 280 to 281 and MCA, state variable filters, 275 to 276 multiple-feedback BPFs, 259 to 260 RTDs (resistance temperature detectors), 227 to 228 Sallen and Key BPFs, 270 to 271 switching power supply compensation, 264 to 265

G Gain-phase plot, plot loop gain as, 105 to 106 Gapped (bimodal) distribution inputs, 236 to 239

H High-Q hum notch filter circuits, 276 to 281 High-voltage shunt regulators, 109 to 114 Histograms, output, 232 HV (200 V) shunt MOSFET regulators, 76 to 77 Hybrid-pi model, BJTs, 46 to 47

Index

325

I

N

ICS (all-inductive cutsets), 31 to 32

N=2 switched circuit transient response, 120 to 123 NDS (node list DC superposition) method BJT, 87 to 88 definition, 3 to 5 solution, three phase circuits, 170 to 174 stability, 103 NDS (node list DC superposition) method theory, 187 to 207 AC floating VCVS, 199 to 202 background theory, 187 to 196 VCVS and CCCS, 203 to 207 Node list circuit analysis, 6 to 21 algebraic solution, passive circuits, 16 to 21 output plots, passive circuits, 9 to 16 rules and definitions, 6 to 8 Node list DC superposition, see NDS Nominal circuit analysis, 3 to 8 Nonmonotonic components, 213 to 214 Numerical derivatives, 222 to 224 Numerical transfer function, Leverrier’s algorithm, 97 to 99

K KCL (Kirchoff’s Current Law), 31 Kirchoff’s Current Law, see KCL Kirchoff’s Voltage Law, see KVL KVL (Kirchoff’s Voltage Law), 30 to 31

L LC 1562, 281 to 283 Leverrier’s algorithm, 97 to 101 LM158 (opamp model), 106 to 109 Low-pass filters, seventh-order elliptical, see Seventh-order elliptical low-pass filters LTC 1562 band-pass filter IC in a quad IC, 78 to 79 LTC 1562 quad band filter IC, 79 to 86

M Mathcad’s differential equation solvers, 133 to 135 Mathematical pulse width modulator, see PWM Matrix solution, 153 to 154 MCA (Monte Carlo analysis) Butterworth low-pass filters, 251 to 253 high-Q hum notch filters, 278 inputs, 232 LC 1562, 281 to 282 multiple-feedback BPFs, 256 to 257 RTD, beta (skewed) distribution, 234 to 236 RTD, bimodal (gapped) inputs, 236 to 239 RTD, R4 tolerance=10%, 226 to 227 Sallen and Key BPFs, 266 to 268 state variable filters, 272 to 273 switching power supply compensation, 261 to 262 transient, 285 to 288, 291 to 293 Monotonic components, 213 Monte Carlo analysis, see MCA MOSFET circuits, 211 to 212 MOSFET model (first-order), 44 to 46 MOSFET regulator, HV (200 V) shunt, 76 to 77 Multiple-feedback BPF (band-pass filter) circuits, 255 to 260 Multiple feedback BPFs (band-pass filters), 286 to 288

O OC (open-collector) transistor output, 124 ODE (ordinary differential equation) solver (Mathcad), 134 to 135 One resistor value, stepping, 68 to 70 Opamp model (LM158), 106 to 109 Open-collector, see OC Ordinary differential equation, see ODE Output histograms, 232 Output plots, 9 to 16

P Paralleling VCCSs and stacking VCVSs and, 158 to 159 Passive circuits, nominal analysis, 9 to 34 ACLs, 21 to 23, 30 to 34 algebraic solution, 16 to 21 all-inductive circuits, 23 to 24 broadband pulse transformer models, 27 to 30 ICS, 31 to 32 output plots, 9 to 16 twin-T RC networks, 24 to 26 Passive RCL circuits, 131 to 133 Plot loop gain as gain-phase plot, 105 to 106 Pulse transformer, 127 to 130

326

Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad

PWM (mathematical pulse width modulator), 135 to 137, 143

Q Quadrature oscillator, 145 to 147

R Random number generators, see RNGs RCL circuits, 16 to 21, 131 to 133 Resistance temperature detector, see RTD Rkadapt functions, 133 to 134 rkfixed functions, 133 to 134 RNGs (random number generators), 213 Root sum square, see RSS RSS (root sum square), 212, 213, 217 RTD (resistance temperature detector) circuits, 151 to 152, 159 to 163, 219 to 220 RTD (resistance temperature detector) circuits, MCA, 224 to 226, 236 to 239 RTD (resistance temperature detector) FMCA, 227 to 228 RTD (resistance temperature detector) MCA, beta (skewed) distribution, 234 to 236 RTD (resistance temperature detector) MCA, R4tolerance=10%, 226 to 227 Rules, four, 37 Rules and definitions, 6 to 8

S Sallen and Key BPF (band-pass filter) circuits, 265 to 271 Sensitivities, 222 to 224, 247 to 248 Seven capacitor values, stepping, 71 to 73 Seventh-order elliptical low-pass filters, 63 to 73 one resistor value, stepping, 68 to 70 seven capacitor values, stepping, 71 to 73 Simple triangular waveform generator, 143 to 145 Slope intersection method, 103 to 105 SPICE node list text format, 5 Square root of frequency (+10dB/decade) circuits, 74 to 75 Stability analysis, 103 to 114 high-voltage shunt regulator, 109 to 114 opamp model (LM158), 106 to 109 unity gain differential amplifiers, 103 to 106 Stacking VCVSs and paralleling VCCSs, 158 to 159 State Space Averaging, 140 to 143 State variable filter circuits, 271 to 276 State variable filters, 60 to 63, 291 to 293

Step-resistor value, RTD circuit, 161 to 163 Stiff ODEs (ordinary differential equations), 135 Subcircuit schemes, 56 to 58 Switched circuit (N=2) transient response, 120 to 123 Switching power supply compensation circuits, 260 to 265 Switching power supply output stage--Buck regulator, 137 to 140

T Test circuit, DC circuit analysis, 154 to 158 Third-order opamp models, 54 to 56 Three-phase circuits, nominal analysis, 167 to 186 balanced Y-load, 181 to 186 conversion, D floating inputs to single-ended Y, 167 to 169 NDS solution, three phase, 170 to 174 Y-connected unbalanced load--floating delta input, 177 to 181 Y-unbalanced load, three phase, 174 to 177 Three-phase circuits, tolerance analysis, 295 to 301 Time-domain tolerance analysis, 217 Tolerance analysis, introduction, 211 to 217 Tolerancing inputs, 231 to 232 Transfer function, Leverrier’s algorithm, 97 to 101 Transient analysis, 115 to 149 comparator 100-Hz oscillator, 123 to 127 Mathcad’s differential equation solvers, 133 to 135 N=2 Switched circuit transient response, 120 to 123 passive RCL circuits, 131 to 133 pulse transformers, 127 to 130 PWM (mathematical pulse width modulator), 135 to 137 quadrature oscillators, 145 to 147 simple triangular waveform generators, 143 to 145 State Space Averaging, 140 to 143 switched transient analysis, 118 to 120 switching power supply output stage--Buck regulator, 137 to 140 tolerance analysis, 217 Wein bridge oscillator, 148 to 149 Transient tolerance analysis, 285 to 293 AC and transient MCA --Bessel HPF, 288 to 291 transient MCA--multiple feedback BPF, 286 to 288 transient MCA--state variable filter, 291 to 293

Index transient MCA--twin-T RC network, 285 to 286 Twin-T RC networks, 24 to 26, 100 to 101, 285 to 286 Two inputs, three outputs, 50 to 54

U uA733 video amplifier, 89 to 95 Unbalanced delta loads, single-ended inputs, 170 to 174 Unity gain differential amplifiers, 103 to 106

V VCCSs (voltage-controlled current sources), 35, 148 to 149 VCVSs (voltage-controlled voltage sources), 5, 35 to 36, 38 to 41

327 VCVSs (voltage-controlled voltage sources), CCCSs (current controlled current sources), 46 to 49, 203 to 207 Video amplifiers (uA733), 89 to 95 Voltage-controlled current sources, see VCCSs Voltage-controlled voltage sources, see VCVSs Voltage sweep (RTD circuit), 159 to 160

W Wein bridge oscillator, 148 to 149

Y Y-connected unbalanced load--floating delta input, 177 to 181 Y-unbalanced load, three phase, 174 to 177

Our partners will collect data and use cookies for ad personalization and measurement. Learn how we and our ad partner Google, collect and use data. Agree & close