Lecture Notes in Computer Science Commenced Publication in 1973 Founding and Former Series Editors: Gerhard Goos, Juris Hartmanis, and Jan van Leeuwen
Editorial Board David Hutchison Lancaster University, UK Takeo Kanade Carnegie Mellon University, Pittsburgh, PA, USA Josef Kittler University of Surrey, Guildford, UK Jon M. Kleinberg Cornell University, Ithaca, NY, USA Alfred Kobsa University of California, Irvine, CA, USA Friedemann Mattern ETH Zurich, Switzerland John C. Mitchell Stanford University, CA, USA Moni Naor Weizmann Institute of Science, Rehovot, Israel Oscar Nierstrasz University of Bern, Switzerland C. Pandu Rangan Indian Institute of Technology, Madras, India Bernhard Steffen University of Dortmund, Germany Madhu Sudan Microsoft Research, Cambridge, MA, USA Demetri Terzopoulos University of California, Los Angeles, CA, USA Doug Tygar University of California, Berkeley, CA, USA Gerhard Weikum Max-Planck Institute of Computer Science, Saarbruecken, Germany
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Arrems Hua Shih-Liang Chang (Eds.)
Algorithms and Architectures for Parallel Processing 9th International Conference, ICA3PP 2009 Taipei, Taiwan, June 8-11, 2009 Proceedings
13
Volume Editors Arrems Hua Shih-Liang Chang National Taiwan University of Science and Technology Department of Computer Science and Information Engineering Taipei City 106, Taiwan, ROC E-mail:
[email protected]
Library of Congress Control Number: 2009930109 CR Subject Classification (1998): D, F.1-3, C, I.6 LNCS Sublibrary: SL 1 – Theoretical Computer Science and General Issues ISSN ISBN-10 ISBN-13
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Message from the General and Program Committee Chairs ICA3PP 2009 It is our pleasure to welcome you to the proceedings of the 9th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP 2009). This conference was organized by the National Taiwan University of Science and Technology and the National United University. The National Taiwan University of Science and Technology (NTUST), the university hosting the ICA3PP 2009 conference, was established in 1974, serving as a leading educational institution in the field of science and technology in Taiwan. NTUST is located in Taipei very close to the Taipei 101 building, the highest building in the world; also, it is in the vicinity of the National Palace Museum, which houses hundreds of thousands of Chinese antiques and art works. Currently, NTUST has more than 8,000 students including about 1,000 international students, and it continues to evolve as one of the leading science and technology universities in the world. The conference provided an excellent technical program on the latest research results and the state of practice in algorithms and architectures for parallel processing in multiple tracks that included cluster, grid and fault-tolerant computing; distributed scheduling and load balancing; high-performance scientific computing; tools and environments for parallel and distributed software; modeling and analysis; security issues, etc. In total, the conference received 243 submissions from researchers and practitioners from 30 countries. Each paper was carefully reviewed by at least two reviewers based on its originality, significance, correctness, relevance, and clarity of presentation. Among the high-quality submissions, we accepted 80 regular papers. All of the selected papers are included in the proceedings. We believe that the conference was successful and fruitful for all the participants, and that it provided many opportunities for exchanging information during breaks, lunches, a welcome reception and social activities. We would like to take this opportunity to thank the members of the Organizing Committee, and especially the Program Committee Chairs and members for their hard and excellent work toward making this conference a success. We would also like to thank the Honorary Chairs, Shi-Shuenn Chen, Lung-Sheng Steven Lee, and Der-Tsai Lee, the Steering Committee Chairs, Andrzej Goscinski, Yi Pan and Wanlei Zhou, the General Chair, Wanlei Zhou and the members of ICA3PP 2008 for their guidance and support. Special thanks go to our sponsors including the National Taiwan University of Science and Technology, National United University, Ministry of Education, National Science Council, Institute of Information Science, Academia Sinica for their generous financial contributions to the conference. Finally, we would like to thank the keynote speakers and the authors for their excellent papers contained herein. Shi-Jinn Horng General Chair Chin-Chuan Han and Ge-Ming Chiu Program Committee Chairs
Organization
Honorary Chairs Shi Shuenn Chen Lung-Sheng Steven Lee Der-Tsai Lee
National Taiwan University of Science and Technology, Taiwan National United University, Taiwan Academia Sinica, Taiwan
General Chair Shi Jinn Horng
National United University, National Taiwan University of Science and Technology, Taiwan
Program Chairs Ge Ming Chiu Chin Chuan Han
National Taiwan University of Science and Technology, Taiwan National United University, Taiwan
Publication Chairs Hsing Kuo Pao Rong Jian Chen
National Taiwan University of Science and Technology, Taiwan National United University, Taiwan
Publicity Chairs Anu Bourgeois Yuh-Jye Lee Jui-Lin Lai
Georgia State University, USA National Taiwan University of Science and Technology, Taiwan National United University, Taiwan
Local Arrangements Chairs Yuh Jye Lee Yuh Horng Shiau
National Taiwan University of Science and Technology, Taiwan National United University, Taiwan
Registration and Finance Chairs Wei Chung Teng Fu Tsai Huang
National Taiwan University of Science and Technology, Taiwan National United University, Taiwan
VIII
Organization
Steering Committee Chairs Andrzej Goscinski Yi Pan Wanlei Zhou
Deakin University, Australia Georgia State University, USA Deakin University, Australia
Program Committee Jemal Abbawajy Selim Akl Joseph Arul Mark Baker Amnon Barak Maarten Boasson Arndt Bode Xiaojun Cao Jiannong Cao Peter Cappello Kuo Tsai Chang Ruey-Feng Chang Gen-Huey Chen Jianer Chen Yingying Chen Hsuang-Chang Chiang Francis Chin Kenneth Chiu Jose Cunha Alfredo Cuzzocrea Erik D'Hollander Eliezer Dekel Robert Dew Marios Dikaiakos Jack Dongarra Alberto de la Encina José A. Fernández-Zepeda Len Freeman Jung-Sheng Fu Chryssis Georgiou Teofilo Gonzalez Ashwin Gumaste Ken Hawick Ken-Chung Ho Michael Hobbs Bo Hong Susumu Horiguchi Hsi-Chin Hsin Ching-Hsien Hsu
Deakin University, Australia Queen's University, Canada Fu Jen Catholic University, Taiwan The University of Reading, UK Hebrew University of Jerusalem, Israel University of Amsterdam, The Netherlands Technical University of Munich, Germany Georgia State University, USA Hong Kong Polytechnic University, Hong Kong University of California, Santa Barbara, USA National United University, Taiwan National Taiwan University, Taiwan National Taiwan University, Taiwan Texas A&M University, USA Rutgers University, USA National United University , Taiwan University of Hong Kong, Hong Kong State University of NY at Binghamton, USA New University of Lisbon, Portugal University of Calabria, Italy Ghent University, Belgium IBM Haifa Research Laboratory, Israel Deakin University, Australia University of Cyprus, Cyprus University of Tennessee, USA Universidad Complutense de Madrid, Spain CICESE, Mexico University of Manchester, UK National United University, Taiwan University of Cyprus, Cyprus University of California, Santa Barbara, USA Indian Institute of Technology, Bombay, India Massey University, New Zealand National United University, Taiwan Deakin University, Australia Drexel University, USA Tohoku University, Japan National United University, Taiwan Chung Hua University, Taiwan
Organization
Feng-Long Huang Ali Hurson Weijia Jia Hong Jiang Tzong-Wann Kao Krishna Kavi Zvi Kedem Wayne Kelly Tohru Kikuno Jacek Kitowski Michael Langston Gwo-Chuan Lee Laurent Lefevre Keqin Li Kuan-Ching Li Cho-Chin Lin Pangfeng Liu Thanasis Loukopoulos Praveen Madiraju Christine Morin Koji Nakano Michael Palis Marcin Paprzycki Weizhong Qiang Rajeev Raje Michel Raynal Justin Rough Barry Rountree Srinivas Sampalli Eunice Santos Yiannakis Sazeides Edwin Sha Jackie Silcock Ming-Yang Su Chengzheng Sun Rajshekhar Sunderraman Yong-Meng Teo Gabor Terstyanszki Jerry Trahan Hsin-Han Tung Ramachandran Vaidyanathan Vassos Vassiliou Jianping Wang
IX
National United University, Taiwan Pennsylvania State University, USA City University of Hong Kong, Hong Kong University of Nebraska at Lincoln, USA Technology and Science Institute of Northern Taiwan, Taiwan The University of North Texas, USA New York University, USA Queensland University of Technology, Australia Osaka University, Japan AGH University of Science and Technology, Cracow, Poland University of Tennessee, USA National United University, Taiwan INRIA, France State University of NY at New Paltz, USA Providence University, Taiwan National Ilan University, Taiwan National Taiwan University, Taiwan University of Thessaly, Greece Marquette University, USA IRISA/INRIA, France Hiroshima University, Japan Rutgers University, USA SWPS and IBS PAN, Poland Huazhong University of Science and Technology, China Purdue University, USA IRISA, France Deakin University, Australia University of Georgia, USA Dalhousie University, Canada Virginia Tech University, USA University of Cyprus, Cyprus University of Texas at Dallas, USA Deakin University, Australia Ming Chuan University, Taiwan Nanyang Technological University, Singapore Georgia State University, USA National University of Singapore, Singapore University of Westminster, UK Louisiana State University, USA National United University, Taiwan Louisiana State University, USA University of Cyprus, Cyprus City University of Hong Kong, Hong Kong
X
Organization
Neng-Chung Wang Yuh-Rau Wang Greg Wickham Chin-Hsiung Wu Jie Wu Yu-Chi Wu Yue Wu Roman Wyrzykowski Chengzhong Xu Chang-Biau Yang Chao-Tung Yang Laurence T. Yang Jui-Cheng Yen Albert Zomaya Jun Zou
National United University, Taiwan St. John's University, Taiwan GrangeNet, Australia Shih Chien University Kaohsiung Campus, Taiwan Florida Atlantic University, USA National United University, Taiwan University of Electronic Sci and Tech, China Czestochowa University of Technology, Poland Wayne State University, USA National Sun Yat-sen University, Taiwan Tunghai University, Taiwan St. Francis Xavier University, Canada National United University, Taiwan University of Sydney, Australia Chinese University of Hong Kong, China
Table of Contents
Bioinformatics in Parallel Computing Length Encoded Secondary Structure Profile for Remote Homologous Protein Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yen-Chu Hsu, Chien-Ming Chen, Tun-Wen Pai, Jyh-Fu Jeng, Chin-Hua Hu, and Wen-Shyong Tzou
1
Cluster, Grid and Fault-Tolerant Computing A Process Scheduling Analysis Model Based on Grid Environment . . . . . Huey-Ming Lee, Tsang-Yean Lee, Ching-Hao Cheng, and Chia-Hsien Chung
12
A Resource Broker with Cross Grid Information Services on Computational Multi-grid Environments . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chao-Tung Yang, Wen-Jen Hu, and Kuan-Chou Lai
20
Fleet: An Effective System for Publish/Subscribe Service over P2P Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chyouhwa Chen, Chia-Liang Tsai, and Kun-Cheng Tsai
32
Implementation of a Performance-Based Loop Scheduling on Heterogeneous Clusters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chao-Tung Yang and Lung-Hsing Cheng
44
The Hierarchical Path-Selection Scheme Based on Multihoming NEMO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Long-Sheng Li, Gwo-Chuan Lee, Jhu-Shyuan Mei, and Cing-Long Chen
55
Clusterdistributed Parallel Operating Systems Middleware A Software Transactional Memory Service for Grids . . . . . . . . . . . . . . . . . . Kim-Thomas M¨ oller, Marc-Florian M¨ uller, Michael Sonnenfroh, and Michael Sch¨ ottner An Empirical Study on the Performance Issues on the Clustered Client-Server Computing Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yu-Hung Hsiao and Han-Jyun Su DR: Divided Ring Leader Election Algorithm . . . . . . . . . . . . . . . . . . . . . . . . Mehdi Vojdani and Yaser Taj
67
79 90
XII
Table of Contents
Dependability Issues in Computer Networks and Communications Construct the Load-Balanced Topology in NEMO . . . . . . . . . . . . . . . . . . . . Long-Sheng Li, Gwo-Chuan Lee, Li-Keng Kang, and Jhu-Shyuan Mei
100
Energy-Efficient Clustering in Wireless Sensor Networks . . . . . . . . . . . . . . Po-Jen Chuang, Sheng-Hsiung Yang, and Chih-Shin Lin
112
Maximally Local Connectivity on Augmented Cubes . . . . . . . . . . . . . . . . . Y-Chuang Chen, Meng-Hung Chen, and Jimmy J.M. Tan
121
Dependability Issues in Distributed and Parallel Systems A Cluster-Based Data Routing for Wireless Sensor Networks . . . . . . . . . . Hao-Li Wang and Yu-Yang Chao
129
Distributed Scheduling and Load Balancing A Energy Efficient Scheduling Base on Dynamic Voltage and Frequency Scaling for Multi-core Embedded Real-Time System . . . . . . . . . . . . . . . . . . Xin Huang, KenLi Li, and RenFa Li
137
Effect of Database Server Arrangement to the Performance of Load Balancing Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Jian-Bo Chen, Tsang-Long Pao, and Kun-Dah Lee
146
Industrial Applications A Block-Based Watermarking Method Using Wavelet Coefficient Quantization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Wei-Hung Lin, Yuh-Rau Wang, and Shi-Jinn Horng
156
A Digital Watermarking Method Using Binary Cluster . . . . . . . . . . . . . . . . Wei-Hung Lin, Yuh-Rau Wang, and Shi-Jinn Horng
165
A Novel Blind Watermarking Using Hybrid Embedding Technique . . . . . Wei-Hung Lin, Yuh-Rau Wang, and Shi-Jinn Horng
175
An Analysis of Fire Frame Processing and Video Dynamic Features . . . . Lin Shi, Xinyu Liu, and Pei Liu
182
Intelligent Laboratory Resource Supply Chain Conceptual Network Model with Process and Information Integration, Visibility and Flexibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chin-Ming Hsu and Hui-Mei Chao
190
Table of Contents
XIII
Information Security Internet A New Windows Driver-Hidden Rootkit Based on Direct Kernel Object Manipulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Woei-Jiunn Tsaur, Yuh-Chen Chen, and Being-Yu Tsai An Agent-Based English Auction Protocol Using Elliptic Curve Cryptosystem for Mobile Commerce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yu-Fang Chung, Tzer-Shyong Chen, Yu-Ting Chen, Chiu-Chan Lee, and Szu-Wen Wang
202
214
Authenticated Key Exchange Protocol in One-Round . . . . . . . . . . . . . . . . . Xing-Lan Zhang
226
Digital Image Watermarking for Malicious Attack . . . . . . . . . . . . . . . . . . . . Wei-Hung Lin, Yuh-Rau Wang, Shi-Jinn Horng, and Tzong-Wann Kao
234
Hierarchical Time-Bound Key Management for Mobile Agents . . . . . . . . . Yu-Fang Chung, Tzer-Shyong Chen, Chia-Chao Ho, Yi-Hsuan Yeh, and Hsiu-Chia Ko
242
Key Tree and Chinese Remainder Theorem Based Group Key Distribution Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Jie Zhou and Yong-hao Ou Effective DDoS Attacks Detection Using Generalized Entropy Metric . . . Ke Li, Wanlei Zhou, Shui Yu, and Bo Dai
254
266
Multi-core Programming Software Tools A Fast and Flexible Sorting Algorithm with CUDA . . . . . . . . . . . . . . . . . . Shifu Chen, Jing Qin, Yongming Xie, Junping Zhao, and Pheng-Ann Heng
281
A Parallel Simulated Annealing Approach for Floorplanning in VLSI . . . Jyh-Perng Fang, Yang-Lang Chang, Chih-Chia Chen, Wen-Yew Liang, Tung-Ju Hsieh, Muhammad T. Satria, and Chin-Chuan Han
291
VERTAF/Multi-Core: A SysML-Based Application Framework for Multi-Core Embedded Software Development . . . . . . . . . . . . . . . . . . . . . . . . Pao-Ann Hsiung, Chao-Sheng Lin, Shang-Wei Lin, Yean-Ru Chen, Chun-Hsien Lu, Sheng-Ya Tong, Wan-Ting Su, Chihhsiong Shih, Chorng-Shiuh Koong, Nien-Lin Hsueh, Chih-Hung Chang, and William C. Chu
303
XIV
Table of Contents
The Impact of Resource Sharing Control on the Design of Multicore Processors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chen Liu and Jean-Luc Gaudiot
315
Multi-medium in Parallel Computing Real-Time Ray Tracing with CUDA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Min Shih, Yung-Feng Chiu, Ying-Chieh Chen, and Chun-Fa Chang
327
Parallel Distributed Databases Concurrent Operations for Accessing an XML Document in a Multi-user Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Jeang-Kuo Chen and Kuan-Chang Lu
338
Parallel Algorithms A Shape Recognition Scheme for Wireless Sensor Networks Based on a Distance Field Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yang Yang, Satoshi Fujita, and Sayaka Kamei
350
A Low Communication Overhead and Load Balanced Parallel ATPG with Improved Static Fault Partition Method . . . . . . . . . . . . . . . . . . . . . . . . K.-W. Yeh, M.-F. Wu, and J.-L. Huang
362
An Efficient Parallel Sorting Algorithm on Metacube Multiprocessors . . . Yamin Li, Shietung Peng, and Wanming Chu
372
An On-Line Parallel Algorithm for Node Ranking of Trees . . . . . . . . . . . . Chia-Wei Lee, Justie Su-Tzu Juan, and Tai-Lung Wu
384
An Overview of Prophet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Zheng Chen, Yin-Liang Zhao, Xiao-Yu Pan, Zhao-Yu Dong, Bing Gao, and Zhi-Wen Zhong
396
Fast License Plate Localization Using Discrete Wavelet Transform . . . . . . Yuh-Rau Wang, Wei-Hung Lin, and Shi-Jinn Horng
408
Fast Parallel Molecular Solution for DNA-Based Computing: The 0-1 Knapsack Problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sientang Tsai
416
Fast Parallel Montgomery Binary Exponentiation Algorithm Using Canonical-Signed-Digit Recoding Technique . . . . . . . . . . . . . . . . . . . . . . . . . Chia-Long Wu
428
Fault-Free Cycles in Conditional Faulty Folded Hypercubes . . . . . . . . . . . Che-Nan Kuo and Sun-Yuan Hsieh
439
Table of Contents
XV
Research on Parallel HW/SW Partitioning Based on Hybrid PSO Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yue Wu, Hao Zhang, and Hongbin Yang
449
Unfolding of Multirate Data-Flow Graph to Compute Iteration Bound . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Daniel Yuh Chao
460
Parallel Algorithms for Solving Markov Decision Process . . . . . . . . . . . . . . Qi Zhang, Guangzhong Sun, and Yinlong Xu
466
Parallel Algorithms for the Weighted Distance Transform on Linear Arrays with a Reconfigurable Pipelined Bus System . . . . . . . . . . . . . . . . . . Horng-Ren Tsai
478
Parallel Particle Swarm Optimization with Adaptive Asynchronous Migration Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Zhi-hui Zhan and Jun Zhang
490
Parallel Architectures MTCrossBit: A Dynamic Binary Translation System Using Multithreaded Optimization Framework . . . . . . . . . . . . . . . . . . . . . . . . . . . . Xiaolong Li, Deen Zheng, Ruhui Ma, Alei Liang, and Haibing Guan
502
VLSI Architecture for Fast Memetic Vector Quantizer Design on Reconfigurable Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sheng-Kai Weng, Chien-Min Ou, and Wen-Jyi Hwang
513
Parallel IO Systems and Storage Systems SnapCDP: A CDP System Based on LVM . . . . . . . . . . . . . . . . . . . . . . . . . . Xiaoguang Liu, Gang Wang, Feng Wang, and Yongzhi Song
525
Performance of Parallel Distributed Computing Systems A Divide-and-Conquer Strategy and PVM Computation Environment for the Matrix Multiplication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ming-Chang Lee
535
A Sharable Storage Service for Distributed Computing Systems in Combination of Remote and Local Storage . . . . . . . . . . . . . . . . . . . . . . . . . . MinHwan Ok
545
An Advanced NoP Selection Strategy for Odd-Even Routing Algorithm in Network-on-Chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Minghua Tang and Xiaola Lin
557
XVI
Table of Contents
An Implementation of a Framework for Open Distributed Computing . . . Chia-Chu Chiang Evaluating a Dependable Sharable Atomic Data Service on a Planetary-Scale Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chryssis Georgiou, Nicolas Hadjiprocopiou, and Peter M. Musial
569
580
Scientific Applications A GPU-Based Simulation of Tsunami Propagation and Inundation . . . . . Wen-Yew Liang, Tung-Ju Hsieh, Muhammad T. Satria, Yang-Lang Chang, Jyh-Perng Fang, Chih-Chia Chen, and Chin-Chuan Han
593
A Paralleled Large-Scale Astronomical Cross-Matching Function . . . . . . . Qing Zhao, Jizhou Sun, Ce Yu, Chenzhou Cui, Liqiang Lv, and Jian Xiao
604
A Power Peer-Based Reputation Scheme for Mobile P2P Systems . . . . . . Xu Wu, Jingsha He, Chia-Hu Chang, and Fei Xu
615
An Algorithm Evaluating System Stability to Process . . . . . . . . . . . . . . . . Qing Zhou, Fang Yu, and Binqiang Wang
626
An Efficient Algorithm for the Shortest Path Problem with Forbidden Paths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chiun-Chieh Hsu, Da-Ren Chen, and Hua-Yuan Ding Finding Object Depth Using Stereoscopic Photography . . . . . . . . . . . . . . . Yu-Hua Lee and Tai-Pao Chuang
638 651
Self-healing Self-protecting and Fault-Tolerant Systems A Lightweight Buffer Overflow Protection Mechanism with Failure-Oblivious Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tz-Rung Lee, Kwo-Cheng Chiu, and Da-Wei Chang
661
Fault-Tolerant Hamiltonicity of Augmented Cubes under the Conditional Fault Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sun-Yuan Hsieh and Yi-Ru Cian
673
Tools and Environments for Parallel and Distributed Software Development The Design and Implementation of Z Language Editor . . . . . . . . . . . . . . . . Xiaolei Gao
684
Table of Contents
XVII
Web Service A Semantic-Aware Attribute-Based Access Control Model for Web Services . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Haibo Shen A P2P Service Management Model for Emergency Response Using Virtual Service Pool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Feng Yang, Hui Wen, Wei Cheng, Kangkang Zhang, and Peiguang Lin
693
704
A Web 2.0 and Open Source Approach for Management and Sharing of Multimedia Data-Case of the Tzu Chi Foundation . . . . . . . . . . . . . . . . . . . Jian-Hung Chen and Hsiu-Hsun Yang
715
Adaptive Link Cost Reduction by Generic Topology Construction in Ad-Hoc Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reu-Ching Chen and Cheng-Min Lin
721
An Efficient Data Dissemination Scheme for Sensor Networks . . . . . . . . . . Po-Jen Chuang and Bo-Yi Li Dynamically Maintaining Duplicate-Insensitive and Time-Decayed Sum Using Time-Decaying Bloom Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yu Zhang, Hong Shen, Hui Tian, and Xianchao Zhang Lead Scoring Client’s Web Service . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yun Ling and Chongyi Ye
729
741 751
Minimizing the Limitations of GL Analyser of Fusion Based Email Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Md. Rafiqul Islam and Wanlei Zhou
761
A Medical Diagnosis Decision Support System Based on Bayesian Theorem and Web Services . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chung C. Chang and Hsueh-Ming Lu
775
Analysis on an Energy Efficient Routing Algorithm for Wireless Sensor Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yung-Fa Huang, Tan-Hsu Tan, Yau-Der Wang, Neng-Chung Wang, and Ding Yin Reliable Greedy Forwarding in Obstacle-Aware Wireless Sensor Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ming-Tsung Hsu, Frank Yeong-Sung Lin, Yue-Shan Chang, and Tong-Ying Juang Recursive Dual-Net: A New Universal Network for Supercomputers of the Next Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Yamin Li, Shietung Peng, and Wanming Chu
786
797
809
XVIII
Table of Contents
Using XML for VLSI Physical Design Automation . . . . . . . . . . . . . . . . . . . Fong-Ming Shyu, Po-Hsun Cheng, and Sao-Jie Chen
821
A New Constant Storage Self-healing Key Distribution with Revocation in Wireless Sensor Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Wei Du, Mingxing He, and Xiao Li
832
Design a Hardware Mechanism to Utilize Multiprocessors on a Uni-processor Operating System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Slo-Li Chu, Chih-Chieh Hsiao, and Pin-Hua Chiu
844
Refinement Proposal of the Goldberg’s Theory . . . . . . . . . . . . . . . . . . . . . . . J´erome Gallard, Adrien L`ebre, Geoffroy Vall´ee, Christine Morin, Pascal Gallard, and Stephen L. Scott
853
Variable Dimension Space Audio Scrambling Algorithm Against MP3 Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Huan Li, Zheng Qin, Liping Shao, Shanjun Zhang, and Bin Wang
866
Author Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
877
Length Encoded Secondary Structure Profile for Remote Homologous Protein Detection Yen-Chu Hsu1, Chien-Ming Chen1, Tun-Wen Pai1, Jyh-Fu Jeng2, Chin-Hua Hu2,3, and Wen-Shyong Tzou3 1
Department of Computer Science and Engineering, National Taiwan Ocean University, No. 2, Peining Road, Keelung 20224, Taiwan, R.O.C.
[email protected] 2 Center for Marine Bioscience and Biotechnology, National Taiwan Ocean University, No. 2, Peining Road, Keelung 20224, Taiwan, R.O.C. 3 Institute of Bioscience and BioTechnology, National Taiwan Ocean University, No. 2, Peining Road, Keelung 20224, Taiwan, R.O.C.
Abstract. Protein data has an explosive increasing rate both in volume and diversity, yet many of its structures remain unresolved, as well their functions remain to be identified. The conventional sequence alignment tools are insufficient in remote homology detection, while the current structural alignment tools would encounter the difficulties for proteins of unresolved structure. Here, we aimed to overcome the combination of two major obstacles for detecting remote homologous proteins: proteins with unresolved structure, and proteins of low sequence identity but high structural similarity. We proposed a novel method for improving the performance of protein matching problem, especially for mining remote homologous proteins. In this study, existing secondary structure prediction techniques were applied to provide the locations of secondary structure elements of proteins. The proposed LESS (Length Encoded Secondary Structure) profile was then constructed for segment-based similarity comparison in parallel computing. As compared to a conventional residue-based sequence alignment tool, detection of remote protein homologies through LESS profile is favourable in terms of speed and high sequence diversity, and its accuracy and performance can improve the deficiencies of the traditional primary sequence alignment methodology. This method may further support biologists in protein folding, evolution, and function prediction. Keywords: protein sequence comparison, secondary structure element alignment, dynamic programming, length encoded profile, protein folding.
1 Introduction The identification of homologous, sequences that share common ancestry, is essential for gene annotation, function prediction, and comparative genomics. Traditionally, homology is defined in vertical descent evolutionary perspective, i.e. by speciation and gene duplication [6, 7]. New genes evolve through the duplication and modification of A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 1–11, 2009. © Springer-Verlag Berlin Heidelberg 2009
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existing genes. As a result, genes that share common ancestry tend to have similar structures and functions. In genome analysis, assignment of protein function is based on postulated homology as recognized by high sequence similarity. Nowadays, the most powerful method for inferring the biological function of a gene, or the protein that it encodes, is by sequence similarity searching on sequence databases. Most of the sequence comparison tools, for example, BLAST [1], PSI-BLAST [2], ClustalW [9], etc., rely on the computational identification of similarity between a protein of unknown function and one of known function. With these tools, however, the detection of remote homology by amino acid sequence has proven to be insufficient [13]. In general, most reliable results were obtained upon sequence identity above 40% and matched with a known profile; otherwise, errors would occur at lower sequence identity, especially to those of remote homologies across species[19]. Structural alignment is much more accurate than amino acid sequence comparisons, especially when the sequence similarity is low [10, 13]. However, current protein structure-to-structure comparison tools [8, 10, 11, 14, 15, 17, 18] are developed based on 3D structural comparison among proteins. They are not applicable to those proteins without determined structures. Biologists have identified that many genes in humans have orthologous in yeast and E. coli through similarity search [12,16]. Conservation of structures among proteins involved in initial suggests that fundamental features of replication complexes are maintained in all eukaryotes [16]. As the entire genomes from lower organisms become available, protein sequence comparison provides an even more effective tool for understanding biological function. However, two major obstacles in homology search still remain when the protein structures are unresolved, and only high sequence identity can be found in structurally similar proteins. To tackle with the combination of both constraints, a preliminary solution is offered in this research. Here we present a novel model for similarity comparison of the proteins of unresolved structures. The new approach first predicts the unresolved protein structure from amino acid residues into secondary structure elements (SSEs). Followed by statistical analysis of encoding lengths, the Length Encoded Secondary Structure (LESS) profile is then constructed within a segment-based representation. For a given query protein, its corresponding LESS profile is transformed and pairwisely aligned in parallel way. All the maximal matches are retrieved from the target protein dataset according to the ranked alignment scores. In this research, we examine the performance by comparing our result with one of the conventional sequence comparison tools.
2 Materials and Methods 2.1 Mining Cytochrome P450 Proteins from C. intestinalis Cytochrome P450 (abbreviated CYP or P450) is a very large and diverse superfamily of hemoproteins found in all domains of life [4]. CYP uses a plethora of both exogenous and endogenous compounds as substrates in enzymatic reactions. The most common reaction catalyzed by CYP is a monooxygenation reaction. CYP enzymes have been identified from all lineages of life, including mammals, birds, fish, insects, worms, sea squirts, sea urchins, plants, fungi, slime molds, bacteria and archaea. More than 8,000 distinct CYP sequences are known as of February 2008.
Length Encoded Secondary Structure Profile for Remote Homologous Protein Detection
3
The Human Genome Project has identified more than 63 human genes encoding various CYP enzymes. Many animals have even more CYP genes than humans do. For example, mice have 101 CYP genes, and sea urchins are estimated to have as many as 120 CYP genes. With rapid advances in biotechnology, gene and genome sequencing is far outpacing biochemical characterization of enzymatic function, many genes with close homology to CYPs with known function remains to be discovered. The Ciona intestinalis (C. intestinalis) genome is the smallest of any experimentally manipulable chordate. It provides a good system for exploring the evolutionary Table 1. List of proteins included in the novel dataset (randomly selected from the SCOP database). There were six superfamilies categorized into four major classes : all alpha, all beta, alpha+beta, alpha/beta. 5%12ENCUUKHKECVKQPNGXGNU
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origins of the chordate lineage, from which all vertebrates sprouted. In the past decade, the complete genome of this organism has been sequenced; however, its protein structures remain unresolved, as well as many of its functions still remain unknown. In this empirical study, with our proposed method, C. intestinalis is taken as our pilot experiment to find the potential homology to CYP2D (100817353-CYP2D and AAO49806-CYP2D) and CYP17A1 (P05093-CYP17A1). CYP2D and CYP17A1 belong to the subfamilies of CYP, where CYP2D is an enzyme involved in the metabolism of xenobiotics in the body, and CYP17A1 plays an important role with the hydroxylase activity. Currently, in C. intestinalis, only 72 out of total 20,150 genes have proven or hypothesized to be associated with CYP related functions and all the other CYP related genes are yet to be discovered. 2.2 A Novel Dataset for Protein Sequence Classification To demonstrate and evaluate effectiveness of the proposed method for protein sequence comparison, a novel dataset comprised six superfamilies that were randomly selected from the Structural Classification of Proteins (SCOP) database. It consisted of 129 protein structures within all alpha, all beta, alpha+beta, or alpha/beta classes. We will utilize the protein sequence information as our input data only, and the structural information will be applied for final verification processes. Table 1 lists all collected structures in details. 2.3 Proposed LESS Model The proposed model is composed of two modules, the secondary structure prediction and LESS modules, as illustrated in Fig. 1. Details are described as follows.
Fig. 1. System flowchart
Length Encoded Secondary Structure Profile for Remote Homologous Protein Detection
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2.3.1 Secondary Structure Prediction Module In the absence of empirical protein structure, to build a 3D model of a protein, prediction of the secondary structure provides the possible locations of α-helices, and β-strands within a protein or protein family. For any protein sequence without determined structure, SSpro [3] is applied to predict its secondary structure locations in this study. In fact, any robust and accurate prediction method is applicable in the proposed system as long as all the query and target sequences under evaluation employing the same method for predicting locations of secondary structure elements. 2.3.2 LESS Module As we are targeting on protein comparison at low sequence similarity, LESS is proposed to fuzzy reconstruct the predicted protein secondary structure. As the name implies, the predicted SSE segments are transformed into a profile with length information. For an organism, the length distribution of various types of SSEs (H/E/C) to the occurring amount is statistically analyzed. To preserve equal distribution and probabilities of encoded SSEs within the consideration of length factor, the total occurring amount of predicted SSEs is averagely divided into designated groups. In this research, each type of SSE is divided into 6 groups and assigned with a specified length code, H0~H5, E0~E5, and C0~C5, respectively. A predicted secondary structure sequence is then reconstructed into the LESS profile according to its corresponding code. Hence, the length of predicted secondary structure is reduced, and with LESS profile, the vaguer structural information is retrieved and the similarity comparison can be performed parallelly for proteins categorized in various representative clusters in advance. 2.4 Secondary Structure Prediction To illustrate an example, the total of 20,150 protein sequences of C. intestinalis were retrieved from Ensembl [5] and the SSpro was applied for secondary structure prediction. The amounts of 20,057 sequences were successfully predicted, while system errors occurred for the rest of 93 sequences. Here, the total of 20,057 sequences that successfully predicted were applied as our targeting dataset for LESS encoding and remote homologous protein matching. The SSpro [3] is a server for protein secondary structure prediction, which embeds the correlation into one single recursive neural network. It takes the query of a protein sequence and output the predicted 3-class secondary structures which ‘H’ represents α-helix, ‘E’ as β-strand, and ‘C’ as loop element. The performance accuracy reaches around 78%, which is relatively high comparing with other SSE prediction methods. 2.5 LESS Profile Construction Fig. 2 illustrates the length distribution of each SSE structure in C. intestinalis. Table 2 shows the mapping between conventional SSEs and LESS codes. The average residue number of the C. intestinalis genome is about 400 residues per protein, where the length was reduced to about 45 coded characters averagely after transformed to its LESS profile.
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Fig. 2. (a) Distribution diagram of α-helix element in C. intestinalis. The X-axis represents the length of helix element in genome of C. intestinalis, and Y-axis represents the occurring number of predicted α-helices. (b) Distribution diagram of β-strand element in C. intestinalis. (c) Distribution diagram of loop element in C. intestinalis. Table 2. Mapping between conventional SSEs and LESS profiles of C. intestinalis 5VTWEVWTG
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function smooth(smooth_level, input_string) counter = 1 while counter
Mj
then
it is available.
where Mi : remaining memory size of resource node; Mj : required memory size of job; • Resource evaluation component (REC): - evaluates the most suitable node, it consists of the following two steps: Table 4. Contents of CPU level
CPU type
CPU level
Quad-core CPU
High
Dual-core CPU
Middle
Single-core CPU
Low
(1)
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Step1. selects resource nodes by the CPU level of job request, as shown in Table 3 from the result of RSEC. We divided CPU level into three levels, as shown in Table 4; Step2. selects the node where CPU usage is lowest from the result of Step1. - sends the evaluation result to the request node. 2.2 Execute Process Scheduling Analysis Module (EPSAM) There are two sub-modules in EPSAM, saying message process sub-module (MPSM) and job process sub-module (JPSM), as shown in Fig. 5. The MPSM sends job request to supervisor grid node, and receives the evaluating result from supervisor grid node. Then it will send the result to JPSM. The JPSM transfers job to the selected node. It also receives job transfer from other nodes. EPSAM MPSM
User
JPSM
Supervisor Node
Execute Node
Fig. 5. Framework of the EPSAM
2.2.1 Message Process Sub-Module (MPSM) There are two components in MPSM, saying message send component (MSC) and message receive component (MRC), as shown in Fig. 6. MPSM MSC
MRC
Execute Node
Supervisor Node
Fig. 6. Framework of the MPSM
The functions of these two components are as follows: • Message send component (MSC): - sends job request to supervisor grid node; - sends executed result to the request node. • Message receive component (MRC): - receives the evaluating result from supervisor grid node; - sends the evaluation result to JPSM.
JPSM
A Process Scheduling Analysis Model Based on Grid Environment
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2.2.2 Job Process Sub-Module (JPSM) There are two components in JPSM, saying job process component (JPC) and job receive component (JRC), as shown in Fig. 7. JPSM Execut e Node
JPC
Execute Node
JRC
MPSM
.
Fig. 7. Framework of the JPSM
The functions of these two components are as follows: • Job process component (JPC): - processes jobs and saves job data, as shown in Table 5; - while the load of node is high, JPC will transfer job to selected resource node and update job table; - sends executed result to MSC while job from request node has finished. • Job receive component (JRC): - receives the result of transfer job from destination node; - receives job transfer from other nodes; - updates job table. Table 5. Contents of job table Job name
Request node name
required memory size
Destination node name
Receive time
Finish time
3 Model Implementation At first, the CPU usage of node A is very high. There are still five jobs waiting for executed. The CPU usage of node B and node C are lower, as shown in Table 6. We transferred jobs of A to B and C by using PSAM. Table 6. The result of implementation Time
Before t1
Node
A
waiting jobs
5 100 %
CPU usage Average CPU utilization
B
t1 to t2 C
0 0 9 25 % % 45%
t2 to t3
After t3
A
B
C
A
B
C
A
B
C
3 100 %
0 39 %
0 55 %
1 100 %
0 58 %
0 77 %
0 100 %
0 84 %
0 56 %
65%
78%
80%
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Ⅰ
CPU utilization
( ) Load-Balancing According to our experimental result, we can see the loading of B and C were enhanced, and the average CPU utilization of grid was also enhanced, as shown in Fig. 8. The number of waiting jobs in high-loading node was reduced, as shown in Table 6. Therefore, we can make load-balancing of all grid nodes in the system by using our model.
Time (s) Fig. 8. The average CPU utilization
Ⅱ
( ) Integrated Performance Via implementing our model, we can reduce total executed time by making loadbalancing, as shown in Table 7, and have better system performance. Table 7. Total executed time Method
Total executed time (second)
Without PSAM
138.21 (second)
Using PSAM
103.34 (second)
4 Conclusion If jobs and load distributions are not uniform, the load of some grid nodes may be heavy and jobs in high-loading nodes may wait for a long time. If we want to have good performance in the system on grid environment, we should have load-balancing of all grid nodes in the system. In this paper, we propose a process scheduling analysis model based on grid environment. When the load of the node is high, the proposed model, PSAM, can transfer jobs to the most suitable node which selected by supervisor grid node. By this model, we can make all grid nodes be load-balancing. Therefore, we can reduce the number of waiting jobs in high-loading grid node, and enhance CPU usage of idle
A Process Scheduling Analysis Model Based on Grid Environment
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nodes. In addition, we also can reduce total executed time. Via implementing this model, we can improve the grid environment performance efficiently. Acknowledgments. This work was supported in part by the National Science Council, Taiwan, under grant NSC-95-2745-M-034-007–URD.
References 1. Iosup, A., Epema, D.H.J., Franke, C., Papaspyrou, A., Schley, L., Song, B., Yahyapour, R.: On Grid Performance Evaluation using Synthetic Workloads. In: Frachtenberg, E., Schwiegelshohn, U. (eds.) JSSPP 2006. LNCS, vol. 4376, pp. 232–255. Springer, Heidelberg (2007) 2. Silberschatz, A., Gagne, G., Galvin, P.B.: Operating System Principles, 7th edn. John Wiley &Sons (Asia) Pte Ltd., Chichester (2004) 3. Miller, B.P., Callaghan, M.D., Cargille, J.M., Hollingsworth, J.K., Irvin, R.B., Karavanic, K.L., Kunchithapadam, K., Newhall, T.: The Paradyn Parallel Performance Measurement Tool. IEEE Computer 28(11), 37–46 (1995) 4. Sanjay, H., Vadhiyar, S.: Performance modeling of parallel applications for grid scheduling. Journal of Parallel and Distributed Computing 68(8), 1135–1145 (2008) 5. Li, H., Groep, D., Wolters, L.: Workload characteristics of a multi-cluster supercomputer. In: Feitelson, D.G., Rudolph, L., Schwiegelshohn, U. (eds.) JSSPP 2004. LNCS, vol. 3277, pp. 176–194. Springer, Heidelberg (2005) 6. Lee, H.-M., Hsu, C.-C., Hsu, M.-H.: A Dynamic Supervising Model Based on Grid Environment. In: Khosla, R., Howlett, R.J., Jain, L.C. (eds.) KES 2005. LNCS, vol. 3682, pp. 1258–1264. Springer, Heidelberg (2005) 7. Lee, H.-M., Lee, T.-Y., Yang, C.-H., Hsu, M.-H.: An Optimal Analyzing Resources Model Based on Grid Environment. WSEAS Transactions on Information Science and Applications 3(5), 960–964 (2006) 8. Lee, H.-M., Lee, T.-Y., Hsu, M.-H.: A Process Schedule Analyzing Model Based on Grid Environment. In: Gabrys, B., Howlett, R.J., Jain, L.C. (eds.) KES 2006. LNCS (LNAI), vol. 4253, pp. 938–947. Springer, Heidelberg (2006) 9. Globus (2008), http://www.globus.org 10. Foster, I., Kesselman, C., Tuecke, S.: GRAM: Key concept (July 2008), http:// www-unix.globus.org/toolkit/docs/3.2/gram/key/index.html 11. Foster, I., Kesselman, C.: The Grid 2: Blueprint for a new computing infrastructure, pp. 25–53. Morgan Kaufmann, San Francisco (2004) 12. Foster, I., Kesselman, C.: Gloubs: A Metacomputing Infrastructure Toolkit. International Journal of Supercomputer Application 11(2), 115–128 (1997)
A Resource Broker with Cross Grid Information Services on Computational Multi-grid Environments∗ Chao-Tung Yang1,∗∗, Wen-Jen Hu1, and Kuan-Chou Lai2 1
Department of Computer Science, Tunghai University Taichung, 40704, Taiwan (ROC) {ctyang,g97350004}@thu.edu.tw 2 Department of Computer Science and Information Engineering, National Taichung University Taichung, Taiwan (ROC)
[email protected]
Abstract. Grid computing is now in widespread use, which integrates geographical computing resources across multiple virtual organizations to achieve high performance computing. In this paper, we present a new grid architecture, which integrates multiple computational grids, named Multi-Grid, from different virtual organizations. The proposed architecture could solve the large-scale computational problem. Due to gathering information across different grids has the imprecise problem, the accuracy of information probably affects the computational efficiency. Thus, this paper proposes a cross-grid information service approach to gather resource information. Furthermore, a gathering algorithm, which could balance the query frequency and the resource information accuracy, is present to reduce the load of information servers. Finally, we implement a resource broker with cross-grid information services on multi-grid computational environments.
1 Introduction Grid technology plays an important role in high performance computing. Grid systems integrate distributed computing resources to provide supercomputer-like computing environments [1, 3, 4, 14]. There are more and more proposed grid projects such as Globus, Condor, LEGION, Grid PP, EGEE, P-Grid, DutchGrid, ESnet, and Grid Bus [25-33]. But some of virtual organizations have no the adequate of computing resources, because of the size of virtual organizations. In this paper, we propose a multi-grid architecture to solve the above problem. When a new grid joins in the multi-grid environment by the proposed system, any user could use the entire multi-grid resources. This approach could help these virtual organizations to possess more computing resources without any extra overhead. We also provide a user-friendly web portal which integrates with the resource broker [6, 7, 13-17], the cross grid information service, and the monitoring service, called “Multi-Grid Resource Broker.” The main function of the resource broker is to ∗ ∗∗
This work is supported in part by National Science Council, Taiwan R.O.C., under grants no. NSC 96-2221-E-029-019-MY3, NSC 97-3114-E-007-001, and NSC 97-2622-E-029-003-CC2. Corresponding author.
A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 20–31, 2009. © Springer-Verlag Berlin Heidelberg 2009
A Resource Broker with Cross Grid Information Services
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match the available resources to the user’s requirement. The resource broker helps users to select suitable resources according to user preferences and job characteristics. In our architecture, we chose the Globus Toolkit [1, 24] to be the middleware of grids. Although Globus provides a monitor tool, called MDS [1], we use “Ganglia” [10, 12, 20-23] as the monitor tool in the multi-grid system. Moreover, we propose a Cross-Grid Information Service (CGIS), which describe how to integrate the information in different grids. An information query algorithm is also proposed for adjusting information update time dynamically according to the information fluctuation to reduce the traffic overhead in the information collecting stage. The contribution of this paper is to construct a multi-grid platform, which integrates three grid systems including the Tiger Grid, the Medical Grid, and the Bio Grid [15, 20-22], and furthermore, to design and implement a Multi-Grid Resource Broker [19].
2 Implementation of Multi-grid There are two important issues on integrating different grid systems into a multi-grid environment, which include the authentication and the information gathering. For authentication to access another grid in the multi-grid environment, CA Server exchanges the authentication. We also built a web portal to help users to join the multigrid environment by registration. Collecting the resource status from different grids considers many issues, such as the heterogeneity of the monitors, the accuracy of collected information, and the real-time information [18]. They are described as follows. 2.1 Cross CA The Globus Toolkit authentication is issued by the certificate of GSI. Each user and service is certificated to identify and authenticate the trust between users or services [25]. If two parties have the certificate and both of them trust the CAs, then these two parties could trust each other. This is known as the mutual authentication. There were simple steps to accomplish the cross-grid CA. When a grid tries to register into the multi-grid system (Tiger server as our multi-grid server), the administrator of this grid must upload CA-Packages to the multi-grid server; and the new-join grid exchanges the information of CA server with the multi-grid Server. The steps of exchanging Cross-grid CAs are shown in Figure 1. 2.2 Cross Grid Information Service The monitor tool is the important component in a grid environment [8-12]. A monitor tool could help grid administrator to manage and monitor the machines. On the other hand, the middleware could gather the resource information to find the suitable resource by the monitor tool. There are common monitor tools, such as MDS, Ganglia, Cacti, and Condor [23, 25, 26, 34]. In a multi-grid environment, grids use different monitor tools with different information formats. Therefore, we define a new information format to translate different monitor formats. The proposed format is called IDL (Information Describing Language), as shown in Figure 2. It is responsible to exchange and translate resource information among grids, and to perform the posttransfer filtering to ensure that only necessary information is passed to clients, end users, and software components.
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Fig. 1. Steps of joining into the Multi-Grid system
Fig. 2. Information Describing Language
The CGIS consists of three layers: the Core Service Layer, the Translator Layer, and the Resource Layer. The Core Service Layer contains the Agent, Filter, Getter and Setter, and Gather. These components are installed in every grid environment for information gathering and maintenance. The Translator Layer supports a variety of format conversion monitor tool, such as Ganglia, Cacti, and MDS. The information in different monitor tools is transformed into the IDL format. The Resource Layer describes resource information from different grid environments. In this study, it includes Tiger Grid, Medical Grid, and Bio Grid.
A Resource Broker with Cross Grid Information Services
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Fig. 3. Cross Grid Information Service system architecture
2.3 Resource Broker This study implements a resource broker with the cross-grid information service on the multi-grid computational environment. The resource broker discovers and evaluates multi-grid resources, and makes the decision of job submission depending on the job requirement. The system architecture of the resource broker is shown in Figure 4. Users could easily make use of our resource broker through a common Grid portal [6, 7, 13-17]. When a grid joins into the multiple-grid system, the grid administrator should register into the web portal and provide the personal file and the related information of the grid, which contains the CA package, the grid-mapfile of LDAP, and the machine lists. The web portal interface is shown in Figure 5. The multi-grid system deploys the environment according to the registration information, and then assigns a resource broker account to a single grid user. This account could access the resource supported by the resource broker in the multi-grid environment, Figure 4 shows the concept. The Monitor Service could monitor the resources supported by the multi-grid resource broker. We provide the interface to observe the status of HostInfo, Daemons, and Ganglia. The HostInfo lists the common information by parsing the Information Describing Language file, as shown in Figure 6. Daemon Status inspects the status of
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Fig. 4. Resource Broker system architecture
a variety of services, as shown in Figure 7. Ganglia only collect the status of grid resources. In this study, we rewrite the Ganglia codes and modify the setting to support the multiple grids, as shown in Figure 8. Besides, a grid user could execute a parallel program by the workflow service [16] on the Multi-Grid Resource Broker, as shown in Figures 9 and 10.
Fig. 5. Register at Multi-Grid Server
Fig. 6. Multi-Grid Monitor - Host List
A Resource Broker with Cross Grid Information Services
Fig. 7. Multi-Grid Monitor - Daemon Status
Fig. 9. Submit a job
25
Fig. 8. Multi-Grid Monitor – Ganglia
Fig. 10. Assign the machine of grids to execute jobs
3 Algorithm for Information Service A grid information system should be able to effectively gather the resource information for users or middleware. In the Cross Grid Information Service (CGIS), we design an adaptive information query algorithm. If the CGIS could retrieve resource information immediately, the resource information could be consistent with the actual situation; however, too short retrieve times would cause the heavy system loading. The concept of the proposed algorithm is to calculate the dynamic information variation between the last two periodically gathered information. The larger variation implies that there is a bigger chance to gather out-of-date information since the information is changed often currently. Thus we could use the gathering-by-query approach to solve the above problem. In this approach, we use a mathematical formula to illustrate our idea. The parameters used in this algorithm are listed in the following: Without lost of generality, let T0, T1, …, Ti be the time serial when the CGIS gets the information request periodically. And assume that the information query request is arrival at time Ti+1. Infi: the resource information queried from IDL file at time Ti. IVj: the variation percentage of type j information from Ti-1 to Ti. RV: the resource variation percentage of all dynamic information from Ti-1 to Ti. Tinterval: the information gathering period. Tfresh: the time duration for the information to be fresh (which means this information is not out-of-date).
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While receiving information request at time Ti+1, we use the last two gathered information at Time Ti and Ti-1 to calculate the information variation. Since there are many resource types in a single IDL file (e.g., CPU loading, memory free, disk free, etc…), we calculate the j type information variation IVj of the last two records as follows. ⎧ Inf i - Inf i −1 , if Inf i ≥ Inf i −1 ⎪ Inf i ⎪ IV j = ⎨ ⎪ Inf i - Inf i −1 , if Inf < Inf i i −1 ⎪⎩ Inf i −1
(1)
Then we calculate the variation among all resource type j by RV =
j = num 1 × ∑ IV j num 1
(2)
Beside the information variation, another key point to determine whether the information out-of-date is the query arrival time. When the time interval from query arrivals to the last gathering time decreases, the chance to get a out-of–date information decreases. Therefore, after receiving the information query request, we determine each type of the request Reqj to check whether this information is dynamic (e.g., the memory free size is dynamic). When the characteristic of the information is static (i.e., it does not change over time), the pre-gathered information is then used to answer the query. When the characteristic of the information is dynamic, we calculate the time period Tclose from the arrival time of this information query to the last periodical gathered time as follows.
Tclose = CurrentTime − Ti
Fig. 11. Adaptive query information algorithm
(3)
A Resource Broker with Cross Grid Information Services
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When Tclose decreases, there is less possibility for the historical record to be out-ofdate. Therefore, the historical record could be used directly. Here, we define the threshold Tfresh for the information to be fresh as the following equation.
T fresh = (1 − RV ) × Tint erval
(4)
If the Tclose is less or equal to Tfresh, it means that the historical information is still fresh to answer the query directly. Otherwise, we use the gathering-by-query approach to prevent out-of-date issues. The detailed algorithm is shown in Figure 11.
4 Experimental Results In this study, the proposed multi-grid system consists of the Tiger Grid, Medical Grid, and Bio Grid. We choose the Medical Grid and Bio Grid as our experimental environment. Table 1 and Table 2 show the number of CPU/core, speed (MHz) and memory sizes (MB). The Medical Grid consists of 57 processors located at 5 universities. The Bio Grid consists of 22 processors located at 1 university. We implemented the CGIS on the Medical Grid and the Bio Grid. The experiments are performed on the two grids for gathering experiment results in different grid systems. We assume that the times to send requests are 25, and each request is send Table 1. Resource Status in Medicare Grid Site THU CHU FCU NTHU PU
Number of CPU/Core 32 8 14 12 4
Total Speed (MHz) 73,600 8,000 24,000 15,172 7,302
Total Memory (MB) 8,192 1,024 11,264 6,144 4,096
Table 2. Resource Status in Bio Grid Site
infobio mbio01 bio01 bio02 bio03 bio04 bio05 bio06 bio07 bio08 bio09
Number of CPU/Core 2 2 2 2 2 2 2 2 2 2 2
Total Speed (MHz) 2,793 2,058 2,793 2,058 2,058 2,058 2,010 2,058 2,793 2,793 2,793
Total Memory (MB) 1,024 1,024 1,024 1,024 1,024 1,024 1,024 1,024 1,024 1,024 1,024
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Fig. 12. Resource loading of resource A in 60 minutes
Fig. 13. Resource loading of resource B in 60 minutes
randomly in 60 minutes. We also assume that the information gathering period is 5 minutes which refer to the Ganglia update time. We compare our algorithm in real grid environment. The different system loading of resource A and resource B are shown in Figures 17 and 18. In this study, we compare the adaptive information query algorithm applied in CGIS with the gathering-by-query strategies. The details of strategies are shown as fellows: Gathering-by-query (GBQ) approach: In this strategy, CGIS gathers the resource information immediately from the cross-grid environment after obtaining the request from other components. The retrieved information would be saved by an IDL file in the database on time. Periodical-gathering approach: The difference between the periodicalgathering approach and the gathering-by-query strategy is the informationupdate time period. After receiving the request from other components, CGIS would not retrieve information immediately. The information would be updated periodically. As shown in Figures 13 and 15, the adaptive information query algorithm is better than the other two strategies. In this paper, we set the times of sending requests are 25. In the gathering-by-query strategy, CGIS retrieves resource information immediately. In the periodical-gathering strategy, most of the times are used to retrieve data rather than read history file, this approach reduces the access time. We could use the gathering-by-query approach in the single-grid environment, but the data transfer time in the cross-grid environment is much longer than that in the single-grid environment. So we try to balance the query frequency and the information accuracy. The accuracy of the adaptive information query approach is shown in Figures 14 and 16. Our algorithm reduces the data retrieving time and obtains a better accuracy. At the same time, there are few retrieving times and better accuracy on the resource A with a few system’s loading peaks. The average accuracies on resource A and B are 81% and 87%; and the requests were sent randomly in 60 minutes. To show that the average accuracy are not depended on time series, we calculate the average accuracy on 20 minutes, 40 minutes, 60 minutes, 80 minutes, 100 minutes and 120 minutes. The experimental results are shown in Figure 17.
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100
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90 80 AIQ
70 60
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50 40
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30 20 10 0 0:00
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Fig. 14. Information retrieval times on resource A
Fig. 15. The variety of information accuracy on resource A 100
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Fig. 16. Information retrieval times on resource B
Fig. 17. The variety of information accuracy on resource B
100 90 80 70 60 50 40 30 20 10 0
resource A resource B
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Fig. 18. The variety of average accuracy for different experiment time
5 Conclusion and Future Work In this paper, we construct a multi-grid computational grid platform, which integrates the three grids, and propose an effectively information gathering method. Users could monitor the status of the multi-grid and execute the workflow by the web portal to achieve high-performance computing without any comprehend complicated instructions. When more and more virtual organizations join into the multi-grid environment, the computing resource would progressively grow up. In the future, we focus on the approach for efficiently gathering the information among different grids.
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Because of that the accuracy of gathered information would indirectly affect the efficiency of computing, using P2P technique for information exchanging could improve the above question in the entire system.
References 1. Foster, I., Kesselman, C.: Globus: A Metacomputing Infrastructure Toolkit. International Journal of Supercomputer Applications 11(2), 115–128 (1997) 2. Laszewski, V., Foster, I., Gawor, J., Lane, P.: A Java commodity grid kit. Concurrency and Computation: Practice and Experience 13, 645–662 (2001) 3. Czajkowski, K., Fitzgerald, S., Foster, I., Kesselman, C.: Grid Information Services for Distributed Resource Sharing. In: Proceedings of the Tenth IEEE International Symposium on High-Performance Distributed Computing. IEEE press, Los Alamitos (2001) 4. Foster, I., Karonis, N.: A Grid-Enabled MPI: Message Passing in Heterogeneous Distributed Computing Systems. In: Proceedings of 1998 Supercomputing Conference (1998) 5. Tang, J., Zhang, M.: An Agent-based Peer-to-Peer Grid Computing Architecture. In: First International Conference on Semantics, Knowledge and Grid, 2005, SKG 2005, p. 57 (November 2005) 6. Aloisio, G., Cafaro, M.: Web-based access to the Grid using the Grid Resource Broker portal. Concurrency Computation: Practice and Experience (14), 1145–1160 (2002) 7. Krauter, K., Buyya, R., Maheswaran, M.: A taxonomy and survey of grid resource management systems for distributed computing. Software Practice and Experience (32), 135–164 (2002) 8. Baduel, L., Matsuoka, S.: Peer-to-Peer Infrastructure for Autonomous Grid Monitoring. In: Parallel and Distributed Processing Symposium (2007) 9. Kim, D.-H., Kang, K.-W.: Design and Implementation of Integrated Information System for Monitoring Resources in Grid Computing. In: Computer Supported Cooperative Work in Design, CSCWD 2006 (2006) 10. Sacerdoti, F.D., Katz, M.J., Massie, M.L., Culler, D.E.A.C.D.E.: Wide area cluster monitoring with Ganglia. In: Proceedings of 2003 IEEE International Conference on Cluster Computing, 2003, pp. 289–298 (2003) 11. Chung, W.-C., Chang, R.-S.: A new mechanism for resource monitoring in grid computing. Future Generation Computer Systems (accepted manuscript) (available online April 29, 2008) (in press) 12. Yang, C.T., Chen, T.T., Chen, S.Y.: Implementation of Monitoring and Information Service Using Ganglia and NWS for Grid Resource Brokers. In: Proceedings of 2007 IEEE Asia-Pacific Services Computing Conference, Tsukuba, Japan, December 11-14, 2007, pp. 356–363 (2007) 13. Yang, C.T., Lai, C.L., Shih, P.C., Li, K.C.: A resource broker for computing nodes selection in grid computing environments. In: Jin, H., Pan, Y., Xiao, N., Sun, J. (eds.) GCC 2004. LNCS, vol. 3251, pp. 931–934. Springer, Heidelberg (2004) 14. Yang, C.T., Shih, P.C., Li, K.C.: A high-performance computational resource broker for grid computing environments. In: 19th International Conference on Advanced Information Networking and Applications, AINA 2005, vol. 2, pp. 333–336 (2005) 15. Yang, C.T., Li, K.C., Chiang, W.C., Shih, P.C.: Design and Implementation of TIGER Grid: an Integrated Metropolitan-Scale Grid Environment. In: Proceedings of tdhe 6th IEEE International Conference on PDCAT 2005, December 2005, pp. 518–520 (2005)
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16. Yang, C.T., Lin, C.F., Chen, S.Y.: A Workflow-based Computational Resource Broker with Information Monitoring in Grids. In: Fifth International Conference on Grid and Cooperative Computing (GCC 2006), pp. 199–206 (2006) 17. Yang, C.T., Chen, S.Y., Chen, T.T.: A Grid Resource Broker with Network BandwidthAware Job Scheduling for Computational Grids. In: Cérin, C., Li, K.-C. (eds.) GPC 2007. LNCS, vol. 4459, pp. 1–12. Springer, Heidelberg (2007) 18. Yang, C.T., Shih, P.C., Chen, S.Y.: A Domain-Based Model for Efficient Measurement of Network Information on Grid Computing Environments. IEICE - Trans. Inf. Syst. E89-D, 738–742 (2006) 19. Multi Grid, http://gamma2.hpc.csie.thu.edu.tw/ 20. Tiger Grid, http://gamma2.hpc.csie.thu.edu.tw/ganglia/ 21. Medical Grid, http://eta1.hpc.csie.thu.edu.tw/ganglia/ 22. Bio Grid, http://140.128.98.25/ganglia/ 23. Ganglia, http://ganglia.sourceforge.net/ 24. Java CoG Kit, http://wiki.cogkit.org/ 25. Globus, http://www.globus.org/ 26. Condor, http://www.cs.wisc.edu/condor/ 27. LEGION, http://www.cs.virginia.edu/~legion/ 28. GridPP, http://www.gridpp.ac.uk/ 29. EGEE, http://www.eu-egee.org/ 30. P-Grid, http://www.p-grid.org/ 31. DutchGrid, http://www.dutchgrid.nl/ 32. ESnet, http://www.es.net/ 33. GridBus, http://www.gridbus.org/ 34. Cacti, http://www.cacti.net/
Fleet: An Effective System for Publish/Subscribe Service over P2P Networks Chyouhwa Chen1, Chia-Liang Tsai1, and Kun-Cheng Tsai2 1
Department of Computer Science and Information Engineering, National Taiwan University of Science and Technology
[email protected] 2 Institute for Information Industry, Taiwan, R.O.C.
[email protected]
Abstract. We propose a new Publish/Subscribe system, called Fleet, that seamlessly combines a novel subscription mapping scheme and a structured overlay network address space partitioning technique to build an effective content-based publish/subscribe (pub/sub) system over a distributed hash table (DHT) overlay. Fleet employs an explicit mechanism to deal with skewed popularity distributions in subscriptions and events, which spreads the load generated by hot attributes across a multitude of peers. The address space partitioning event delivery mechanism expedites event delivery. Fleet strikes an ideal balance between subscription storage cost and event delivery cost, and is more scalable in the number of events, subscriptions, schema attributes, and number of system nodes. Keywords: distributed hash table, P2P Networks, peer-to-peer protocols, structured overlay networks.
1 Introduction Content-based publish/subscribe [2,3,6,7,8,10,13,15,18,19] is becoming increasingly popular for information dissemination from event publishers to event subscribers. Subscribers register their interests in events through subscriptions by using a set of predicates or constraints over event attributes in a subscription language. An event instance published by a publisher specifies values of a set of attributes associated with the event using a similar set of predicates or constraints. Upon receiving an event, the pub/sub system is responsible for finding the subscriptions that match the event and delivers the event to the matched subscribers. In this manner, subscriptions act as filters for subscribers to select desired events out of all possible events published. The subscription language is made up from a content-based pub/sub schema, which is defined as S = { A1 , A2 ,..., An } , where each Ai corresponds to an attribute. Each
attribute has a name, type, and domain and is usually denoted by a tuple [name,type, min, max]. The type could be integer, float, string, etc. The min and max values define the range of values that can be taken by an attribute. An event e is of the form e = { A1 = c1 , A2 = c2 ,..., An = cn } , where Ai ∈ S . A subscription is a conjunction of predicates or constraints involving only equality operators. Each constraint in a A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 32–43, 2009. © Springer-Verlag Berlin Heidelberg 2009
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subscription has a name, type, operator, and constant value or a range and specifies the constant value or range allowed for an attribute. An example subscription is s = ( A1 = 100) ∧ (2 ≤ A3 ≤ 5) . An event e satisfies or matches a subscription s if each constraint in s is satisfied by the value of the corresponding attribute contained in e. One general strategy for pub/sub system design, called the rendezvous strategy, is to create mapping functions from events and subscriptions to peer nodes that guarantee that the matched events and subscriptions meet in at least one peer node[2]. Clearly, if a subscription is mapped to and stored at a certain node n in the network, and later on, an event satisfying the subscription is published, then the event must also be mapped to the same node n as well, so that the satisfaction of the event can be checked against the subscription and delivered to its subscriber. This requirement that destination nodes must overlap for subscriptions and matched event mappings is called the “strict mapping intersection rule.” Another variant of the general strategy is to make sure that the routes followed by published events and by subscriptions intersect in at least one node[3]. These type of mapping functions is said to satisfy the “extended mapping intersection rule.” Collectively, we call the peer nodes where subscriptions are stored and later potential events are delivered for matching the rendezvous nodes (RNs). The rendezvous strategy is general and encompasses a wide range of systems. In this paper we’ll focus on designs that employ “strict mapping intersection rule.” The subscription and event mapping functions may be broadly classified into several categories[15]. z z
z
Pure attribute name-based (PAN): The pure attribute-name-based mappings are based on attribute names appearing in the subscriptions and events. Pure attribute value-based (PAV): The pure attribute-value-based mappings are based on all possible values among selected attributes in the subscriptions, and usually require too much storage overhead because the number of subscription replications created is based on hashing all possible values. Mixed name and value based scheme: The mixed mappings combine the previous two schemes and are based on selected attribute name and values in the subscriptions and events.
Each mapping scheme has its own strengths and weaknesses. For example, when the number of attribute names is in the dozens[15,19], the pure attribute-name-based schemes would store the subscriptions only on a small number of peer nodes, which take sole responsibilities in the operation of a pub/sub system. This is contrary to the spirit of P2P systems. However, when the number of attributes is large, the pure attribute name-based scheme may be a reasonable choice. For systems based on pure attribute-value based mapping functions, the risk of subscription bloat is high and must be carefully avoided. A popular method to combat the subscription bloat problem is to “quantize”[21] the attribute values, so the number of subscriptions created is reduced. Hybrid name and value-based mappings are another possible method to reduce the number of subscription replications. There have been many attempts at designing distributed publish/subscribe systems over distributed hash tables (DHTs) as DHT systems possess many nice properties in scalability, fault-tolerance, and self-organization. In these systems, peers are assigned responsibilities to cooperate in storing subscriptions and routing events to subscribers
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in a distributed manner. For DHT-based systems, the mapping functions project subscriptions and events onto keys or addresses in the DHT address space which are then managed by rendezvous nodes. In this paper, we propose Fleet, an efficient and scalable system built on top of DHTs that is more scalable, and strikes an ideal balance in the tradeoff between storage and event delivery costs.
2 Related Work This paper focuses on designs following the general rendezvous node strategy over the Chord structured overlay network [2,15,19], which is a simple and elegant architecture over which the rendezvous node strategy can be implemented. Chord allows enough flexibility to enable many interesting variants of the mapping functions to be devised, with different performance implications. In the following we will present proposals specifically targeting implementation over Chord. We will briefly discuss three of the proposals. In [2], Baldoni et al proposed three types of mapping functions. The first type requires much storage overhead because the number of subscription replications created is based on hashing all possible values of all the constraints in a subscription. The second type is a variant of the first type. The third type is based on the observation that many subscriptions exhibit strong selectivity in one of the attributes, which allow only a small portion of all possible values. Mapping a subscription using the most selective attribute reduces subscription replications. Therefore, the third type maps a subscription by using its most selective constraint. In [15], the IIM scheme proposes to “quantize” [21] the attribute domain values, or partition the domain into a number of sub-ranges. Subscription with range attributes are then replicated once in each sub-range. The representative values selected for each sub-range might be the smallest or the middle values in each partitioned sub-range. Similar ideas for range query processing have also been proposed previously [12]. The same paper also proposes Hybrid, which is a mixed name and value-based scheme. Hybrid randomly selects a constraint. It replicates the subscription according to the attribute name if the selected constraint is of range value type, and according to the constraint is of equality type. In Ferry [19], a novel address space partitioning mechanism is proposed for subscription installation and delivery. The overlay address space is portioned into disjoint segments, with each one assigned to and managed by an overlay node, called rendezvous points (RP). Each segment’s RP node is the peer whose ID is the smallest among all peers in the segment. Each subscription is stored on exactly one RP node, without replication in Ferry, in the form of a pair (SID,s), where SID is the subscriber’s node ID and s is the subscription itself. In Ferry’s PredRP subscription installation scheme, which is the more efficient one among the two proposed, each subscription is stored at the RP node, among all RP nodes, which is the most immediate predecessor of the SID. That is, RP nodes are responsible for subscriptions falling into its responsible segments only. Afterwards, when an event is published, the event is first replicated and then sent to all the RP nodes for subscription matching against the subscriptions stored therein. The matching operation on each RP node
Fleet: An Effective System for Publish/Subscribe Service over P2P Networks
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produces a list of SIDs representing the subscriptions satisfied by the event. With a list of SIDs, each RP node delivers the event to the subscribers in its own segment, using the embedded packet forwarding tree in the underlying Chord DHT. The RP node itself is the root of the embedded tree, at level 0. The level 1 nodes are those peers in the finger table whose IDs fall into the segment managed by the root RP node, and so on. The event delivery then starts from the RP node which sends out the event and a SID list along its finger table links. A peer, upon receiving the message, checks to see if the SID list contains a subscriber ID matching its own ID. If it does, it delivers the event to its local applications/users. It also partitions the remaining list of SIDs, if any, according to its own neighbor nodes and sends each partitioned list of remaining SIDs to the corresponding neighbors to continue the delivery of the event.
3 Fleet System Design The design of Fleet is based on a number of rationales. First, Fleet embodies a novel architecture for pub/sub that decouples the logical roles for subscription storage and event delivery played by RN nodes in all previous systems. In Fleet, RN nodes are responsible for subscription storage and event matching only. RP nodes partition the structured overlay network address space, and are responsible solely for event delivery, given a list of SIDs. In this manner, faster event delivery is achieved, while system workload is spread out to more peers. Secondly, to handle the load balancing issue for popular attributes that exhibit skewed distributions, a data driven approach to solve the problem is adopted. The attribute-value partition tree mechanism, which was previously proposed and used in range query processing, is used in Fleet to spread the load for subscription storage and matching for popular attributes over multiple nodes. Thirdly, a novel mapping function for subscription installation is proposed which has two features. First, the notion of dominating attribute[2,4] is used extensively for subscription installation to reduce the subscription bloat problem. Those attributes involving equality operator or with the smallest value ranges are preferentially selected for subscription installation. Second, the mapping function is a mixed attribute name and value scheme. This design exploits the scalability property of the underlying P2P overlay, so that every node may take responsibility in the pub/sub process. In the following, we first introduce the notion of value partition tree and then present the components in Fleet in detail. 3.1 Skewed Subscription Name and Value Distributions Handling Based on Value Partition Tree
It is commonly observed that attributes in the subscriptions and events are much more popular than others, often following the Zipf’s distirbution. To handle the most popular attributes, the value partition tree [5] mechanism is used so that subscriptions would not be concentrated on a small number of nodes. The multi-attribute value partition tree scheme enables spreading of workload to multiple peers in a controlled manner effectively, depending on the desired degree of spreading.
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For example, Figure 1 depicts the value partition tree for the single attribute “retractions.” The attribute has [0~99] as its domain, which has been partitioned across 12 nodes. In Fleet, only a number of most popular attribute combinations have associated value partition trees created for them. This is because the few most popular combinations already account for a large portion of the total number of subscriptions. In addition, it is required that all nodes have knowledge of all the value partition trees constructed. Requiring all nodes to keep information regarding only a few value partition trees would be a reasonable assumption.
Fig. 1. An example value partition tree for a popular attribute
3.2 Algorithms for Subscription Installation, Event publishing, Event Matching and Delivery
The subscription installation algorithm is depicted in Figure 2. As mentioned, the design is based on the notion of dominating attributes. Therefore, subscriptions are divided into three categories according to constituent constraints. First, subscriptions containing equality-type constraints are replicated only once according to the constant value specified in the equality constraint. Second, subscriptions containing very popular attribute combinations that have associated value partition trees are treated in an attribute name-based manner. An example will be shown later. Thirdly, the rest of the subscriptions, which contain only less popular attributes, will be replicated according to am attribute that specifies the smallest range value among all rangevalued attributes in the subscription. In this manner, Fleet creates only relatively small number of replications, resulting in the reduction of total storage and event matching costs, as will be shown later. As an illustration for the operation involving the value partition tree, consider the subscription s= {25 ≤ retraction < 50} to be installed. After consulting the associated value partition tree for attribute “retraction,” it is found that the subscription should be installed on nodes with Kautz ID 021, 101, 102 and 120. Copies of the subscription are then sent to nodes responsible for hashed values of those IDs: h(021), h(101), h(102) and h(120).
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Algorithm Subscription_installation( s ) 1). If any constraint equality-type Ai = c
in
the
subscription
s
is
of
2). Store s in the successor broker of h( Ai , c) 3). Else if any combination of the attributes has an associated value partition tree 4). Store s according to its value partition tree 5). Else //all the constraints are of rang-query-type clow ≤ Ai ≤ chigh , 6).
Pick the attribute which is the dominating attribute in s 7). B = Index(Vlow ( Ai ), Ai ) 8). While B ≤ Index(Vhigh ( Ai ), Ai ) 9). Store s in the successor broker of h(B); 10). B = B + ⎡⎢ (Vmax ( Ai ) − Vmin ( Ai )) / | Interval ( Ai ) |⎤⎥ Fig. 2. Fleet subscription installation algorithm
Lines 6~10 handle the less popular range-valued attributes in the subscriptions. The approach adopted is to quantize the attribute values and store the subscriptions only at nodes responsible for those quantized attribute values, similar to the approaches used in [12,15]. The definition for the notions used is shown in Table 1. There are two aspects to a quantization scheme for each attribute A : the initial value and the quantization step size ∆ A . To spread the subscriptions to more nodes, it is important that the quantized starting values are randomized across attributes. In Table 1. The definition for the notions used
Vequal ( Ai )
The constant value c in an equality-type constraint Ai = c in a subscription
Vmin ( Ai ) / Vmax ( Ai )
The lower/upper bound value in an attribute’s domain of values
Vlow ( Ai ) / Vhigh ( Ai )
The lower/upper bound value in a rangevalued constraint c1 < Ai < c2
Index(v, Ai )
The quantized value obtained after quantization of v for attribute Ai
Interval ( Ai )
The set of all quantization values for attribute Ai
| Interval ( Ai ) |
The size of the set Interval ( Ai )
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Fleet, the quantized starting value for each attribute A is initialized by the introduction of some randomization as: Index(Vlow ( A), A) = Vlow ( A) − h( A)%∆ A , where
h() is the Chord hashing function. With respect to quantization step size design for these attributes, ideally, a suitable step size ∆ A should be chosen for each attribute A depending on the desired replication level for the particular attribute. However, as the attribute specific quantization step scheme is more complex, attribute specific quantization step design is left for future research. To publish an event, the algorithm executed at a node is shown in Figure 4. If the event involves attribute combinations that have associated value partition trees, the event must be delivered according to the associated value partition tree first, because the subscriptions stored there are not stored in any other nodes. Then for each constraint in the event, the event is delivered to the node responsible for the hashed value of the constant value specified in the constraint. Algorithm Publish_event(Event e) 1). For all combinations of the attribute names having associated value partition trees 2). Find the RN node responsible for the event according to the value partition trees 3). Deliver e to the designated RN node 4). For each attribute Ai in the event e, 5). Deliver e to the successor broker of h( Ai , c) Fig. 3. Fleet event publishing algorithm
The event matching algorithm executed at each RN node is shown in Figure 6, when a published event is received. Match_event() is a simple linear subscription matching algorithm, since it is not the main focus of this paper. A number of efficient sublinear algorithms have been proposed for event matching[1,11, 17]. Usually, these algorithms merge similar subscriptions into a tree or use hashing techniques to enable efficient subscription retrieval. How to incorporate those techniques into Fleet will be investigated in future work. Algorithm Match_event(Event e) 1). For all subscription in the node’s subscription store 2). Check to see if e satisfies each subscription 3). Collect those satisfied into a SID list 4). Partition the SID list according to the RP node IDs, and send each partitioned list to the appropriate RP Fig. 4. Algorithm Match_event()
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For the final event delivery from RP nodes to the subscribers, Fleet adopts the same strategy as Ferry. However, the choice of which peers may serve as RP nodes is considerably more unrestricted in Fleet.
4 Performance Evaluation Using a pub/sub system simulator, we compare the performance of Fleet, Ferry, IIM, and Hybrid. We use the realistic workload generator developed in the Siena project to avoid biasing any particular scheme. As a first evaluation of our approach, we have chosen to have the top 5 most popular attribute combinations to have associated value partition trees. The set of experiments performed include the following. (1) Total subscription storage cost and total computation (event matching) cost: The total storage cost is defined to be the total number of subscription replicas installed on the network nodes for a pub/sub system. The total computation cost is the total number of matching operations performed between events and subscriptions by RN nodes. (2) Distribution of subscription storage cost and event matching cost: The distribution of the subscriptions is illustrated by number of subscriptions on the top 100 nodes with the most number of subscriptions. The distribution of the matching cost is illustrated by number of matching operations performed by the top 100 nodes that perform the most number of such operations. (3) Average Event delivery cost: The average number of hops needed along the complete path for event delivery, from event publisher nodes to the subscribers.
The default parameters used in the experiments are as follows. The number of peer nodes is 1000, the number of subscriptions is 50,000, the number of events in the system is 100,000. The quantization step size for attributes is 10. The number of attributes is 1000, distributed according to the Zipf’s distribution. The domain size for integer and floating point attributes are both 0~5000. Note that a larger number of attributes are used in our experiments, to be more consistent with realistic workloads. 4.1 Total Subscription Storage Cost and Total Event Matching Cost
The total number of subscriptions installed in the system is shown in Figure 5. The horizontal axis is the prevalence of equality operators on subscriptions, which is varied from 100% to 0%, with 0% denoting the scenario where all constraints are of range value types. The vertical axis is the number of times the total number of subscriptions created by each system relative to the originally issued number of subscriptions. As Ferry and Hybrid do not replicate subscriptions, their values are 1 in the Figure. The simple quantization scheme proposed by IIM results in more significant subscription replication bloat, while Fleet shows a modest level of replication bloat. When the prevalence of the equality operator is 100%, none of the systems replicate subscriptions. The replication becomes progressively more when the subscriptions consist of more and more proportions of non-equality operators.
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14 12 10 Ferry
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Fig. 5. Total number of subscriptions installed by each scheme
Figure 6 depicts the total amount of computation by all systems. The vertical axis is the number of times the total number of event matching performed by each system relative to the originally issued number of events multiplied by the number of subscriptions. Ferry’s performance is exactly as expected, because every event is matched against every subscription exactly once. As subscriptions are more evenly spread and to more nodes in Fleet and Hybrid, they requires very little total computation cost.
Fig. 6. Total amount of computation in each scheme
4.2 Distribution of Subscription Storage Cost and Event Matching Cost
The cumulative percentage of subscription replications on nodes, which are ranked in decreasing number of subscription stored order, is shown in Figure 7. Clearly, in Ferry, subscription replications are concentrated among a few nodes. Hybrid can spread the subscriptions to more nodes relative to IIM, due to the large number of attribute names in our scenario. However, Fleet can spread the subscriptions not only to the most number of peers in the system, but also the load more evenly among the peers.
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1.2 1 0.8 0.6 0.4 Ferry_0 Hybrid_0
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Fig. 7. Cumulative percentage of subscription replication distribution among nodes
1.2 1 0.8 0.6 0.4 Ferry_0 Hybrid_0
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Fig. 8. Cumulative percentage of computation cost distribution among nodes
More significantly, Fleet can spread the computation cost more evenly as well. The cumulative percentage of event matching cost is shown in Figure 8. It can be seen that, in both Ferry and Hybrid, only a small number of nodes performs the majority of the total matching operations. Fleet again performs the best by spreading the computation cost more evenly among the nodes. 4.3 Event Delivery Cost
The event delivery cost performance results are shown in Figure 9. Even though Fleet requires events to travel from event publisher nodes to RN nodes, and then to their subscribers via RP nodes, the average number of hops required is still comparable to Ferry, and much less than those in Hybrid and IIM. This result clearly demonstrates the effectiveness of an architecture that separates event matching from event delivery.
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Fig. 9. Average number of hops for event delivery
5 Conclusions and Future Work In this paper, we have demonstrated the effectiveness of the Fleet design. Fleet strikes a nice balance between subscription replication and event matching computation workload, and excels in load balancing, and event delivery efficiency. For our future work, there are many areas that require further investigation. First, we plan to investigate the scalability property of Fleet, when the overlay network has many more nodes, attributes, and subscriptions. Second, we plan to investigate the impact of degree of subscription and event skew on system performance. Based on the result, we can clearly decide how many value partition trees should be constructed beforehand. Third, we plan to incorporate features from other event matching algorithms into our mapping functions to achieve even better effectiveness. Fourth, the Zipf parameter for the subscriptions must be estimated. A number of approaches have been proposed in the literature. For example, Beehive[16] employs a combination of local measurement and limited aggregation. In [22], first the total number of events is estimated by gossip based sampling protocol. Then the rate for individual events is estimated. Finally, the impact of different number of RP nodes and their positioning over the underlying structured network have on system performance must be investigated.
References 1. Aguilera, M.K., Strom, R.E., Sturman, D.C., Astley, M., Chandra, T.D.: Matching events in a content-based subscription system. In: Proceedings of the eighteenth annual ACM symposium on Principles of distributed computing (1999) 2. Baldoni, R., Marchetti, C., Virgillito, A., Vitenberg, R.: Content-Based Publish-Subscribe over Structured Overlay Networks. In: ICDCS (2005) 3. Castelli, S., Costa, P., Picco, G.P.: Large-Scale Content-Based Routing in a Multidimensional Space. In: INFOCOM 2008 (2008) 4. Cai, M., Frank, M., Chen, J., Szekely, P.: MAAN: A Mulit-Attribute Addressable Network for Grid Information Services. Journal of Grid Computing 2(1), 3–14 (2004)
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5. Li, D., Cao, J., Lu, X., Chen, K.: Efficient Range Query Processing in Peer-to-Peer Systems. IEEE Transactions on Knowledge and Data Engineering (accpted, 2009) 6. Carzaniga, A., Rosenblum, D.S., Wolf, A.L.: Design and Evaluation of a Wide-Area Event Notification Service. ACM Trans. on Computer Systems 19(3), 332–383 (2001) 7. Carzaniga, A., Rutherford, M.J., Wolf, A.L.: A Routing Scheme for Content-Based Networking. In: Proceedings of IEEE INFOCOM 2004, Hong Kong, China (March 2004) 8. Carzaniga, A., Wolf, A.L.: Forwarding in a Content-Based Network. In: Proceedings of ACM SIGCOMM, Karlsruhe, Germany, pp. 163–174 (August 2003) 9. Carzaniga, M.J.R., Wolf, A.L.: A Benchmark Suite for Distributed Publish/Subscribe Systems. Technical Report CU-CS-927-02, Department of Computer Science, University of Colorado (April 2002) 10. Chockler, G., Melamed, R., Tock, Y., Vitenberg, R.: Constructing scalable overlays for pub-sub with many topics. In: Proceedings of the twenty-sixth annual ACM symposium on Principles of distributed computing (2007) 11. Fabret, F., Jacobsen, A., Llirbat, F., Pereira, J., Ross, K., Shasha, D.: Filtering algorithms and implementation for very fast publish/subscribe systems. ACM SIGMOD Record 30(2) (June 2001) 12. Gao, J., Steenkiste, P.: An Adaptive Protocol for Efficient Support of Range Queries in DHT-based Systems. In: Proceedings of the 12th IEEE International Conference on Network Protocols (2004) 13. Gupta, A., Sahin, O.D., Agrawal, D., El Abbadi, A.: Meghdoot: Content-based publish/Subscribe over P2P networks. In: Jacobsen, H.-A. (ed.) Middleware 2004. LNCS, vol. 3231, pp. 254–273. Springer, Heidelberg (2004) 14. Li, D.S., Lu, X.C., Wu, J.: FissionE: A Scalable Constant Degree and Low Congestion DHT Scheme Based on Kautz Graphs. In: Proc. IEEE INFOCOM, pp. 1677–1688 (2005) 15. Lo, S.C., Chiu, Y.T.: Design of Content-Based Publish/Subscribe Systems over Structured Overlay Networks. IEICE Trans. on Information and Systems E91-D(5), 1504–1511 (2008) 16. Ramasubramanian, V., Sirer, E.G.: Beehive: O(1) Lookup Performance for Power-Law Query Distributions in Peer-to-Peer Overlays. In: Proceedings of Networked System Design and Implementation (NSDI), San Francisco, California (March 2004) 17. Wu, K.-L., Yu, P.S.: Efficient query monitoring using adaptive multiple key hashing. In: Proceedings of the eleventh international conference on Information and knowledge management, McLean, Virginia, USA, November 04-09 (2002) 18. Yang, X., Hu, Y.: A DHT-based Infrastructure for Content-based Publish/Subscribe Services. In: Seventh IEEE International Conference on Peer-to-Peer Computing (2007) 19. Zhu, Y., Hu, Y.: Ferry A P2P-Based Architecture for Content-Based Publish/Subscribe Services. IEEE Transactions on Parallel and Distributed System 18(5) (2007) 20. http://www.the-gdf.org 21. Sayood, K.: Introduction to Data Compression, 3/e. Academic Press, London (2005) 22. Rao, W., Chen, L., Fu, A.W.-C., Bu, Y.: Optimal proactive caching in peer-to-peer network: analysis and application. In: Proceedings of the sixteenth ACM conference on Conference on information and knowledge management, November 06-10 (2007)
Implementation of a Performance-Based Loop Scheduling on Heterogeneous Clusters* Chao-Tung Yang** and Lung-Hsing Cheng **
High-Performance Computing Laboratory Department of Computer Science, Tunghai University, Taichung, 40704, Taiwan ROC {ctyang,g96350033}@thu.edu.tw
Abstract. Cluster computing systems usually connect several commodity computers in local-area networks to form a single, unified resource for parallel computing. Loop scheduling and load balancing on parallel and distributed systems are critical problems that are difficult to cope with, especially on the emerging heterogeneous clusters. In this aspect, an important issue is how to assign tasks to nodes so that the nodes’ loads are well balanced. In this paper, we propose a performance-based approach that partitions loop iterations according to the performance weighting of cluster nodes. A heterogeneous cluster was built to verify the proposed approach, and two kinds of application program were implemented for execution on this testbed. Experimental results show that the proposed approach performs better than previous schemes.
1 Introduction Cluster computing systems usually connect several commodity computers in local-area networks to form a single, unified resource for parallel computing [2], [4], [14]. As more and more inexpensive personal computers (PC) become available, clusters of PCs are becoming alternatives to the supercomputers many research projects cannot afford. As computer architectures become more and more diverse and heterogenic, and computer expiration rates are higher than before, we can put old and unused computers to efficient use in our research. Therefore, it is natural because of the fast development of information technology that clusters consist of computers with various processors, memories and hard disk drives. However, it is difficult to deal with such heterogeneity in a cluster [5], [9], [11], [13], [16]-[18], [20], [22], [24], [25]. Loop scheduling and load balancing on parallel and distributed systems are critical problems that are difficult to cope with, especially on the emerging heterogeneous PC-based clusters [6], [7]. In this aspect, an important issue is how to assign tasks to nodes so that the nodes’ loads are well balanced. Conventional self-scheduling loop approaches [12] include static scheduling and dynamic scheduling. However, the former considers computing nodes homogeneous resources, and thus not suitable for heterogeneous environments, and the latter, especially self-scheduling, can still be improved [8], [22], [23], [24], [26]. *
This work is supported in part by National Science Council, Taiwan R.O.C., under grants no. NSC 96-2221-E-029-019-MY3 and NSC 97-2622-E-029-003-CC2. ** Corresponding author. A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 44–54, 2009. © Springer-Verlag Berlin Heidelberg 2009
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Previous researchers proposed some useful self-scheduling schemes applicable to PC-based clusters [8], [23], [26] and grid computing environments [22], [24]. These schemes consist of two phases. In the first phase, system configuration information is collected, and some portion of the workload is distributed among slave nodes according to their CPU clock speeds [22] or HINT measurements [8], [23], [24]. After that, the remaining work load is scheduled using some well-known self-scheduling scheme, such as GSS [12]. The performance of this approach depends on an appropriate choice of scheduling parameters since it estimates node performance using only CPU speed or HINT benchmark, which are factors affecting node performance. In [8], an enhanced scheme, that dynamically adjusts scheduling parameters according to system heterogeneity, is proposed. Intuitively, we may want to partition loop iterations according to CPU clock speed. However, the CPU clock is not the only factor which affects node performance. Many other factors also have dramatic influences, such as the amount of memory available, the cost of memory accesses, and the communication medium between nodes. Using the intuitive approach will result in degraded performance if the performance estimation is not accurate. In this paper, we propose a general approach that utilizes performance functions to estimate performance weights for each node. To verify the proposed approach, a heterogeneous cluster was built, and three types of application program, matrix multiplication, and Mandelbrot set computation [1], were implemented for execution on this testbed. Empirical results show that for heterogeneous cluster environments, the proposed approach obtained improved performance compared to previous schemes. The rest of this paper is organized as follows. In Section 2, we introduce several typical and well-known self-scheduling schemes, and a famous benchmark used to analyze computer system performance. In Section 3, we define our model and describe our approach. Next, our system configuration is specified and experimental results on two types of application program are presented in Section 4. Concluding remarks and future work are given in Section 5.
2 Background In general, dynamic scheduling is more suitable for load balancing. However, the runtime overhead must be taken into consideration. The schemes we focus on in this paper are self-scheduling, members of a large class of adaptive and dynamic centralized loop scheduling schemes. In a common self-scheduling scheme, p denotes the number of processors, N denotes total iterations and f() is a function for producing the chunk-size at each step. The design of function f depends on the scheduling strategy of the scheme, and its output is the chunk-size for the next iteration. For example, in GSS [11], f is defined as the number of iterations remaining in a parallel loop divided by the number of available processors. At the i-th scheduling step, the master computes the chunk-size Ci and the remaining number of tasks Ri, (1)
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where f() may have more parameters than just i and p, such as Ri-1. The master assigns Ci tasks to an idle slave and the load imbalance will depend on the execution time gap between the nodes [9], [11]. Different ways of computing Ci have given rise to various scheduling schemes. The most notable examples are Pure Self-Scheduling (PSS), Chunk Self-Scheduling (CSS), Factoring Self-Scheduling (FSS), Guided SelfScheduling (GSS), and Trapezoid Self-Scheduling (TSS) [10], [12], [21]. Table 1 shows the various chunk sizes for a problem with iterations numbering N=1024 and processors numbering p=4. Table 1. Partition size examples Scheme PSS CSS(128) GSS [9] FSS [11] TSS [15]
Partition size 1, 1, 1, 1, 1, 1, 1, 1, 1, …, 1 128, 128, 128, 128, 128, 128, 128, 128 256, 192, 144, 108, 81, 61, 46, 34, 26, … 128, 128, 128, 128, 64, 64, 64, 64, 32, … 128, 120, 112, 104, 96, 88, 80, 72, 64, …
In [22], the authors revise known loop self-scheduling schemes to fit all heterogeneous PC clusters environment when loops are regular. An approach is proposed for partitioning loop iterations in two phases and it achieves good performance in any heterogeneous environment: partition α% of the workload according to CPU clock performance weighting in the first phase and the remainder (100-α)% of the workload according to known self-scheduling in the second phase. The experimental results are from a cluster environment with six nodes in which the fastest computer was 6 times faster than the slowest ones in CPU-clock cycles. Various α values were applied to matrix multiplication with the best performance obtained at α=75. The HPC Challenge (HPCC) is a useful computer benchmarking tool [3]. It first examines the performance of HPC architectures using kernels with more challenging memory access patterns than High Performance Linpack (HPL). It also augments the TOP500 list. It provides benchmarks that bound the performance of many real applications as a function of memory access characteristics – e.g. spatial and temporal locality. Unlike conventional benchmarks, the HPCC benchmark consists of 7 basic tests, including HPL, DGEMM, STREAM, PTRANS, Random Access, FFT, and Communication bandwidth and latency. In our work, we use the HPL measurement as a performance value and include it in our algorithm.
3 Proposed Approach In this context, we propose to partition α% of the workload according to CPU clock speed performance weighting and HPCC [3] measurement of all nodes, and dispatch the remaining workload via some well-known self-scheduling scheme, such as GSS [12].To use this approach, we need to know the real computer performance on the HPCC benchmark. We can then distribute appropriate workloads to each node and achieve load balancing. The more accurate the estimation is, the better the load balance will be.
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To estimate node performance, we define a performance weighting (PW) for node j as (2) where Vi , 1 < i < M, is a variable of the performance weighting. In this paper, our PW for node j is defined as (3) where S is the set of all cluster nodes, CSi is the CPU clock speed of node i, and is a constant attribute. HPLi is the HPL measurement of HPCC, this value is analyzed above; β is the ratio between the two values. With this approach, the computing node with better performance gets more data to process. Note that parameter α should not be too large or too small. If it is too large, the dominant computer will not finish its work, and if it is too small, the dynamic scheduling overhead will be significant. In any case, good performance cannot be attained without an appropriate α value. We propose an algorithm for performance-based loop scheduling in heterogeneous cluster environments based on workload distribution and node performance information. This algorithm employs a message-passing paradigm, and consists of two modules: a master module and a slave module. The master module makes scheduling decisions and dispatches workloads to slaves, which then process the assigned work. This algorithm is just a skeleton, and detailed implementations, such as data preparation, parameter passing, etc., might differ according to the requirements of the various applications. Our algorithm consists of several steps. First, relevant information is acquired. Then, the Performance Weighting is calculated. Next, α percent of the total workload is statically scheduled according to the performance ratio among all slave nodes. Finally, the remainder of the workload is dynamically scheduled by some well-known self-scheduling scheme for load balancing.
4 Experiments and Results We implemented three classes of application in C language, with message passing interface (MPI) directives to parallelize code segments for execution on our testbed: Matrix Multiplication and Mandelbrot Set Computation. The former has regular workloads, the latter irregular workloads. We built a heterogeneous cluster consisting of eleven nodes. The hardware and software configurations are specified in Table 2 and Table 3, respectively. Figures 1 and 2, show the network route state and topology of heterogeneous cluster, respectively. In our experiments, we first collected HPL measurements for all nodes, and then investigated the impact of parameters α, β, on performance. Parameters α and β are set by the programmer and choosing appropriate values adaptable to dynamic environments is difficult. In this work, the master node also participated in computation.
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Hostname
Processor Model
amd64-dual21 amd64-dual11 amd64-dual31 Xeon2 Quad1 omega Circa amd-mpdual1 condor1 condor2 s1
Dual-Core AMD Opteron(tm) Processor 2212 AMD Opteron(tm) Processor 246 AMD Opteron(tm) Processor 246 Intel(R) Xeon(TM) Intel(R) Core(TM)2 Quad Q6600 Intel(R) Xeon(TM) AMD Athlon(tm) MP 2000+ AMD Athlon(tm) MP 2000+ Intel(R) Pentium(R) 4 Intel(R) Pentium(R) 4 Intel(R) Xeon(R) CPU E5310
# of CPU
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2.6.21-1.3194.fc7
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1G 1G 1G 1G 1G 100M 100M 100M 100M 1G
2.6.21-1.3194.fc7 2.6.18-1.2798.fc6 2.6.15-1.2054_FC5 2.6.23.1-42.fc8 2.6.15-1.2054_FC5 2.6.21-1.3194.fc7 2.6.18-1.2798.fc6 2.6.18-1.2798.fc6 2.6.18-1.2798.fc6 2.6.24.4-64.fc8
Table 3. CPU clock speeds and OS, compiler, and LAM/MPI versions Hostname
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HPCC
amd64-dual21 amd64-dual11 amd64-dual31 xeon2 quad1 Omega Circa amd-mpdual1 condor1 condor2 s1
2000.080 MHz 1992.128 MHz 1991.652 MHz 3056.757 MHz 2699.986 MHz 3000.240 MHz 1666.794 MHz 1666.787 MHz 2806.465 MHz 2806.471 MHz 1596.476 MHz
4000.31 3983.54 3983.45 6112.98 5399.77 6000.62 3333.05 3333.77 5613.16 5613.14 3192.85
11.68 Gflops (N=15k) 6.376 Gflops (N=15k) 6.100 Gflops (N=15k) 5.312 Gflops (N=13k) 24.61 Gflops (N=15k) 5.372 Gflops (N=7k) 3.732 Gflops (N=10k) 3.837 Gflops (N=13k) 3.302 Gflops (N=7k) 3.317 Gflops (N=7k) 14.39 Gflops (N=20k)
LAM/MPI Version lam-7.1.2-10.fc7 lam-7.1.2-10.fc7 lam-7.1.2-8.fc6 lam-7.1.2-1.fc5 lam-7.1.2-10.fc7 lam-7.1.2-1.fc5 lam-7.1.2-10.fc7 lam-7.1.2-8.fc6 lam-7.1.2-8.fc6 lam-7.1.2-8.fc6 lam-7.1.2-10.fc7
2. amd64-dual11 10. condor2 1. amd64-dual21 3. amd64-dual31 9. condor 1
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Fig. 1. Network route state
GNU C Compiler gcc-4.1.2-27.fc7 gcc-4.1.2-27.fc7 gcc-4.1.1-30 gcc-4.1.0-3 gcc-4.1.2-33 gcc-4.1.1-51.fc5 gcc-4.1.2-12 gcc-4.1.1-30 gcc-4.1.1-30 gcc-4.1.2-13.fc6 gcc-4.1.2-33
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Fig. 2. Network topology
We implemented the proposed scheme for Matrix Multiplication. The Master module is responsible for distributing workloads. When a slave node becomes idle, the master node sends two integers to it representing the beginning and end pointers to an assigned chunk. In other words, every node has a local copy of the input matrices, so data communication is not significant in this kind of implementation. This means the communication cost between the master and the slave is low, and the dominant cost is the matrix multiplication computation. Figures 3 and 4 show how parameters influence performance results. In the experiment, we found that the proposed schemes got better performance when α was 30 and β had various optimum values based on scheduling. After selecting α and β values we carried out a set of experiments with them, and compared the results with previous scheduling. Each experiment was run ten times and the average fetched in order to achieve better accuracy. We first investigated execution times on the heterogeneous cluster for the GSS group, then for the FSS group, and finally for the TSS group. In our experiments, the execution times for static partitioning (matstat) were orders of magnitude worse than any of the dynamic approaches and made the results of the dynamic systems very difficult to distinguish visually from one another, so we state them as follows: matrix size 1024×1024 cost 57.83 seconds, matrix size 2048×2048 cost 251.7 seconds, and matrix size 4096×4096 cost 1853.27 seconds. Figures 6-8 show execution times for the conventional scheme (mat*ss), dynamic hybrid (matn*ss0-2), and the proposed scheme (matn*ss3-4), on the FSS, GSS, and TSS group approaches with input matrix sizes 1024×1024, 2048×2048 and 4096×4096. Experimental results show that the
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proposed scheduling scheme got better performance than the static and previous schemes. Note that on the 4096×4096 matrix, our approach achieved speedups of 1.17, 1.27 and 1.07 over GSS, FSS and TSS in non-master participation, and speedups of 1.17, 1.22 and 1.05 in master participation. A Mandelbrot set is a problem involving the same computation on different data points with different convergence rates [1], [9]. Named after Benoit Mandelbrot, the Mandelbrot set is a fractal, a class of objects that display self-similarity at various scales. Magnifying a fractal reveals small-scale details similar to its large-scale characteristics. Although the Mandelbrot set is self-similar at magnified scales, its small-scale details are not identical to the whole. In fact, the Mandelbrot set is infinitely complex. Yet the process of generating it is based on an extremely simple equation involving complex numbers. This operation derives a resultant image by processing an input matrix, A, where A is an image of m pixels by n pixels. The resultant image is one of m pixels by n pixels. The proposed scheme was implemented for Mandelbrot set computation. The master module is responsible for workload distribution. When a slave node becomes idle, the master node sends two integers to it representing the beginning and end
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pointers to an assigned chunk. As in the matrix multiplication implementation, this keeps communication costs between the master and the slave low, and the dominant cost is the Mandelbrot set computation. In this application, the workloads for outer loop iterations are irregular because the number of executions required for convergence is not fixed. Therefore, the workload distribution performance depends on the degree of variation between iterations. Figures 8 and 9 show how parameters influence performance results. In this experiment, we found that the proposed schemes got better performance when α was 40 and β was about 0.7. After selecting α and β values, we carried out a set of experiments with them and compared the results with previous scheduling. Each experiment was averaged over ten time runs in order to achieve better accuracy. We first investigated GSS group execution times on the heterogeneous cluster, then FSS group execution times, and finally TSS group execution times. In this experiment, static partitioning (manstat) execution times were: image size 512×512 cost 194.04 seconds, image size 1024×1024 cost 688.1 seconds, and image size 2048×2048 cost 3125.3 seconds. Figures 10-12 show execution times for the static (manstat), conventional (man*ss), and dynamic hybrid (mann*ss0-2) schemes, and for the proposed scheme (mann*ss3-4), on the FSS, GSS, and TSS group approaches with input image sizes of 512×512, 1024×1024, and 2048×2048. Experimental results show the proposed scheduling scheme got better performance than the static and previous schemes. Master node participation in computation didn’t raise the performance in our experiments. Note that on image size 2048×2048, our approach achieved speedups of 1.17, 1.27 and 1.07 over GSS, FSS and TSS in non-master participation and of 1.17, 1.22 and 1.05 in master participation. The largest size used in these experiments was 2048×2048, which is not very big, but wastes a great deal of time when run with a node. It is hard to experiment with bigger sizes due to memory capacity and cache considerations but we may find that the bigger the size the greater the efficiency. Note that in a heterogeneous environment, manngss2 performed worse than any other schemes merely because the adaptive α value is not suitable to this environment.
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5 Conclusion In this paper, we proposed a heuristic scheme that combines the advantages of static and dynamic loop scheduling schemes, and compared it with previous algorithms in experiments on two types of application program in heterogeneous cluster environments. Our approach is also less sensitive to α values than previous schemes, i.e., more robust. In each case, our approach obtained performance improvement over previous schemes.
References [1] [2] [3] [4]
Introduction To The Mandelbrot Set, http://www.ddewey.net/mandelbrot/ The Scalable Computing Laboratory (SCL), http://www.scl.ameslab.gov/ HPC Challenge Benchmark, http://icl.cs.utk.edu/hpcc/ Baker, M., Buyya, R.: Cluster Computing: The Commodity Supercomputer. International Journal of Software Practice and Experience 29(6), 551–575 (1999) (2002) [5] Beaumont, O., Casanova, H., Legrand, A., Robert, Y., Yang, Y.: Scheduling divisible loads on star and tree networks: results and open problems. IEEE Transactions on Parallel and Distributed Systems 16, 207–218 (2005)
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[6] Bennett, B.H., Davis, E., Kunau, T., Wren, W.: Beowulf Parallel Processing for Dynamic Load-balancing. In: Proceedings on IEEE Aerospace Conference, vol. 4, pp. 389–395 (2000) [7] Bohn, C.A., Lamont, G.B.: Load balancing for heterogeneous clusters of PCs. Future Generation Computer Systems 18, 389–400 (2002) [8] Cheng, K.-W., Yang, C.-T., Lai, C.-L., Chang, S.-C.: A Parallel Loop Self-Scheduling on Grid Computing Environments. In: Proceedings of the 2004 IEEE International Symposium on Parallel Architectures, Algorithms and Networks, KH, China, May 2004, pp. 409–414 (2004) [9] Chronopoulos, A.T., Andonie, R., Benche, M., Grosu, D.: A Class of Loop SelfScheduling for Heterogeneous Clusters. In: Proceedings of the 2001 IEEE International Conference on Cluster Computing, pp. 282–291 (2001) [10] Hummel, S.F., Schonberg, E., Flynn, L.E.: Factoring: a method scheme for scheduling parallel loops. Communications of the ACM 35, 90–101 (1992) [11] Li, H., Tandri, S., Stumm, M., Sevcik, K.C.: Locality and Loop Scheduling on NUMA Multiprocessors. In: Proceedings of the 1993 International Conference on Parallel Processing, vol. II, pp. 140–147 (1993) [12] Polychronopoulos, C.D., Kuck, D.: Guided Self-Scheduling: a Practical Scheduling Scheme for Parallel Supercomputers. IEEE Trans. on Computers 36(12), 1425–1439 (1987) [13] Post, E., Goosen, H.A.: Evaluation the parallel performance of a heterogeneous system. In: Proceedings of 5th International Conference and Exhibition on High-Performance Computing in the Asia-Pacific Region (HPC Asia 2001) (2001) [14] Sterling, T., Bell, G., Kowalik, J.S.: Beowulf Cluster Computing with Linux. MIT Press, Cambridge (2002) [15] Shih, W.-C., Yang, C.-T., Tseng, S.-S.: A Performance-based Parallel Loop Scheduling on Grid Environments. The Journal of Supercomputing 41(3), 247–267 (2007) [16] Shih, W.-C., Yang, C.-T., Tseng, S.-S.: A Performance-Based Parallel Loop SelfScheduling on Grid Environments. In: Jin, H., Reed, D., Jiang, W. (eds.) NPC 2005. LNCS, vol. 3779, pp. 48–55. Springer, Heidelberg (2005) [17] Shih, W.-C., Yang, C.-T., Tseng, S.-S.: A Hybrid Parallel Loop Scheduling Scheme on Grid Environments. In: Zhuge, H., Fox, G.C. (eds.) GCC 2005. LNCS, vol. 3795, pp. 370–381. Springer, Heidelberg (2005) [18] Shih, W.-C., Yang, C.-T., Tseng, S.-S.: A Performance-Based Approach to Dynamic Workload Distribution for Master-Slave Applications on Grid Environments. In: Chung, Y.-C., Moreira, J.E. (eds.) GPC 2006. LNCS, vol. 3947, pp. 73–82. Springer, Heidelberg (2006) [19] Shih, W.-C., Yang, C.-T., Tseng, S.-S.: A Hybrid Parallel Loop Scheduling Scheme on Heterogeneous PC Clusters. In: Proceedings of the 6th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2005), December 5-8, 2005, pp. 56–58 (2005) [20] Tang, P., Yew, P.C.: Processor self-scheduling for multiple-nested parallel loops. In: Proceedings of the 1986 International Conference on Parallel Processing, pp. 528–535 (1986) [21] Tzen, T.H., Ni, L.M.: Trapezoid self-scheduling: a practical scheduling scheme for parallel compilers. IEEE Transactions on Parallel and Distributed Systems 4, 87–98 (1993) [22] Yang, C.-T., Chang, S.-C.: A Parallel Loop Self-Scheduling on Extremely Heterogeneous PC Clusters. Journal of Information Science and Engineering 20(2), 263–273 (2004)
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[23] Yang, C.-T., Cheng, K.-W., Shih, W.-C.: On Development of an Efficient Parallel Loop Self-Scheduling for Grid Computing Environments. Parallel Computing 33(7-8), 467– 487 (2007) [24] Yang, C.-T., Cheng, K.-W., Li, K.-C.: An Enhanced Parallel Loop Self-Scheduling Scheme for Cluster Environments. The Journal of Supercomputing 34(3), 315–335 (2005) [25] Yang, C.-T., Cheng, K.-W., Li, K.-C.: An Efficient Parallel Loop Self-Scheduling on Grid Environments. In: Jin, H., Gao, G.R., Xu, Z., Chen, H. (eds.) NPC 2004. LNCS, vol. 3222, pp. 92–100. Springer, Heidelberg (2004) [26] Yang, C.-T., Shih, W.-C., Tseng, S.-S.: Dynamic Partitioning of Loop Iterations on Heterogeneous PC Clusters. The Journal of Supercomputing 44(1), 1–23 (2007)
The Hierarchical Path-Selection Scheme Based on Multihoming NEMO Long-Sheng Li1, Gwo-Chuan Lee2, Jhu-Shyuan Mei1, and Cing-Long Chen1 1
Dept. of Computer Science and Information Engineering, National Chiayi University, Taiwan (R.O.C) 2 Dept. of Computer Science and Information Engineering, National United University, Taiwan (R.O.C)
[email protected],
[email protected],
[email protected]
Abstract. The Network Mobility (NEMO) protocol allows a mobile network (MONET) to move around and maintains session connectivity of nodes in the MONET. In real world, the topology of the MONET may be very complex. To increase session reliability of the MONET, the concept of multihoming in NEMO is proposed. In the multihoming environment, the MONET has more than one path to connect to the Internet and these paths can be maintained simultaneously. But the loop routing problem may occur in such an environment. In this paper, we proposed a Hierarchical Path-Selection Scheme to prevent the loop routing problem. We add the nested level and ClusterHead ID information to Router Advertisement (RA) messages. The MONET doesn’t form the loop routing and achieves fault-tolerant and load-balanced goal by the proposed scheme. Keywords: Multihoming, Network Mobility, Loop prevention, Load balance.
1 Introduction NEMO (Network Mobility) is an extension protocol of Mobile IPv6 (MIPv6) [2]. It enables Mobile Networks to attach to different points in the Internet and allows the session continuity for every node in the Mobile Networks while moving around. With the development of NEMO, many interesting applications may come true, such as using a mobile device to connect to the Internet on the bus, train or Metropolitan Rapid Transit (MRT) system. 1.1 The Basic NEMO Architecture The Internet Engineering Task Force (IETF) NEMO working group has standardized the NEMO Basic Support Protocol in RFC 3963 [1]. There is at least one mobile router (MR) in a Mobile Network. The MR dynamically changes its point of attachment to the infrastructure while moving around. It also maintains a bi-directional tunnel to its Home Agent (HA). MR is responsible for all external communications of all nodes in a Mobile Network. The Mobile Router is also the default gateway for the A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 55–66, 2009. © Springer-Verlag Berlin Heidelberg 2009
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Mobile Network. All traffic between the nodes in the Mobile Network and Correspondent Nodes (CNs) is delivered via the bi-directional tunnel. When the MR moves away from the home link and attaches to a new access router (AR), it acquires a Careof Address (CoA) from the visited link. As soon as the MR determines a CoA, it immediately sends a Binding Update message to its Home Agent. When the Home Agent receives this Binding Update, it creates a cache entry binding the MR’s Home Address (HoA) to the CoA at the current point of attachment. 1.2 Multihoming in Mobile Network The MR of a mobile network requires a reliable access to the internet. The general solution is that the MONET has several MRs (or the MR has several interfaces) to connect to the internet. In such a situation, the MONET has more than one path to route to the Internet and these paths can be maintained simultaneously. The MONET with such an ability is called the multihoming [3][4][6]. In the multihomed environment, the MONET should maintain multiple bi-directional tunnels between MR(s) and HA(s). Achieving the Multihoming has many advantages for the Mobile Network, such as fault-tolerant and load-balancing. In some cases, it may be necessary to divert packets from a bi-directional tunnel to an alternative bi-directional tunnel when the connecting bi-directional tunnels fail, or to balance traffic load among multiple tunnels [4][5]. 1.3 Motivation In the real world, the topology of MONET may form the nested NEMO [1][3][6]. In the nested NEMO, A MONET could be connected to another MONET. The whole structure likes a tree topology. When the nested NEMO extended to the multihoming environment, it may cause some problems. A nested MONET may be attached more than two different MRs simultaneously, thus the aggregated network no longer forms a tree topology. In such a topology, an infinite loop within the MONET occurs. Additionally, to achieve a load balancing goal of MONET, the visited MR (or MN) should has an ability to choose the most suitable MR (with the lowest traffic load) as the primary path based on receiving RA messages. So a path-selection scheme is required for the visited MR (or MN) to select the most suitable path among multiple MRs [5]. Also, we want to achieve the fault-tolerant goal in the multihoming NEMO. A scheme which provides fault-tolerance is necessary too. In this paper, we propose a Hierarchical Path-selection Scheme. The proposed scheme provides fault-tolerance, load balancing and routing loop prevention for the Nested NEMO with multihoming. We add some useful information to the RA message. According to the information, the visited MR (or MN) knows the status of all parent MRs (or ARs) which the visited MR (or MN) connects to.
2 Related Works 2.1 Nested NEMO A mobile network is said to be nested when a mobile network (sub- MONET) is attached to another mobile network (root-MONET) [1][3][6]. The aggregated hierarchy of mobile networks becomes a nested mobile network.
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2.2 Analysis of the Multihoming in NEMO In the NEMO terminology, a MONET is considered as multihoming when MONET is communicated to the Internet via multiple paths. There are several configurations to construct the multihoming mobile networks [7]. These configurations are classified by three parameters, named x, y, z. x means the number of MRs in a MONET. y means the number of HAs which serving the MONET. z means the number of MNPs of MONET. For example, case (n, 1, 1) means “n MRs, single HA, single MNP”. [7] also shows issues in the multihoming NEMO, such as Fault Tolerance, Multiple Bindings/Registrations, Loop Prevention in Nested Mobile Networks, and Prefix Ownership…etc. “Loop Prevention in Nested Mobile Networks” is the issue on all of configurations [7]. So it is an important issue in multihoming NEMO. 2.3 Hierarchy Information in Router Advertisement for Nested NEMO The Nested MONET has Router Advertisement (RA) confliction problem [10]. Hierarchical Mobile Router Advertisement (HMRA) is proposed to solve this problem. The visited MR can know the hierarchy information of MR who sends the RA message. [13] introduced an issue that if the visited node insides a hierarchical topology. [13] proposed to add a new option: Level in RA messages. This option allows every MN to know the level of parent-MR in nested MONET. The topology of the nested NEMO will form a directed tree graph by the Tree Discovery (TD) scheme [15]. The loops don’t occur in such a tree topology. In TD, every MR advertises Tree Information Option (TIO) in the RA message. MRs form a tree topology based on various metrics (the tree depth and preference). MR must ignore RAs that are received from other routers located deeper within the same tree. 2.4 Load Balance Topology in NEMO Balanced Topology Constructions in the NEMO proposed a dynamic load balancing scheme [11]. [11] proposed to add some information to the BU and RA messages. According to this information, MRs/MNs can connect to the AR/MR with less traffic load. [9] proposed a Multiple Mobile Router Management (MMRM) mechanism for multihoming MONET. MMRM allows nodes in MONET to be connected to the Internet via multiple MRs. In the proposed mechanism, MR can dynamically join and leave the MONET. MRs cooperate with each other in order to share the traffic load. 2.5 Multihoming [8] proposed two schemes to for the multihoming MONET. The case which discussed in [8] is that the MR has two interfaces and each interface has a CoA from AR, Two interfaces belong to two different HAs. By proposed two schemes in [8], all connectivities of MONET can be continued even though one of interfaces fails. [12] described a Token based Duplicate Network Detection mechanism. This mechanism allows multiple Home Agents to detect whether the MONET is split and it solves one of the Multihoming issues called the Prefix Ownership problem.
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2.6 Routing Loop in Nested Mobile Networks When egress and ingress interfaces of a MR are all wireless, a mobile router can listen to the RA message from its child mobile router. It causes a RA confliction problem [7][15]. In the general case, arbitrary attachment of Mobile Routers could form a routing loop. For example, in Fig 1, assume a nested NEMO where MR1 is connected to the infrastructure, and MR3 is attached to MR2. The MR2 can hear both RAs of MR3 and MR1 on its egress interface. If MR2 selects MR3, MR2 and MR3 form a loop routing. Thus MR2, MR3 are disconnected from their Home Agents. To avoid such a loop case in the nested NEMO, the ideas of the proposed schemes in [13], HMRA [10], and Tree Discovery [15] can be used.
Fig. 1. A Route Loop Problem
Fig. 2. A Problem of Tree Discovery
2.7 Summary To avoid the loop routing, the easy way is to organize the wireless network topology as a hierarchical topology. It is because the hierarchy topology is a tree-based topology. It cannot find a loop path in the tree-based topology. [15] proposed the hierarchical network structure to avoid the loop routing. If a visited MR attachs to multiple trees, it binds multiple Tree IDs. The Tree ID field is defined as a 128-bit unsigned integer [15]. It’s clearly that the field length is not enough and not flexible to record all Tree IDs. In this case, the visited MR doesn’t know which Tree ID should be set in the RA message. If we suppose that MR sends the RA message with only one of Tree IDs randomly, the loop may occur as in Fig 2. So TD is not suitable for the multihoming NEMO.
3 Hierarchical Path-Selection Scheme To achieve Loop Prevention and construct load balance topology in Nested Mobile Networks, we propose a Hierarchical Path-Selection Scheme for the nested NEMO multihoming. In NEMO multihoming, the MONET has several route paths to the Internet. The MONET has several MRs or has one MR with multiple interfaces. In our proposed scheme, we focus on the case that the MONET has one MR with multiple interfaces. We add some extension information to RA messages. According to this information, the visited MR (or MN) knows the nested level and traffic status of all Routers which the visited MR (or MN) connects to.
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3.1 Multihoming The MR can bind multiple active CoAs. However, the NEMO basic protocol doesn’t support binding multiple CoAs to one HoA. The easiest way for a MR to bind multiple CoAs to a HoA is the extended scheme, MCoA[14], of the Mobile IPv6. If the mobile node (or mobile router) wants to register multiple bindings, it generates a BID for each CoA. The BID is required to be stored in the binding cache and binding update list structure. The Binding Identifier mobility option is used to carry the BID information. The option format is shown in Fig 3.
Fig. 3. BID Mobility Option [19]
Fig. 4. Multiple Care-of Address Registration [14]
Fig 4 illustrates the configuration where the mobile node obtains multiple care-of addresses at foreign links. NEMO is an extension of the Mobile IPv6. MCoA can also be use in the NEMO environment. In our proposed scheme, all MRs can use the MCoA protocol. Thus the MR achieves multihoming. 3.2 Modification for RA messages In the NEMO basic support protocol, the visited MN (or MR) decides a CoA by listening the RA message. To support our proposed schemes, we make some extension information to the RA message. We add a new option to the RA message, which contains the Nested level, ClusterheadID (CID) list. The option format is shown in Fig 5.
Fig. 5. The New option in the Router Advertisement message
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This option is included in the RA message. The Option Type = 11 means this option is the information for our proposed Hierarchical Path-Selection Scheme. The Length is the length of the option in bytes. The M flag is the type of the router. M=1 means the router is a mobile router. M=0 means the router is an access router at the fixed network domain. The T flag is 1 means the router is a top level mobile router. T=0 means the router is not a top level mobile router. The ClusetheadID (CID) list contains all CID information. All MRs in the MONET maintain this list. CID is the identification of a tree topology. CID is the top level mobile router’s HoA. For example, if a MR connected two trees, its RA message will contain two CIDs in the CID List field. The path ID means the identifier of the parent MR. It’s an 8 bit unsigned value. The Nested Level means the level in the tree topology. 3.3 The Steps of Propose Scheme Operation We add a new option in RA messages, and therefore the visited MR can know the tree information which its parent-MR(s) owns. In our proposed scheme, the trees and hierarchy information can be recorded in RA messages. When MR is in the overlapping place between multiple routers, it can receive multiple RA messages. Thus MR can start up the Hierarchical Path-Selection Scheme to select suitable access router(s). 3.3.1 Initialization In our proposed scheme, the received RA messages contain the new option which is described in the previous section. According to the extension of the RA message, the MR can know parent-MR(s)’s CID list. The actions of MR are described in the follow. 1.
If two (or more) RAs have non-duplicated CID in the CID list, MR can attach to these routers simultaneously. Thus MR can send packets through multiple paths. An example is shown in Fig 6.
Fig. 6. Every Nested level value of visited MR increase one
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Fig. 7. The MR attach to parent MRs simultaneously
The MR records all CID list from parent MR(s). And all Nested level values in CID list are increased. An example is shown in Fig 7. When the MR receiving multiple RA messages. If two (or more) RAs include duplicated CIDs in the CID list, the MR only attaches to one router with the lowest ‘Average’ Nested Level. The ‘Average’ Nested Level is average value of all Nested Level value in the CID list. An example is shown in Fig 8.
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Fig. 8. The MR attaches to one router with the lowest Nested Level
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Fig. 9. The visited MR chooses one of routers with more CIDs
In the case that there are (more than) two RAs which have the same Average Nested Level value and have duplicated CIDs in CID list. The MR chooses one of routers which have more CIDs. An example is shown in Fig 9.
3.3.2 The Handoff Procedure The topology of the MONET may change frequently. In the NEMO basic support protocol, the handoff occurs when the MR detects the movement [1]. The following describes the operations for MR when the handoff occurs. 1. 2.
In the case that the RA messages have non-repeated CIDs, MR can attach to these routers simultaneously. An example is shown in Fig 10. Otherwise, the receiving RA messages have repeated CID(s) with MR’s CID(s), The MR can only use the alternative path in using or the new detected path. The MR only attaches to the router with the lowest ‘Average’ Nested Level. The ‘Average’ Nested Level is average value of all Nested Level value in the CID list. It provides MR to avoid to the top level mobile router and choose the minimum hops routing path. An example is shown in Fig 11.
This scheme guarantees to prevent to construct the duplicated routing paths. The topology of the MONET prevents routing loops.
Fig. 10. The visited MR attach to multiple MRs during handoff procedure
Fig. 11. The MR makes the new link and removes the old link
3.4 Extended Topology Tuning Scheme 3.4.1 The Issue of the Proposed Scheme By our proposed scheme, it may bring the new issue to the multihoming MONET. We show Fig 12 as an example. The MR4 attaches to two parent MRs. There are three
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Fig. 12. An unbalanced topology case of multihoming MONET
Fig. 13. The Operations of Extended Topology Tuning Scheme When T=1
MRs behind the MR1. And MR5 has only one child MR. In such a network topology, it is clearly that loading of the whole MONET is unbalanced. In order to achieve the load balancing goal, we propose an extension topology scheme. 3.4.2 The Operations of Extended Topology Tuning Scheme When the MR attaches (more than) two parent MRs, it decides whether the connection to the parent MR should be removed or not. Formula (1) is the requirement equation. Max(Nested_Level) - Min(Nested_Level) > T
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Max(Nested_Level) is the maximum value of Nested Level in MR’s CID list. Min(Nested_Level) is the minimum value of Nested Level in MR’s CID list. T is an unsigned integer. If the MR meets the requirement of Formula (1), it disconnects the link which has the high Nested level. Fig 13 shows the steps to tune the topology of Fig 12. Therefore, our proposed scheme achieves the load balancing goal.
4 Analysis In the Analysis, We evaluate the Average Nested Level of all MRs in the mobile network. We compare the analysis results for NEMO basic support, the proposed scheme and the extended tuning scheme. To simplify the analysis, we can consider a grid with size 2 x 2 to 10 x 10 cells. On every cross point of horizontal line and vertical line, we locate a mobile router. Two top level mobile routers, TLMR1 and TLMR2, are located at the upper left corner and the lower right corner. MRs can only attach to other MRs by one cell distance. we assume TLMR1 sends the RA messages to the child MRs. The child MRs then sends the RA messages to the neighbor MRs and to construct the MONET tree. The 3 x 3 example are shown in Fig 14 and Fig 15. TLMR2 then sends its RA message to the child MRs and construct the TLMR2 MONET tree. In the extended tuning scheme, we define a T value in the formula (1). We find out the ideal value of T in this analysis. We use two different orders to constructing every MR’s attachment, clockwise and counter clockwise. Clockwise means MRs in each level receive RAs in clockwise order. Counter clockwise means MRs in each level receive RAs in counter clockwise order.
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Fig. 14. Constricting mobile network topology
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Fig. 15. TLMR2 appears on the map
Fig 16 is the results with both clockwise and counter clockwise orders. The analysis results show same data. So the constructing order doesn’t affect the analysis result. With lower value of T, The extended tuning scheme reduces the average nested level of MONET. It also means that the MR can connect to the Internet via fewer hops. We also show that the number of multihoming MR increases. It means we have more chance to choice the alternative path for the data transmission. Fig 17 is the result of the case with 3 TLMRs. Besides TLMR1 and TLMR2, there is another TLMR - TLMR3, which is located at the lower left corner. There is a phenomenon that when T = 0, the value of multihoming MRs is abruptly down as shown in Fig 17. The reason is described in Fig 18. Both MR3 and MR4 have same nested level. And they have different CID. By the proposed scheme, one of them can attach to the other MR. With the extended tuning scheme and T = 0, the link between MR1 and MR2 will be removed anytime. When T=1, this phenomenon can be avoided. The topology of MONET is stable. For this experiment, we suggest the value T can be 1 to construct the most efficient load balanced topology.
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Fig. 20. Grid size vs. Average Nested Level and Number of Multihoming MRs (3 TLMRs)
5 Conclusion In this paper, we propose a Hierarchical Path-selection Scheme for the multihoming NEMO. The MONET achieves fault-tolerance by constructing multihoming MRs, and a new option is added to the Router Advertisement (RA). This new option includes the information about the Nested Level and Cluster ID list of the mobile router (MR). According to this information, the MR can select the most suitable attachment router. So the routing loop in the nested NEMO can be prevented. Additionally, we proposed an Extended Topology Tuning Scheme to construct balanced load topology of MONET. The analysis result shows that our proposed scheme provides lower average Nested Level of the MONET than the NEMO basic support protocol.
References 1. Devarapalli, V., Wakikawa, R., Petrescu, A., Thubert, P.: Network Mobility (NEMO) Basic Support Protocol, RFC 3963, IETF (January 2005) 2. Johnson, D., Perkins, C., Arkko, J.: Mobility Support in IPv6, RFC 3775, IETF (June 2004) 3. Ernst, T., Lach, H.-Y.: Network Mobility Support Terminology. RFC 4885, IETF (July 2007) 4. Ernst, T., Charbon, J.: Multihoming with NEMO Basic Support. In: International Conference on Mobile Computing and Ubiquitous Networking (ICMU) (January 2004) 5. Esaki, H.: Multi-Homing and Multi-Path Architecture Using Mobile IP and NEMO Framework. In: International Symposium on Applications and the Internet, SAINT 2004 (2004) 6. Perera, E., Sivaraman, V., Senevirtane, A.: Survey on network mobility support. ACM Mobile Computing and Communications Review 8(2), 7–19 (2004) 7. Ng, C., Ernst, T., Paik, E., Bagnulo, M.: Analysis of Multihoming in Network Mobility Support., RFC 4980, IETF (October 2007) 8. Choi, Y., Kim, B., Kim, S., In, M., Lee, S.: A Multihoming Mechanism to Support Network Mobility in Next Generation Networks. In: 2006 Asia-Pacific Conference Communications (APCC 2006), August 2006, pp. 1–5 (2006)
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9. Tsukadat, M., Emstt, T., Wakikawat, R., Mitsuyat, K.: Dynamic Management of Multiple Mobile Routers. In: Jointly held with the 2005 IEEE 7th Malaysia International Conference on Communication, 2005 13th IEEE International Conference on Networks, 2005, vol. 2 (November 2005) 10. Cho, H., Kyoung Paik, E., Choi, Y.: HMRA: Hierarchical Mobile Router Advertisement for Nested Mobile Networks. Internet Draft draft-cho-nemo-hmra-00.txt, IETF (January 2004) 11. Li, L., Kang, L.: Balanced Topology Constructions in the NEMO. In: ICC Workshops 2008. IEEE International Conference on Communications Workshops, pp. 436–440 (May 2008) 12. Chuang, J.: Detection Techniques for the Split and Merge of Mobile Networks in Multihoming Environment, master’s thesis, Dept. Communication Engineering, National Central University (July 2006) 13. Montavont, N., Noel, T., Ernst, T.: Multihoming in Nested Mobile Networking. In: SAINT 2004 Workshops. 2004 International Symposium on Applications and the Internet Workshops, January 2004, pp. 184–189 (2004) 14. Wakikawa, R., Devarapalli, V., Ernst, T., Nagami, K.: Multiple Care-of addresses Registration, draft-ietf-monami6-multiplecoa-09.txt, IETF (August 2008) 15. Thubert, P., Bontoux, C., Montavont, N., McCarthy, B.: Nested Nemo Tree Discovery. draft-thubert-tree-discovery-07.txt, IETF (August 2008)
A Software Transactional Memory Service for Grids Kim-Thomas Möller, Marc-Florian Mu ¨ller, Michael Sonnenfroh, and Michael Schöttner Institut fu ¨r Informatik, Heinrich-Heine-Universität Du ¨sseldorf ¨sseldorf, Germany Universitätsstr. 1, 40225 Du ph.: +49 211 81-10595; fax: +49 211 81-13464
[email protected]
Abstract. In-memory data sharing for grids allow location-transparent access to data stored in volatile memory. Existing Grid middlewares typ- ically support only explicit data transfer between Grid nodes. We be- lieve that Grid systems benefit from complementing traditional message- passing techniques with a data-oriented sharing technique. The latter includes automatic replica management, data consistency, and location- transparent access. As a proof of concept, we are implementing a POSIX- compatible object sharing service as part of the EU-funded XtreemOS project, which builds a Linux-based Grid operating system. In this paper we describe the software architecture of the object sharing service and design decisions including transactional consistency and peer-to-peer net- work structure. We also present preliminary evaluation results analyzing lower-bound transaction-overhead using a parallel raytracing application.
1 Introduction During the last years, a lot of Grid technologies emerged [1], including sophisticated Grid middlewares such as Globus [2], Legion [3], and UNICORE [4]. These systems, having been created in a bottom-up fashion trying to meet changing user requirements, are complex to use and administrate [5]. Nevertheless, they often do not operate transparently with respect to distribution and fault tolerance. The EU-funded XtreemOS project aims at reducing the complexity of developing Grid applications by providing a Linux-based open source Grid operating system (OS). Distributed OS services, e.g. security, resource, process management and transparent data sharing, will be integrated into the operating system. In this paper we are presenting the design and initial implementation of XtreemOS’ object sharing service (OSS), which offers interactive or computationally intensive Grid applications a location-transparent storage for volatile data. The object sharing service replicates objects to improve reliability and performance. The software architecture we propose interweaves concepts from transac- tional memory and peer-to-peer systems. Speculative transactions allow conve- nient and consistent access, while at the same time relieving programmers from complicated lock management. Super-peer-based overlay networks improve scal- ability, and a technique similar to distributed hash tables speeds A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 67–78, 2009. © Springer-Verlag Berlin Heidelberg 2009
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up data search. In case of severe faults, the XtreemOS Grid checkpointing service will support the object sharing service. The GigaSpaces company has introduced the notion in-memory data Grid [6] for sharing volatile data in Grid environments. Their in-memory data Grid is already being deployed to end users. While their solution, like OSS, uses optimistic concurrency control, it cannot restart failed transactions transparently with respect to the application. This paper is organized as follows. After discussing related work in section 2, we present OSS’ overall architecture and its dynamic object management in section 3. Subsequently, in section 4 we describe the implementation of speculative TAs. In section 5 we discuss preliminary measurements followed by the conclusion and outlook on future work.
2 Related Work This paper draws upon ideas from four existing bodies of work: database transaction processing systems, transactional memory (TM), data sharing in Grid environments, and distributed shared memory. Due to limited space, we can compare our work only with some key ideas from these fields. 2.1 Database Transaction Processing Transactions (TAs) are a core concept in database management systems (DBMS) providing significant benefits to the database programmer [7]. In DBMS, TAs provide the properties of atomicity, consistency, isolation, and durability (ACID). We think that TAs will greatly simplify the development of generic distributed and parallel programs. In constrast to DMBS TAs, distributed program TAs usually execute less instructions and modify less state. Moreover, they do not incur the overhead of database operations. Therefore, TAs based on shared data offer a comfortable alternative for general purpose distributed programming. A wide range of implementation options for executing TAs with high throughput can be found in the literature. The work on optimistic concurrency [8] is the most relevant to the ideas we explore in this paper. Optimistic concurrency controls access to shared data without using locks by detecting conflicts and backing up TAs to ensure correct operation. In our implementation we extend the idea of optimistic concurrency from DBMS to data sharing in Grid environments. 2.2 Transactional Memory Hardware support for TM was first proposed by Herlihy et.al. [9] a decade ago. The authors substituted locking critical regions with running them encapsulated in TAs. Thus TAs were an additional feature and did not replace the existing shared memory consistency protocols. Transactional Coherence and Consistency (TCC), suggested by Hammond et al. [10], shares a lot of ideas with our approach. TCC runs TAs at most times, instead of just occasionally, replacing conventional coherence and consistency techniques. As TCC relies on a shared multi-processor machine, it can easily cope with the pressure on inter-processor communication bandwidth.
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We are encouraged by the existing work and the growing interest on TM [11,12]. Sun Microsystems has recently announced a new CPU with built-in support for TAs. Thus we are confident that in the near future numerous TAbased appli- cations will emerge, and our implementation shows that TM can be adapted for distributed systems, too. 2.3 Data Sharing in Grid Environments Sharing volatile data in Grid environments has been proposed by a few projects such as JuxMem [13] and Vigne [14]. The JuxMem architecture decouples the design of consistency protocols and fault-tolerance mechanisms. It supports datasharing across wide-area networks using entry consistency. However, JuxMem neither supports speculative TAs nor is it designed to support interactive distributed applications. GigaSpaces is developing a data-aware enterprise Grid [6], that is, a dis- tributed caching system as an alternative to managing state in a database. Targeting Java applications, GigaSpaces is compatible with existing Java-based shared memory technologies, which probably limits its portability. Like OSS, GigaSpaces implements optimistic concurrency control. The cache detects ver- sion conflicts and notifies the applications by means of Java runtime exceptions, but, in contrast to OSS, it cannot restart a TA transparently with respect to the application. 2.4 Distributed Shared Memory Page-based distributed shared memory systems have always been popular since the development of IVY [15] because of the synergies with virtual memory management and the locality benefit. Intel has adopted Treadmarks [16] in its OpenMP compiler [17]. Most of these systems have been implemented as userlevel libraries, but some systems, such as Plurix [18] and Kerrighed [19], are integrated into the OS kernel to build single-system images. Transactional consistency (TC) has been implemented within the Plurix OS starting in 1998. The TC model is most related to weak consistency first proposed by Dubois et.al. [20] that bundles memory writes in a sync operation. Like weak consistency, TC delays updates until the commit of a TA, but the speculative execution allows a retrospective enforcement of strong consistency.
3 Overall Architecture Targeting Grid environments, OSS must adapt to dynamic and heterogenous applications. In order to support heterogenous programming languages, OSS identifies an object with a unique ID, currently, its address in a 64-bit virtual memory. OSS partitions the application address space into the conventional local storage and the shared object space. It implements a dynamic object management that allows to create and delete objects in the shared object space. Each node can modify shared objects, so that OSS must encorce consistency for all replicas in the shared object space. OSS is designed to support different consistency models within one application. Among the multitude of potentially
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interesting consistency models, we are currently implementing transactional consistency (TC). The latter applies optimistic concurrency control avoiding complicated lock management. We believe this is a promising model being convenient and consistent. Of course TC will not scale to an unlimited number of nodes, but when combined with other programming concepts, we expect good scalability (see also section 4.2). Nonetheless, OSS’ functional primitives allow implementing weaker consistency models as well. 3.1 Dynamic Object Allocation OSS’ object management subsystem implements two functions to create and destroy objects, named oss alloc and oss free in the style of local memory management. OSS is neutral with respect to programming languages: The function oss alloc takes the requested object size as a parameter, and returns the new object’s ID in the form of its memory address. The function oss free takes an object ID and, if the ID is valid, destroys the designated object. To make object management scale in the number of participating nodes as well as in the number of objects, OSS uses a two-stage allocation scheme, a common technique for parallel allocators [21]: Several flexible high-level allocators build upon one simple, Grid-wide low-level allocator. The Grid-wide allocator hands out objects having a fixed size of 4 KB. If an application requests an object larger than 4 KB, the allocator aggregates contiguous fixed-size objects to a larger object. A distributed table stores reservation meta-data, similarly to Mungi’s object table [22]. OSS’ object table, however, is interspersed throughout the object space, such that meta-data is spatially distributed but resides near corresponding objects. The entries of the object table encode the node that has created the belonging object, the consistency model applying to the object, and, if the object is suballocated, the identifier of the high-level allocator. For fine-grained object allocations, an application can choose among several top-level allocators. As a general-purpose allocator, we have integrated dlmalloc [23] into OSS, using the mspace abstraction to retrieve meta-data when freeing remotely allocated objects. We are currently implementing the Multiview approach [24], which counteracts false sharing between colocated objects by assigning them IDs that are unique within their access detection unit. 3.2 Replica Management Applications access local replicas of shared objects. OSS considers the node- local object mappings to be a cache of the distributed objects and tracks the consistencyrelated state of replicas in a local object table. An entry in the local object table stores an object’s state, as defined by the respective consistency model, a privileged mapping that allows to modify the object circumventing ac- cess detection, and potentially several shadow copies that store backup versions of the object. OSS constructs local mappings lazily, such that expensive memory mapping operations only take place when an application accesses a previously unknown object.
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To guarantee consistency among replicas, all consistency models need to de- tect object accesses. Given that objects reside in virtual memory, OSS controls the memory-management unit (MMU), a well-known and language-neutral ac- cess detection technique [25]. OSS uses Linux’ mprotect system call to modify the hardware access permission to the application’s virtual address space at page granularity. In case a memory operation exceeds the access permission granted by hardware, the Linux kernel signals a segmentation violation to OSS’ exception handler. The application-known mapping and the privileged mapping for internal use by OSS must coincide. Moreover, the Multiview approach suggests creating multiple mappings of adjacent objects, such that each object is accessible via a dedicated virtual memory page. OSS stores ranges of objects in System V shared memory segments, allowing it to map the same object repeatedly at different virtual addresses. Although MMU-based access detection is bound to page-size granularity, OSS employs several techniques to detect access to objects of different size. The shadow copies, which are created when objects are modified, not only serve to rollback aborted TAs, they also enable tracking object modifications, thus help refine page-granular object access detection. We are currently investigating how to correlate objects based on object access patterns. Although statistical analysis is difficult in a dynamic environment, we would like to determine object access groups which aggregate objects that are frequently accessed together. 3.3 Monitoring Facilities OSS supports several monitoring facilities to optimize its replica management and to allow a dynamic reorganization of the overlay network. Each node stores its monitoring information in an additional shared region, making monitoring data easily accessible from any peer. OSS registers monitoring data per node in its hierarchical naming service, which is also stored in the shared object space. Regarding replica consistency for instance, monitoring data can help determine object access groups. The performance of TM mainly depends on the rate of successful committed TAs. Conflicting TAs degrade the application’s performance, because aborted TAs have to be restarted. The conflict probability correlates with the number of modified objects and the object access pattern. Thus, profiling information gathered by the monitoring service helps the programmer identify conflicting TAs.
4 Transactions OSS’ TAs follow the standard ACID properties, except for durability, as we will discuss the next section. Isolation requires conflicting TAs to be serialized, either by a pessimistic locking or by an optimistic synchronization scheme. Pessimistic locking burdens the programmer with complex lock management and is prone to deadlocks. Like the TM community, we prefer an optimistic locking-free synchronization scheme. Using forward validation, as opposed to backward validation, OSS can dynamically choose a TA to abort in case of a conflict. OSS detects conflicts between overlapping TAs by comparing their read and write sets.
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4.1 Transactional Consistency Sharing objects using transactional consistency bundles all accesses to the shared object space between oss bot and oss eot function calls into one atomic operation. Access to the shared space is nearly transparent for the applications, except that the developer needs to specify the beginning and end of TAs. For critical DBMS, e.g. when running bank accounting system, durability is mandatory, requiring the DBMS to save data on disk. However, for OSS’ target applications, e.g. multi-user virtual worlds, the overhead imposed by disk access is too high. After a commit, the results of a TA are stored in volatile memory only. However, the XtreemOS Grid checkpointer [26] will periodically write snapshopts to disk, therewith providing durability and fault tolerance. Of course a programmer can enforce durability by generating a checkpoint after an important OSS TA. Another publication by the authors [27] describes in detail how OSS runs TAs and how it enforces restarting failed TAs under Linux. 4.2 Scalability OSS is currently designed to support interactive distributed applications such as multi-user virtual worlds (namely Wissenheim [28]). This type of applica- tion usually requires a fast response time in network communication. Therefore, fast TA validation and restart are fundamental aspects to achieve highly scal- able transactional storage. OSS uses several techniques to reduce and hide the network latency. Regarding TA validation, OSS sends unacknowledged commits messages. This prevents idling while waiting for commit acknowledgements, and the application can go ahead while the commits are still in transfer. Sometimes this could cause receiving write sets in different order. But OSS guarantees a total order of commits by using Lamport time stamps [29]. In case a node misses a commit packet, OSS easily detects such situations and request it from its peers which in turn will reply using their TA history buffer. For scalability reasons we plan to retransmit missed network packets as close as possible to the requesting node, e.g. by its super-peer. Further techniques like pipelined TAs, easing the waiting time for the commit token, super-peer commits, replica management and several fault tolerance mechanisms are described in [27]. 4.3 Communication Subsystem The network communication subsystem is an important component for a scalable sharing service. We have decided to handle the communication among nodes with a compact two-stage-based binary-network-protocol. Thus we can avoid an expensive parsing like necessary when using text-based network-protocols, e.g. Hypertext Transfer Protocol (HTTP). The communication unit consists of two layers, the low layer for the raw data exchange over standard network protocols and the upper layer for OSS-specific data representation. This makes OSS flexible and independent from any specific transport protocol.
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The lower communication layer manages network connections and ensures reliable raw data exchange. Furthermore, the lower layer maps unicast as well as multicast messaging to the transport protocol among nodes. For the upper layer it is transparent whether the lower layer uses a stream- oder datagram- based transport protocol. Currently, OSS uses the Transmission Control Protocol (TCP), so it does not need to take care about reliability regarding data exchange. But we plan to study a UDP-based overlay multicast for OSS. The upper communication layer contains the functionality of sending and receiving network messages. A network message is equivalent to the upper layer’s protocol data unit (PDU) and consists of a well-defined message header and a data part. The data is subject to the combination of the type and subtype fields in the message header. The type field defines the callback network handler which has been registered before by an OSS module (e.g. consistency model), whereas the second subtype field distinguishes different network messages of the respective module. The type field also encodes whether a message is a request or reponse. Incoming requests are enqueued into a request queue, such that OSS can re- arrange messages to enforce ordering of messages and fairness of token requests. In order to achieve a flexible and highly scalable communication, network han- dlers must not block, which would result in delaying the processing of further requests. So queuing requests enables OSS to defer already processed PDUs for later reprocessing. This could be necessary if the handler itself would block while gathering information or if it sends a network request by itself. In contrast, re- sponse messages should be processed as fast as possible to minimize the local blocking time. Therefore, responses will be processed directly without queuing. Asynchronous messages can either be handled like queued requests or like un- queued response messages. OSS supports blocking as well as non-blocking request-reply cycles and asynchronous unidirectional message exchange. Furthermore, it supports forwarding messages to other nodes. Besides, the network unit is able to route packets. The difference between both methods is that routing is done at the lower layer by evaluating the PDU’s destination ID. Message forwarding is done in the upper layer and is controlled by a specific network handler. The synchronous functions, which block until an appropriate response message is received, store meta-data in an internal data structure. This data is later used to assign a received response message to its pending request and continue the corresponding blocking function call. In case of a blocking multicast message, the function call does not return until all response messages have been received.
5 Preliminary Results This section evaluates the lower-bound transaction-overhead of the OSS service using a raytracer application. The latter is based on an non-parallel application developed during a course at the MIT and which has been ported and extended to a parallel version running on top of OSS. Raytracing is suitable for parallel computing because all parts of a raytraced picture are discrete. As a consequence, a raytracer typically scales well when executed in parallel. Nevertheless, it is
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important to remark that our modified raytracer executes TAs, and even if there are no collisions between overlapping TAs there is still network traffic caused by committing TAs. Each node commits TAs, requiring to request the commit token and to post its write set. Furthermore, each incoming commit triggers a local validation interrupting a computing TA. Of course one could easily imagine a worst case scenario, e.g. all nodes incrementing a variable. The latter will neither scale with OSS nor with other approaches. These kind of conflicts need to be addressed by the programmer. The evaluation we have performed is a distributed rendering of a raytracer scene in size of 1024x1024 pixels, as shown in Fig. 1. The setup consists of one control engine and multiple rendering engines. The control engine deploys computational segments of the scene to all raytracing engines using transactional shared objects. If a node has finished computation of a segment, it will take the next one until all segments have been computed. The rendering results of all segments are also stored in the transactional shared object space. For evaluation, we have used a 16 node cluster, each node as a rendering engine, and one additional control node, external to the cluster, deploying the segments. Each cluster node has two AMD Opteron CPUs at 1,8 GHz, 2 GB RAM, a Broadcom BCM5702X Gigabit NIC and runs a 64-bit Linux 2.6.24 kernel. The control node has an Intel Core 2 Duo CPU at 2,66 GHz, 2 GB RAM, an Nvidia Geforce 7300SE graphics card, an Intel 83541PI Gigabit NIC and runs a 64-bit Linux 2.6.25 kernel. All nodes are interconnected via switched Gigabit Ethernet.
Fig. 1. Picture of the raytraced scene
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We have monitored the duration of raytracing with a different number of nodes and varied the size of segments. The results are depicted in Table 1 and Fig. 2. First, we can see that the raytracer scales nearly linear with a multiple number of nodes. Second, the time difference of the three segment sizes is marginal and shows that the overhead of many token requests and write set postings are neglible. The second table depicts the elapsed time for requesting the validation token or a shared memory page. With an increasing number of rendering nodes, the Table 1. Time duration for rendering a Raytracer scene in seconds Nodes 2 4 8 16 1 Segment size 4096 Bytes 122,76 62,00 31,51 16,76 9,02 16384 Bytes 120,51 61,00 31,26 17,01 9,52 65536 Bytes 116,51 60,00 32,51 19,01 11,31
Table 2. Average page and token request time in microseconds Nodes 1 2 4 8 16 Request time Page request time 79 168 205 195 225 Token request time 0 184 363 761 1739
Fig. 2. Raytracing time duration with different number of raytracing engines and segment sizes
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token request time highly increases and seems to be a limiting factor whereas the page request time increases at a slower rate. Currently, token requests are always sent to the last known node which had owned the token. If the receiver does not own the token anymore, it forwards the request. Because the generated picture does not overlap among nodes, most page requests can be acknowledged positive without forwarding.
6 Conclusion Sharing volatile data in a Grid environment is a useful and comfortable approach complementing traditional message passing technologies. In this paper we have presented OSS, a transactional data sharing service for grid environments, which handles data location, replication, and consistency transparently with respect to application software. Transactional memory is convenient for the programer as it implements strong consistency but avoids complicated lock management. Several optimizations can help speed up transaction-based programs, for example introducing consistency domains reducing the number of nodes being involved during the validation phase. Of course the programmer can also adjust transaction granularity to reduce collision probability. Overall we are encouraged by the preliminary evaluation of the current implementation using the parallel raytracer. These measurements show that the lower-bound transaction-overhead imposes only low overhead for properly parallelized programs. Of course there are applications with limited scalability when combined with transactions. Therefore, OSS provides support for multipe consistency models. The next steps include integration of a super-peer-based overlay network structure, a distributed hash table for data search, pipelined transactions (to hide commit latency), and more experimentation, especially with the Wissenheim world, executed in wide area networks.
References 1. Foster, I., Kesselman, C., Natrajan, A.: The Grid: Blueprint for a new computing infrastructure (1999) 2. http://www.globus.org 3. http://www.legion.virginia.edu 4. http://www.unicore.eu 5. Morin, C.: XtreemOS: a Grid operating system making your computer ready for participating in virtual organizations. In: IEEE International Symposium on object/component/service-oriented/Real-time Distributed Computing (ISORC) (2007) 6. Shalom, N.: Data-awareness and low-latency on the enterprise Grid. Technical report, GigaSpaces Technologies Inc. (2007) (Last accessed November 07, 2008) 7. Gray, J., Reuter, A.: Transaction Processing: Concepts and Techniques. Morgan Kaufmann, San Francisco (1993) 8. Kung, H.T., Robinson, J.T.: On optimistic methods for concurrency control. ACM Transactions on Database Systems 6(2) (1981)
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9. Herlihy, M., Moss, J.: Transactional memory: Architectural support for lock-free data structures. In: International Symposium on Computer Architecture (1993) 10. Hammond, L., Carlstrom, B., Wong, V., Hertzberg, B., Chen, M., Kozyrakis, C., Olukotun, K.: Programming with transactional coherence and consistency (TCC). In: Intl. Conference on Architectural Support for Programming Languages and Operating Systems, Boston, USA (2004) 11. Larus, J., Kozyrakis, C.: Transactional memory. Commun. ACM 51(7), 80–88 (2008) 12. Harris, T., Marlow, S., Jones, S.P., Herlihy, M.: Composable memory transactions. Commun. ACM 51(8), 91–100 (2008) 13. Antoniu, G., Deverge, J.F., Monnet, S.: How to bring together fault tolerance and data consistency to enable Grid data sharing. Concurrency and Computation: Practice and Experience (2006) 14. Jeanvoine, E., Morin, C., Leprince, D.: Vigne: Executing easily and efficiently a wide range of distributed applications in grids. In: Kermarrec, A.-M., Bougé, L., Priol, T. (eds.) Euro-Par 2007. LNCS, vol. 4641, pp. 394–403. Springer, Heidelberg (2007) 15. Li, K.: Ivy: A shared virtual memory system for parallel computing. In: Proceedings of the 1988 International Conference on Parallel Processing (August 1988) 16. Amza, C., Cox, A., Dwarkadas, S., Keleher, P., Lu, H., Rajamony, R., Yu, W., Zwaenepoel, W.: TreadMarks: Shared memory computing on networks of work- stations. IEEE Computer 29(2) (1996) 17. Hoeflinger, J.P.: Extending OpenMP to clusters. Technical report, White Paper, Intel (2006) 18. Goeckelmann, R., Schoettner, M., Frenz, S., Schulthess, P.: A kernel running in a DSM design aspects of a distributed operating system. In: IEEE International Conference on Cluster Computing, Hong Kong, China (2003) 19. Vallée, G., Lottiaux, R., Rilling, L., Berthou, J., Dutka-Malhen, I., Morin, C.: A case for single system image cluster operating systems: Kerrighed approach. Parallel Processing Letters 13(2) (2003) 20. Dubois, M., Scheurich, C., Briggs, F.: Synchronization, coherence and event ordering in multiprocessors. IEEE Computer 21(2) (1988) 21. Berger, E.D., McKinley, K.S., Blumofe, R.D., Wilson, P.R.: Hoard: a scalable memory allocator for multithreaded applications. SIGARCH Comput. Archit. News 28(5), 117–128 (2000) 22. Heiser, G., Elphinstone, K., Vochteloo, J., Russell, S., Liedtke, J.: The mungi singleaddress-space operating system, vol. 28, pp. 901–928. John Wiley & Sons, Inc., New York (1998) 23. Lea, D.: A memory allocator. Technical report, State University of New York at Oswego (2000) (Last accessed November 07, 2008) 24. Itzkovitz, A., Schuster, A.: MultiView and Millipage – fine-grain sharing in page- based dsms. In: OSDI 1999: Proceedings of the third symposium on Operating systems design and implementation, pp. 215–228. USENIX Association, Berkeley (1999) 25. Li, K., Hudak, P.: Memory coherence in shared virtual memory systems. ACM Trans. Comput. Syst. 7(4), 321–359 (1989) 26. Cortes, T., Franke, C., Jégou, Y., Kielmann, T., Laforenza, D., Matthews, B., Morin, C., Prieto, L.P., Reinefeld, A.: XtreemOS: a vision for a Grid operating system. Technical report, Barcelona Supercomputing Center (BSC), Spain (2008)
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27. Müller, M.F., Möller, K.T., Sonnenfroh, M., Schöttner, M.: Transactional data sharing in Grids. In: PDCS 2008: 20th IASTED International Conference on Parallel and Distributed Computing and Systems, Calgary, Alberta, Canada, IASTED (November 2008) 28. Fakler, M., Frenz, S., Schoettner, M., Schulthess, P.: A demand-driven approach for a distributed virtual environment. In: Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering (2006) 29. Lamport, L.: Time, clocks, and the ordering of events in a distributed system. Commun. ACM 21(7), 558–565 (1978)
An Empirical Study on the Performance Issues on the Clustered Client-Server Computing Environment Yu-Hung Hsiao and Han-Jyun Su Department of Electronic Engineering National United University
[email protected],
[email protected]
Abstract. In this paper, the performance of four computation models applied on a clustered computing environment is studied. A 3-tiered1 client-server architecture model is used as the baseline architecture for the study. An experimental cluster, using the off-the-shelf hardware and software components, was built and used to conduct the performance evaluations. The queries used in the study can be extended to numerous real-life applications. Hence the contribution of this study is mainly empirical, especially for those applications that have the similar settings. The alternative Multiple Application Servers, Multiple Database Servers (MAMDA) computation model which implements the application servers and database servers on the same PCs provides the best performance speedup, keeping the efficiency greater than or equal to 0.9. Keywords: cluster computing, client-server architectures, computation models, database query, performance evaluation.
1 Introduction With the advances of the technology, the costs of data processing and communication continue to drop. It is very common nowadays to build cluster systems using off-theshelf hardware and software components, for the purpose of high performance, high availability, and high scalability [1],[2]. Although countless cluster systems have been built, achieving high performance with cost-effective tasks allocations is always a challenge. In particular, how to distribute the tasks with the available computing resources to achieve the best performance is the topic addressed here. A 3-tiered client-server architecture shown in Figure 1 is used as the baseline architecture for the study. Based on this baseline model, four computation models with one alternative model are derived and are analyzed for the performance study. The time needed to complete the processing job is counted, and the relative speedup and efficiency are evaluated, too. The remaining sections of this paper are organized as follows. Section 2 provides background information on cluster computing, especially on parallel processing clusters and client-server architectures. The computation models for the cluster systems utilizing the 3-tiered client-server architecture model are introduced. Section 3 1
The three tiers are (from the highest to the lowest level): the client, the application servers, and the database servers.
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describes the environment used in this study, especially the cluster system built particularly for the performance evaluation conducted here, and the allocation strategies of the processes. The data patterns, the data queries, as well as the performance metrics considered are also described. Section 4 gives the empirical results and provides discussions. In Section 5, concluding remarks are drawn.
2 Backgrounds A cluster system is usually built with several off-the-shelf computers connected through a high-speed communication network. According to the definition of a cluster system [3], a cluster system is used as a single unified computing resource from the users' point of view. Usually cluster systems are developed for the purposes of improving performance, availability, or load-balancing. In this study, achieving cost-effective high performance is the primary goal considered. 2.1 Parallel Processing Cluster Systems Traditionally, parallel processing are mostly conducted through ad-hoc computer systems equipped with multiple processors operate concurrently. This type of systems is usually referred to as multiprocessing systems or tightly-coupled parallel processing systems. In this case, processors are connected by a high speed bus or switching network, and communications among processes are achieved through shared memory [4]. The cluster systems provide alternatives to achieve high performance with a much lower cost. As the performance of personal computers and local area networking continues growing, and the cost of these two major components continues dropping, it is attractive to connect the low-cost, high performance personal computers through a high-speed network. As building the cluster systems becomes feasible, the challenge remains in the computation model, i.e., how to allocate computations derived from the applications so that the best performance can be achieved with the available computing resources. A parallel processing cluster system usually is constructed using off-the-shelf personal computers or workstations, with corresponding storage systems, and highbandwidth networks. Such a parallel-processing cluster system can provide the potential of computation capability that is compatible with the traditional multiprocessing systems. Just like the traditional multiprocessing systems, an application needs to be divided into independent subtasks, so that parallel processing can be applied. These independent subtasks need to be distributed to the computing nodes within the cluster system. The Beowulf class of clusters is an example of the common cluster systems designed to support this objective [5]. 2.2 The Client-Server Architecture For the purpose of discussions, a client-server architecture model, shown in Figure 1, is used. On the highest level, the client interacts with the applications outside of the cluster, passes the query requests to the servers reside in the cluster, collects the responses, and provides the results back to the customers outside of the cluster.
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Fig. 1. The Client-Server Architecture Model
There are two kinds of servers involved in this model, e.g., the application servers and the database servers. As shown in Figure 1, the number of application servers and the number of database servers do not have to match. The application servers are dedicated to the application and distribute the corresponding tasks to the database servers; while the database servers are mainly working on database management and providing storage for data. Different servers may be located on different computing platforms, or on the same platform. When more than one server is located on the same computing platform, multitasking or multi-processes mechanisms can be applied. In terms of parallel processing, multitasking or multi-processes does not really provide the performance benefit. In fact, performance will be degraded because of the overhead caused by context switching, etc. On the cluster architecture model described above, an application may choose to use n application servers and m database servers. Based on the number of servers used, four computation models can be derived: 1. 2. 3. 4.
SASD: Single Application server, Single Database server SAMD: Single Application server, Multiple Database servers MASD: Multiple Application servers, Single Database server MAMD: Multiple Application servers, Multiple Database servers
Theoretically, each of the above four models can be implemented on the experimental cluster system built in the lab. The cluster system used for the study, as well as the way to distribute the tasks on the servers will be described in details in the next section. Since SASD is trivial, only the SAMD, MASD, and MAMD models are studied. Moreover, an MAMD-Alternative (MAMDA) model will be introduced and included in the experiments.
3 Environment Description In this section, the cluster system built for the study will be presented. The computation models applied on the cluster system will be discussed. Data entry and data query
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used in the evaluations will be introduced. Moreover, performance metrics used will be described, too. 3.1 System Description To build a cluster, several personal computers (PCs) with add-on cards and the networking equipments will be needed. In particular, the cluster system used in this study contains up to 34 PCs, with all the PCs having the same hardware specification (Intel P-III 800MHz). Moreover, up to 3 Fast Ethernet hubs are used to connect the PCs so that a local area network (LAN) is constructed. Similarly, the hubs have the same specification (D-Link DFE-916DX). Besides the hardware equipment, the software components used include the operating system, the database server, and the compiler (to compile the applications.) In particular, the Fedora Core 5, a Linux distribution, is used as the operating system. The database server, MySQL 5.0.18, is used to store the data and promote the speed of data query process. MySQL is an open source SQL database management system published by MySQL AB. The application on the servers is written in C language, using the GNU Compiler Collection (GCC 4.1.0) and the associated libraries. Moreover, the MySQL C API is used to code the application. 3.2 Data Entry and Data Query The structure of the data entry is described as follows. Each data entry contains an identification number, which ranges from 1 to 10,000,000. Therefore we have ten million data entries to be processed. There are six number fields associated with each data entry, denoted as n1 through n6, which are random numbers that range from 1 to 49. Moreover, ni ≠ nj, when i ≠ j, for 1 ≤ i, j ≤ 6. To simplify the process, the six random numbers are sorted prior to the process, such that ni < nj, where i < j. Thus, a total number of ten million data entries will be stored in a table. A data query will cause a search on the table. The purpose of the query is to see whether there is a match (or matches) in the table. A match means that the data entry has the exact same six numbers as the data entered. Note that in reality, this searching process can be found in many real-life applications, such as the lottery game, web searching, etc. It should be noted that a high potential of parallelism exists in this searching process. Conceptually, the table can be divided and the searching can be done independently. It is this “independence” characteristic that provides the potential of parallel processing. Since there is no dependency among the searching processes, the order of the search does not affect the results; hence all the independent searches can be done in parallel. Ideally, if there are 10 million servers available, the search can be done in one step. To store and manage the data queried, we create a database in the MySQL database server. The database server's storage engine used is the default MyISAM, which is based on the Indexed Sequential Access Method (ISAM) code. Originally, one table with 10 million entries of data was created in the database. To support the parallel query processing, the original table is split into 2 (each contains 5 million entries), 4 (each contains 2.5 million entries), 8 (each contains 1.25 million entries), 10, 16, 20, 25, and 32 sub-tables with equal sizes.
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3.3 Executing the Pattern Matching Process The actual pattern matching process can be done either on the database servers or on the application servers. According to where the actual matching process is performed, two computational modes can be defined: the Done-by-MySQL (DBM) mode and the Done-by-Application (DBA) mode. In the DBM mode, an SQL clause, in particular, the “SELECT id FROM table_name WHERE matching_criterion,” is sent to database servers. The database servers perform the matching process and provide the queried result. In this case, since the majority of the work is done by the database servers, the times spent on the database servers are measured and the most cost-effective number of database servers can be estimated. Since the data are stored in database server(s), we must first fetch the data from the database server(s) in the DBA mode. To fetch data, a query string, in particular, “SELECT * FROM table_name,” is sent to the database servers. The application server fetches the data entry and performs the matching process to obtain the identification number of entry that matches the criterion. 3.4 Computation Models The implementation details for all the computation models will be described in this section. Figure 2 depicts the setup for the SAMD model. The application client (APC) sends a request message to the single application server (APS) using TCP sockets. The request message includes the six numbers requested for matching. After sending out the request message, the APC waits for the reply message from the application server. When the application server receives the request message, it will create n child processes, 1 ≤ n ≤ 32, to query the n database servers (DBSs). The n child processes will query the n database servers in parallel, where every child process searches the sub-table of (10,000,000/ n) data entries on different database server. When all child processes have completed their tasks, the application server sends the result back to the APC. The result contains the identification numbers of the matched entries. The application server and the child processes forked are executed on one single PC, while the database servers are executed on other PCs, one database server per PC.
Fig. 2. SAMD Implementation Model
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Fig. 3. MASD Implementation Model
Fig. 4. MAMD Implementation Model
In the MASD model shown in Figure 3, the APC sends n request messages to n APSs. When the APS receives the request message sent from the APC, it forks a child process to query a sub-table of (10,000,000/n) data entries stored in the single DBS, and waits for the completion of the child process. In this model, the DBS is implemented using only one PC, while the APSs are implemented on multiple PCs. Similar to the MASD model, the APC in the MAMD model shown in Figure 4 sends n request messages to n APSs and waits for the reply from the n APSs. Moreover, one APS is paired with a DBS implemented on a different PC of the same hardware specification. According to the number of PCs available, 16 APSs and 16 DBSs are implemented for the MAMD model. However, the large amount of data transferring between the database server(s) and the application server(s) in the DBA computational mode will be a main performance bottleneck. To resolve this problem, an alternative model, referred to as the MAMD Alternative (MAMDA) model, is proposed and illustrated in Figure 5. Unlike the other three models mentioned above, the MAMDA model implements a pair of the APS and DBS on the same PC, and the DBS can only be queried by the APS located on the same PC.
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Fig. 5. MAMDA Implementation Model
3.5 The Performance Metrics In this study, the time used to complete the query is measured and defined as the completion time. In addition to the completion time, speedup and efficiency are derived. We denote Tn as the completion time for all n child processes created to process the query. For example, considering the SAMD model, T1 is the completion time that one child process is forked by the single application server, and only one database server is used. T1 is the completion time that n child processes are forked by the single application server, and n database servers are queried in parallel, where every child process searches (10,000,000/ n) data entries on different database server. After defining the completion time, the speedup of the SAMD model where p child processes are created can then be defined as Sp = T1 / Tp While speedup is a useful performance metric for assessing parallel processing, efficiency is another measure for assessing the cost-effectiveness of computations. To estimate efficiency of a cluster system, the number of PCs used in implementing the application servers and database servers is considered. Hence, the efficiency of the SAMD model with p child processes is defined as Ep = Sp / (number of PCs used in implementing the application servers and database servers) = Sp / (1 + p). In the MASD model, Tn is the completion time that n application servers take to process the job, with each application server creates one child process. The speedup and efficiency of the MASD model with p child processes are defined as Sp = T1 / Tp and Ep = Sp / (p + 1), respectively. In the equation of calculating efficiency, p is the number of application servers used and 1 is the number of database server used. In the MAMD model, Tn is the completion time that n application servers and n database servers are used in the query process, where n child processes are forked by n application servers. The equation of speedup of the MAMD model with p child processes is the same as those defined for the SAMD and MASD models. But the efficiency of the MAMD model is calculated by the equation Ep = Sp / (2 * p), due to that the MAMD model with p child processes uses p PCs to implement p APSs and p PCs to implement p DBSs at the same time.
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Similarly, in the MAMDA (MAMD-Alternative) model, Tn is the completion time that n application servers and n database servers are used in the query process, where n child processes are forked by n application servers. However, in the MAMDA model, the application servers and database servers are implemented on same PCs by pair, where a PC runs an application server and a database server at the same time. So, the efficiency of the MAMDA model with p child processes is calculated by the equation Ep = Sp / p.
4 Results and Discussions The performance results of the above described experiments, e.g., four computation models with the two computational modes, are presented here. The speedup, the efficiency, and the effects of database servers and the network are discussed. 4.1 Speedup and Efficiency Figures 6 and 7 show the results of the speedups for the DBM and DBA modes over the four computation models, respectively. Moreover, the ideal cases of speedup are displayed for the purpose of referencing. Figures 8 and 9 show the efficiencies for the DBM and DBA modes over the four computation models, respectively. From Figures 6 and 8, it is concluded that the number of database servers should not exceed 25 for the SAMD model with the DBM mode. This is from the observation that the speedups provided by 25 and 32 database servers are almost the same. The peak efficiency is obtained when the number of child processes forked is equal to 8. Taking the speedup and efficiency into account simultaneously, the number of database servers ranged from 8 to 16 is the optimum range for the SAMD model with the DBM mode. For the MAMD model with the DBM mode, although it can provide speedup compatible with the MAMDA model, the MAMD model consumes twice the number of PCs as that used by the MAMDA model. This worsens the efficiency of the MAMD model, and implies that the MAMD model is not the best choice for building a clustered client-server system.
Fig. 6. Speedup for the DBM mode over the four computation models
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Fig. 7. Speedup for the DBA mode over the four computation models
Fig. 8. Efficiency for the DBM mode over the four computation models
From Figures 7 and 9, we see that there is no outstanding speedup obtained by the SAMD, MASD, and MAMD models with the DBA mode. For the SAMD and MAMD models, the speedup provided is less than 2, while the speedup provided by the MASD model is less than 1. The root problem of this phenomenon will be addressed in next subsection. On the other hand, the MAMDA model provides the best speedup and efficiency among the four models. For the MAMDA model, the ideal speedup is almost reached in both the DBM and DBA modes, and the efficiency obtained is greater than or equal to 0.9. In short, the MAMDA model provides the highest scalability and the best costeffectiveness. 4.2 Effects of Database Servers and Network It is concluded from Figures 6 and 7 that the DBM mode performs better than the DBA mode does. In the DBA mode, the data need to be fetched from the database
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servers. Besides the functions used to establish a connection to MySQL and execute the SQL query, extra functions are needed to conduct the work. Specifically, the function mysql_use_result() is used to initiate a result set retrieval due to the limitation of available main memory on PCs used, and the function mysql_fetch_row() is used to obtain the data from MySQL row by row.
Fig. 9. Efficiency for the DBA mode over the four computation models
In addition to the waste of time to transfer data from DBS(s) to APS(s), much of the execution time in the DBA mode is wasted in conducting type conversion. So, the data transfer time and type conversion time are the two main problems that cause DBA mode to take longer time to complete than that with the DBM mode. In the SAMD and MAMD models, the data processed by the application servers are fetched from the database servers not located on the same computing platform. In the MAMDA model, the data processed by the application servers are fetched from the database servers located on the same PCs. Therefore, when the number of child processes is less than 2, the database server's computing capability dominates the performance. Note that the matching process and the data fetching are performed simultaneously. In the SAMD and MAMD models where data must be transferred across the networks, the communication bandwidth is the key in performance. The lesson learned from this experiment is that network bandwidth is the major performance bottleneck. To improve the system performance of the SAMD model while single application server must connect with multiple database servers, providing high bandwidth in the network infrastructure is the key, for example, the 10 Gigabit Ethernet, Myrinet, or InfiniBand architecture, etc. To relieve the bottleneck in the MAMD model, dedicated communication line between every pairs of APSs and DBSs should be added to eliminate the network traffic conflicts caused by the shared hubs.
5 Conclusions With the advances of the semiconductor and communication technologies, the costs of processing and communication drop dramatically. Cluster systems provide the
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great potential of boosting performance in many areas, e.g., scientific, graphic, financial, banking, and web-based applications, etc. To achieve a high performance and cost-effective cluster application utilizing the power of parallel processing, adequately distributing the tasks among the available computing resources is the most critical issue. In this paper, an experimental cluster system was built using off-the-shelf hardware equipment and software components. Four computation models were tested and the corresponding performance results were reported. The SAMD, MASD, MAMD, and the alternative MAMDA models were studied. Moreover, two computational modes, which depend on where the matching processes are performed (either on the application server(s) or the database server(s)), were experimented. Ten million data entries were queried, with each entry contains an identification number and six random numbers ranged from 1 to 49. The data query type can be found in many real-life applications, such as the lottery game and web searching, where the data can be searched in parallel and independently. The performance metrics discussed include the time to completion, speedup and efficiency. It is concluded that the MAMDA model can provide the best performance and efficiency among the four models studied. This study also contributes to the building of cluster system applications, through the following guidelines: 1. From the discussion presented in Section 4.1, by considering the speedup and efficiency simultaneously, the optimum number of database servers is ranged from 8 to 16 when building the SAMD type of systems. Moreover, when there is an only one single application server used in the system, the DBM computational mode is more suitable than the DBA mode. 2. When building the MAMD type of systems, the number of application servers and database servers does not play an important role when the DBM mode is used. On the other hand, when the DBA mode is chosen, the communication links among the servers are an important factor in the design. 3. The MASD type of systems is not recommended at all, as the single database server will be the system bottleneck. 4. When building the MAMDA type of systems, due to the high speedup and efficiency, the highest number of application servers and database servers can be supported.
References 1. 2. 3. 4. 5.
Buyya, R.: High Performance Cluster Computing: System and Architectures, vol. 1. Prentice Hall PTR, NJ (1999) Buyya, R.: High Performance Cluster Computing: Programming and Applications, vol. 2. Prentice Hall PTR, NJ (1999) Kopper, K.: The Linux Enterprise Cluster. No Starch Press (2005) Tanenbaum, A.S., Steen, M.V.: Distributed Systems Principles and Paradigms. PrenticeHall, Inc., Englewood Cliffs (2002) Morrison, R.S.: Cluster Computing - Architectures, Operating Systems, Parallel Processing & Programming Languages (2003)
DR: Divided Ring Leader Election Algorithm Mehdi Vojdani and Yaser Taj Islamic Azad University of Qazvin, Qazvin, Iran {mehdi_vojdani,yaser_taj81}@yahoo.com
Abstract. Extending distributed system require new strategy for management and maintenance. For managing distributed system we need one leader like other process in system. Problem is when leader like other process crashed. For solving these problems like these researchers has proposed a number of local based strategies that is each region try to do its work by itself and the results will be gathered in a distributed manner. Leader election is the process of determining a process as the manager of some task distributed among several processes (computers). We suppose like network topologies our distributed system topologies are token and star. We proposed new schemes and discussed about some aspects of them. We proposed divided algorithm in ring topology and we try to reduce latency in the broad networks optionally. Our algorithm
reduces the latency against messages but a bit because latency is more important than number of messages. At the end we see how using of n in Divided (n). Keywords: Distributed systems, Leader Election, coordinator, bully, ring algorithm and topology.
1 Introduction In distributed computing environment like human life environment we need manager or coordinator for maintenance the network for doing some job on all process. We call this computer or process as leader. Like human societies when manager can not work or maintenance well we need to change the leader. Leader election is the process of designating a single process as the organizer of some task distributed among several computers (nodes).In distributed systems, there are many network topologies like hypercube, meshes, ring, bus…etc. These topologies may be either the hardware processors, or the software processes embedded over the other hardware topology. This study will focus on ring processes topology where one process works as a leader and the others as none but at first we discussed on bully algorithm that it work in star network topology. We will propose new election algorithm to solve leader failure automatically in spite of the presence of one link failure. The proposed algorithm will be executed without user intervention. Two old election algorithms are bully and token ring algorithm. In this algorithm coordinator process crash can be detect by other process and other process must start coordinator election by notifying other process. In algorithm notifying and leader election are same. We discussed about main leader election algorithms and some of their aspects in the related work section A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 90–99, 2009. © Springer-Verlag Berlin Heidelberg 2009
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and then their improvements are explained. However our main centralization is on the ring algorithm. New scheme is proposed too in the sections 3 and 4. In the section 5 and comparisons are provided too. Reading this paper gives a good vision for designing a good algorithm in ring topologies.
2 Related Work 2.1 Bully Algorithm At first suppose one process like P[i] detects that the coordinator has crashed and now we require finding new coordinator for coordination operation in system. All of the processes have one process number. In bully algorithm for best choose is choosing biggest process number. P[i] after that follows this steps: 1) P[i] sends “ELECTION” message to all processes that have bigger number than P[i]. 2) Each process that is active P[j] where j>=i, will send a “OK” message to P[i]. 3) If P[i] has received even one “OK” message, it will know that it can not be the coordinator and P[j] send “ELECTION” to greater and it will repeat steps 1 to 3. 4) Finally one process that has bigger number than others and hasn’t received any “OK” message P[i] or P[j] didn’t, announce itself as new coordinator to all of the processes by “COORDINATOR” message. Suppose that we have n active processes in a distributed system and middle process with process number ⎣n / 2⎦ detects that coordinator has crashed. Assume that mn(i) is total number of messages that process p[i] sends (“ELECTION” message) and receives (“OK” message) after sending :
Fig. 1. Bully algorithm
Number of messages: mn(1) + mn(2) +…+ mn( ⎣n / 2⎦ - 1) + mn( ⎣n / 2⎦ ) + mn( ⎣n / 2⎦ + 1) + … + mn(n) = 0+0+…+0+ mn( ⎣n / 2⎦ ) + mn( ⎣n / 2⎦ + 1) + …+ mn(n) = ( ⎡n / 2⎤ + ⎡n / 2⎤ ) + (( ⎡n / 2⎤ -1) + ( ⎡n / 2⎤ -1)) +…+2 + 0
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≅ n + (n-2) + ……+ 0
=> O(n 2 )
Number of steps: 4 Latency in minimum: 3(when biggest find the crash) Latancey in maximum: n-1 Latency average: n/2 =>O(n) Improvement In the step b of this algorithm processes can send their numbers to p[i](instead of “OK” message) so in the step c, process P[i] can choose biggest number (considering received numbers) and announce it as coordinator by broadcasting the “COORDINAOR” message. So in the fist step of this algorithm p[i] will send an “ELECTION” message, then it will receive bigger numbers of active processes, then it will select biggest one and announce it as coordinator by sending a “COORDINATOR” message. Fig1 shows this work. Considering this steps and previous assumptions.
Number of messages: ⎡n / 2⎤ + ⎡n / 2⎤ +n ≅ 2n => O(n) Number of steps: 3 Latency is exactly: 3 => O(1) 2.2 Token Ring Algorithm
In token ring algorithm each process in the ring must save addresses (ring's table). In this algorithm, similar to the bully algorithm, each process has one process number. But we have one difference here. Suppose that process P[i] detects that coordinator has crashed and now it want to find new coordinator for coordination operation in the system by ring algorithm. This algorithm works as below: 1) Process P[i] sends one token with “ELECTION” title to the next process in the ring. (to P[i+1]). 2) If next process doesn’t reply, then process P will suppose that next process is down and will send “ELECTION” message to second next process in the ring (to P[i+2]). P[i] repeats this works until finds next process that is not in down status and has received the "ELECTION" message. Founded process repeats this work too, and this will go on till election message returns back to the process P[i]. each process when receives "ELECTION" message; before forwarding that, puts it's process number in that message. 3) When the "ELECTION" message returns back, then P[i] will choose the biggest process number as coordinator(between process numbers in the "election" message). then it wheels a “COORDINATOR” message in the ring to announce new coordinator. In this case, we have two round of "message passing" in the ring. First round is for "CRASH" and "ELECTION" massages and second round is for "COORDINATOR" message. Fig2 shows work of token ring algorithm. So we have 2 steps and the number of messages and average time are as below: Number of messages: 2*n =2n => O(n) Number of steps: 3 Latency: 2*n =2n => O(n)
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Fig. 2. Ring algorithm
Improvement Note that each process adds its number to the "ELECTION" message, so when number of processes increase (specially in the end of ring), overheard increases too. For solving this problem we edit this algorithm as each process adds its number to the "ELECTION" message as "biggest" only when it's number is bigger than "biggest" number in the message. In another word we can send only biggest one instead of all of the numbers. Now assume that more than one process detect that coordinator is crashed and send token in the ring. In this case we have additional overhead and even consistency may be refused. For solving this problem we can change algorithm as; when one of this processes (that has sent an "ELECTION" message), receives message that is sent from other ones it will follow this rules:
a) If the number of this process is bigger than the number of sender process, it will kill the message. b) If the number of this process is less than sender's number, it will let this message go round. In Table1 you can see comparison between two algorithms. Table 1. A comparison between Bully and Ring algorithm Algorithm Bully
Number of Message ≅ n(n+1)/4
Number of Steps 4
O( n 2 ) Extended Bully Token Ring
2n O(n) 2n O(n)
3 3
Latency n/2 O(n) 3 O(1) 2n O(n)
3 Divided Algorithm Assume that we just can forward messages clockwise. In the divided ring algorithm similar to the ring algorithm we have a ring, but this ring is divided into m multiple
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sub rings. We can divide the ring with n process to the d sub rings (d avg ( I ' )
where b x' , y = ⎨
' ⎩0 if i x, y ≤ avg ( I ' )
.
Step 4. Extract the verification key WEG' by
(13)
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WEG ' = B ' ⊕ K ,
(14)
⎧weg x' , y | weg 'x, y ∈ {0,1}, ⎫ ⎬. ⎩ 0 ≤ x < IW , 0 ≤ y < I H ⎭
where WEG ' = ⎨
Step 5. Divide the WEG' into G blocks. ⎧weg x' , y | weg x' , y ∈ {0,1}, 2 × W w × (t − 1) ≤ x ≤ 2 × W H × t − 1,⎫ ⎪⎪ ⎪⎪ Block ' t = ⎨ W H × (t − 1) ≤ y ≤ W H × t − 1, ⎬, ⎪ ⎪ 1 ≤ t ≤ T, 1 ≤ T ≤ G ⎩⎪ ⎭⎪
(15)
Block tp = Perm s2 ( Block t' ) −1 , 1 ≤ t ≤ T ,
(16)
where the value of T and the size of a block are the same as those defined in Eqs. (4) and (5). Perms2(.)-1 denotes the inverse function of Perms2(.) with seed s2. Step 6. Use the majority vote to decide whether WE’ is bit 1 or bit 0. WE'=MajorV( BlocktP ), 1
≦t≦T.
(17)
' , n | wem ' , n ∈ {0,1}, ⎧wem ⎫ ⎬, 0 < m < 2 × W , 0 ≤ n < W W H⎭ ⎩
here WE ' = ⎨
the MajorV function determines the maximum number of bit 0 and bit 1 of the same position of Block tP , 1 t T. For example, the number of bit 1 at position (1,1) of every block is 10, and the number of bit 0 at position (1,1) of every block is 22. After MajorV function, we1' ,1 is turned out to be bit 0.
≦≦
Step 7. Split the watermark bits and noise bits from WE' to get watermark bits. Step 8. Inverse We to form the watermark logo W' by permutation function with seed s1.
3 Experimental Results and Discussions 3.1 Experiment Results
The peak signal-to-noise ratio (PSNR) is used to evaluate the quality between an attacked image and the original image. After extracting the watermark, the normalized correlation coefficient (NC) [2] is computed. We use the Lena image (512×512 pixels, 8 bits/pixel) as the test image in our experiments. The size of the binary watermark logo is 64×64, and the value of T is 32. Fig. 1 shows the original Lena image and binary watermark. For attacking, we use the Stirmark benchmark [4] and PhotoImpact 11 software tools to simulate common image attacks.
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(b)
Fig. 1. (a) The original image of Lena of size 512 × 512. (b) The original binary watermark of size 64 × 64.
In the experiments, both geometric and nongeometric attacks are considered. Nongeometric attacks include JPEG compression, median filtering, Blurring, sharpening, and histogram equalization. The geometric attacks include rotation, scaling, Gaussian noise, print-photocopy-scan, and cropping. The experimental results show in Table 1 and the watermark logos can still be recognized clearly. In Table 2, we compare the proposed method to Chen et al.’s [1] and Lou et al.’s [2] methods to demonstrate the robustness of our method. In the experiment, the Lena image (512 × 512 pixels, 8 bits/pixel) is used. The watermarked image is attacked (by blurring, JPEG, Noise, sharpening, print-photocopy-scan, and scaling attacks) more Table 1. Normalized correlation coefficients (NC) upon geometric and nongeometric attacks
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seriously than that in Chen et al.’s and Lou et al’s methods; although our PSNRs are lesser than theirs, the value of NC under each attack is still 1. In other attacks (rotation, cropping, and cropping + scaling), all parameters are set to the same as those in Chen et al.’s method; that is, for the rotation attack, the image is rotated at 2°, for the cropping attack, the image is cropped by ¼, and for cropping +scaling attack, the image is scaled from 512 × 512 pixels to 560 × 560 pixels, then the edge area of the test image is cut to form the 512 × 512 test image. As you can see, the values of PSNRs of our method are quite closer to those in Chen et al.’s method; the value of NC under each attack is always higher than that of Chen et al.’s and Lou et al.’s methods. Note that all parameters of latter attacks such as rotation, cropping, and cropping + scaling are not described in [2]. For cropping attack, the image was cropped by 3/4, the PSNR for the remaining image is still greater than 5; we are curious about the parameters set by Lou et al’s method. Table 2. Comparison with Lou et al.’s[2] and Chen et al.’s [1] methods
3.2
Discussions
The proposed method satisfies the properties of the watermarking including blindness, security, invisibility, robustness, unambiguity and transparency. Since the original image is lossless, multiple logos can be handled [1]. The proposed method can also be applied to the color image. The watermark bits can be embedded based on the RGB color values of the image. Furthermore, the proposed method is based on the spatial domain; it can reduce the computation time in which the image in the spatial domain transforms to the frequency domain. Hence, the proposed method can be applied to the video stream.
4 Conclusion In this paper, copyright protection based on 1/T forward error correction for digital images is proposed and the watermarked image is lossless. Each feature value is generated by its corresponding gray level of the image; subsequently the feature value is XORed with the embedding bits. In the verification process, the watermark bits can be extracted by majority voting without either the original image or the watermark logo. The experimental results show that the proposed method is robust resisting common nongeometric attacks, and is also strong enough to resist the geometric attacks, while
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the retrieval watermark logo is still clearly recognizable. The watermarking scheme based on spatial domain is faster than that based on frequency domain since the step of transferring to frequency domain is not needed. In addition to copyright protection, the proposed method can also be applied to image authentication.
References [1] Chen, T.H., Horng, G., Lee, W.B.: A publicly verifiable copyright-proving scheme resistant to malicious attacks. IEEE Trans. Industrial Electron. 52(1), 327–334 (2005) [2] Lou, D.C., Tso, H.K., Liu, J.L.: Robust copyright protection scheme for digital images using the low-band characteristic. Optical Engineering 45(10), 107002–107006 (2006) [3] Haartsen, J.: Bluetooth-The universal radio interface for ad hoc wireless connectivity. Ericsson Review, 110–117 (1998) [4] Petitcolas, F.A.P.: Weakness of existing watermark scheme (1997), http://www.petitcolas.net/fabien/watermarking/stirmark/ index.html
Hierarchical Time-Bound Key Management for Mobile Agents Yu-Fang Chung1, Tzer-Shyong Chen2, Chia-Chao Ho3, Yi-Hsuan Yeh2, and Hsiu-Chia Ko3 1 Department of Electrical Engineering, Tung Hai University Department of Information Management, Tung Hai University 3 Department of Information Management, Chaoyang University of Technology
[email protected] 2
Abstract. The core competencies that a mobile agent possesses are freeroaming between different environment, and autonomous environment detection and adaptation while executing the tasks that are assigned by the users. Because of these competencies, the concept of mobile agent is widely used in many different fields, such as Internet business, wireless communication, and information security technologies and etc. In 1983, Akl and Taylor [1] suggested the concept of superkey to resolve the key management issues faced by the mobile agent. Later in 1998, Volker and Mehrdad [2] proposed a hierarchical mobile agent model for access control. The proposed paper would be based upon the studies of superkey and a hierarchical mobile agent model with addition of elliptic curve cryptosystem (ECC). ECC enhances the mobile agent model, because of shorter key length and higher efficiency on encryption and decryption. All the related works would be presented in Section 2. After the background of our proposal is well described, we would aim to resolve the key management issue created by Volker and Mehrdad’s model. Time-bound key management is considered to be a good solution, because it can make the key management in the existing mobile agent model more convenient by distributing the keys that can only be used in a limited period of time. Keywords: Mobile Agent, Key Management, Access Control, Elliptic Curve Cryptosystem, Time-bound Key Management.
1 Introduction With the popularity of the Internet and widespread use of personal computers in our daily life, the public becomes more aware of the issues on how the data is being securely transmitted. In this paper, mobile agent, which possesses autonomous environment detection and adaptation, is applied and integrated with the hierarchical structure. With the unique characteristic of the hierarchical structure, users will have different encryption keys according to their access rights. The encryption key can ensure that the data will be securely transmitted upon requests. However, when the users under the hierarchical structure decide to log off from the system or switch A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 242–253, 2009. © Springer-Verlag Berlin Heidelberg 2009
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the authority level for access. The system needs to void the right of the previously assigned key so as to avoid the key being illegally used to access the data. But, this could cause the system needs to delicate a huge amount of resources for managing these encryption keys. To resolve the issue that is stated above, the paper approaches to apply time-bound key management scheme with the concept associated with mobile agent structure by making the encryption key only valid to be used in the limit period of time. In other words, the users cannot access the data, if the key is no longer valid. Because of this characteristic, the system does not require updating keys continuously. The proposed method aims to enhance the key management of mobile agent structure and make it more efficient. There are many potential risks for accessing the data; hence, the cryptography technologies are needed for protecting the data during the transmission. This paper applies the elliptic curve cryptosystem to generate the keys. The main characteristic of the ECC is that, on the same security level, the key length is shorter and it can provide quicker processing speed and the security also surpasses other public key cryptosystem such as RSA. For instance, the key size of 160 bits in ECC is as secure as the key size of 1024 bits in RSA. Because of the elliptic curve logarithm problem (ECDLP), ECC is able to generate keys with more complexity and greater protection. In addition, the related research of the mobile agent security development is also very important as a part of our proposal in order to understand how to protect the system from being attacked by some malicious and unauthorized users. When the mobile agents are executing their tasks on the network, they may communicate and exchange information with each other. The security issue could rise when there are insecure contacts between the mobile agents [3, 4]. There are four examples of the security threats which the mobile agent may face: [5]: (1) (2) (3) (4)
Unauthorized partner to access the information of the server. The server encounters attack by the other malicious agents. The agent encounters attack by the other agents. The agent encounters attack by the other malicious server.
To avoid the above four security threats, this paper applies Elliptic curve cryptography to enhance the security of the mobile agent and also keep it away from the malicious attacks. This paper can be divided into five sections. Section 1 is the introduction of the research content and structure. Section 2 introduces the concept and the advantage of the mobile agent, then the mathematical background of the elliptic curve cryptosystem and time-bound key management. At the latter part of Section 2, the key management and access control on the mobile agent suggested by Volker and Mehrdad [2] is introduced. In Section 3, the mechanism we proposed in this paper is presented. Furthermore, a security analysis on the proposed mechanism is explained in Section 4. At last, the conclusion of the researched results is given in Section 5. The paper expects bringing more positive improvements on the security mechanism and key management of the mobile agent.
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2 The Related Research 2.1 Mobile Agent Mobile agent is the software program that can achieve autonomous execution and operate on an asynchronous network while migrating from the local host to another remote host in a network. In brief, the mobile agent can immediately execute its task after it receives the request from the user. It will reflect the actual situation during the migration and send the result back to the user who makes the request. The migration is not only transferring the agent codes and the responded result, but the status of the program is also transferred. In addition, the mobile agent is capable of analyzing, determining, and executing by it even if the connection with the target server is not constant. What has been described above indicates that the agent program is designed to have the functions of self-management, self-control, and self-resolution, because it can control its behaviors and status and will not be interfere by other systems and users. Technologies on the field of mobile communication and wireless network leaped in the recent years. This change facilitates the mobile agent to become commonly used on programming. Today we not only use mobile agents for data inquiry at a remote environment and distributed computation, but it is also used in network management and workflow system. Advantages of mobile agent are as follows [6]: (1) Reducing network load: a normal distributed system could produce huge traffic flows on the network, because it demands to have multiparty communication protocols to complete its tasks. In contrast, the mobile agent doesn’t require having a constant connection with the target server, because it allows the user to package the commands and send it to the target server. And then, the agent will communicate and interact with the connected server and turn the result back to the user. This would decrease the network load, because this would lower the numbers of connection between the source and the target server. (2) Decreasing network delay time: Mobile agent can transfer the task to the remote server and interact directly with the server. This could replace the previous method of having the constant connection between the source and the target server. Thus, the network delay time can be minimized. (3) Packaging protocol: when using traditional distributed systems, a fixed protocol is needed for data exchange. However, due to heterogeneity of operating systems, each server must set up its own protocol. When mobile agent is migrating to a remote server, its communication protocol can be packaged to migrate and re-establish the situated protocol for a network connection. This resolves the connection issue, which could be caused by the data migration. (4) Adapting to a dynamic environment: Mobile agent is capable of moving around different network environment; therefore, it is able to detect the surrounding environment and autonomously optimize the settings according to its situated environment. (5) Performing non-simultaneous and spontaneous executions: when the cost of internet connection is high and it is not suitable to have a constant connection, mobile agent is helpful to complete the tasks and return the executed result
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back in a non-simultaneous manner. This can reduce the connection time and perform non-simultaneous and spontaneous executions. (6) Innate heterogeneity: hardware or software on the internet environment is heterogeneous. Mobile agent can be autonomous to integrate with the connected system without being limited by the issue of heterogeneity. (7) Stability and fault tolerance: Mobile agent can also be used to manage exceptions and this makes it to have a good stability and higher level of fault tolerance. (8) Expandability: Mobile agent structure allows to have greater expandability and flexibility between the source and the target server. 2.2 Elliptic Curve Cryptosystem Elliptic curves have been studied thoroughly in the last 150 years and a huge amount of papers have published on this subject. Elliptic curve cryptosystem (ECC) was initially proposed by Victor Miller [7] and Neal Kblitz [8] in 1985 to enhance public key cryptosystem. It is a good method for the key management of applications that have low system memory and low network bandwidth. The degree of security for ECC relies upon how difficult k is given to kP and P. This can also be defined as the elliptic curve logarithm problem. In order to ensure the difficulty of ECDLP in a certain level, it is critical to pick an appropriate base point P that should have a large order [9]. Elliptic curves over finite fields provide an exhaustible supply of finite abelian groups that are compliant to computation because of their prolific structures. Two families of elliptic curves, prime curves defined over Zp and binary curves constructed over GF(2n), are used in cryptographic applications. In the finite field Zp, an elliptic curve equation is showed as E: y2 = x3 + ax + b, where (a, b) ∈ Zp and 4a3 + 27b2 ≠ 0 (mod p), defined modulo a prime p, and p should be bigger than 3. The condition 4a3 + 27b2 mod p ≠ 0 is necessary to ensure that y2 = x3 + ax + b (mod p) has no repeated factors, which means that a finite abelian group can be defined based on the set Ep (a, b) [10]. The set of elliptic curve points forms a commutative finite group under the rules of addition operation, and it must satisfy the rules below [11, 12]: (1) Sum is O of three points on an elliptic curve lie on a straight line. (2) P+O = P, O serves as the additive identity. Thus O = O, for any point P is on the elliptic curve. (3) If there are two points P1 = (x, y) and P2 = (x, −y), P1+P2=O, where P2 is the negative point of P1. (4) Add two points P and Q, and draw a straight line between them then find the third point of intersection R. Note that P + Q + R = O so P + Q = – R = R. (5) Multiplication by an integer is defined by repeated addition, for example, 2P= P+P. For any two points P = (xp, yp) and Q = (xq, yq) over Ep(a, b), the elliptic curve addition operation, which is denoted as P + Q = R = (xr, yr), satisfies the following rules.
xr = (λ2 − x p − xq ) mod p y r = (λ ( x p − x r ) − y p ) mod p
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Where λ is given as shown below.
⎧⎛ y q − y p ⎞ ⎟ mod p, if P ≠ Q ⎪⎜⎜ ⎪⎝ x q − x p ⎟⎠ λ=⎨ 2 ⎪ ⎛⎜ 3x p + a ⎞⎟ mod p, if P = Q ⎪⎜ 2 y p ⎟ ⎠ ⎩⎝ As we can see there is a point multiplication on the elliptic curve, the point multiplication does not really mean we multiply one point by another to get the coordinate value. By using the equation, Q= k×P, we can obtain a point on the curve. By assuming k is a natural number and Q and P are points which are on E, Q can be defined as P+P+…+P in k times. The security of EEC in the finite field is based on double-andadd algorithm, Q= k×P. Therefore, it is difficult to compute the result of k, even though the numbers of Q and P are known. This can be understood as the puzzle created by Elliptic Curve Cryptography and is denoted as elliptic curve discrete logarithm problem (ECDLP) [13]. 2.3 Overview of Time-Bound Hierarchical Key Assignment Scheme With the purpose of solving the collusion attach that is posted by Chien’s [14] scheme, Bertion et al in 2008 [15] proposed time-bound hierarchical key assignment scheme. It can be divided into four phases: (1) Initialization phase: In this phase, all system parameters must be initialized. After the system class key Ki is generated, the vendor, which is a system administrator, would select an elliptic curve E over a finite field to solve ECDLP. And then, the vendor computes other system parameters separately. The class keys Ki=giPi for the target class is created. Next, two random integers, a and b, are chosen by the vendor to build up a harsh message authentication code (HMAC). When the relationship of Cj ≤ Ci is denoted, the point Ri,j on the elliptic curve must be published on an authentication board and other parameters remain secret. (2) Encrypting Key Generation phase: Temporal encryption class keys Ki,t would be generated in this phase. The encryption key itself is only permitted to use the system class key Ki in a limited period of time. (3) User subscription phase: The important information that is issued to the subscribers is stored in a tamper-resistant device. When receiving a subscription request, an appropriate access control policy acpi would continue its search until everything is correctly matched. Finally, the class key Ki is given to the subscriber through a secure channel. The vendor would provide a tamper-resistant device that has a securely embedded clock to the subscriber. (4) Decrypting key derivation phase: When the subscriber who is associated with class Ci would like to decrypt the protected data in class Cj, which matches with the relationship of Cj ≤ Ci, the subscriber’s tamper-resistant device would reconstruct a temporal key for access.
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2.4 Overview of Volker and Mehrdad’s Scheme Volker and Mehrdad proposed a security scheme [2], which is based upon a tree structure, to design a secure environment for mobile agents. The proposed scheme is shown as in Fig. 1. The mobile agent structure can be broken into two main branches: static and mutable.
Fig. 1. Framework of mobile agent based on tree structure
(1) Static branch: the static branch of the agent stores all of the permanent information that would not change during the agent’s lifetime. The information includes security policy, group classification, certificates, and access control keys. Moreover, the digital signature is required in order to prevent the information being tampered by malicious users. (2) Mutable branch: this branch sets to keep all modified information that is gathered by a mobile agent. For instance, the status or information collected by the agent could be modified by the visited hosts on the network. Fig. 2 is used to illustrate Volker and Mehrdad’s agent structure. This figure simply shows the process of how the static branch functions. On the left side of it, there are four zipped files. The agent.zip is not encrypted, but the rest of files use DK1, DK2, and DK3 correspondingly for encryption. On the right side, the nodes of S1, S2, and S3 each represent different servers under access control keys. If these servers are authorized to access the specified files, the decryption keys will be copied to the
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Fig. 2. An example of Volker and Mehrdad’s access control and key management
corresponding server folders. For example, S1 is granted to access all the encrypted files; thus, the keys (DK1/DK2/DK3) will be copied to the folder of S1. Based upon the figure’s decryption, S2 is only allowed to access two out of three encrypted files, which are retrieval.zip and control.zip. The folder of S2 will only have the keys of DK2 and DK3. Finally, S3 is permitted to access the first encrypted zipped file, and then it will just have k1 for accessing the designated file. Volker and Mehrdad’s scheme has the issues yet to be discussed: (1) A large amount of storage space required inside the mobile agent for storing the generated keys: Upon this scheme, a decryption key can be duplicated to different servers. As shown in Fig. 2, S1 and S2 both have DK2. Consequently, DK2 would be continuously duplicated as the number of server increases. This causes the waste of the storage space and makes the mobile agent become cumbersome. (2) Excessive computation on public key generation: Because the decryption keys are repetitively stored under the folder of static/sctx/acl/, the mobile agent user must use more resource and time to compute the public key encryption in order to ensure the security of the folder.
3 Research Method Akl and Taylor recommended an access control scheme [1], which is based upon a hierarchical structure model, in 1983. They proposed that each user would be
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assigned to a security group, which can be represented as C = {C1, C2, C3, …Cm}. On the basis of a hierarchical structure, this sort of access relationship between one security group and another can be denoted by Ci ≥ Cj. For instance, group of Ci is at a higher level of the hierarchy than Cj when the relationship of Ci ≥ Cj is declared. This means user of Ci has a greater authority to access the information that is only available to Cj. If the hierarchy network becomes larger, Ci would have to store a lot of decryption keys that are holded by the groups at a lower hierarchy. Fig. 3 helps to understand how leaf nodes of DKj function in a hierarchical structure. DKj is the decryption key for encrypted files; Si is the internal node and also represents as a host. And Ni means the superkey that is possessed by the host. When Si has permission to access some encrypted files, it can obtain decryption keys from their corresponding leaf nodes. In Fig. 3, the root node, S1, has the superkey of N1 that has authority of accessing all the encrypted files. In case of S3, it is only authorized to obtain the decryption keys of DK2, DK3 and DK4.
Fig. 3. Structure of decryption keys for mobile agent
Before the mobile agent is linked to the Internet to execute its assignments, user of a mobile agent must decide which host would be visit by the mobile agent and determine the kind of information can be accessed on the visited host. Next, the user will randomly select DKj to encrypt the confidential file. Afterward, he will construct an accessible network in relation to his access policy and gives a heterogeneous superkey to every internal node. This superkey is encrypted by the public key of the host. The host can use its private key to decrypt the superkey when the mobile agent visited it. After the superkey is decrypted, the confidential file can be retrieved. In order to make access control on a hierarchical structure more effectively, the concept of timebound control will be introduced. The main point is to set up a scheme that allows the user who can only exercise the decryption keys at a predetermined time lot. In the
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incorrect time lot, the decryption key holder will be not able to use the key to access the file. Mobile agent can construct the accessible network through the following steps. Step 1
:Determined an elliptic curve E (a, b), and it can be represented as y = x + 2
3
p
3
2
ax + b (mod p). In this case, a and b should satisfy 4a + 27b ≠ 0 (mod p) and p is a large prime number. Step 2 Chose a base point G = (x, y) on Ep (a, b). Step 3 The user of the mobile agent chooses a superkey Ni, which is unrepeatable, to the corresponded internal nodes of each host. Step 4 Set parameters Pi and Pj which represents Ni and Nj, respectively, as below.
: : :
Step 5
Pi = N iG Pj = N j G
(1) (2)
:Distributed a specific DK to each leaf node as a decryption key to encrypt j
or decrypt the confidential file.
3.1 Encryption Phase Construct a polynomial FDK j (x ) , which must include the public parameters, of each leaf node and proclaim
FDK j (x) publically.
FDK j ( x) =
∏[ x − ( N P )
j i X
] + DK j
(3)
S j ≤Si
3.2 Decryption Phase A certain host Si tries to access its authorized leaf node DKj, and because Sj ≤ Si, the mobile agent can derive the decryption DKj key by using superkey Ni and the public parameter Pj host Si, as below.
FDK j (( N i Pj ) X ) =
∏[( N P ) i
j X
− ( N j Pi ) X ] + DK j
(4)
S j ≤ Si
3.3 Time-Bound Phase (1) Set [0, Z] as the interval of the system life. (2) Set ta, tb and t, which represent the service for the user between the time of ta and tb, and t is the present time of the user. The relation can be represented as 0 ≤ ta ≤ t ≤ tb ≤ Z. (3) Choose integers p, q, HMAC randomly. HMAC is consisted of the private key fixed by the system and the one-way hash function. (4) An one-way hash function should satisfy the conditions below: I. Any length of the file message can produce a fixed length H(x). II. Give y randomly without finding the correspondent x h(x) = y, representing one-way.
:
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III. Give a message digest x, and make it hard to find another x’, resulting H(x)=H(x’). (5) Choose integers p and q randomly and hash function, hash function and DKj using exclusive-OR to produce the time-bound encrypt key K t , DK j .
K t , DK j = H K ( H t ( p) ⊕ H Z − t (q) ⊕ DK j )
(5)
(6) Use the formula:
Applied
H t ( p ) = H t −ta ( H ta ( p ))
(6)
H Z −t ( q) = H tb−t ( H Z −tb ( q))
(7)
H t ( p) and H Z −t (q ) into H K again to verify if the decryption key
K t , DK j is the same.
K t , DK j = H K ( H t − ta ( H ta ( p)) ⊕ H tb − t ( H Z −tb (q)) ⊕ DK j )
(8)
4 Security Analysis In this section, a security analysis is performed to examine whether the proposed scheme is secure or not for practical applications. The analysis aims is focused upon four types of attack that may impact on the system security. (1) Reverse Attack Reverse attack can be defined as follows. When the relationship of Sm ≤ Si exists between the internal nodes Sm and Si or they are at the same hierarchical level, the host Sm could try using its superkey Nm to derive Si’s superkey Ni with the intention of stealing the data only accessible by Si. On a disjoint-entity hierarchy, any two internal nodes can be seen as the independent units. For example, Sm is not authorized to access the data only available to Si. Because the function Pi=NiG with ECDLP is not easy to be solved, Sm’s reverse attack would fail. Therefore, the lower level host can never derive the superkey of the upper level one if it does not have sufficient information to answer the equation. (2) Collusion Attack Collusion attack means that the subordinate hosts work together to steal the information only accessible by the upper-level host in an accessible network. In the case of Fig. 3, the hosts S5 and S6 decides to work against S1 by using the obtained information to steal S1’s superkey. However, this kind of attack would fail, because ECDLP would make the superkey difficult to become decoded. Another type of collusion attack is to have upper-level hosts collude to steal the information from the host, which is not subordinated to them. However, the attack would not succeed, because the upper-level host information is not embedded in the structure of leaf nodes that is only accessible to lower-level host.
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(3) External Collective Attack The intruder attempts obtaining the superkey of the internal node to steal or modifying the protected data by hacking into the published system parameters. This is identified as external collective attack. However, it is impossible for the intruder to succeed, because ECC-based structure could prevent it from happening. (4) Equation Breaking Attack If a host attempts to steal the decryption key that is commonly owned by other servers, it can be accomplished by hacking into the published equation F. This is called equation breaking attack. For instance, the hosts Si and Sj both have access right to DKj. It is possible that the host Si could hack into the equation of FDK j ( x ) to obtain Sj’s superkey Nj.
5 Conclusion Mobile agent is to be in the ascendant in today’s advanced internet environment. Let mobile agent use network resources well, and it will be helpful to improve the organizations more efficient and reduce their costs. However, security problems and threats on mobile agent is also a challenging research subject. To take steps to minimize the security problems is a main purpose for mobile agent. Therefore, we need a complete mobile agent security system structure. In this paper, the security needs and threats for the mobile agent have been identified. Moreover, the security schemes that are used in mobile agent architecture and other related studies are applied to understand what can be done to make the key management and access control more efficient and convenient for the mobile agent. By utilizing elliptic curve cryptosystem and time-bound key management scheme, the mobile agent can become efficient by means of having keys only be used within a limited period of time, less space needed for key storage, and less computation used for key generation. Finally, the conclusion hinges on the security analysis we conducted. The result shows that the proposed scheme is feasible and accountable. Thus, it is competent on meeting the requirement for protecting the transmitted data on the mobile agent platform.
Acknowledgement This work was supported partially by National Science Council of Republic of China under Grants NSC 97-2221-E-029-015.
References 1. Akl, S.G., Taylor, P.D.: Cryptographic solution to a problem of access control in a hierarchy. ACM Transactions on Computer Systems 1(3), 239–248 (1983) 2. Volker, R., Mehrdad, J.S.: Access control and key management for mobile agents. Computer Graphics 22(4), 457–461 (1998)
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3. Karmouch, A.: Mobile Software Agents for Telecommunications, Guest Editorial. IEEE Communications Magazine 36(7), 24–25 (1998) 4. Lin, I.C., Ou, H.H., Hwang, M.S.: Efficient access control and key management schemes for mobile agents. Computer Standards & Interfaces 26(5), 423–433 (2004) 5. Hohl, F.: A model of attacks malicious hosts against mobile agents. In: Proceedings of the 4th Workshop on Mobile Object Systems: Secure Internet Mobile Computations, Brussels, Belgium, pp. 105–120 (1998) 6. Lange, D.B., Oshima, M.: Programming and Deploying Java Mobile Agents with Aglets. Addison-Wesley Press, Massachusetts (1998) 7. Miller, V.S.: Use of Elliptic Curves in Cryptography. In: Williams, H.C. (ed.) CRYPTO 1985. LNCS, vol. 218, pp. 417–426. Springer, Heidelberg (1986) 8. Koblitz, N.: Elliptic Curve Cryptosystems. Mathematics of Computation 48(177), 203–209 (1987) 9. Aydin, M.A., Aydin, G.Z.: A Survey of Elliptic Curve Cryptography 6(2), 211–221 (2006) 10. Huang, K.H., Chung, Y.F., Liu, C.H., Lai, F., Chen, T.S.: Efficient migration for mobile computing in distributed networks,Computer Standards & Interfaces (2007) (in press) 11. Shieh, C.W.: An Efficient Design Of Elliptic Curve Cryptography Processor, Master’s Thesis, Tatung University, Taipei (2006) 12. Wu, S.T.: Authentication and Group Secure Communications Using Elliptic Curve Cryptography, Doctoral Dissertation, National Taiwan University of Science and Technology, Taipei (2005) 13. Guan, D.J., Jen, L.h.: Study and Implementation of Elliptic Curve Cryptosystem, Master’s Thesis, National Sun Yat-sen University of Technology, Kaohsiung (2005) 14. Chien, H.Y.: Efficient Time-Bound Hierarchical Key Assignment Scheme. IEEE Trans. Knowledge and Data Eng. 16(10), 1301–1304 (2004) 15. Bertino, E., Shang, N., Wagstaff, S.S.: An Efficient Time-Bound Hierarchical Key Management Scheme for Secure Broadcasting. IEEE Trans. Actions on Dependable and Secure Computing 5(2), 65–70 (2008)
Key Tree and Chinese Remainder Theorem Based Group Key Distribution Scheme Jie Zhou and Yong-hao Ou School of Computer Science & Engineering, South China University of Technology, Guangzhou Higher Education Mega Centre, Panyu District, Guangzhou, 510006, P.R. China
Abstract. A group key distribution scheme based on static key tree structure and the Chinese Remainder Theorem (KTCRT-GKD) is proposed. It deal with the scenario of a pre-defined static prospective user set U containing all potential customs of multicast services and concentrate on the stateless receiver case. Given a privileged group member set G ⊆ U consisting of authorized users in a multicast session, a set of subtrees of the user tree whose leaves just host all the privileged group members is called group member subtrees. We design an algorithm to compute the root IDs of group member subtrees. The key server uses the root keys of the group member subtrees and the Chinese Remainder Theorem to distribute a group key. It can reduce the key server’s computation complexity for each group key distribution. Especially, an interesting feature is that, when the size of group members exceeds a certain number, the computing time of the key server will decrease with the increase of the size of the group members. Keywords: Group Key Distribution Scheme, Key tree, Group member subtree, root ID algorithm, Chinese Remainder Theorem.
1 Introduction Multicast communication which can reduces sender-processing overhead and network bandwidth usage is becoming the basis for a growing number of group-oriented applications, such as video conferencing, interactive group games, video on demand, TV over Internet, e-learning, software updates, database replication and broadcasting stock quotes[1,2]. Ensuring the confidentiality of multicast contents is an important problem for many group-oriented applications. The privacy of a multicast communication session is usually ensured using cryptographic mechanism. All the authorized group members in a multicast group share a common key, called group key, to encrypt and decrypt messages which communicate among group members. Group membership might be dynamic in many applications, i.e., some new members are authorized to join a new multicast session while some old members should be excluded. The group key has to be updated and redistributed securely to all authorized members whenever there is a change in the membership in order to ensure both forward and backward secrecy. Forward secrecy means that an excluded member cannot obtain information about future group communication and backward secrecy means that a joining member A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 254–265, 2009. © Springer-Verlag Berlin Heidelberg 2009
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cannot obtain information about past group communication. An efficient and scalable way for distributing a group key to the eligible members is crucial to multicast communication confidentiality[1,2,3,4,5]. For many group-oriented applications system, such as video conferencing system, e-learning system, database replication system or video on demand system, one can pre-defined a static prospective user set U containing all potential customs of multicast services. The group member set in a multicast session is a subset of privileged users of U . Throughout we differentiate group members from users: the user granted access to a multicast session become a group member. In this paper we focus on group key management and distribution methods. The infrastructure of our model involves a key server and a pre-defined static prospective user set U = {U1 ,U 2 ," ,U n } , where n = d h , and d and h are nonnegative integers. The key server assigns each user a user ID from the set {1, 2," , n} . For user U i , the subscript indicates its user ID. We concentrate on the stateless receiver case, where the users in U are given a distinct key set which does not change through the lifetime of the system. We propose a group key distribution scheme based on the static key tree structure and the Chinese Remainder Theorem (KTCRT-GKD). The result of the comparison analysis shows that our scheme can reduce the key server’s computation complexity for each group key distribution. Especially, an interesting feature of our scheme is that, when the size of group members exceeds a certain number, the computing time of the key server and communication overhead will decrease with the increase of the size of group members. The rest of this paper is organized as follows. Section 2 provides a brief review of related work. Section 3 defines the concept of user tree, group number subtree and group member subset, and describes the root ID algorithm. Section 4 describes our group key distribution scheme using key tree and Chinese remainder theorem. Security and performance analysis are given in Section 5. Section 6 summarizes our conclusions.
2 Related Work The group key distribution problem has been studied extensively in the larger context of key management for secure group communications, and a variety of group key management protocols have been proposed[1,2]. Among them are centralized group key management protocols based on certain hierarchical structure. The characteristic of these kinds of schemes is that a key server undertakes all the key management tasks. Namely, it is responsible for generating, distributing and updating the group key [6,7,9,10]. The most common approach for centralized group key management is Logical Key Hierarchy (LKH) (or Key Graph) which was independently discovered by Wong et al.[6] and Wallner et al.[7] and has been an inspiration for many subsequent works[1, 2, 11, 12, 13] . The general LKH scheme is a tree-based group key management algorithm. The key server maintains a tree of keys, which is called LKH tree. The key held by the root of the LKH tree is the group key. While the other nodes of the LKH tree hold key
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encryption keys (KEKs). The leaves of the tree correspond to group members and each leaf holds a KEK associated with that one member. Each member receives from the key server and maintains a copy of the KEKs and the group key corresponding to each node in the path from its leaf to the root. When a member joins the group, the key server needs to change every key corresponding to each node in the path from the new member’s leaf to the root, and when a member leaves the group, the key server changes the keys that the leaving member knows. A member which have left rejoin the group must be given new KEKs different from the formers. The cost of updating the keys is proportional to the height of the node in the key tree to be added or deleted. Therefore, to reduce the group key management cost it is need to reduce the average height of a node to be added or deleted, which means a group key management algorithm based on LKH scheme should address the issue of key tree balancing. Several papers have dealt with LKH tree-balancing techniques [4,8]. For a group of n members, balanced key tree based schemes have a communication complexity of O(logn), and storage complexity of O(n) for the key server and O(logn) for each group member. The overhead of balancing the key tree whenever there is a change in the membership also can not be ignored. In [14], the authors introduce two centralized group key management protocols based on the Chinese Remainder Theorem(Chinese Remaindering Group Key (CRGK) and Fast Chinese Remaindering Group Key (FCRGK)). By shifting more computing load onto the key server, they optimize the number of broadcast message for distributing the group key, user-side key computation and number of key storages. The protocols require the key server to compute the solution of the Chinese Remainder Theorem and broadcast one message for distributing the group key and each group member to compute only one modulo arithmetic and one XOR operation for each key update and store only two keys all the time. With the advantage on key updating broadcasting message number, user key computation, user key storage, the protocols require more computation power from the key server. In 1988, Lu, et al.[15, 16] proposed a group key distribution system based on the Diffie and Hellman’s public key distribution system and the Lagrange interpolating polynomial. Each time when there is a change in the membership, a Lagrange interpolating polynomial of degree n (the number of group members) has to be constructed by a sponsor of the multicast communication using the group key chosen by the sponsor randomly and the public keys of group members. Every group member must evaluate the Lagrange interpolating polynomial using its private key to obtain the new group key. The disadvantage of it is the computation complexity of sponsor and group members for distributing group keys. Broadcast encryption which was first considered in [17] and, subsequently, formally defined and studied in [18] is the cryptographic problem of enabling a center to distribute keys and broadcast a message in a secure way over an insecure channel to an arbitrary subset of privileged users in a pre-defined prospective user set. It can be actually viewed as revocation schemes[19,20] and one of the most challenging settings for broadcast encryption schemes is that of stateless receivers, where each user is given a fixed set of keys which cannot be updated through the lifetime of the system. One of the major problems in broadcast encryption is key distribution[21]. The group key distribution schemes concerning broadcast encryption assume a static user set U and focus on efficient methods of enabling an authorized subgroup of U to compute a
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shared key. Various broadcast encryption key distribution schemes have been designed[19-22]. The computational and communication overhead introduced by these schemes are proportional to the number of privileged users. Obviously, when the number of entitled users is large, these methods yield large computation and communication overhead.
3 Group Member Subtree 3.1 User Tree
We first introduce some concepts. A complete d-ary tree is a rooted tree in which all leaves have same depth and all internal nodes have d children. The total number of nodes of a complete d-ary tree is 1 + d + " + d h = ( d h + 1 − 1) /( d − 1) and the number of leaves is d h , where d and h are nonnegative integers and h is the height of the tree. In the case of h=0, a complete d-ary tree becomes a trivial tree consisting of a single node. Given a complete d-ary tree T, the subtree T ′ generated by a node v of T and all its descendants (if exist) is said to be a complete d-ary subtree rooted at v. Clearly T ′ is also a complete d-ary tree. Let T be a complete d-ary tree with n leaves, where n = d h . To uniquely identify each key associated with a node, the key server assigns a node ID to each node. The assignment of the node ID is based on top-down and left-right order with increment of one. The root has the lowest node ID, which is 0, and the ith leaf from the left has node ID d + " + d h − 1 + i , i = 1, 2 , " , n . The key server associates each user of a prospective user set U = {U 1 , U 2 , " , U n } with a leaf of T. In this paper, we require that user U i with user ID i is hosted by the leaf d + " + d h − 1 + i , i = 1 , 2 , " , n . We call such a tree T a user tree. Figure 1 shows an example of a user tree with n = 8 leaves and d=2, l=3.
Fig. 1. A user tree
3.2 Group Member Subtree and Group Member Subset
Consider a complete d-ary tree T, let P = n h n h −1 " n1 n 0 is a path of T from a leaf nh to the root n0 , where ni ( i = 0,1, " , h ) is node ID and n0
= 0 . Removing the
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root 0 and all its incident edges from T , we are left with d complete d-ary subtrees, and the root of one of them, say T1 , is n1 . Farther, if n1 isn’t a leaf of T , then removing the node n1 and all its incident edges from T1 yields new d complete d-ary subtrees of T . Continue this process until all the nodes of P are removed, the remaining connected components are all complete d-ary subtrees of T . Applying the above process to multiple paths, we have the following property: Property. Let T be a complete d-ary tree. Remove the nodes on paths from some leaves to the root and all the incident edges from T, the remaining connected components consist of a set of complete d-ary subtrees of T. Let G = {U i1 , U i2 ," , U im } be a group member set consisting of authorized (e.g., paid)
users of U in a multicast session. The users of {U 1 , U 2 , " , U n } − {U i1 , U i2 , " , U im } are regarded as revoked. The above property implies that, by removing all the nodes on the paths from the leaves hosting the revoked users to the root from the user tree T , the remaining connected components are complete d-ary subtrees of T whose leaves just host all the group members of G . In other words, given a group member set G = {U i1 , U i2 ," , U im } , there exists a minimum node set N of the user tree T such that any leaf hosting a group member of G is a leaf of a complete d-ary subtree rooted at one node of N and each user hosted by a leaf of one of this kinds of subtrees is a member of G . We call each such complete d-ary subtree a group member subtree. The set of group members hosted by all the leaves of a group member subtree is called a group member subset. For example, in Figure 1, the set of group members is {U 1 , U 2 , U 3 , U 4 , U 5 , U 8 } and the group member subtrees are those consist of all the shadow nodes. There are three group member subtrees and the root set is N = {1,1 1,1 4} . The group member subtree rooted at node 1 corresponding the group member subset {U 1 , U 2 , U 3 , U 4 } . 3.3 Root ID Algorithm
In the subsection we present an algorithm for finding the root IDs of group member subtrees of a given group member set in the user tree T. The algorithm is called root ID algorithm. Given a group member set G = {U i1 , U i2 , " , U im } ⊂ U , the key server computes the leaf IDs hosting the group members by their IDs. Then he can use the root ID algorithm to compute all the root IDs of group member subtrees. In the Algorithm, the node IDs examined by the algorithm are stored in a single-linked list Node. The nodes of Node are initialized with the leaf IDs hosting the group members by increasing order. The root IDs of group member subtrees are stored in a single-linked list Forest.
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root ID algorithm // the user tree T is represented as The Parent Pointer Implementation and each node of T contains the node ID and a reference pointing to its parent node. Forest: single-linked list, the data field of each node stores the root ID of a group member subtree. The list is initialized to be empty; Node: single-linked list, the data field of each node stores the node ID of user tree T. The list is initialized with the leaf IDs hosting the group members by increasing order; d: the number of children of inner node in the user tree; While ( the number of nodes of Node > = d ) do Begin find the parent node IDs of nodes of T corresponding to the first d nodes from the head of Node; if (the parent node IDs are the same, say I ) then Begin add a node onto the end of Node and set the data field to be I; delete the first d nodes of Node and release the space; End Else Begin add a new node onto the end of Forest and set the data field to be the value of the first node data field of Node; delete the first node of Node, and release the space; End End add as many nodes onto the end of Forest as the left nodes of Node and set the data fields to be the value of the left node data field of Node; delete all the nodes of Node and release the space; The data of each node of Forest is a root ID of a group member subtree. If the nodes of T corresponding to a nodes of Forest is a leaf, then the group member hosted by the leaf constitute a group member subset alone; If the nodes of T corresponding to a nodes of Forest is a non-leaf node of T, then the group members hosted by the leaves of subtree rooted at the node constitute a group member subset. The algorithm examines all the leaves hosted the group members, therefore the items of Forest contain all the root IDs of group member subtrees of G .
4 Group Key Distribution Scheme Using Key Tree and Chinese Remainder Theorem In this section we introduce a group key distribution scheme based on key tree and Chinese remainder theorem (KTCRT-GKD).
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4.1 Key Tree
In the setup phase, the key server construct the user tree T with n = d l leaves, choose an integer ki for each node i of user tree T as the private key of that node ( 0 ≤ i < ( d l +1 − 1) /( d − 1) ). The private key ID is the same as its associated node ID. In the scheme, we require that all the private keys of nodes of user tree T are pairwise relatively prime positive integers. For the purpose, like in [14], the key server pick these private keys from a pool of pairwise relatively prime positive integers and the size of the private keys should be much larger than the size of group keys need to generate. The user tree T in which each node associated with a private key is called a key tree. The private keys associated with the nodes on the path from leaf d + " + d l −1 + j hosting user U j to the root is called private key set of U j . The key server send every private key and its ID of the private key set of U j to U j ( 1 ≤ j ≤ n ) using some secured channel, for instance using public key system or smart card. In the key tree T, the private key k i associated with node i is known by the users
hosted by leaves of the subtree rooted at node i . The private key associated with leaf node d + " + d l −1 + j is known only by the user U j , we call it the private key of U j . For example, in Figure 2, the private key set of U 1 is { k 0 , k 1 , k 3 , k 7 } . The private key k1 associated with node 1is known by the users {U 1 , U 2 , U 3 , U 4 } hosted by leaves of subtree rooted at node 1. The private key of U 1 is k7 .
Fig. 2. A key tree with each node associates a private key
4.2 Group Key Distribution
In a multicast communication session, let the group member set is the user set G = {U i1 , U i2 ," , U im } . In the beginning of multicast communication session, the key server computes the leaf IDs hosting the group members: the leaf ID hosting the group member U i j is d + d 2 + " + d l − 1 + i j , j = 1, 2 , " , m . The key server runs the root ID algorithm to compute the root IDs of all group member subtrees of group member set G .
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If the single-linked list Forest contained just one item after running the root ID algorithm, then there has only one group member subtree corresponding to the group member set G , which means all the group members consist of one group member subset. In the case, the private key, say ks ( s ∈ {1, 2," , n} ), of the root of the group member subtree is shared by key server and all the group members. Therefore the private key ks can be used as the group key. The key server broadcast the private key ID, s , to all users in plaintext. When a group member receives the key ID, he determine the group key in his private key set. The users which are not the group member can not find the group key. If the single-linked list Forest contained l ( l ≥ 2 ) items after running the root ID algorithm, then there have l group member subtrees. Suppose the data of the l ( l ≥ 2 ) items are j1 , j2 ," , jl , then all the group members form l group member subsets and
k j , k j ,", k j are the private keys of roots of group member subtrees. 1
2
l
The key server picks a group key k randomly different from all the node private keys of the user tree, compute u js which is the value of the corresponding bits of
k ⊕ k js for 1 ≤ s ≤ l [14], and then build the following congruence system.
x ≡ u j (mod k j ) 1
1
x ≡ u j (mod k j ) 2
2
"""" x ≡ u j (mod k j ) l
l
The above congruence system meets the requirement of a Chinese Remainder Theol
rem congruence system. Therefore it has a unique solution modulo M = ∏ k js . To s =1
compute the unique solution X the key server can do l
X = (∑ u j M j M 'j ) mod M s =1
s
s
s
where M js = M / k js , M ′js is the multiplicative inverse of M js mod k js , i.e. M js M ′js ≡ 1mod k js , s = 1, 2," , l . After the X value is computed the key server broadcast j1 , j2 ," , jl and X value to all users in plaintext. After receiving the broadcast message containing j1 , j2 ," , jl and X , each user checks his private key set to find if he has a private key which ID is one of j1 , j2 ," , jl . If a user have such a private key, then the user is a group member, otherwise he is an avoided user of the multicast session. Like in [14], any of the group member in {U i1 ,U i2 ,",U im } can compute the group key k by simply do 1 modulo and 1 XOR operations (k is equal to the corresponding bits of ( X mod k js ) ⊕ k js , s = 1, 2," , l ). After these simple computations the group member now share the same
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group key k and any outside user can not compute the shared group key k without any of the secret information k j1 , k j2 ," , k jl .
5 Security Analysis and Performance Evaluation 5.1 Security Analysis
The security of our KTCRT-GKD scheme is based on the assumption that the key server will keep all the private keys secret and each user will keep its private key set secret. The assumptions ensure that a user in (or outside) the system must not be able to guess any private keys not permitted directly from the key IDs. We prove that our scheme can preserve the forward secrecy and the backward secrecy. For this purpose, we assume that the current group member set is G and the group key is k . Whenever there is a change in the membership due to join of some authorized users or/and exclude of some old members, the new group member set is G ′ and the new group key is k ′ . The key server uses the leaves holding the group members of G ( G ′ )to compute the root IDs of group member subtrees by the root ID algorithm for distributing the group key k ( k ′ ). By the algorithm, the leaves holding the members of G − G ′ (the excluded members) must not belong to any group member subtrees of G ′ , which means that each member of G − G ′ do not know the private keys of the roots of group member subtrees of G ′ . Hence any group members of G − G ′ can not compute the group key k ′ . Similarly, the leaves holding the members of G ′ − G (the joining members) must not belong to any group member subtrees of G , which means that each member of G ′ − G do not know the private keys of the roots of group member subtrees of G . Hence any group members of G ′ − G can not compute the group key k . For the security of group key management scheme based on the Chinese Remainder Theorem, one can refer to the references [14], we omit the details here. 5.2 Performance Analysis
Like in [14], our KTCRT-GKD scheme shifts more computing load onto the key server, optimize the number of broadcast messages and user-side key computation. Furthermore, we also focus on reducing the key server’s computation complexity with a slight increase on the storage overhead at the side of the key server (need to storage 2n − 1 keys) and the users (need to storage h = log nd keys). In KTCRT-GKD scheme, each time when a key sever distribute a group key, he first computes the root IDs of group member subtrees of the group member set using the root ID algorithm. Figure 3 shows the computation time of the root ID algorithm with different kinds of user trees and different group member size. It is shows that, the computation time of the algorithm can be neglected in the group key distribution procedure. Thus, the computation time of the key server for distributing a group key mainly consists of the constructions of the congruence system solution of the Chinese Remainder Theorem.
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d=2,h=14,n=16384
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d=4,h=7,n=16384
d=5,h=6,n=15625
6 ) s4 m ( e2 m i t 0 2000 4000 6000 8000 10000 12000 14000 16000 number of group members
Fig. 3. The computation time of root ID algorithm
Figure 4 depicts the computation time of the CRGK Protocol[14] and our KTCRTGKD scheme. In the test, all the keys are 64-bit integers. In the CRGK Protocol the key server uses all the group member’s private keys to compute the unique congruence system solution X of the Chinese Remainder Theorem for distributing a group key, while, in our KTCRT-GKD scheme, the key server uses the root keys of the group member subtrees to compute X . Therefore, compared with the CRGK Protocol, our KTCRT-GKD scheme can reduce the key server’s computation complexity for distribution a group key. CRGK
KTCRT-GKD(d=2,h=14)
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time (s)
60 40 20 0 2000
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Fig. 4. Computing time of the key server
By Figure 4, when the size of group members exceeds a certain number, with the increase of the size of group members, there will be more group member come into the same group member subgroup and the number of group member subtree will decrease. Therefore, the computing time of the key server and the message length broadcasted will decrease with the increase of the size of group members.
6 Conclusion For many group-oriented applications system, one can pre-defined a static prospective user set containing all potential customs of multicast services. The group member set
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in a multicast session is a subset of privileged users of the user set. In this paper, We deal with the scenario of a pre-defined static prospective user set containing all potential customs of multicast services and concentrate on the stateless receiver case, where the users are given a distinct key set which may not change through the system lifetime. We propose a group key distribution schemes based on static key tree structure and the Chinese Remainder Theorem. Compared with the previous related scheme ours can optimize the number of multicast messages and reduce the key server’s computation complexity for distribution group key. Especially, an interesting feature of our scheme is that, when the size of group members exceeds a certain number, the computing time of the key server and communication overhead will decrease with the increase of the size of group members. The property indicates that our schemes suit the cases where the group members are dense in the user set.
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Effective DDoS Attacks Detection Using Generalized Entropy Metric Ke Li1, Wanlei Zhou1, Shui Yu1, and Bo Dai2 1
School of Engineering and Information Technology Deakin University {ktql,wanlei,syu}@deakin.edu.au 2 School of Computer Science and Engineering University of Electronic Science and Technology of China
[email protected]
Abstract. In information theory, entropies make up of the basis for distance and divergence measures among various probability densities. In this paper we propose a novel metric to detect DDoS attacks in networks by using the function of order α of the generalized (Rényi) entropy to distinguish DDoS attacks traffic from legitimate network traffic effectively. Our proposed approach can not only detect DDoS attacks early (it can detect attacks one hop earlier than using the Shannon metric while order α=2, and two hops earlier to detect attacks while order α=10.) but also reduce both the false positive rate and the false negative rate clearly compared with the traditional Shannon entropy metric approach. Keywords: DDoS, generalized entropy, attacks detection.
1 Introduction Distributed denial-of-service attack (DDoS attack) is a serious threat to the security of cyberspace. It typically exhausts bandwidth, router processing capacity, or network stack resources, breaking network connectivity to the victims and making a computer resource unavailable to its intended users. One common method of the attack involves saturating the target (victim) machine with external communications requests, such that it cannot respond to legitimate traffic, or responds so slowly as to be rendered effectively unavailable. DDoS attack is a distributed, cooperative and large-scale attack; it holds more attacking resources and more destroying powers and it is very hard to be detected and defended. Anomaly-based detection is one of the major techniques used in DDoS attack detection. It uses a pre-defined specific threshold such as abnormal deviation of some A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 266–280, 2009. © Springer-Verlag Berlin Heidelberg 2009
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statistical characteristics from normal network flows to identify the abnormal traffic among all normal traffics, so the utilization and choice of statistical methods and tools is vital important [2]. It is generally accepted that the fractional Gaussian noise function can be used to simulate the real network traffic in aggregation very well and the Poisson distribution function can be used to simulate the DDoS attack traffic in aggregation approximately [3][6][9][10][13]. In information theory, entropy is a measure of the uncertainty associated with a random variable. Shannon entropy has been regarded as an effective method for detecting abnormal traffic based on IP address-distribution statistics or packet sizedistribution statistics [4][5][7][8]. Detection of low rate DDoS attacks is one of the most important criteria for building an early anomaly detection system. However, most current detection methods only perform well in detecting high rate DDoS attacks. In this paper we propose a novel anomaly detection method by using the Rényi entropy [1] which not only detects high rate attacks, but also detects low rate attacks which do not result in the obvious changes in network traffic volume. We show that the use of our Rényi entropy approach outperforms clearly the traditional Shannon entropy method in DDoS attacks detection. The rest of this paper is organized as follows. In section 2 we analyze the normal and attack flows, respectively, and study the characteristics of the Shannon entropy. Section 3 describes the system design and analyses and the characteristics of the Rényi entropy, section 4 shows our experimental results, and finally, we conclude this paper in section 5.
2 Network Traffic Modeling We assume that legitimate network traffic is composed by many source traffics in the aggregate, and every source traffic rate is independent and with the same distribution, then the network traffic in the aggregate will satisfy the Gaussian noise distribution. At the moment, if the time scale is longer than the time of IP packet return need, the network traffic can be described by fractional Gaussian noise model properly. Fractional Gaussian noise is a stochastic process that is the formal derivative of a fractional Brownian motion. Fractional Brownian motions are a family of Gaussian processes that are indexed by the Hurst parameter, H, in the interval (0, 1). These processes have a property of self similarity of the probability laws under a scale change in time. The fractional Gaussian noise function for legitimate traffic is shown below:
1 x(t ) = ʼ(H '+0.5)
t
ì
H 'ì0.5
t ì˫
˰ (˫ )d˫
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In a DDoS attack, the attack is coordinated across many zombies by a single attacker (master). We assume each zombie sends attack packets at a constant or linear rate, after these attack traffics aggregated, the general attack traffic distribution will obey Poisson distribution approximately. The Poisson distribution function for DDoS attack traffic is shown below: k ìˣ Pk = ˣ e k!
Where λ is a positive real number, equal to the expected number of occurrences that occur during the given interval, and k is a non-negative integer, k=0, 1, 2, … In information theory, the information entropy is a measure of the uncertainty associated with a random variable, it forms the basis for distance and divergence measures between probability densities. The more random of the information variable, the bigger the entropy is, in contrast, the more certainty of the information variable, the smaller the entropy is [12]. Definition of information entropy is as follows: n
H ( x) = ì pi log 2 pi i =1
Where Pi are the probabilities of {x1, x2 … xn}, 1
n
pi 0, pi =1. i =1
Therefore, it is not difficult to obtain the information entropy of Poisson distribution as follows:
k
H poisson = ˣ[1 ì log 2 ˣ ] + e ì ˣ ˣ k =0
log 2 k! k!
3 Analysis of the Rényi Entropy Metric In information theory, the Rényi information entropy as a generalization of Shannon entropy is one of a family of functions for quantifying the diversity, uncertainty or randomness of a system. It is a very important metric in statistics as indices of diversity. The Rényi information entropy of order
α is defined as follows:
n H ˙ ( x) = 1 log 2 ( pi˙ ) 1ì˙ i =1
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Where c are the probabilities of {x1, x2 … xn}, pi
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≥ 0,
n
pi =1, ˙ 0, ˙ 1. i =1 When
α
=0 or the probabilities of {x1, x2 … xn} are all the same, we have the
maximum information entropy as follows:
H 0 ( x) = log2 n Which indicates decentralization. When
the
α → 1, H α ( x )
probability
density
of
information
is
maximum
converges to Shannon entropy as follows: n
H1 ( x) = ì pi log 2 pi i=1
When
α → ∞,
we can obtain the minimum information entropy
H∞ (x). When
H∞ (x) =0, which indicates that the probability density of information is at the maximum concentration.
H (x) = ìlog 2 pi
max
Where pi
max
In the case
is the largest probability among
α
>0, we have
pi .
, therefore, the Rényi information ˙ H ˙ ( x ) 0
entropy is a non-increasing function of α . Namely: H ˙( x ) H˙ ( x )for 1
2
α 1< α 2.
Karol discussed the relations between Shannon entropy and Rényi entropies of integer order α [15]. The value of Rényi entropy depends on the parameter α. In particular, the more important performance for Rényi entropy (α >1) is that it can increase the deviation between the different probability distributions than using Shannon entropy [11][14]. To observe and analyze the formulas of Shannon and Rényi information entropy, we know that the high probability event can contribute more to the final entropy in Rényi information entropy than in Shannon entropy while α >1, and the low probability event can contribute more to the final entropy in Rényi information
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entropy than in Shannon entropy while α 1. In contrast, the Rényi information entropy value is higher than the Shannon
entropy value and the low probability event can influence more to the final entropy in Rényi information entropy than in Shannon entropy while 0 ≤ α 1,
k=1, 2
H ˙ (PR 2bk ( FGN ) ) - H ˙ (PR 2ak ( Poisson ) ) H ˙ (PR1bk ( FGN ) ) - H ˙ (PR1ak ( Poisson ) ) , ˙ >1, k=1, 2
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Therefore, we can further prove and obtain the following inequalities:
H 1 (PR0 ( FGN ) ) - H1 (PR0( Poisson ) ) H ˙ (PR0 ( FGN ) ) - H ˙ (PR0 ( Poisson ) ) , ˙ >1, k=1, 2
(
H 1 PR1bk ( FGN )
)
(
)
(
)
- H ˙ PR1ak ( Poisson ) , ˙ >1,
(
)
(
)
- H ˙ PR 2ak ( Poisson ) , ˙ >1,
- H 1 PR1ak ( Poisson ) H ˙ PR1bk ( FGN )
(
)
(
)
k=1, 2
(
H 1 PR 2bk ( FGN )
)
- H 1 PR 2ak ( Poisson ) H ˙ PR 2bk ( FGN )
k=1, 2 ……
Based on above analysis and proof, we can figure out the variation of spacing with hop count of routing between legitimate flow and attack flow by using Shannon and Rényi entropy metrics respectively. In theory, the closer to the victim the larger of spacing, no matter using Shannon or Rényi approach. However, the increase of spacing is faster using Rényi approach than using Shannon metric. We test the proposed approach using Lincoln Laboratory Scenario (DD0S) 2.0.2 data set in the different
Variation of Spacing with Hop Count of Routing Using Different Metrics
situations, and the results are shown in Figure 6. 9
8
7 Shannon Entropy of Legitimate Flow Shannon Entropy of DDoS A ttack Flow Reny i Entropy of Legitimate Flow, order=2 Reny i Entropy of DDoS A ttack Flow, order=2 Reny i Entropy of Legitimate Flow, order= 10 Reny i Entropy of DDoS A ttack Flow, order=10
6
5
4
3
2
0
1
2
3 Hop Count of Routing
4
5
6
Fig. 6. Variation of spacing with hop count of routing between legitimate flow and attack flow using Shannon and Rényi entropy metrics while order α =2 and 10
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The above experimental results verified our analysis in section 2, that our proposed approach can detect attacks early than the Shannon metric. In this demonstration scenario, our approach can detect attacks one hop earlier than using the Shannon metric while order α =2, and two hops earlier to detect attacks while order α =10.
Our proposed approach can not only detect attacks early but also can reduce both false positive rate and false negative rate clearly than Shannon metric. Table 2 shows the reduced false positive rate and false negative rate by using the Rényi entropy metric in different value of order α in comparison to the Shannon entropy metric.
Table 2. Reduced false positive rate and false negative rate when using the Rényi entropy metric compared to using the Shannon entropy metric
Metric Entropy
Rényi
Reduced False
Reduced False
Positive Rate
Negative Rate
(%)
(%)
˙=2
142.80
142.80
˙=3
213.26
213.26
˙=4
242.19
242.19
˙=5
254.60
254.60
˙=10
262.28
262.28
5 Conclusions In this paper, we propose a new approach of using the generalized (Rényi) entropy to detect DDoS attacks, and the simulation results show that this approach works well and outperforms the traditional Shannon entropy in detecting anomaly traffic; in particular this approach can improve the system’s detection sensitivity by adjusting the value of order α of the Rényi entropy effectively. It can not only detect DDoS attacks early
α =2 in while order α =10.)
(there is one hop earlier than using the Shannon metric while order DDoS attacks detection, and two hops earlier to detect attacks
but also reduce both the false positive rate and the false negative rate clearly compared with the traditional Shannon entropy approach (it can reduce 142.80% of
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the false positive rate and false negative rate while the Rényi order α =2 than using the traditional Shannon metric, and even can reduce 262.28% while order
α =10).
References [1] Rényi, A.: On Measures of Entropy and Information. In: Proc. Fourth Berkeley Sym., Math. Stat. and Probability, vol. 1, pp. 547–561. University of California Press, Berkeley (1961) [2] Carl, G., Kesidis, G., Brooks, R.R., Rai, S.: Denial-of-Service Attack-Detection Techniques. IEEE Internet Computing 10(1), 82–89 (2006) [3] Du, P., Abe, S.: IP Packet Size Entropy-Based Scheme for Detection of DoS/DDoS Attacks. IEICE Transactions on Information and Systems E91-D(5), 1274–1281 (2008) [4] Gu, Y., McCallum, A., Towsley, D.: Detecting anomalies in network traffic using maximum entropy estimation. In: Proc. ACM/SIGCOMM Internet Measurement Conference – IMC 2005 (October 2005) [5] Sekar, R., Gupta, A., Frullo, J., Shanbhag, T., Zhou, S., Tiwari, A., Yang, H.: Specification based anomaly detection: A new approach for detecting network intrusions. In: Proc. ACM CCS (2002) [6] Ledesma, S., Liu, D.: Synthesis of Fractional Gaussian Noise Using Linear Approximation for Generating Self-Similar Network Traffic. Computer Communication Review 30 (2000) [7] Patcha, A., Park, J.-M.: An overview of anomaly detection techniques: Existing solutions and latest technological trends. Computer Networks 51 (2007) [8] Willinger, W.: Traffic modeling for high-speed networks: Theory versus practice. In: Stochastic Networks. Springer, Heidelberg (1995) [9] Perrin, E., Harba, R., Berzin-Joseph, C., Iribarren, I., Bonami, A.: nth-order fractional Brownian motion and fractional Gaussian noises. IEEE Trans. Signal Processing 45, 1049–1059 (2001) [10] Perrin, E., Harba, R., Jennane, R., Iribarren, I.: Fast and Exact Synthesis for 1-D Fractional Brownian Motion and Fractional Gaussian Noises. IEEE Signal Processing Letters 9 (November 2002) [11] Kumar, K., Joshi, R.C., Singh, K.: A Distributed Approach using Entropy to Detect DDoS Attacks in ISP Domain. Signal Processing, Communications and Networking (2007) [12] Shannon, C.E.: A mathematical theory of communication. Bell System Technical J. 27, 379–423, 623–656, (1948) [13] Bao, Y., Krim, H.: Renyi entropy based divergence measures for ICA. In: 2003 IEEE Workshop on Statistical Signal Processing, 28 September - 1 October 2003, pp. 565–568 (2003)
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[14] Baraniuk, R.G., Flandrin, P., Janssen, A.J.E.M., Michel, O.J.J.: Measuring timefrequency information content using the Renyi entropies. IEEE Transactions on Information Theory 47(4), 1391–1409 (2001) [15] Karol, Z.: Rényi Extrapolation of Shannon Entropy. Open Sys. & Information Dyn. 10, 297–310 (2003) [16] http://www.ll.mit.edu/mission/communications/ist/corpora/ ideval/data/2000/LLS_DDOS_2.0.2.html
A Fast and Flexible Sorting Algorithm with CUDA Shifu Chen1, Jing Qin2, Yongming Xie2, Junping Zhao3, and Pheng-Ann Heng1,2 1 Shenzhen Institute of Advanced Integration Technology, Chinese Academy of Sciences/The Chinese University of Hong Kong
[email protected] 2 Department of Computer Science and Engineering, The Chinese University of Hong Kong {jqin,ymxie,pheng}@cse.cuhk.edu.hk 3 Institue of Medical Informatics, Chinese PLA General Hospital & Postgraduate Medical School
[email protected]
Abstract. In this paper, we propose a fast and flexible sorting algorithm with CUDA. The proposed algorithm is much more practical than the previous GPU-based sorting algorithms, as it is able to handle the sorting of elements represented by integers, floats and structures. Meanwhile, our algorithm is optimized for the modern GPU architecture to obtain high performance. We use different strategies for sorting disorderly list and nearly-sorted list to make it adaptive. Extensive experiments demon- strate our algorithm has higher performance than previous GPU-based sorting algorithms and can support real-time applications. Keywords: Parallel sorting algorithm, CUDA, GPU-based sorting algorithm.
1
Introduction
Fast and robust sorting algorithms are essential to many applications where ordered lists are needed. With the progress of general-purpose computing on GPUs (GPGPU), a lot of efforts have been dedicated to developing high-performance GPU-based sorting algorithms, especially after programmable vertex and fragment shaders were added to the graphics pipeline of modern GPUs. The early GPUbased sorting algorithms directly employed graphics application programming interfaces (APIs). For examples, Purcell [1] reported an implementation of bitonic merge sort on GPUs. Kipfer [2][3] presented an improved bitonic sort with the name of odd-even merge sort. Greβ [4] introduced the GPUABiSort, a sorting algorithm based on the adaptive bitonic sorting technique proposed by Bilardi [5]. Govindaraju [6] implemented a library named GPUSort with the capability of sorting floating point in both 16 and 32-bit precision. Although encouraging A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 281–290, 2009. © Springer-Verlag Berlin Heidelberg 2009
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performance improvements are reported in these algorithms, one of the main disadvantages of them is they cannot efficiently handle the sorting of elements in structure, since the APIs cannot give developers access to the native instruction set and memory of the parallel computational elements in GPUs, therefore the computing capacity of GPU cannot be fully exploited. CUDA is a parallel computing architecture developed by NVIDIA. Comparing with traditional GPGPU techniques, CUDA has several advantages, such as scattered reads, shared memory, faster downloads and readbacks to or from the GPU, and fully support for integer and bitwise operations. These features make CUDA an efficient parallel computing architecture, which can easily drain the computing capacity of modern GPUs. A full introduction of programming with CUDA can be found in [7]. Recently, some CUDA-based sorting algorithms have been proposed. For instances, Erik Sintorn [8] introduced a CUDA-based hybrid algorithm which combines the bucket sorting and merge sorting, but can only sort floats as it uses a float4 for internal merge sorting to achieve high performance (sorting integers would be possible if replace float4 with int4). Daniel Cederman [9] proposed the implementation of Quicksort in CUDA, but the performance of this algorithm is sensitive to the distribution of the input list. University of California and NVIDIA collaboratively developed a fast CUDA-based sorting algorithm named Global Radix Sort [10]. However, as it uses the bit information of the storage unit, the complexity of this algorithm is in scale with the number of bits, and explodes while being employed to sort floats or structures. Although these CUDA-based algorithms show high performance in some cases, the lack of ability of sorting floats or structures limits their application to many practical problems. In this paper, we propose a novel fast and flexible sorting algorithm with CUDA, which not only has high performance, but is able to handle the sorting of elements represented by various data types. In addition, flexible strategies are provided for sorting disorderly list and nearly-sorted list, respectively. Extensive experiments demonstrated that our algorithm has higher performance than previous GPU-based sorting algorithms, such as GPU Quicksort, Hybrid sort and Global Radix Sort, and showed its capability of supporting real-time applications.
2 Algorithm Overview The main idea of this algorithm is: we first split the input list to buckets, and then sort each bucket concurrently in one stream multi-processers. The buckets sequence need to meet two criteria: 1) Each element in the bucket i should be smaller than the elements in bucket i + 1, assuming that we’re going to obtain an incremental sequence(we always assume this in this paper). 2) Each bucket has no more elements than a fixed size M , otherwise it will be split to sub-buckets. M is determined by the graphics hardware, indicating the maximum threads that can be contained in a thread block. Typically it is 512 for the NVIDIA cards.
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Fig. 1. The pipeline of our CUDA-base sorting algorithm. The input list is firstly split into slices, and these slices are then merged to buckets. Finally, an internal bitonic sort is performed for each bucket.
2.1 Main Steps The four main steps of this algorithm are briefly introduced as follows: Slice division. Firstly we split the input list into small slices, each slice is expected to have less elements than M , and each element in the slice i should be smaller than the elements in slice i + 1. This part will be discussed in detail in section 3.3. Slice merge. Secondly the slices will be merged into buckets. This operation should make each bucket have as close as possible to, but no more than M elements, except that the first slice has already make the bucket exceeded. This part will be discussed in section 3.4. Internal bitonic sort. Thirdly the buckets will be sorted individually in a parallel manner. In order to obtain the best performance, the data of these buckets will be loaded into the shared memory, and wrote back to the global memory after the sorting is completed. The whole sorting process of one bucket is entirely executed on single stream multi-processers. Since the shared memory supplies horizontal accesses, this process is very fast. This part will be discussed in section 4. Recursion. Finally, if there exists some buckets contain more elements than M, so that it’s not fully sorted, the bucket will be considered as a new input list and return to the entrance of the sorting pipeline. This part is implemented as a recursion. According to our experiments, the recursion procedure is actually rarely called. Mostly we get none or just one bucket exceeded, while sorting uniformly or Gaussian distributed list with 10M elements. So it won’t raise a performance problem.
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3 Bucket Division The bucket division contains three steps: slice division and slice merge. Slice division has three sub-steps: 1, find the maximum and minimum element of the input list; 2, calculate a step width for the slices; 3, calculate the slice index of each element and assign each element to corresponding slice. 3.1 Find the Maximum and Minimum Firstly, a reduction method introduced by Mark Harris [11] is used to find the maximum and minimum elements of the input list. 3.2 Calculation of Step Width and Slice Count Once we get the maxValue and minValue, we can calculate the step width of slices using a parameter E, which represents the expected slice size. The step width can be calculated as Ep. 1: stepWidth = (maxV alue − minV alue) ∗ E/n
(1)
where n is the size of the input list. Then, use step width of slice list, we could calculate the slice count directly. 3.3 Assign Elements to Slices In this step, we use four arrays: 1, sliceSizes, storing the size of each slice; 2, sliceOfElements, storing the slice index of each element; 3, offsetInSlice, storing the offset of each element in its corresponding slice; 4, sliceOffsets, storing the global offset for each slice. The process of assigning elements to slices is to fill sliceOfElements with the correct slice index for each element, to calculate the size of each slice, and to find the offset of each element in the slice. For old graphics hardware, it’s not easy to make this process efficient, as it’s hard to obtain data consistent. Fortunately, for the modern GPUs, the synchronization mechanisms such as atomic functions are available. By employing these atomic functions, threads actually run serially when they attempt to increase the size of slice i. Although this would decrease the parallelism and bring out some unfavorable factors to the performance, it is still critical for some applications. With these atomic functionalities, we describe the process of assigning elements to slices as following pseudo code shows: Algorithm 1: Slice Division foreach element i in parallel sliceIndex=(int)(elementValue[i] - minValue)/stepWidth; offset=atomicInc(sliceSizes[sliceIndex]); sliceOfElements[i]=sliceIndex; offsetInSlice[i]=offset; end
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The function atomicInc() increases the value of given memory unit by 1 atomically, and returns the old value of this unit. The old values can be taken as the offset of this element directly, as it is initially 0, increases as sliceSize increases, and is never the same for different elements in a same slice. After the slice list being completely built, an algorithm called SCAN [13] is used to calculate the prefix sum in parallel. Mark Harris also introduced the CUDA implementation of SCAN at [17]. The array sliceSizes is used to build the array sliceOffsets while employing SCAN. After this procedure is done, each element of sliceOffsets will have the global offset for corresponding slice. 3.4 Merge Slices to Generate Bucket In this step, we use two arrays, which are bucketSizes and bucketOffsets. The bucketSizes stores the size of each bucket, and the bucketOffsets stores the offset of each bucket. Following pseudo codes give a description of this process: Algorithm 2: Slice Merge FOR i=0 to sliceCount-1 if bucketSize[bucketCount] + sliceSize[i] > M and bucketSize[bucketCount]!=0 generateNewBucket(); end if addSliceToBucket(bucketCount,i); end The function addSliceToBucket() handles the process of adding a slice to a bucket, where the bucketSize would be updated. After we complete the slice division and slice merge, we can build a new list. The following pseudo codes give a description: Algorithm 3: move elements to new list foreach element i in parallel sliceIndex=(int)(elementValue[i] - minValue)/stepWidth; sliceOffset=sliceOffsets[sliceIndex]; globalOffset=sliceOffset + elementOffsetInSlice[i]; newList[globalOffset] = oldList[i]; end
4
Bitonic Sort in GPU
Since the expected size E of each slice is much smaller than M (in our implementation, M is 512 by default, and E is 80), the vast majority of the buckets should have elements less than but close to M . The buckets which have elements more than M will be on the way to a recursion. The internal bitonic sort includes three steps.
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Data copying and padding. Firstly, we copy the elements from global memory to shared memory to reduce the global memory accesses. Then we pad the bucket to make it have M elements if it is not full. This makes the coming up operations much more efficient, as M is always a power of 2 . There are more than one methods to pad elements into those non-full buck- ets, but the most simple and safe way is to use the biggest number, which is considered as infinite in computer. Internal bitonic sort. After data copying and padding, we’ve got M elements stored in shared memory. We then use an internal bitonic sort introduced by W. Christopher [12]. Bitonic sort is one of the fastest sorting networks. The parallel bitonic sorting works effectively only when the length is a power of 2, that’s why we do the padding. A detailed introduction of parallel bitonic sorting could be found in [15]. Write back the result. This step is pretty simple, we just have to make sure that the padding will be removed.
5 Bottleneck and Optimizations Memory access is usually considered to be the biggest bottleneck for sorting algorithms, especially for the GPU-based ones. For our algorithm, the memory access bottleneck could probably be found at two sections: one is the slice division described at Algorithm 1, the other is the new list generation which is described at Algorithm 3. When the input list is nearly sorted (either ascending or descending), it comes the worst situation. Since the atomic functions are actually run serially at hardware level, if the input list is nearly sorted, the nearby elements may be assigned to the same slice, so assigning an element to a slice could be very time consuming as there might be a long queue waiting to access the same memory unit. We use a simple method to check the input list is nearly sorted or not to avoid this worst situation. This will be discussed at 5.1. Moving elements to new places is not efficient, because there exists discontinuous reads and writes, both result in a non-coalesced memory access. We utilize the texture mechanism to alleviate this problem. This will be discussed at 5.2. 5.1 Flexible Strategies for Flat or Nearly Sorted List A list is flat while its maxValue is equal to its minValue. We could know it is a flat list or not by comparing the maxValue and minValue, if yes, the program could exit right away. For nearly sorted list, we have to solve at least two problems . One is how we know the input list is nearly sorted or not, the other is how to handle it if we already know that. We define: n
disorderDegree =
∑| a − a k =1
i
i −1
|
maxValue − minValue
(2)
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The disorderDegree is on behalf of the degree of disorder of the input list, and ai is the value of element i. A threshold C is then used to determine the input list is nearly sorted or disorderly. If disorderDegree < C , then the input list is considered to be nearly sorted, otherwise disorderly. In our experiments, C = 10 works well for sorting elements from 1M to 24M. The parallel reduction algorithm [11] is also used here to calculate the disor- derDegree effectively. It only takes less than 2% of the total time. And the user can simply skip this step if they already know the input list is nearly sorted or not. While doing the slice division, we use different strategies to calculate the index of elements for nearly ordered lists and disordered lists, respectively. For disorderly lists, we use: elementI ndex = blockDim ∗ blockI d + threadI d
(3)
While threadId is the thread index, elementIndex indicates the element that current thread will handle, the blockDim is the size of the blocks, and blockId is the index of the active block. In this case, the threads in the same block will read consecutive elements so that the memory access is coalesced and efficient. And for nearly sorted lists, we use: elementI ndex = blockC ount ∗ threadI d + blockI d (4) Although this involves discontinuous memory access and causes a noncoalesced problem, the time drops significantly. In our experiments, for sorting 24M nearly-sorted floats on a Geforce 280 GTX card, it takes nearly 1050ms while using the first strategy, but only takes 420 ms while using the other. 5.2 Utilize the Texture Mechanism As mentioned at section 3.4 and 3.5, they are two arrays, which are bucketSizes, sliceOffsets. These arrays don’t need to be modified after built, and accesses on them could be very heavy. These two characteristics meet the features of texture mechanism well. Since the textures memory space is cached, this step will be accelerated a lot if the texture fetches hit the cache frequently.
6 Performance Evaluation We conduct a series of experiments to evaluate the timing performance of our algorithm. The experiments are performed on two graphics cards, one is a GeForce 9600GT card and the other is a GeForce 280 GTX card, while the CPU employed in these experiments is a Quad Q6600 at 4x2.4 GHz. Results are shown in Fig.2 to Fig. 4. Firstly, we compare our algorithm with GPU-Quicksort,and GPU RadixSort, as they are also implemented with CUDA. Note that both the current implementation of GPU-Quicksort and GPU RadixSort can only sort elements of integers, while our algorithm is not limited to sorting integers. Experimental results show that our algrithm achieves better performance than both the GPUQuicksort and the GPU RadixSort. Fig. 2 shows the comparison of our algorithm with GPU-Quicksort and GPU RadixSort. The results include time cost of data transfer between host and graphics device. Since the The GPU-RadixSort can
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only support sorting less than 16M elements, time use of its sorting 20M and 24M elements are not presented. Secondly, we make comparison of our algorithm and and STL quicksort. The results show our algorithm achieves 10 times to 20 times acceleration over STL quicksort (released version and highly optimized). Results are shown in Fig. 3.
(a)
(b)
(c)
(d)
Fig. 2. The timing performance of GPU-RadixSort, GPU-Quicksort and our algorithm while sorting 4M to 24M integral elements. (a) Sorting uniformly distributed, disorderly list. (b) Sorting uniformly distributed, disorderly list. (c) Sorting Gaussian distributed, disorderly list. (d) Sorting Gaussian distributed, nearly-sorted list.
(a)
(b)
Fig. 3. The time use of STL Quicksort and our algorithm, while sorting 4M to 24M elements. The list is uniformly distributed and disorderly. (a) Sorting list in float. (b) Sorting list in float4.
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At last, Fig. 4 shows the time consumption of each part of ou algorithm, while sorting nearly-sorted or disorderly lists. Finally Fig. 5 shows an application of our algorithm for real-time bleeding simulation.
(a)
(b)
Fig. 4. The time consumption of each part of our algorithm. We could find out the the bottlenecks while sorting nearly-sorted or disorderly ones. (a) Sorting nearly-sorted list in float. (b) Sorting disorderly list in float.
Fig. 5. In a SPH-based real-time blood simulation project, our sorting algorithm was used for neighbor particle searching
7
Conclusion
We’ve proposed a fast and flexible GPU-based sorting algorithm. It can handle the sorting of elements in integers, floats, or structures. It’s a combination of bucket sort and internal bitonic sort. The experiments demonstrated our algorithm achieves a 10x to 20x acceleration over STL quicksort. Our algorithm also has higher performance than the GPU Quicksort and GPU RadixSort. Acknowledgments. The work described in this paper was supported by the National Natural Science Foundation of China (Grant No. 60873067).
References 1. Purcell, T.J., Donner, C., Cammarano, M., Jensen, H.W., Hanrahan, P.: Photon Mapping on Programmable Graphics Hardware. In: Proceedings of the ACM Siggraph Eurographics Symposium on Graphics Hardware (2003) 2. Kapasi, U.J., Dally, W.J., Rixner, S., Mattson, P.R., Owens, J.D., Khailany, B.: Efficient Conditional Operations for Data-parallel Architectures. In: Proceedings of the 33rd annual ACM/IEEE International Symposium on Microarchitecture, pp. 159–170 (2000)
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3. Kipfer, P., Segal, M., Westermann, R.: UberFlow: A GPU-based Particle Engine. In: Proceedings of the ACM Siggraph/Eurographics Conference on Graphics Hardware, pp. 115– 122 (2004) 4. Greβ, A., Zachmann, G.: GPU-ABiSort: Optimal Parallel Sorting on Stream Architectures. In: Proceedings of the 20th IEEE International Parallel and Distributed Processing Symposium (2006) 5. Bilardi, G., Nicolau, A.: Adaptive Bitonic Sorting. An Optimal Parallel Algorithm for Shared Memory Machines. SIAM Journal on Computing 18(2), 216–228 (1989) 6. Govindaraju, N.K., Raghuvanshi, N., Manocha, D.: Fast and Approximate Stream Mining of Quantiles and Frequencies Using Graphics Processors. In: Proceedings of the 2005 ACM SIGMOD International Conference on Management of Data, pp. 611–622 (2005) 7. NVIDIA Corporation. NVIDIA CUDA Programming Guide (2008) 8. Sintorn, E., Assarsson, U.: Fast Parallel GPU-Sorting Using a Hybrid Algorithm. In: Workshop on General Purpose Processing on Graphics Processing Units (2007) 9. Cederman, D., Tsigas, P.: A Practical Quicksort Algorithm for Graphics Processors. Technical Report 2008-01, Computer Science and Engineering Chalmers University of Technology (2008) 10. Harris, M., Satish, N.: Designing Efficient Sorting Algorithms for Manycore GPUs. NVIDIA Technical Report (2008) 11. Harris, M.: Optimizing Parallel Reduction in CUDA. NVIDIA Developer Technology (2008) 12. Blelloch, E., Greg Plaxton, C., Leiserson, C.E., Smith, S.J., Maggs, B.M., Zagha, M.: An Experimental Analysis of Parallel Sorting Algorithms (1998) 13. Harris, M., Sengupta, S., Owens, J.D.: Parallel Prefix Sum (Scan) with CUDA. In: Nguyen, H. (ed.) GPU Gems 3, Addison-Wesley, Reading (2007) 14. Bilardi, G., Nicolau, A.: Adaptive bitonic sorting: an optimal parallel algorithm for sharedmemory machines. SIAM J. Comput. 18(2), 216–228 (1989) 15. Kider, J.T.: GPU as a Parallel Machine: Sorting on the GPU, Lecture of University of Pennsylvania (2005) 16. Knuth, D.: Section 5.2.4: Sorting by merging. In: The Art of Computer Programming, Sorting and Searching, vol. 3, pp. 158–168 (1998) ISBN 0-201-89685-0 17. Harris, M.: Parallel Prefix Sum(Scan) with CUDA (2008)
A Parallel Simulated Annealing Approach for Floorplanning in VLSI Jyh-Perng Fang1 , Yang-Lang Chang1 , Chih-Chia Chen1 , Wen-Yew Liang2 , Tung-Ju Hsieh2 , Muhammad T. Satria2 , and Chin-Chuan Han3 1
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[email protected] Dept. of Comp. Sci. and Info. Eng., National Taipei Univ. of Tech. 3 Dept. of Comp. Sci. and Info. Eng., National United Univ.
Abstract. One of the critical issues in floorplanning is to minimize area and/or wire length of a given design with millions of transistors while considering other factors which may influence the success of design flow or even manufacturing. To deal with the floorplan design with enormous amount of interconnections and design blocks, we adopt a parallel computing environment to increase the throughput of solution space searching. Also, we include the fractional factorial analysis to further reduce the time needed to search the acceptable solution. The experimental results indicate that our approach can obtain better space utility rate and it takes less time than the traditional method and parallel method do. Keywords: Floorplanning, FFA, Parallel Computing, Simulated Annealing, OpenMP.
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Introduction
As modern VLSI technology advances, more transistors are put in a chip and more wires are needed to connect transistors, the design time for each design phase in a physical design flow is thus drastically lengthened. Consequently, for physical design, more and more researches focused at shortening the design time caused by circuit complexity as well as geometry complexity. Among these consecutive design phases in the design flow of physical design, floorplanning generally demands more attention. The reason is that, as an earlier design phase in the design flow, floorplanning dominates the following design phase. A good floorplan not only simplifies global routing but also decreases the possibility of a defective design for subsequent design phases. In addition, a design failed in routing or subsequent design phase should be returned to the preceding stage for re-design, which means a longer design time and a higher design cost are incurred. In the past years, many problems in the floorplan design are solved using a Marcov-chain-based approach, such as simulated annealing or genetic algorithm, which has been empirically proven to be a useful method for finding A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 291–302, 2009. c Springer-Verlag Berlin Heidelberg 2009
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an acceptable solution for NP-hard problems. However, with the fast growing of design complexity, adopting the traditional Marcov-chain-based approaches frequently leads two types of results: very time-consuming computation or unsatisfied solution. In this study, we similarly use simulated annealing algorithm to solve floorplanning problem. However, to ameliorate the problems caused by geometry complexity, the simulated annealing algorithm is performed in parallel. Furthermore, the fractional factorial analysis is included to further reduce the time needed to search the acceptable solution. The parallel computing in our approach is implemented using OpenMP library and is focused on the scheduling and computation of cost function because the time used by simulated annealing heavily depends on these two parts. The experimental results show that the operation time is significantly reduced and the space is utilized more efficiently. This paper is organized as follows. The traditional floorplanning techniques are evaluated and discussed in section 2. The proposed approach is given in section 3. Experimental results are provided in section 4. Conclusions are presented in section 5.
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Overview of the Published Researches
This section gives an overview of published researches on floorplanning and simulated annealing. Especially, a parallel mechanism for simulated annealing is discussed in section 2.3. 2.1
Floorplanning
The VLSI physical design is a complex process which includes distinct design phases such as partitioning, flooplanning, placement, global routing, detail routing, and verification. To ensure the produced chip satisfying all aspects of constraints, such as timing, power, area, an iterative design flow is necessary. For a large design, a pre-simulation stage including modeling, simulation, and analysis is further adopted to shrink design iteration, as shown in Fig. 1. After a design is partitioned into sub-designs, floorplanning stage is responsible for generating an optimized floorplan, thereafter placement and routing stages follow. Traditional studies on floorplanning concentrated on geometry representations and geometry operations [1],[2],[3],[4] such that the floorplan is generated fast and the final floorplan has the most compact area as well as the shortest total-wire-length. However, a VLSI design typically does not go through the work flow in a fairly sequential manner. Rather, it operates in an iterative manner because in any subsequent physical design phase such a design can be failed by violating area constraint, power constraint [5], timing constraint, or other constraints [6], [7]. To shrink design iteration, it is a good practice to perform power, congestion, and other estimations at floorplanning phase. As a result, the computation time
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Fig. 1. Typical work flows of physical design
of floorplan design is significantly raised and this situation is further aggravated when there are a huge numbers of components and connections [8],[9],[10]. To solve this problem, Ho et al. [11] proposed a fractional-factor-based method to decrease computation time for redundant floorplans, Tang et al. [12] presented a parallel genetic algorithm (GA) for floorplan area optimization. Among the parallel algorithms for floorplanning, quite a part of studies focused on parallel simulated annealing [13], [14]. 2.2
Simulated Annealing
Simulated Annealing has been widely known to be an effective approach to seek an acceptable solution for problems of electronics design automation (EDA) [11],[12] or other fields [15], [16], [17]. To apply simulated annealing to solve floorplanning problems, four ingredients as follows should be concerned. 1. Solution space: The computation time for seeking a better solution usually depends on the size of solution space. Fractional factorial analysis (FFA) introduced in section 3 is an effective method for scaling down the solution space. 2. Neighborhood structure: Also known as “perturbation”, a perturbation is used to move from current solution to its neighbor solution.
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3. Cost function: Typical cost function for a floorplan includes area and total wire length, sometimes further includes other constraints such as timing, noise, and power. 4. Annealing structure: This ingredient relates to the initial temperature, the freezing point, the speed of temperature decreases, and count of iterations in each temperature. Algorithm 1 shows the pseudo code of a generic simulated annealing algorithm. The loop from line 3 to line 9 constructs an annealing structure, wherein line 9 is a temperature decreasing operation. Algorithm 1: Pseudo code of a generic simulated annealing algorithm. Generic_SA(P, r, T, Tf) /* P = Iterations at each temperature r = Temperature decreasing rate T = Initial temperature Tf = Freezing point (Output) F = A final floorplan */ 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11.
Begin Get an initial solution S while T > Tf do while(not_Equilibrium( )) do randomly pick a neighbor S’ of S deltaC := cost(S’) - cost(S) if ( deltaC Tf do 4. #pragma omp parallel 5. while (not_Equilibrium( )) do 6. randomly pick a neighbor S’ of S 7. deltaC := cost(S’) - cost(S) 8. if ( deltaC result) result ← number; else if (number < result) result ← number; end
/* max */ /* min */
Fig. 2. Bitonic sorting algorithm on n-cube
For example, the bitonic sequence mentioned above s = (2, 3, 8, 13, 15, 14, 7, 0) will be divided to two bitonic sequences s1 = (2, 3, 7, 0) and s2 = (15, 14, 8, 13). Note that both the s1 and s2 are bitonic sequences. Thus, given a bitonic sequence, we can use bitonic splits recursively to obtain short bitonic sequences until we obtain sequences of size one, at which point the input bitonic sequence is sorted. This procedure of sorting a bitonic sequence using bitonic splits is called bitonic merge (BM). Given a set of elements, we must transform them into a bitonic sequence. This can be done recursively doubling the size of bitonic sequence. The bitonic sorting network for sorting N numbers consists of logN bitonic sorting stages, where the ith stages is composed of N/2i alternating increasing and decreasing bitonic merges of size 2i . Figure 1 shows the block structure of a bitonic sorting network of size N = 16. ⊕BM[k] and BM[k] denote increasing and decreasing bitonic merging networks of size k, respectively. The last merging network (⊕BM[16]) sorts the input.
An Efficient Parallel Sorting Algorithm on Metacube Multiprocessors BM[2] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
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Figure 2 gives a bitonic sorting algorithm on an n-cube. The algorithm executes on every node in the n-cube in parallel. There are four parameters in the algorithm: my id is the binary node address; my number is the number residing in the node; n is dimension of the hypercube; and result is the sorted number. The sorted numbers are in the same order as the node addresses. The outer for loop generates bitonic sequences in the dimension order of i = 0 to n − 1. Each iteration of the loop doubles the size of bitonic sequences. The bitonic merge is done by the inner for loop, which takes the order of j = i to 0. In the current step j, nodes u and u(j) exchange their numbers each other through the link of the dimension j and compare the two numbers, where the addresses of nodes u and u(j) differs only in the dimension j. After the comparison, node u keeps the number as result based on the following rule: If the value of jth bit of the address differs from the value of i + 1st bit of the address, the node keeps the maximum of the two numbers; minimum otherwise. A bitonic sorting example on a 4-cube is shown in Figure 3 where the sorted result is the same value as my id. The computational complexity for sorting N = 2n numbers in an n-cube is O(n × (n + 1)/2) = O(n2 ). Similarly, the communications take O(n2 ) steps.
3 Metacube and Its New Presentation Metacube (MC for short) is a versatile family of interconnection networks. It includes hypercube as a special case. In this section, we first introduce the original presentation of the MC architecture. Then, we give a new presentation of the MC that makes the efficient parallel sorting on MC possible. The address format of an MC is shown in Figure 4. There are two parameters in an MC network, k and m. The value c of the most significant k bits defines the class ID of a node. The rest of the address consists of 2k fields ei , for 0 ≤ i ≤ 2k − 1, and each field has m bits. Therefore, an MC(k, m) uses 2k m + k bits to identify a node and the total number of nodes is 2n where n = 2k m + k.
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Referring to Figure 4, the nodes in an MC(k, m) are connected with the following method. There are k + m links per node. For any two nodes whose addresses differ only in a bit position in the class ID, there is a link connecting these two nodes. This is, the k-bit class ID defines a high-level k-cube. The links in the k-cube is called cross-edge. Among the 2k fields ei , for 0 ≤ i ≤ 2k − 1, only the field ec forms a low-level m-cube with m links, where c is the class ID of the node. The links in an m-cube is called cube-edges. For example, the three neighbors within the low-level m-cube of the node with address (01, 111, 101, 110, 000) in an MC(2, 3) have addresses (01, 111, 101, 111, 000), (01, 111, 101, 100, 000), and (01, 111, 101, 010, 000). The underlined bits are those that differ from the corresponding bits in the address of the referenced node. The two neighbors in the high-level k-cube are (00, 111, 101, 110, 000) and (11, 111, 101, 110, 000). An MC(2, 1) is shown in Figure 5 in which we drew only the cross-edges of nodes (xx, 0, 0, 0, 0) in addition to the cube-edges. The value of k affects strongly the growth rate of the size of the network. An MC(1, m) containing 22m+1 nodes is called a dual-cube. Similarly, an MC(2, m), an MC(3, m), and an MC(4, m) containing 24m+2 nodes, 28m+3 nodes, and 216m+4 nodes, are called quad-cube, oct-cube, and hex-cube, respectively. Since an MC(3, 3) contains 227 nodes, the oct-cube is sufficient to construct practically supercomputers of very large size. The hex-cube is of theoretical interest only. Note that an MC(0, m) is a hypercube. An MC(k, m) has much less links than the corresponding n-cube for n = 2k m + k, and hence, the point-to-point communication in metacubes is little bit complex than that in hypercubes. In a metacube, communication between two nodes that are not in a same m-cube must go through the k-cube so that the different address bits of the two nodes in all the fields ei , for 0 ≤ i ≤ 2k − 1, can be routed. The following example shows the routing path between nodes s = 01, 111, 101, 110, 000 and t = 10, 110, 001, 100, 100: 01, 111, 101, 110, 000 − 01, 111, 101, 100, 000 − 00, 111, 101, 100, 000 − 00, 111, 101, 100, 100 − 10, 111, 101, 100, 100 − 10, 111, 001, 100, 100 − 11, 111, 001, 100, 100 − 11, 110, 001, 100, 100 − 10, 110, 001, 100, 100 This address presentation is cluster-based. It is efficient for the collective communications. In order to perform the bitonic sorting in metacube networks efficiently, we use a new presentation, called class-based, as shown as in Figure 6. The value c of the least significant k bits (bits k − 1, . . . , 1, 0) defines the class ID of a node. These k bits form a k-cube, which is the same as the high-level k-cube in the original address definition. Next to the class ID, there m fields fi , for 1 ≤ i ≤ m. Each field has 2k bits. Among these 2k bits in field fi , for 1 ≤ i ≤ m, there is only one bit position j = 2k (i − 1) + c + k at which a link connects node u to another node
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u(j) whose address differs from u at the bit position j. We call this link bridge. The m bridges (each field contributes one bridge) form an m-cube which is equivalent to the low-level m-cube in the original address definition. Figure 7 shows an MC(k, m) structure with k = 2 and m = 1 using the new address presentation. A node address has 2k m + k = 22 × 1 + 2 = 6 bits shown in two rows: The 4-bit value in upper row is f1 and the 2-bit value in lower row is the class ID c. Each node has k + m, or 3, links: Two links are used to form a k-cube and one link (bridge) connects two nodes whose addresses differ in c+kth bit position. For example, nodes 0000, 11 and 1000, 11 of class 3 are connected with a bridge because these two nodes’ addresses differ in 3 + 2, or 5th (left-most) bit position.
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Next, we explain the reasons of why we use this new presentation for the design of efficient algorithms such as sorting algorithm on metacube. Using the new presentation, if we map a k-cube to a single super-node then an MC(k, m) will be mapped onto a 2k m-cube; a bridge that connects nodes in distinct super-nodes in MC(k, m) becomes a hypercube edge. Mapping each 2-cube in Figure 7 into a single super-node, we get a 4-cube. Therefore, communications among k-cubes in MC(k, m) can be treated exactly as that in hypercube. For communications inside a k-cube, we can use collective communication procedures such as broadcast, gather, scatter etc., to collect or distribute data from a specific node to all other nodes in the k-cube. For sorting on a metacube, we use the new address presentation of the metacubes and bitonic sorting algorithm. The communications between the node pairs in the bitonic sorting on a metacube can be done with gather and scatter operations through bridges efficiently which we describe in the next section.
4 Sorting on Metacube In this section, we present a new sorting algorithm on metacube based on the parallel bitonic sorting. Given an MC(k, m), we assume that each node in MC(k, m) holds a single element (number). The sorting algorithm compares and exchanges elements so that, at the end, all the elements are in the ascending order arranged by their addresses.
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The parallel sorting on metacubes is based on the bitonic sorting on hypercubes. The basic operation is compare-and-exchange: Nodes u and u(j) whose addresses differ in jth bit position for 0 ≤ j ≤ 2k m + k − 1 send their elements to each other. Nodes u and u(j) retain the smaller number and bigger number, respectively, if u < u(j) . However, there may be no direct links in some dimensions between nodes u and u(j) in a metacube. As we described in the previous section, the node address has 2k m + k bits (dimensions) and there are only k + m links per node in an MC(k, m). For a dimension j, if 0 ≤ j ≤ k − 1, there is a link between nodes u and u(j) , otherwise, there is a link (bridge) only in the dimension j that satisfies (j − k) MOD 2k = c where c is the class ID of nodes u and u(j) . Figure 8 shows the four bridges of the 2-cube in which the field f1 of the node addresses is 0000 in an MC(2, 1). In the case of Figure 8(b), the two node in every pair (0, 8), (1, 9), (2, a), and (3, b) communicate simultaneously. Nodes 1 and 9 can send their elements to each other directly because there is a link (bridge) between the two nodes. The other three pairs cannot do it directly due to the lack of the direct links: They must go through the bridge that links nodes 1 and 9. Because nodes 0, 1, 2, and 3 are in the same 2-cube, we can gather elements of the four nodes to node 1, send the gathered elements to node 9 via the bridge, and then scatter the received elements to nodes 8, 9, a, and b. We can do the similar operations in the opposite direction. Generally, in the gather operation, a single node collects a unique message from each node (also called concatenation). In the scatter operation, a single node sends a unique message to every other node (also called a one-to-all personalized communication). The scatter operation is exactly the inverse of the gather operation. Figure 9 shows the communication steps for the gather and scatter operations on the two 2-cubes of Figure 8(b).
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In Figure 9(a), node i for i = 0, 1, 2, 3, 8, 9, a, b, contains its element {i}. In Figure 9(b), the arrowed lines denote the communication direction along with the dimension 0, that is, four nodes 0, 2, 8, and a send their elements to nodes 1, 3, 9, and b, respectively. Nodes 1, 3, 9, and b concatenate the received elements with their own elements. In Figure 9(c), the communications take place in dimension 1. Note that only two nodes 3 and b send their own elements gathered in the first step, and nodes 1 and 9 concatenate the received elements with their own elements. At this step, nodes 1 and 9 have gathered the entire elements within their 2-cube, respectively. Then, nodes 1 and 9 send the gathered elements to each other through the bridge as shown as in Figure 9(d). Figures 9(e) and 9(f) show the steps of the scatter operation which is the reverse of the gather operation. As the final result, every node contains the element of its partner in addition to its original element. There are 2k + 1 communication steps in total: Each of the gather and scatter operations takes k steps and the exchange through the bridge requires one step. We formally give the gather and scatter algorithm in Figure 10. In an MC(k, m), node u = my id sends the element number in to node u(j) and receives the element number out from node u(j) where the addresses of nodes u and u(j) differ in the j bit position and 0 ≤ j ≤ 2k m + k − 1. The exchange of the elements is done with the gather and scatter operations through the bridge. In Figure 10, my class = my id AND (2k − 1) is the class ID of node u; bridge class = (j − k) MOD 2k is the class ID of two nodes which are connected with the bridge; and class diff = my class XOR bridge class is the dimension difference between the classes of my class and bridge class that is used to control the sending and receiving operations. The algorithm is composed of three parts: 1) gathering elements to a node of bridge class; 2) exchanging elements through the bridge; and 3) scattering elements to nodes in k-cube. The gather operation collects elements from all the nodes in the k-cube to a node of bridge class. This is done by a for loop with i = 0, 1, . . . , k− 1. Because the communication patterns of the nodes in the k-cube are not same, we must control the sending and receiving operations of the nodes based on class diff, i and mask. The mask makes the number of the nodes that participate sending and receiving
An Efficient Parallel Sorting Algorithm on Metacube Multiprocessors Gather scatter (number in, my id, k, j, number out) begin my class ← my id AND 2k − 1; bridge class ← (j − k) MOD 2k ; class diff ← my class XOR bridge class; /* 1. Gathering elements to a node of bridge class */ R ← {number in}; mask ← 0; for i ← 0 to k − 1 do /* Select nodes whose lower i bits are 0 */ if (class diff AND mask = 0) if (class diff AND 2i = 0) msg destination ← my id XOR 2i ; send R to msg destination; else msg source ← my id XOR 2i ; receive S from msg source; R ← R ∪ S; mask ← mask XOR 2i ; /* 2. Exchanging elements through the bridge */ if (class diff = 0) partner ← my id XOR 2j ; send R to partner; receive S from partner; /* 3. Scattering elements to nodes in k-cube */ mask ← 2k − 1; for i ← k − 1 downto 0 do mask ← mask XOR 2i ; if (class diff AND mask = 0) if (class diff AND 2i = 0) msg destination ← my id XOR 2i ; send second half of S to msg destination; S ← first half of S; else msg source ← my id XOR 2i ; receive S from msg source; number out ← S; end
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Fig. 10. Gather and scatter on MC(k,m)
operation to be half for the next loop iteration. R is the collected element set to which the received element S is concatenated. After finishing the gather operation, R contains all the elements of the nodes in the k-cube and is sent to another node through the bridge. The scatter operation distributes each element of the received element set S to all the nodes in the k-cube. It is the reverse of the gather operation. As the output of the algorithm, each node u gets an element number out of the node u(j) . The sorting algorithm on metacubes is given in Figure 11. When the dimension is less than k, we perform send and receive directly between the two nodes of a node pair; otherwise, we perform Gather scatter operations to exchange the elements.
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Bitonic sort metacube (my id, my number, k, m, result) begin n ← 2k m + k; result ← my number; for i ← 0 to n − 1 do for j ← i downto 0 do if (j < k) partner ← my id XOR 2j ; send result to partner; receive number from partner; else Gather scatter (result, my id, k, j, number); if (my id AND 2i+1 = my id AND 2j ) if (number > result) result ← number; else if (number < result) result ← number; end
/* direct communication in k-cube */
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Fig. 11. Bitonic sorting algorithm on MC(k, m)
Theorem 1. In the bidirectional channel and 1-port communication model, bitonic k sorting in an MC(k, m) with N = 22 m+k nodes can be done in (2k m + k)2 computation steps and (2k m(2k + 1) + k)2 communication steps, respectively. Proof: We first show that the correctness of the algorithm Bitonic sort metacube. We define a 2k -to-1 mapping from the set of vertices of MC(k, m) onto the set of vertices of 2k m-cube as follows: f : bn−1 . . . b1 b0 → bn−1 . . . bk , where n = 2k m + k. From the new presentation of metacube, the bridges of MC(k, m) are mapped onto the edges of 2k m-cube. That is, MC(k, m) is mapped onto a 2k m-cube. After mapping, the operations in step 1 and step 3 in algorithm Gather scatter become local memory accesses. It is easy to see that the algorithm Bitonic sort metacube emulates the algorithm Bitonic sort hypercube in the mapped 2k m-cube with each node holding 2k numbers. Therefore, from the algorithm Gather scatter which gathers 2k elements in a k-cube and scatters them to another k-cube via a bridge (an edge in the mapped 2k m-cube), we conclude that the algorithm emulates the algorithm Bitonic sort hypercube correctly. Next, we assume that the edges in MC(k, m) are bidirectional and each node in MC(k, m) can receive a message, concatenate it with local data and send the concatenated message to its neighbor in one time unit. In the proposed algorithm, at each iteration, all pairs of nodes in MC(k, m), (u, u(j) ) for a specific dimension j, should perform the compare-and-exchange operation. This is done by performing Gather scatter for every pair of k-cubes that requires a total of 2k + 1 communication steps for a single compare-and-exchange operation. Therefore, the communication time Tcomm (n) and computation time Tcomp of the proposed algorithm are (2k m(2k + 1) + k)2 and (2k m + k)2 , respectively. ♦
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5 Concluding Remarks In this paper, we showed an efficient sorting algorithm on MC(k, m) that uses a new presentation of the metacube. Based on the new presentation, the hypercube algorithms can be emulated effectively. The overhead for the emulation is mainly due to communicate between the two matched k-cubes through a bridge. Since k is small (k ≤ 3 for any possible practical parallel computers), the overhead for the communication is relatively small. The future work includes the following: (1) Generalize the proposed algorithm for sorting input sequences of any size on metacube and perform simulations and empirical analysis for the proposed algorithm. (2) Investigate and develop more application algorithms on metacube based on the new presentation.
References 1. Batcher, K.E.: Sorting networks and their applications. In: Proceedings of AFIPS Spring Joint Computer Conference, April 1968, pp. 307–314 (1968) 2. Chen, S.-Y., Kao, S.-S.: The edge-pancyclicity of dual-cube extensive networks. In: Proceedings of the 2nd WSEAS International Conference on Computer Engineering and Applications, Acapulco, Mexico, January 2008, pp. 233–236 (2008) 3. Hayes, J.P., Mudge, T.N.: Hypercube supercomputers. Proc. IEEE 17(12), 1829–1841 (1989) 4. Jiang, Z., Wu, J.: Fault-tolerant routing in dual-cube networks. In: Proc. of the 7th Joint Conference on Information Sciences, September, pp. 389–392 5. Kumar, V., Grama, A., Gupta, A., Karypis, G.: Introduction to parallel computing: design and analysis of algorithms. Benjamin/Cummings Press (1994) 6. Laia, C.-J., Tsai, C.-H.: On embedding cycles into faulty dual-cubes. Information Processing Letters 109(2), 147–150 (2008) 7. Leighton, F.T.: Introduction to Parallel Algorithms and Architectures: Arrays, Trees and Hypercubes. Morgan Kaufmann Pub., San Francisco (1992) 8. Li, Y., Peng, S., Chu, W.: Efficient communication in metacube: A new interconnection network. In: Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (I-SPAN 2002), Manila, Philippines, May 2002, pp. 165–170 (2002) 9. Li, Y., Peng, S., Chu, W.: Metacube – a new interconnection network for large scale parallel systems. Australian Computer Science Communications 24, 29–36 (2002) 10. Parhami, B.: Introduction to parallel processing, algorithm and architecture. Plenum Press (1999) 11. Venkata Rao, M., Chalamaiah, N.: Routing and broadcasting algorithms for a metacube interconnection topology for large scale parallel systems. In: Proceedings of Asia Pacific Confeence on Parallel and Distributed Computing Technologies, December 2004, pp. 1037–1049 (2004) 12. SGI. Origin2000 Rackmount Owner’s Guide, 007-3456-003 (1997), http://techpubs.sgi.com/ 13. Tucker, L.W., Robertson, G.G.: Architecture and applications of the connection machine. IEEE Computer 21, 26–38 (1988) 14. Wu, C., Wu, J.: On self-similarity and hamiltonicity of dual-cubes. In: Proc. of Workshop on Massively Parallel Processing (in conjunction with IPDPS) (April 2003)
An On-Line Parallel Algorithm for Node Ranking of Trees Chia-Wei Lee1 , Justie Su-Tzu Juan2, , and Tai-Lung Wu2 1
2
Department of Computer Science and Information Engineering, National Cheng Kung University, No. 1, University Road, Tainan 701, Taiwan Department of Computer Science and Information Engineering, National Chi Nan University, No. 1, University Road, Puli, Nantou 545, Taiwan
[email protected]
Abstract. A node ranking of a graph G = (V, E) is a proper node coloring C : V → N such that any path in G with end nodes x, y fulfilling C(x) = C(y) contains an internal node z with C(z) > C(x). In the on-line version of the node ranking problem, the nodes v1 , v2 , ..., vn are coming one by one in an arbitrary order; and only the edges of the induced subgraph G[{v1 , v2 , ..., vi }] are known when the color for the node vi be chosen. And the assigned color can not be changed later. In this paper, we present a parallel algorithm to find an on-line node ranking for general tree. Our parallel algorithm needs O(n log 2 n) time with using O(n3 / log2 n) processors on CREW PRAM model. Keywords: Node ranking, on-line, algorithm, tree, parallel algorithm, PRAM.
1
Introduction
Given a graph G with n nodes, a node ranking problem is to assign an integer number, called rank (or color ), to each node such that any path between two nodes of the same rank passes through at least one node with greater rank. The optimal node ranking problem is the problem of minimizing the number of distinct ranks. The investigation of node ranking problem, also called ordered coloring problem [16], is important in many filed, such as computing Cholesky factorizations of matrices in parallel [4,11,22], scheduling problem of assembly steps in manufacturing systems [11,12,27], and finding the minimum-height elimination tree of a graph [7,27], and other applications in the field of VLSI-layout [19,26]. In this paper, we will consider the on-line version of node ranking problem. In such a version, nodes of a graph G are coming in an arbitrary order. The nodes of the graph G are colored one by one in such a way that only a local information
Corresponding author.
A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 384–395, 2009. c Springer-Verlag Berlin Heidelberg 2009
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that concerning edges between already present nodes is known when a rank of a node is chosen. The assigned rank can not be changed later. Figure 1 illustrates the examples of node ranking of a tree with off-line and on-line version. In Figure 1(b), the sequence, v1 , v2 , . . . , v8 , is the input sequence of the nodes of tree. Now, we define the node ranking problem theoretically. Let G = (V, E) be a simple graph with node set V and edge set E. A node k-ranking (node ranking) of G is a proper node coloring C : V → {1, 2, . . . , k} such that every path in G with end nodes x and y of the same color C(x) = C(y) contains a node z with greater color C(z) > C(x). The node ranking number χr (G) is the smallest integer k for which there exists a node k-ranking of G. A node k-ranking C of G is called optimal if max{C(x)|x ∈ V (G)} = χr (G). For a positive integer c, an c-node-ranking of a graph G is a labeling of the nodes of G with positive integer such that, for any label λ, deletion of all nodes with label great than λ leaves components, each having at most c nodes with with label λ. Clearly, an ordinary node ranking is a 1-node-ranking. The c-node-ranking problem is to find a c-node-ranking of a given graph using the minimum number of ranks. The minimum number of ranks needed for a c-node-ranking of G is called the c-node-ranking number. The graph G is called on-line node k-rankable if there is an algorithm that generates a node k-ranking of G for every possible input sequence of the nodes of G. That means the nodes v1 , v2 , ..., vn are coming one by one in an arbitrary order; and only the edges of the induced subgraph G[{v1 , v2 , ..., vi }] are known when the color of vi has to be chosen. The on-line node ranking number χ∗r (G) is the smallest positive integer k such that G is on-line node k-rankable. An on-line algorithm that generates a node ranking for graph G is called an on-line node ranking algorithm for G, and an on-line node ranking algorithm is called optimal if the resulting node ranking is optimal. In the recent year, there are some results about node ranking number with offline version. Iyer et al. [10] have presented an algorithm to find an optimal node
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ranking of a tree with time complexity is O(n log n). After that, Sch¨ affer [23] improved their work and obtained a linear-time algorithm for finding an optimal node ranking of a tree. And Katchalski et al. [16] proved that χr (T ) ≤ 1 + log2 |V (T )| for all tree T and also proved some theorems on planar graphs in 1995. Deogun et al. [6] solved the node ranking problem on interval graphs in O(n3 ) time, on permutation graphs in O(n6 ) time, on circular-arc graphs in O(n3 ) time, and on d-trapezoid graphs in O(n3 χr (G)3d−3 ), where n is the number of nodes of the input graph and χr (G) is the node ranking number of G. Yu [30] gave an algorithm with O(n) time to solve on cographs in 1994. In 1996, Wang and Yu [28] also solved this problem on interval graphs in O(αn3 ) where α is the clique number of interval graph. In [17], Kloks et al. proved that to find the node ranking number on asteroidal triple-free graphs is NP-complete. Abbas and Stewart [1] solved this problem on biconvex graphs in O(n4 (n + m)). And Hsieh [9] solved it on starlike graphs in O(n + m). For c-node-ranking problem, Zhou et al. [31] have obtained a linear-time algorithm to solve the c-noderanking problem for trees. Kashem et al. [15] have presented a polynomial-time algorithm for the c-node-ranking of partial k-tree. And Hashem et al. [8] have presented a linear-time algorithm for solving the c-node-ranking problem on a starlike graph. For parallel algorithm with off-line version, Liang et al. [20] gave parallel algorithms to find the node ranking number for trees in O(log n) time on CREW PRAM model, and in O(log2 n) time on EREW PRAM model. Yu [30] solved the node ranking parallel problem on cographs in O(n log n) time. After that, Liu and Yu [21] improved the work of Yu [30] and obtained an O(log n) time parallel algorithm on cographs. Recently, Kashem et al. [14] have presented an optimal parallel algorithm to solve the c-node-ranking problem on trees for any positive integer c in time O(log2 n) using linear operations on the EREW PRAM model. In the on-line version of node ranking problem, Bruoth and Horˇ na´k [5] found the bound of χ∗r (G) for G is path or cycle in 1999. Furthermore, in 2000, Schiermeyer et al. [24] showed the conditions of a graph G which has on-line node ranking number 3, denoted by ∗3 . Theorem 1. [5] If we apply greedy algorithm to find an on-line node ranking, then 1. For any n ∈ [1, ∞], log2 n + 1 ≤ χ∗r (Pn ) ≤ 2log2 n + 1. 2. For any n ∈ [3, ∞], log2 (n − 1) + 1 ≤ χ∗r (Cn ) ≤ 2log2 n + 1. Lemma 1. [10] Let Tn be a tree with n nodes. Then χr (Tn ) ≤ log3/2 n. There are so few results about the on-line node ranking problem had been done, and on-line version is more practical than off-line version. Therefore, we shall discuss it in some important network structures. Since trees are the most fundamental class of network topologies, we focus on on-line ranking of trees. In this paper, we present an on-line node ranking algorithm for trees in parallel. Our
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parallel algorithm needs O(n log2 n) time which is better than the sequence algorithm which was presented in [18] (the sequence algorithm needs O(n3 ) time). The organization of this paper is shown as following: First of all, we the sequence algorithm for on-line node ranking of general trees in Section 2. Secondly, we present the parallel on-line node ranking algorithm for general trees in Section 3. Finally, we summarize the results and give some future work in Section 4.
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Sequential Algorithms
In this section, we show the on-line node ranking algorithm for general trees with sequential method which was presented in [18]. The time complexity of the sequence algorithm is O(n3 ). The sequence algorithm used the idea of greedy algorithm. As each node was added, the algorithm have to choose a suitable color for ranking this new node. The algorithm uses an table (array) for each node to help us to record which color can not be chosen to rank next new neighbor of this node. After selected a color to rank the new node, this color may not be a suitable color for other new nodes any more. So, the algorithm modified each table for any old node after ranking a new node. The sequence algorithm used DFS (Depth-First-Search) technique for trees to modify each table. The sequence algorithm is shown as follows. In the sequence algorithm, an array color array[vi][j] is used to record any next new neighbor of vi can be colored with color j or not, 1 for yes, 0 for not. When each new node was added, Procedure Rank will choose a best suitable color for the new in-coming node and it will call the other two procedures. The Procedure Color Array is used to create a new color array for the new node. The Procedure Modify Color Array is used to modify the color array of the old nodes to keep the correctness of color array.
Algorithm ST(T, n) Input: An integer n = the number of nodes of tree T . Output: Assignment c of the colors to the nodes. 1: for k ← 1 to n do 2: Read the new node vk and the neighbors of vk T [{v1 , v2 , · · · , vk−1 }], say u1 , u2 , · · · , um 3: for i ← 1 to n do 4: color array[vk ][i] ← 1 5: Rank(vk ) Fig. 2. Algorithm ST
in T ∗
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Procedure Rank(vk ) 1: if m = 0 then 2: c(vk ) ← 1 3: color array[vk ][1] ← 0 4: else 5: for j ← 1 to n do 6: combine[j] = 1≤i≤m color array[ui ][j] 7: 8: 9: 10: 11: 12:
find the smallest color in which combine[color] = m, and for each i > color, combine[i] ≥ m − 1 c(vk ) ← color Color Array(vk , color) for i ← color to n do if color array[vk ][i] = 0 then Modify Color Array(vk , i) Fig. 3. Procedure Rank(vk )
Procedure Color Array(vk , color) 1: for i ← 1 to color − 1 do 2: color array[vk ][i] ← 1 3: color array[vk ][color] ← 0 4: for i ← color + 1 to n do 5: if combine[vk ] = m then 6: color array[vk ][i] ← 1 7: else 8: color array[vk ][i] ← 0 Fig. 4. Procedure Color Array(vk , color)
Procedure Modify Color Array(v, i) 1: for any node u adjacent to v do 2: if c(u) ≤ i then 3: color array[u][i] ← 0 4: Modify Color Array(u, i) Fig. 5. Procedure Modify Color Array(v, i)
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Parallel Algorithm
The parallel algorithm is presented based on the sequence algorithm. In the parallel algorithm, we consider it is running in CREW PRAM model. We use some well known parallel techniques and its applications in our parallel algorithm,
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these techniques is useful for reducing the time complexity. We also use five new arrays in the algorithm: mark[i], modif y[vk ][i], ancestor[vi ][vj ], n ancestor[vi ], and AN C[vi ][j]. The array mark[i] is used to help us when we want to choose a suitable rank to color a new node. The array modify[vk ][i] is used to record color array[vk ][i] is need to be renew or not when a new node be colored, 1 for yes, 0 for not. The array ancestor[vi ][vj ] is recorded whether node vj is an ancestor of node vi or not, 1 for yes, 0 for not. The array n ancestor[vi ] is used for record the number of ancestors of node vi . And the array ANC[vi ][j] saved the sum of modify[vm ][j] for all ancestor vm of vi in color j. In our parallel algorithm, we used two parallel techniques: Prefix Computation and Interval Broadcasting. The Prefix Computation is useful for counting the times of used for each color, and the Interval Broadcasting is useful for confirming which colors can not be used again. Except these two parallel techniques, we also used Euler Tour technique and its application in Procedure Ancestor. The Procedure Ancestor is useful for finding ancestors for each node in tree. It is help us to modify color array. After running this procedure when given a tree T ∗ rooted at vk , we have a k × k matrix which records whether vi is an ancestor of vj . We use ancestor[vi ][vj ] to represent whether vi is an ancestor of vj , 1 for yes, 0 for not. Given the preorder of the tree and the descendants of node vj , the question whether vi is an ancestor of vj can be answered in constant time using one processor. Since we use the results of Euler tour to perform the preorder of the tree T ∗ , the parents of every node, and the descendants of every node in O(log n), O(1) and O(1) with using O(n) processors, respectively. And to find the Euler tour can be done in O(1) with using O(n) processors. Hence, the Procedure Ancestor can be done in O(log n) with using O(n/ log n) processors. All of these parallel techniques can be found in [2] or [13].
Algorithm PT(T, n) Input: An integer n = the number of nodes of tree T . Output: Assignment c of the colors to the nodes. 1: for k ← 1 to n do 2: Read the new node vk and the neighbors of vk in T [{v1 , v2 , · · · , vk−1 }] = T ∗ , say u1 , u2 , · · · , um 3: for i ← 1 to n do 4: color array[vk ][i] ← 1 5: Rank(vk ) Fig. 6. Algorithm PT: Parallel Algorithm for On-Line Ranking of Tree
Now, we analyze Algorithm PT. In Procedure Modify Color Array, processors may read from the same memory location for modify[vm ][j] at the same time and exclusive write in line 12. And it is easy to see that the other steps of Algorithm PT are exclusive read and exclusive write. Thus, our parallel algorithm is running in CREW PRAM model.
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Procedure Rank(vk ) 1: if m = 0 then 2: c(vk ) ← 1 3: color array[vk ][i] ← 0 4: else 5: for j ← 1 to n pardo 6: Apply Prefix Computation 1≤i≤m color array[ui ][j] 7: 8: 9: 10: 11: 12: 13: 14: 15: 16: 17: 18: 19: 20: 21: 22: 23: 24: 25: 26: 27: 28:
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for j ← 1 to n pardo Choose a suitable color if combine[j] < m − 1 then mark[j] ← 0 else mark[j] ← −1 Apply Interval Broadcasting on mark array with leader set S, where S = {i |mark[j]=0,1 ≤ i ≤ r} for j ← 1 to n pardo if combine[j] < m − 1 then mark[j] ← 0 if combine[j] ← m and mark[j] ← −1 then mark[j] ← 1 Apply Prefix Computation on mark array for j ← 1 to n pardo if mark[j] ← 0 then mark[j] ← 1 else mark[j] ← 0 Apply Prefix Computation on mark array color ← mark[n] + 1 Find the suitable color c(vk ) ← color Color Array(vk , color) Modify Color Array(vk , color) Fig. 7. Procedure Rank(vk )
In [2] or [13], we know the time complexity of Prefix Computation and Interval Broadcasting both are O(log k) with using O(k/ log k) processors, where k is the size of input array. Then, the time complexity of Algorithm PT is evaluated as following. To combine the m color array which the m nodes adjacent to vk is O(log m) using O(nm/ log m) processors. To find the smallest color from color array of vk and give a color for vk can be done in O(log n) using O(n) processors. The Procedure Color Array can be performed in O(1) time using O(n) processors. And we need O(log k) time to find ancestors for each node using O(k 2 / log k) processors in Procedure Ancestor. Note that line 12 in Procedure Modify Color Array will take O(log k×log n) time and using O(k×(n/ log n)×(k/ log k)) processors. Thus, to performed the Procedure Modify Color Array need O(log k × log n) time
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Procedure Color Array(vk , color) 1: for i ← 1 to n pardo 2: if i < color then 3: color array[vk ][i] ← 1 4: if i ← color then 5: color array[vk ][i] ← 0 6: if i > color then 7: if the combine[i] ← m then 8: color array[vk ][i] ← 1 9: else 10: color array[vk ][i] ← 0 Fig. 8. Procedure Color Array(vk , color)
Procedure Modify Color Array(v, color) 1: for i ← color to n pardo 2: if color array[vk ][i] gets0 then 3: modify[vk ][i] ← 0 4: for j ← 1 to k − 1 pardo 5: if c(vj ) < i then 6: modify[vj ][i] ← modify[vk ][i] 7: else 8: modify[vj ][i] ← 0 ∗ 9: Ancestor(T , vk ) Find the ancestors for all nodes in which T ∗ 10: for i ← 1 to k pardo 11: Apply Prefix Computation to get n ancestor[vi ]← 1≤m≤k ancestor[vk ][vi ] 12: for i ← 1 to k pardo 13: for p ← 0 to log n − 1 pardo 14: for j ← p × (n/ log n) to (p + 1) × (n/ log n) pardo 15: Apply Prefix Computation to get 1≤m≤k modify[vm ][j], where ancestor[vm ][vi ] ← 1 16: if ANC[vi ][j] = n ancestor[vi ] then 17: modify[vi ][j] ← 0 18: if modify[vi ][j] ← 1 then 19: color array[vi ][j] ← 0
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Fig. 9. Procedure Modify Color Array(v, color)
using O((k 2 n)/(log k log n)) processors. The time complexity of Algorithm PT is simply the sum of the Procedures Color Array and Modify Color Array over all n nodes in the tree. Thus, the time complexity of the Algorithm PT is Σ1≤m≤k (O(log m) + O(log n) + O(1) + O(log k log n)) = O(n log2 n).
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And the number of processors that we need is max1≤k≤n max{O(nm/ log m), O(n), O(n), O(k 2 / log k), O(k 2 n/ log k log n)} = O(n3 / log2 n). Then, this parallel algorithm can be performed in O(n log2 n) time using n3 / log2 n processors. Thus, the cost of this parallel algorithm is O(n log2 n) × O(n3 / log2 n) = O(n4 ). Lemma 2. Lines 8–20 of Procedure Rank in Algorithm PT are equivalent to line 7 of Procedure Rank in Algorithm ST. Proof. Line 7 of Procedure Rank in Algorithm ST is to find the smallest color in which combine[color] = m, and for each i > color, combine[i] ≥ m − 1. In Procedure Rank of Algorithm PT, line 8–20 is used for avoid to choose a color k suck that combine[k] < m− 1. Line 11 which apply Interval Broadcasting will let the array mark array to be mark[1] = mark[2] = · · · = mark[a] = 0, and mark[a + 1] = mark[a + 2] + · · · + mark[n] = −1 for some 1 ≤ a ≤ n. That means, for all k ≥ a, combine[k] ≥ m − 1. Lines 13–14 is used to ensured the algorithm must choose the color with combine[color] = m. Then, we apply Prefix Computation in line 15, and we can know if mark[j] = 0, then color j can not be used certainly. In line 16–18, we exchange 1 and 0 in the values of mark array for succeeding computation. It will help us to compute how many colors can not be used. In line 19, we apply Prefix Computation again. After this step, we can obtain how many colors can not be used for rank vk . Finally, in line 20, we choose the smallest colorable color to rank vk . Hence, we obtain that the lines 8–20 of Procedure Rank in Algorithm PT are equivalent to line 7 of Procedure Rank in Algorithm ST. Lemma 3. The Procedure Modify Color Array of Algorithm PT is equivalent to the Procedure Modify Color Array of Algorithm ST. Proof. The Procedure Modify Color Array of Algorithm ST is used to modify color array of the old nodes to keep the correctness. We used DFS (Depth-First-Search) technique in this procedure. When we begin to modify color array for old nodes, if we find a node vi with C(vi ) > C(vk ), then we will not continue to modify color arrays of the children of vi any more. That is, if a node vj has an ancestor with greater color, then color array of node vj need not to modify. In Procedure Modify Color Array of Algorithm PT, lines 1–5 is used to initial the modify array. In line 6, we use Euler Tour technique and its applications to find which nodes are the ancestors for all the nodes in the tree. After this step, we have a k × k matrix ancestor[vi ][vj ], which is recorded whether vi is an ancestor of vj . Then in lines 7–8, we apply Prefix Computation to compute how many ancestors are there for all nodes in tree T ∗ rooted by vk . In line 12, for any 1 ≤ j ≤ n, we apply Prefix Computation to combine modify[vm ][j] for any ancestor vm of vi . And we record this results in ANC[vi ][j]. Line 13 is used to check each node has any ancestor with greater color than j
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or not. If there exist one ancestor of vi with greater color than j, then we set its modify array to be 0. Thus, if there are no ancestor of node vi with greater color than vi , then the number of the ancestor vm of vi with modify[vm ][j] = 1, let this number to be ANC[vi ][j], is equal to the number of the ancestors of vi . So if ANC[vi ][j] is less than the number of the ancestors of vi , then we need not to modify the color array[vi][j]. Finally, for any old node vi of T ∗ which can not have any new neighbor with color j due to the adding of vk , the value of modify[vi ][j] will be 1. Hence, in line 14, we set color array[vi][j] = 0 for this kind node vi and color j. Then, we have already modified the color array of the old nodes to keep the correctness of color array. Theorem 2. Algorithm PT is equivalent to Algorithm ST. Proof. By Lemma 2, we know lines 8–20 will find the suitable color for new node vk , which is equivalent to line 7 of Procedure Rank in Algorithm ST. By Lemma 3, we have the Procedures Modify Color Array in Algorithm ST and Algorithm PT are equivalent. Besides, the other steps of these two algorithms are clearly to see that they are equivalent. Then, we obtain that the Algorithm PT is equivalent to Algorithm ST. By Theorem 2, we know Algorithm ST and Algorithm PT are equivalent. That means each step in Algorithm ST can be performed in Algorithm PT by one or more steps. Hence, the following Corollary is obtained. Corollary 1. The output function C of Algorithm PT is an on-line node ranking of the input tree T .
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The node ranking problem is important in many filed, and the on-line version is more conformed to the real life than off-line version. Trees are the most fundamental class of network topologies. This motivate us focus on finding an on-line node ranking for general tree. In this paper, We have presented a parallel algorithm to find an on-line node ranking for trees. The parallel algorithm needs O(n log2 n) time and O(n3 / log2 n) processors on CREW PRAM model for trees. In our parallel algorithm for trees, lines 10–14 in Procedure Modify Color Array was a bottleneck. Since the cost of sequential algorithm presented in [18] is O(n3 ), but the cost of the parallel algorithm is O(n4 ). We believe that the time complexity or the number of processors can be reduced. Today, there are many algorithms on several special graph classes in off-line version, but few parallel algorithms in off-line version. For the on-line version, there are few on-line algorithms. Then, we will continue our study to present off-line parallel algorithm, and on-line node ranking algorithms for special graph classes, such as cographs, interval graphs, etc., in both sequential and parallel algorithms. And we will discuss the bounds of the values χ∗r (T ) as another future work.
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References 1. Abbas, N., Stewart, L.K.: Biconvex Graphs: Ordering and Algorithms. Discrete Applied Mathematics 103, 1–19 (2000) 2. Akl, S.G.: Parallel Computation: Models and Methods. Prentice Hall, NJ (1997) 3. Balakrishnan, R., Ranganathan, K.: A Textbook of Graph Theory. Springer, Heidelberg (1999) 4. Bodlaender, H.L., Gilbert, J.R., Hafsteninsson, H., Kloks, T.: Approximating Treewidth, Pathwidth and Minimum Elimination Tree Height. In: Schmidt, G., Berghammer, R. (eds.) WG 1991. LNCS, vol. 570, pp. 1–12. Springer, Heidelberg (1992) 5. Bruoth, E., Horˇ na ´k, M.: On-Line Ranking Number for Cycles and Paths. Discussiones Mathematicae, Graph Theory 19, 175–197 (1999) 6. Deogun, J.S., Kloks, T., Kratsch, D., M¨ uller, H.: On Vertex Ranking for Permutation and Other Graph. In: Enjalbert, P., Mayr, E.W., Wagner, K.W. (eds.) STACS 1994. LNCS, vol. 775, pp. 747–758. Springer, Heidelberg (1994) 7. Duff, I.S., Reid, J.K.: The Multifrontal Solution of Indefinite Sparse Symmetric Linear Equations. ACM Transactions on Mathematical Software 9, 302–325 (1983) 8. Hashem, T., Paul, U.K., Kashem, M.A.: An Algorithm for c-Vertex-Ranking of Starlike Graphs. In: Proceeding of 4th International Conference on Electrical and Computer Engineering ICECE 2006, Dhaka, Bangladesh, pp. 316–319 (2006) 9. Hsieh, S.Y.: On Vertex Ranking of a Starlike Graph. Information Processing Letters 82, 31–135 (2002) 10. Iyer, A.V., Ratliff, H.D., Vijayan, G.: Optimal Node Ranking of Trees. Information Processing Letters 28, 225–229 (1988) 11. Iyer, A.V., Ratliff, H.D., Vijayan, G.: Parallel Assembly of Modular Products-an Analysis. Technical Report, pp. 88–86, Georgia Institute of Technology, Atlanta, GA (1988) 12. Iyer, A.V., Ratliff, H.D., Vijayan, G.: On Edge Ranking Problems of Trees and Graphs. Discrete Applied Mathematics 30, 43–52 (1991) 13. J´ aJ´ a, J.: An Introduction to Parallel Algorithms. Addison-Wesley, Reading (1992) 14. Kashem, M.A., Rahman, M.Z.: An optimal parallel algorithm for c-vertex-ranking of trees. Information Processing Letters 92(4), 179–184 (2004) 15. Kashem, M.A., Zhou, X., Nishizeki, T.: Algorithms for generalized vertex-rankings of partial k-trees. Theoretical Computer Science 240(2), 407–427 (2000) 16. Katchalski, M., McCuaig, W., Seager, S.: Ordered Colorings. Discrete Mathematics 142, 141–154 (1995) 17. Kloks, T., M¨ uller, H., Wong, C.K.: Vertex Ranking of Asteroidal Triple-Free Graphs. In: Nagamochi, H., Suri, S., Igarashi, Y., Miyano, S., Asano, T. (eds.) ISAAC 1996. LNCS, vol. 1178, pp. 174–182. Springer, Heidelberg (1996) 18. Lee, C.W., Juan, J.S.T.: On-Line Ranking Algorithm for Trees. In: Proceeding of the 2005 International Conference on Foundations of Computer Science, Monte Carlo Resort, Las Vegas, Nevada, USA, June 27-30, pp. 46–51 (2005) 19. Leiserson, C.E.: Area Efficient Graph Layouts for VLSI. In: Proceeding of the 21st Annual IEEE Symposium on Foundations of Computer Science, pp. 270–281 (1980) 20. Liang, Y., Dhall, S.K., Lakshmivarahan, S.: Parallel Algorithm for Ranking of Trees. In: Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, pp. 26–31 (1990) 21. Liu, C.M., Yu, M.S.: An Optimal Parallel Algorithm for Node Ranking of Cographs. Discrete Applied Mathematics 87, 187–201 (1998)
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22. Liu, J.W.H.: The Role of Elimination Trees in Sparse Factorization. SIAM Journal of Matrix Analysis and Applications 11, 134–172 (1990) 23. Sch¨ affer, A.A.: Optimal Node Ranking of Trees in Linear Time. Information Processing Letters 33, 91–96 (1989) 24. Schiermeyer, I., Tuza, Zs., Voigt, M.: On-Line Rankings of Graphs. Discrete Mathematics 212, 141–147 (2000) 25. Semaniˇsin, G., Sot´ ak, R.: On-Line Ranking Number of Certain Classes of Graphs. In: Proceedings of the 4th Cracow Conference on Graph Theory (2002) 26. Sen, A., Deng, H., Guha, S.: On a Graph Partition Problem with Application to VLSI Layout. Information Processing Letters 43, 87–94 (1992) 27. Torre, P., Greenlaw, R., Sch¨ affer, A.A.: Optimal Edge Ranking of Trees in Polynomial Time. In: Proceedings of the 4th Annual ACM-SIAM Symposium on Discrete Algorithms Austin, Texas, pp. 138–144 (1993) 28. Wang, C.W., Yu, M.S.: An Algorithm for the Optimal Ranking Problem on Interval Graphs. In: Proceedings Joint Conference of International Computer Symposium, International Conference on Algorithms, pp. 51–58 (1996) 29. West, D.B.: Introduction to Graph Theory, 2nd edn. Prentice-Hall, Englewood Cliffs (2001) 30. Yu, M.S.: Optimal Node Ranking of Cographs. In: Proceedings of International Computer Symposium, Taiwan, pp. 1–6 (1994) 31. Zhou, X., Nagai, N., Nishizeki, T.: Generalized vertex-rankings of trees. Information Processing Letters 56(6), 321–328 (1995)
An Overview of Prophet Zheng Chen, Yin-Liang Zhao, Xiao-Yu Pan, Zhao-Yu Dong, Bing Gao, and Zhi-Wen Zhong Department of Computer Science and Technology, Xi’an Jiaotong University, Xi’an 710049, China
Abstract. Speculative Multithreading (SpMT) has been proposed as a perspective method to exploit Chip Multiprocessors (CMP) hardware potential. This paper researches speculative thread-level parallelism(TLP) for general-purpose programs. The Prophet system consists of a SpMT compiler framework and a simulator prototype based on the SpMT execution model. In the Prophet system, procedures are represented as weighted control flow graph (WCFG), the thread generator uses structural analysis and heuristic algorithm to partition the WCFG into sub-graphs which represent the candidate threads. Inter-thread data dependences are predicted by pre-computation slice (p-slice) to reduce RAW violation. Since the partition is speculative, thread state control mechanism and multi-versioning cache system are designed to buffer the speculative data, and a snooping bus based cache coherence protocol is used to detect data dependence violation. Simulation-based evaluation shows that the Prophet system could achieve significant speedup for general-purpose programs.1 Keywords: Speculative multithreading; Thread level parallelism; Thread partitioning; Pre-computation slice; Speculative Multithreading Architecture.
1 Introduction Speculative Multithreading (SpMT) proposed an effective mechanism to exploit TLP from general-purpose programs. In SpMT, the program is divided into multi-threads which can be executed in the presence of ambiguous data and control dependences. The SpMT system needs to detect state of the threads and adopts recover mechanism when speculation fails to assure the execution correctness. Since the SpMT compiler doesn't guarantee the independency of data and control, it can parallelize programs which are difficult to parallelize by conventional approaches. This paper presents the Prophet system with a SpMT compiler framework and a simulator based on SpMT execution model which exploits parallelism not only from loops but also from regions outside loops as well. In Prophet Compiler, the structural analysis based thread-partition algorithm considers the granularity of thread, interthread data and control dependences comprehensively to decide a good partition. Also the pre-computation slice (p-slice) is constructed to predict the key dependent values 1
Supported by National High Technology Research and Development Program of China under Contract No.2008AA01Z136.
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of speculative thread to solve inter-thread data dependences. We have also designed the thread-state control logic and multi-version cache in SpMT execution model. The cache system is designed to buffer speculative data, and a snooping bus based cache coherence protocol is used for data dependence violation detection. The simulation based evaluation of Olden benchmarks is given. Experimental results show that Prophet can effectively exploit thread-level parallelism from general-purpose programs. The remainder of the thesis is organized as follows. Section 2 introduces the related works. Section 3 describes the framework of Prophet System. In Section 4, the general Prophet compiler framework and the detailed implementation as well as the thread-partition algorithm is given. The execution model and underlying architectural support of Prophet are introduced in Section 5 and the evaluation results are given in Section 6. Finally, Section 7 concludes the paper.
2 Related Works SpMT has received significant research attention in recent years. The representative projects include Multiscalar[1] of Wisconsin university, Hydra CMP[2] of Stanford and SPSM[3] proposed by IBM. One of most famous achievements related to SpMT is SMA[4], proposed by National University of Defense Technology, which combines simultaneous multi-thread (SMT) with SpMT and exploits the TLP of general programs through the instruction-windows produced when threads are speculatively executed. Besides the academic institutions, the industry fields are also researching how to enhance the speed of single thread executed in multi-core. For example, the project called Mitosis[5] is started in 2005 by Intel, whose primary mission is combining hardware with compiler to accomplish speculative multithreading. The major contribution of this thesis is to develop and evaluate a compiler and hardware cooperation based approach to support SpMT. Prophet primarily focuses on general-purpose programs, which are more difficult to parallelize.
3 The Framework of Prophet Figure 1 gives the general framework of Prophet System. SUIF[6] frontend is used to transfer sequential C programs into Low-SUIF-IR. Some optimizations are used to get the LOW SUIF-IR as the input of MACHSUIF back-end[7]. A profiler is implemented to produce profile information from SUIF-IR as forms of annotations. The profile information are fed back to source MIPS assemble code to guide the thread partition. Thread generator is designed as the core compiling pass of Prophet. It constructs a weighted control flow graph from annotated MIPS assemble code, executes the heuristic thread partition algorithm based on analysis of control flow and data flow, inserts thread control instructions, constructs p- slice and finally outputs the MIPS assemble code with thread control instructions. The GNU MIPS assembler and linker are extended to support SpMT. Also a SpMT simulator is designed for simulation based evaluation of the performance of Prophet.
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Fig. 1. Framework of Prophet
4 Prophet Compiler Frameworks In the Prophet system, the compiler framework plays an important role, with thread partition as the most important task in compiling programs for multithreaded architectures. This section presents an overview of the general compiler framework of Prophet, with an emphasis on the thread partition algorithm and p-slice construction. The core objective of Prophet compiler is to better transfer sequential procedures to speculative multi-threads according to SpMT execution model (presented in Section 5.1) to obtain thread-level parallelism, and to improve the degree of parallelism by efficient thread partition algorithm and p-slice construction. The thread partition algorithm is aggressive and there can be ambiguous control and data dependences between threads, with the correctness maintained by recovery mechanism at run-time. 4.1 Formal Definition of Thread Model The term thread in the context of SpMT is not the operating system level thread. In the static perspective, it is a program segment defined by the thread control instructions. While in the dynamic point of view it corresponds to an uninterrupted sequence of execution instructions. Following gives the formal definition of procedures and threads. Definition 1. Weighted control flow graph (WCFG) G is a directed digraph, where N and E denotes nodes set and edges set of the procedure respectively. Ins(ni) denotes the dynamic instructions number of node ni. Freq denotes the weight of edge ei provided by profiler, it indicates the execution times of ei, or the iteration times of loop region if the edge is backward. Since the program is represented as WCFG, the thread partition process will be transferred to division of WCFG, where the thread is defined as a connected sub-graph of G. With adding of thread control instructions and p-slices into thread, definition of thread and control flow graph is slightly different. The following is a formal description of thread. Definition 2. Thread T is a directed digraph, where N and E are the same as G, but N0 , S, C, P denote entry node set of thread, spawn points set, CQIP set and p-slices set respectively. Suppose G is a weighted control flow graph, threads set M represents the parallel threads partitioned by SpMT
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compiler, then for any thread T, if T ∈ M , then T(N T ) ⊆ G(N) , and T(E T ) ⊆ G(E) . 4.2 Thread Partitioning Algorithm
The main task of Prophet compiler is to identify potential parallelism according to information obtained by static analysis and dynamical collection. For a given sequential program, the compiler needs to point out a series of threads spawn point (SP) and control quasi-independent point (CQIP) as the beginning and end of the speculative thread. During this process, the control dependence, data dependence and thread granularity have to be taken into account to decide a good partition. The candidate thread which have similar granularity, the smallest control and data dependence, and well load balance will give full performance. A number of heuristic rules are used to reduce the complexity of compiler analysis: 1. SP of candidate thread can be anywhere, but CQIP of non-loop region must be located at entry of basic block, and CQIP of loop region must be located before control instruction of last basic block. 2. Both SP and CQIP of candidate thread must be located in the same procedure, or in the same loop region. 3. The length between SP and CQIP of candidate thread must be higher than LOWER_LIMIT to overcome the initialization overhead when creating a thread, and smaller than UPPER_LIMIT to maintain load balance. 4. The data dependence count (number of data dependence arcs) along the likely path between two threads must be smaller than DEP_THRESHOLD to restrict the inter-thread data dependence. The Prophet compiler framework implements a structural based thread partition algorithm according to some heuristic rules to meet the spawn strategies of the SpMT execution model: Any point can be spawn point; Out-of-order spawning[12]; Both control speculative and control non-speculative based partition. Algorithm 1 uses the WCFG with profile information to construct the preorder traversal. Top-down structural analysis used on the profiled WCFG works as follow:
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program structureal_analysis () var P• procedure; begin build_pre_order_traversal(P); changed = true; while(changed){ for(int i = 0; i < num_nodes( ); i++){ found = find_loop_region(node[i]); if(found){ partition_loop(loop L); collapse_loop_region_and_rebuild_cfg(); changed = true; } } }
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procedure_size := cycles of dynamic instructions contained in procedure P; if(procedure_size < PROCEDURE_SIZE) inline_procedure(procedure P); return; start_block := the entry of procedure P; end_block := the exit of procedure P; curr_thread := create_new_thread(start_block,0,0); curr_thread:=partition_thread(start_block, end_block, curr_thread) ; end.
Function structural_analysis traverses the CFG P and partitions the procedure into multiple speculative threads. First, identify the loop regions and non-loop regions in find_loop_region. Partitioning of the loop regions is done by partition_loop. Then the loop regions are induced into one cfg node and another cfg named CFG P’ is rebuilt, partitioning is then done by traversing the CFG P’ from the root the same as the nonloop regions. The compiler looks ahead up to the CQIP of current basic block and partitions the CFG between current basic block and its CQIP into threads by calling partition_thread, which is also the algorithm for non-loop region partitioning. The non-loop region partition is done by partition_thread. It partitions the program segment between start block and its post-dominator block(current block’s controlindependent point) into multiple threads by calling itself recursively. A data dependence model based on data dependence count between two threads is used to find the optimal dependence to keep the data dependence in a proper threshold. The granularity of thread is defined as the dynamic instructions of the thread. Lower limit and upper limit are maintained to balance threads granularity. Only the candidate thread whose granularity is within the limits and whose dependency with the successor thread less than DEP_THRESHOLD can be partitioned into a new thread. If the candidate thread is too large, then the region between start_block and its control-independent block is further examined for potential partitioning. On the other hand, if the thread size is too small even when including the blocks along the likely path, then no new thread is created, the candidate thread is simply added to current thread and partitioning goes on. In loop regions partitioning, the thread size is guaranteed by restricting the number of dynamic instructions in loop region larger than LOOP_SIZE_THRESHOLD. The partitioning is similar as the algorithm of non-loop regions partitioning except that when the granularity of candidate thread is too small, the loop region is unrolled and once more partitioned as non-loop region. 4.3 P-Slice Construction
Prophet reduces inter-thread dependences through p-slice[13][14][15] inserted at the beginning of each speculative thread. P-slice is used to calculate the live-ins (the data consumed by current thread but produced by its predecessors) of the new speculative thread quickly but they do not need to guarantee correctness, since the underlying architecture can detect and recover from mis-speculations.
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The construction of the p-slice for a given speculative thread works as follows: Identify Live-ins Identifying the live-ins of a speculative thread requires a top-down traversal of its control-flow graph starting at the CQIP to identify register and memory values read before written by the speculative thread. Each path is explored up to a certain length. The length represents the time that previous threads take to compute and commit these values. This is because once the previous thread commits, the speculative thread no longer needs rely on predicted values, but can read committed values directly. Generating P-slices The p-slice for a speculative thread is built by traversing the control-flow graph backwards from the CQIP until the SP. Initially the instructions included in the p-slice are those that directly produce the thread live-ins. Then ancestors of these instructions are inserted, taking into account both data and control dependences. When generating p-slices, the information obtained by profiler is used to optimize the p-slice by pruning the live-ins that produced by unlikely path to minimize the unnecessary memory and register data dependence.
5 Prophet Architectural Support This section describes the SpMT execution model and the underlying Prophet Architecture support, which provides a mechanism to maintain program order and maintains the program correctness. It defines the semantic of thread spawn, squash and restart operations so that threads can be transferred to the right state. 5.1 Execution Model
The execution model of Prophet is targeted by Prophet Compiler and implemented by the underlying Prophet Architecture support. Prophet uses speculative list to infer program order. If thread X precedes thread Y in speculative list, this indicates that thread X has preceded thread Y in the original sequential execution. Threads commit data in the order defined by speculative list. When a thread is guaranteed not to violate any data dependences with its logically-earlier threads, it can commit all its speculative modifications to the memory. When speculation failed, all the logicallylater threads currently running are all squashed and the failed thread itself is restarted. Figure 2 depicts all the possible states in a thread life cycle. In Prophet, every thread maintains a version to distinct the data generated before and after each spawn point in order to make sure that speculative modifications in the parent thread take no effect to its sub thread’s pre-computation. While spawning a sub thread, the parent thread will pass its thread version to its sub thread and then increase its own thread version by 1. For a thread in pre-computation state, only the data generated before its spawn point are visible when it executes p-slice. But when the thread transferred to speculative execution (sp-execution) state, all the data generated by its parents are all visible to it.
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Fig. 2. Thread State Transition Diagram
5.2 Underlying Architecture Support
Prophet architecture support is loosely derived from Hydra[2]. Figure 3 shows the anatomy of the Prophet Architecture support. Besides components used in conventional CMP architecture, L1 memory data and register cache, register bus, thread state controller and version control logic are also added to enable speculation. Prophet buffers the speculation results, performs memory communication and disambiguation TU0 Register Files
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through L1 memory data cache. A single snoopy bus protocol is used to maintain L1 cache coherence. Prophet employs a unidirectional ring to transfer register values between CPUs, it is also utilized for transferring starting address and thread version of spawned thread. Thread state controller controls thread to transfer to the right state when some actions occur. Version control logic provides a mechanism to guarantee the thread access the right data at runtime. 5.2.1 Speculative Result Buffering Prophet uses a cache similar to Multi-Version Cache[11] to buffer speculation result and resolve data dependence violation. Since p-slice is created for each thread to reduce data dependence violation, Prophet must track data with multi-version not only among different threads but also within each individual thread. Prophet performs memory read and write operations in L1 cache according to speculative coherence scheme. For speculation to succeed, any cache line with the newest version is committed to the memory when the thread transfers to stable execution state.
⑴ Memory Data L1 Cache Line Fig. 4. Memory Data L1Cache Line
Figure 4 depicts all the fields in a cache line and whose semantics are as follows: Ver: Store the version of the cache line. V: Indicate whether this cache line is valid or not. M: Indicate whether this cache line is speculatively modified or not. RL: Indicate whether the data value is remote read from its predecessor or not. O: Indicate whether the data value is old or not. Address Tag: The address of data value. Data Value: Data store in this cache line. When speculatively read a memory data A thread can perform a speculative read either in sp-execution state or precomputation state. When in sp-execution state, the thread first performs a local read attempting to get the data with the newest version from its own L1 cache, if misses, it will then request the version control logic to read the newest data from its predecessors. If all the previous read miss, the data is read from memory. While in pre-computation state, the thread read data first from its “direct-parent” thread (the thread that has spawned it) in order to make sure that only the data before its spawn point are visible to itself. The data it should read is the one with the version that is the max meanwhile less than or equal to its thread version. If this read misses, it will read the newest data from its “direct-parent” thread’s predecessors in reverse order defined by speculative list just as in sp-execution state. All remotely read data is stored in local cache with RL field set true and Ver field set its thread version.
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When speculatively write a memory data When in sp-execution state, performing a write operation requires to check the version of the cache line to be written. If its version equals to the current thread version, the cache line will be modified directly without changing any other state fields. Otherwise, a new cache line with version equal to current thread version will be created and the previous one will be set as old. While in pre-computation state, the value field of the cache line is directly modified without checking its version. All the newly created cache lines in pre-computation have a version valued 0, indicating the data is generated during pre-computation and should be verified before committing. All write operations in both states must be propagated to its successors along speculative list to detect data dependence violation.
⑵ Register Data L1 Cache Line Fig. 5. Register cache line
Figure 5 depicts all the fields in the register cache line with whose semantics as follows: Load: Read field of local register. When the register has been read in local thread, it will be set 1. Store: Write field of local register. When the register has been written in local thread, it will be set 1. Valid: Validation field of local register. This field is initialized as -1, indicating this register is neither read nor written. If the first operation performed on this register is read, it will be set 0; otherwise it will be set 1. Regnum and regvalue fields contain the number of the register and its speculative value. The register cache is initialized the moment that thread quits pre-computation state. When the thread performs a register read or write operation in sp-execution state, its associated cache line’s state fields are set or updated. 5.2.2 Memory Data Dependence Violation Detection Prophet capitalizes on a single snoopy bus protocol to detect memory data dependence in sp-execution state. When a thread speculatively writes a data in sp-execution state, it will send a write message to the bus. Its successive sub thread will detect the message and get the write address to check in its own local L1 cache whether a RAW violation has occurred. If so, all the more speculative threads are squashed and the sub thread itself will be restarted. Write operation in pre-computation state does not send a write message, Prophet relies on verification to detect memory dependence violations that may occurred in pre-computation state. Before the stable thread commits, it will verify the speculative modifications generated by its immediate sub thread in pre-computation state. This is carried out just by comparing the values pre-computed by its sub thread with the values generated by the stable thread. If all the values with the same address are equal,
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this means that no violation occurs. Otherwise all the sub threads are squashed and the stable thread will continue running. 5.2.3 Register Synchronization Since p-slice can forecast the register values, Prophet doesn’t synchronize register values at runtime. The register synchronization is postponed until thread committing[9]. Just as the verification and committing of memory speculative modifications, register values are also verified by the stable thread and committed to its immediate sub thread. In Prophet, all the register values need verification are stored in the sub thread’s L1 register cache and with valid field set 0. These values are read before they are written. If a register value is neither read nor written, the stable thread will commit its value to the sub thread and the register value is synchronized.
6 Experimental Evaluations We have implemented the Prophet compiler prototype based on SUIF/MACHSUIF compiler framework. The MIPS assemble code is expanded with some special thread control instructions to support SpMT. Table 1. Characterization of the Olden benchmarks
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31.5 33.5 51.9 35.2 31.7 86.4 40.5 40.3
% of Dynamic Instr. in loop 90.8% 0.0% 91.0% 74.5% 73.3% 89.2% 0.0% 100%
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12% 10.1% 7.1% 9.0% 11% 5.0% 9.1% 8.6%
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Speedup
22% 13% 17% 10% 11% 18% 15% 12%
For benchmarks, 8 programs from Olden[8] are used. According to different setup, the compiler generates different kinds of SpMT threads with different speedup. The default compiler threshold value, which defined by the lower and upper limits of the dynamic instructions number in a thread, is set 15~50. The default value for interthread data dependence count threshold is 3. Table 1 presents some statistics of the speculative threads generated by Prophet with 4 thread units. The second column shows the average number of instructions executed by speculative threads. The fourth column shows the average dynamic size of the p-slices and the fifth column shows the relative size between speculative thread and its corresponding p-slice. The sixth column shows the average number of thread input values computed by the p-slice.
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Finally, the right-most column gives the speedup of Prophet with 4 thread units; it is acquired by an estimation model implemented to estimate the execution time when the program is executed in the SpMT manner. It shows that most of the benchmarks have good speedup. In the case of mst, it outperforms single-threaded execution by 22%. Although perimeter and treeadd have no loops, they have recursive function calls instead. Both of the two benchmarks have large percentages of non-loop threads. While in health, mst and tsp, most of the partition time is spent in loops. Figure 6 shows the performance of the Prophet compared with the other singleand multi-threaded architectures. Performance is obtained over a single thread unit. The compares architectures are: a) an out-of-order superscalar processor and b) a single thread unit with perfect memory. The last bar in each group of bars shows the speedup estimated by our estimation model. It shows that the Prophet system is effective at exploiting thread-level parallelism from almost all the benchmark programs despite their irregular program structure.
7 Conclusions In this paper the Prophet compiler and simulator are presented for exploiting speculative thread-level parallelism. The Prophet compiler system can deal with both loop-based partition and non-loop based partition. The partition algorithm supports out-of-order spawning of threads and spawning from anywhere in a thread. The p-slice is also constructed to reduce inter-thread data dependence. The SpMT architecture is designed to support speculatively execution of multithreading programs. The conventional multi-version cache is extended to support tracking data both among multi-threads and within individual thread. A register bus is introduced to make the register value transferred more effective. In contrast with many previous approaches to synchronize register value at runtime[10], Prophet capitalizes on p-slice to predict register value and uses register verification and committing mechanism to synchronize register value. Also the Prophet simulator is developed to execute the binary code generated by Prophet compiler. The results obtained by the Prophet compiler for a subset of the Olden benchmarks are encouraging. Overall, this work shows that the combination of loops and nonloops, speculative and non-speculative threads has the potential to extract tread-level parallelism in general-purpose programs.
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References 1. Sohi, G., Breach, S., Vijaykumar, T.: Multiscalar Processors. In: Proceedings of the 22nd International Symp on Computer Architecture, Margherita Ligure, Italy, pp. 414–425. ACM Press, New York (1995) 2. Hammond, L., Hubbert, B., Siu, M., et al.: The Stanford Hydra CMP. In: IEEE Micro, vol. 20(2), pp. 71–84. IEEE Computer Society, Los Alamitos (2000) 3. Dubey, P.K., Brien, K.O., Barton, C.: Single-program speculative multithreading(SPSM) architecture: Compiler-assisted fine-grained multithreading. In: Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques, Limassol, Cyprus, IFIP Working Group on Algol, pp. 109–121 (June 1995) 4. Kun, D.: Compiling for the Speculative Multithreading Architecture. National University of Defense Technology, Changsha. PhD thesis(2001) (in Chinese) 5. Madriles, C., Quiñones, C.G., Sánchez, J., et al.: The Mitosis Speculative Multithreaded Architecture. In: Proceedings of the International Conference ParCo 2005, John von Neumann Institute for Computing, vol. 33, pp. 27–38 (2006) 6. Wilson, R., et al.: SUIF: An Infrastructure for Research on Parallelizing and Optimizing Compiler. ACM SIGPLAN Notices 29(12) (December 1996) 7. http://www.eecs.harvard.edu/hube/software/ 8. Olden Benchmark Suite[EB/OL], http://www.cs.princeton.edu/~mcc/olden.html 9. Zhai, A., Steffan, J.G., Colohan, C.B., Mowry, T.C.: Compiler and Hardware Support for Reducing the Synchronization of Speculative Threads. ACM Transactions on Architecture and Code Optimization 5(1), Article 3 (May 2008) 10. Ohsawa, T., Takagi, M., Kawahara, S., Matsushita, S.: Pinot:Speculative Multi-threading Processor Architecture Exploiting Parallelism over a Wide Range of Granularities. In: Proceedings of the 38th Annual IEEE/ACM International Symposium on Michroarchitecture (MICRO 2005) (2005) 11. Vijaykumar, T.N., Gopal, S., Smith, J.E., et al.: Speculative Versioning Cache. IEEE Trans. Parallel Distrib. Syst. 12(12), 1305–1317 (2001) 12. Renau, J., Tuck, J., Liu, W., et al.: Tasking with out-of-order spawn in TLS chip multiprocessors: microarchitecture and compilation. In: Proceedings of ICS 2005: Proceedings of the 19th annual international conference on Supercomputing, pp. 179–188. ACM Press, New York (2005) 13. Quiñones, C.G., Madriles, C., Sánchez, J., et al.: Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices. In: Proceedings of PLDI 2005: Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation, pp. 269–279. ACM Press, New York (2005) 14. Liao, S., Wang, P., Wang, H., Hoflehner, G., Lavery, D., Shen, J.: Post-Pass Binary Adaptation for Software-Based Speculative Precomputation. In: ACM Conference on Programming Language Design and Implementation (June 2002) 15. Madriles, C., Sánchez, C.G.Q.J., Marcuello, P., et al.: The Mitosis Speculative Multithreaded Architecture. In: Proceedings of Parallel Computing: Current & Future Issues of High-End Computing, pp. 27–38 (2006)
Fast License Plate Localization Using Discrete Wavelet Transform Yuh-Rau Wang1,*, Wei-Hung Lin2, and Shi-Jinn Horng2,3 1
Dept. of Computer Science and Information Engineering, St. John’s University, Taipei, Taiwan
[email protected]
2
Dept. of Computer Science and Information Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan
[email protected] 3
Dept. of Electronic Engineering, National United University, Miao-Li, Taiwan
[email protected]
Abstract. Some previous works use discrete wavelet transform (DWT) to extract license plate (LP), however, most of them are not capable of dealing with complex environments such as the low-contrast source images and the dynamic-range problems. In this paper, we propose a license plate localization (LPL) algorithm based on DWT. The LP can be extracted from complex environments and different quality of source images by using two frequency subbands. We first use the HL subband to search the features of LP and then verify the features by checking whether a horizontal line around the feature exists in the LH subband or not. The proposed method can extract both front and back LPs of various vehicles. The experiments show that the proposed method can achieve good LPL results with both short run-time and high accurate detection rate. Keywords: License plate localization, license plate recognition, discrete wavelet transform, histogram, digital image processing.
1 Introduction Intelligent transport system (ITS) is developed and applied in our life recently. Same as flow of traffic, traffic analysis, parking automation, identification of stolen vehicles, the license plate recognition (LPR) is one of the applications in ITS. The license plate (LP) can be detected and recognized by digital image processing and computer vision. LPR algorithm can be separated into three main processing steps: 1). license plate localization (LPL), i.e., detecting the location of LP; 2). character segmentation (CS), i.e., segmenting the characters of LP; and 3). character recognition (CR), i.e., recognizing the characters of LPR. Among the three main processing steps of LPR, LPL is the most important part of the three steps. The main difficulty of the LPL is the environment. *
Corresponding author.
A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 408–415, 2009. © Springer-Verlag Berlin Heidelberg 2009
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There exist (one or) two horizontal lines and many vertical lines in an LP. Many proposed LPL methods, such as Sobel operator [1-5], invoke image enhancement and edge detection to find these features; but LP is not easy to be detected when the image is blurry. Furthermore, using edge detection to detect the LP, within which there exists “rectangle like” image, takes lots of execution time. In [6-9], the color-based LPL are proposed. These methods can not be used widely, since the colors between different cars are different (for example, the color of taxi is different from that of other vehicles in Taiwan) and the colors of LP are country specific. In [10], a wavelet based method is used, the license plate can be find quickly from LH subband by a reference line. However, the method is not suitable to be applied in complex environments and the distance between vehicle and camera can be neither too far nor too close [11]. Li and Xie [9] proposed a color and texture feature based for LPL. They use projection and DWT to detect the LP. The disadvantage is that the LP is too small to be detected when the color of LP loses its original color or there exist similar color and texture features with other objects. Guo and Liu [12] proposed a feedback selflearning for LPL. They use edge detection, texture property, aspect ratio, and color similarity to find the LP. The disadvantage is that only the still image can be used and the size of LP is fixed. For applying in real-time LPR, not only high accuracy but also quick response time is needed. Moreover, since it takes more time for the LP to be recognized in various distances between camera and cars, the proposed LPR algorithm requires performance improvement as well. In this paper we propose a wavelet-based LPL method. We compute the horizontal and vertical gradients from LH and HL subbands, respectively. Then in terms of the texture of character of LP and background of LP, we detect the location of LP. Experimental results show that the average execution time of LPL is less than 0.2 sec and can be implemented in complex environments and achieve 97.33% accurate rate in real-time application
2 The Proposed Method The received color image, which is taken by CMOS camera, is first converted to gray image and then transformed into frequency domain by employing 1-level 5/3 discrete wavelet transform (DWT) as shown in Fig.1. Since there exist vertical information in the HL subband and horizontal information in the LH subband, we employ these two subbands to find the candidate. Fig. 2 shows the LP is detected by the proposed method. The detailed algorithm is described as follows: Step 1. Convert the color image to gray image. Step 2. The gray image is transformed into frequency domain by 1-level 5/3 DWT. Step 3. This step is to reduce the noise in HL and promote the accurate rate of LP detection by removing some insignificant coefficients as follows. We calculate the histogram of every vertical line in HL subband by its length. Then, we remove the number which is greater than one hundred and above. Let the longest length in the remaining histogram be denoted as AvglengthV. Then
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LL
HL
LH
HH
Fig. 1. One-level DWT for a car image
Fig. 2. The LP is detected by the proposed method
we remove the length which is less than the average length AvglengthV,. by employing Eq.(1).
⎧ HL , HLVi > Avg lengthV , HLV = ⎨ Vi ⎩0 , otherwise, where HLV is the set of vertical lines in HL, HLvi ∈ HLV , 0 < i the width of the received image.
(1)
≦ W/2, W is
Step 4. We first calculate the average of the coefficients of LH, denoted as AvgLH, and then clear any of the coefficients whose value is less than this average value AvgLH. w/2
∑ x j, LH
Avg LH =
j =0
w/2
∑
j =0
1, if x j , LH > 0
(2)
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, if x j ,LH > Avg HL ⎧x x j ,LH = ⎨ j ,LH otherwise. ⎩0,
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(3)
Step 5. Assume that the width of LP is one fifths of the width of input image. We scan the HL subband from bottom to top and from left to right within this one fifths width to count the number of white points and then find the one which has the largest number (at least greater than six) of white points in HL subband. Then scanning the corresponding five rows above this position to check whether there exists a horizontal line or not. If there exists a horizontal line, then we denote it as the candidate LP and record its row coordinate Y. Step 6. This step is to set the coordinates of LP. We adjust the size of the block. The starting vertical coordinate SY of the LP in HL subband is equal to the corresponding row coordinate Y which is recorded in LH subband. Then expending the size of the block in HL subband. The ending vertical coordinate EY is set to SY plus 10. The starting horizontal coordinate SX is set to the initial horizontal coordinate of the block. The ending horizontal coordinate EX is set to (EY-SY) x 4. Step 7. Adjust SX and EX. We use a sliding window where the width is equal to (EXSX)/3 and the height is equal to (EY-SY). We slide the window from the left hand side (i.e., the beginning) of the candidate LP to 1/3 of the candidate LP and to find out the X coordinate of the window where there exists the largest cardinality of white pixels in this window and denote it as the new SX. Similarly, we move the window from the right hand side (i.e., the ending) of the
(a)
(b) Fig. 3. Using a window to adjust (a) SX and (b) EX within a candidate LP
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candidate LP to 2/3 of the range of the candidate LP and to find out the X coordinate of the window where there exists the largest cardinality of white pixels in this window and denote it as the new EX. Step 8. Adjust SY and EY. We employ the new rectangle, which is formed in Step 6, to calculate the number of pixels in every row respectively. First, from top of the rectangle to the top of HL, if no white pixels are in a row, then the new row is set to be SY. Then from bottom of the rectangle to the bottom of HL, if no pixels are in a row, then the new row is set to be EY (see Fig. 4). Fig. 4 shows how to find the location of license plate from these candidates in an image.
Fig. 4. Adjusting the SY and EY of the candidate LP within the captured image
Step 9. Transform the coordinate from HL frequency to spatial domain
3 Experimental Results In the experiments, the proposed method is evaluated on IBM X61 notebook 2.4 GHz CPU, 2GB RAM, Windows XP. The test images include 300 different images of size
Fig. 5. The images of still cars captured outdoors
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400 × 300. All of the images are taken by CMOS camera of mega-pixel resolution. Both the indoor and outdoor environments are included. Both still and moving cars images are evaluated. LP images of different angles and different lighting conditions are also considered. Some of them are shown in Figs. 5-8. Figs. 5 and 6 show the images of still cars captured outdoors and indoors, respectively. Fig. 7 shows the images of still cars captured in different angles. Fig. 8 shows the images of moving cars captured in the daytime. The experimental results show that the number of successful detection is 292, and the number of fault detection is 8. That is, the correct rate is 97.33%. The average execution time of LPL is 0.18sec. The comparison results with various methods are shown in Table 1. The proposed method, which employs the cheaper CMOS camera and does not restrict the distance between camera and cars, is only inferior to the method proposed by Hung et al. [14]. Overall, it shows that the proposed method achieves excellent performance.
Fig. 6. The images of still cars captured indoors
Fig. 7. The images of still cars captured in different angles
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Fig. 8. The images of moving cars captured in the daytime
Table 1. Comparison results of various methods Methods
Correct rate
Guo [12] Zhang [13] Li [9] Hung [14] Hsieh [10] The paper
97.1% 93.5% 96.4% 97.31% 92.4% 97.33%
Average execution time 0.532 sec 0.8 sec 3 sec 0.016 sec N/A 0.18 sec
5 Conclusion In this paper, we propose an LPL algorithm based on DWT. LP detection is the most important step in the LPR. The proposed LPL algorithm can be used in complex environments and different size of LP image. By using DWT instead of edge detection to find the vertical and horizontal gradients of LP, in the proposed algorithm, we achieve fast real-time LPL. The experimental results show that the proposed algorithm can quickly detect the location of LP in different environments with high accuracy.
Acknowledgements This work was partially supported by the National Science Council of Taiwan under contract number NSC 97-2221-E-129-007.
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References [1] Wang, S.Z., Lee, H.-J.: Detection and recognition of license plate characters with different appearances. In: Proc. IEEE Int. Conf., Intell. Transp., pp. 979–984 (2003) [2] Zheng, D., Zhao, Y., Wang, J.: An efficient method of license plate location. Pattern Recognit. Lett. 26(15), 2431–2438 (2005) [3] Yang, F., Ma, Z.: Vehicle license plate location based on histogramming and mathematical morphology. In: Proc. 4th IEEE Workshop Autom. Identification Advanced Technol., pp. 89–94 (2005) [4] Suryanarayana, P.V., Mitra, S.K., Banerjee, A., et al.: A morphology based approach for car license plate extraction. In: Proc. IEEE INDICON, Chennai, India, pp. 24–27 (2005) [5] Ma, Z., Yang, J.: A license plate locating algorithm based on multiple Gauss filters and morphology mathematics. In: Proc. 24th IASTED Int. Multiconference, Signal Process, Pattern Recog. Appl., Insbruck, Austria, pp. 90–94 (2006) [6] Shi, X., Zhao, W., Shen, Y.: Automatic License Plate Recognition System Based on Color Image Processing. In: Gervasi, O. (ed.), pp. 1159–1168. Springer, Heidelberg (2005) [7] Cao, G., Chen, J., Jiang, J.: An adaptive approach to vehicle license plate localization. In: Proc. 29th Annu. Conf. IECON, pp. 1786–1791 (2003) [8] Chang, S.L., Chen, L.S., Chung, Y.C., et al.: Automatic license plate recognition. IEEE Trans. Intell. Transp. Syst. 5(1), 42–53 (2004) [9] Li, J., Xie, M.: A color and texture feature based approach to license plate location. In: Proc. Int. Conf. Computational Intelligence and Security, Harbin, pp. 376–380 (2007) [10] Hsieh, C.T., Juan, Y.S., Hung, K.M.: Multiple license plate detection for complex background. In: Proc. IEEE 19th Int. Conf. AINA, pp. 389–392 (2005) [11] Anagnostopoulos, C.N.E., Anagnostopoulos, I.E., Psoroulas, I.D., et al.: License plate recognition from still images and video sequences: A Survey. IEEE Trans. Intelligent Transportation Systems 9(3), 377–391 (2008) [12] Guo, J.M., Liu, Y.F.: License plate localization and character segmentation with feedback self-learning and hybrid binarization techniques. IEEE Trans. on Vehicular Technology 57(3), 1417–1424 (2008) [13] Zhang, H., Jia, W., He, X., Wu, Q.: Learning-based license plate detection using global and local features. In: Proc. ICPR, pp. 1102–1105 (2006) [14] Hung, K.M., Chuang, H.L., Hsieh, C.T.: License plate detection based on expanded Haar wavelet transform. In: Fuzzy Systems and Knowledge Discovery, Proc. 4th Int. Conf. FSKD, Haikou, pp. 415–419 (2007)
Fast Parallel Molecular Solution for DNA-Based Computing: The 0-1 Knapsack Problem Sientang Tsai Department of Information Management Southern Taiwan University, Yuan Kung city,Tainan county, Taiwan, R.O.C.
[email protected]
Abstract. It is shown first by Adleman that deoxyribonucleic acid (DNA) strand could be employed towards calculating solution to an instance of the NPcomplete Hamiltonian Path Problem (HPP). Lipton also demonstrated that Adleman’s techniques could be used to solve the satisfiability (SAT) problem. In this paper, it is demonstrated how the DNA operations presented by Adleman and Lipton can be used to develop the DNA-based algorithm for solving the 0-1 Knapsack Problem.
1 Introduction In 1961, Feynman first offered bio-molecular computation, but his idea was not implemented by experiments for a few decades [1]. Adleman [2] in 1994 succeeded to solve an instance of the Hamiltonian path problem in a test tube, just by handling DNA strands. From [5], it was indicated that an optimal solution of every NPcomplete or NP-hard problem is determined from its characteristics. DNA-based algorithms had been proposed to solve many computational problems and those consisted of the satisfiability problem [3], the maximal clique [6], three-vertexcoloring [7], the set-splitting problem [8], the set-cover problem and the problem of exact cover by 3-sets [9], the dominating-set [10], the maximum cut problem [11], the binary integer programming problem [12] and the set-partition problem [24]. One potentially significant area of application for DNA algorithms is the breaking of encryption schemes [13,14]. From [15-17], DNA-based arithmetic algorithms are proposed. Furthermore from [18], DNA-based algorithms for constructing DNA databases are also offered. The aim of this work is to use the biological operations in the Adleman-Lipton filtering model to develop the DNA-based algorithms for solving the 0-1 knapsack problem. The rest of the paper is organized as follows. Section 2 introduces DNA models of computation proposed by Adleman and his co-authors in details. Section 3 introduces the DNA program to solve the 0-1 kapsack problem from solution spaces of DNA strands. Conclusions are drawn in Section 4.
2 DNA Model of Computation In the last decade there have been revolutionary advances in the field of biomedical engineering particularly in recombinant DNA and RNA manipulating. Due to the A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 416–427, 2009. © Springer-Verlag Berlin Heidelberg 2009
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industrialization of the biotechnology field, laboratory techniques for recombinant DNA and RNA manipulation are becoming highly standardized. Basic principles about recombinant DNA can be found in [22-26]. In this subsection we describe eight biological operations useful for solving the 0-1 knapsack problem. The method of constructing DNA solution space for the 0-1 knapsack problem is based on the proposed method in [20, 21]. A (test) tube is a set of molecules of DNA (a multi-set of finite strings over the alphabet {A, C, G, T}). Given a tube, one can perform the following operations: 1. Extract: Given a tube T and a short single strand of DNA, “s”, produce two tubes +(T, s) and –(T, s), where +(T, s) is all of the molecules of DNA in T which contain the strand “s” as a sub-strand and −(T, s) is all of the molecules of DNA in T which do not contain the short strand “s”. 2. Merge: Given tubes T1 and T2, yield ∪(T1, T2), where ∪(T1, T2) = T1 ∪ T2. This operation is to pour two tubes into one, without any change of the individual strands. 3. Amplify: Given a tube T, the operation Amplify (T, T1, T2), will produce two new tubes T1and T2 so that T1 and T2 are a copy of T (T1 and T2 are identical) and T becomes an empty tube. 4. Append: Given a tube T and a short strand of DNA,” s”, the operation will append the short strand, “s”, onto the end of every strand in the tube T. It is denoted by Append (T, s). 5. Append-head: Given a tube T and a short strand of DNA, “s”, the operation will append the short strand, “s”, onto the head of every strand in the tube T. It is denoted by Append-head (T, s). 6. Detect: Given a tube T, say ‘yes’ if T includes at least one DNA molecule, and say ‘no’ if it contains none. It is denoted by Detect (T). 7. Discard: Given a tube T, the operation will discard the tube T. It is denoted by Discard (T). 8. Read: Given a tube T, the operation is used to describe a single molecule, contained in the tube T. Even if T contains many different molecules each encoding a different set of bases, the operation can give an explicit description of exactly one of them. It is denoted by Read (T).
3 The DNA Algorithms for Solving the 0-1 Knapsack Problem 3.1 Definition of the 0-1 Knapsack Problem Assume that there are q items. Let S = {item1, item2, …, temq}, wi = weight of itemi, pi = profit of itemi , M = maximum weight the knapsack can hold, where wi, pi, and M are positive integers. Determine a subset A of S such that q p x is maximized subject
∑
i =1
to
q
∑wx i =1
i
i
≤M
i
i
, where xi ∈{0, 1}. xi =1 if the ith item in set S is selected for the
knapsack and xi = 0 otherwise. Without loss of generality we also assume that wi ≤ M for 1≤ i ≤ q, so each item fits into the knapsack.
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For example, suppose we have three items expressed by a finite set S = {item1, item2, item3}, the weight and profit for each item are listed as Table 1. The value of M, the maximum weight that knapsack can carry, is 10 lb. The total subsets of S are, respectively, ∅, {item1}, {item2}, {item3}, {item1, item2}, {item2, item3}, {item1, item3} and {item1, item2, item3}. According to the definition above of the 0-1 knapsack problem, their corresponding binary values of {x3, x2, x1} are subsequently, 000, 001, 010, 100, 011, 110, 101, 111. The feasible solutions satisfying the constraint w1x1 + w2x2 + w3x3 ≤ 10 are ∅, {item1},{item2}, {item3}, {item1, item2} and {item1, item3}. Clearly the optimal solution is to fill the knapsack with items whose profit is the largest. Then the optimal solution to this problem instance is A = {item1, item3}, because total profit $11 is the maximum satisfied the constraint that the total weight of all selected items doesn’t exceed 10 lb. Table 1. The 0-1 knapsack problem instance Item ( itemi )
Weight ( wi )
Profit ( pi )
item1
w1=3 lb
p 1= $ 6
item2
w2=5 lb
P2=$ 4
item3
w3=7 lb
P 3= $ 5
3.2 Construct the Solution Space of DNA Strands for the 0-1 Knapsack Problem Assume that xqxq-1…x2x1 is a q-bit binary number, which is applied to represent one of the 2q subsets of a q-element set S. From [20, 21], for every bit xk representing the kth element in S for 1≤ k ≤ q, two distinct 15-base value sequences are designed. One represents the value “0” for xk, and the other represents the value “1” for xk. For sake of convenience in our representation, assume that xk1, which represents the kth item selected in set S, denotes the value of xk to be 1 and xk0, which represents the kth item not selected in set S, denotes the value of xk to be 0. The following DNA-based algorithm is used to construct the solution space for 2q possible subsets of a q-element set S. The result generated by Init (T0, q) for our example in the previous section is shown in Table 2. Procedure Init (T0, q) (1) Append (T1, xq1) (2) Append (T2, xq0) (3) T0 = ∪(T1, T2) (4) For k= q –1 downto 1 (4a) Amplify (T0, T1, T2) (4b) Append (T1, xk1) (4c) Append (T2, xk0) (4d) T0 = ∪(T1, T2) End For EndProcedure
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Table 2. The result is generated by Init (T0, q) Tube
The result generated by Init (T0, q)
T0
{x31x21x11, x31 x21 x10, x31 x20 x11, x31 x20 x10, x30 x21 x11, x30 x21 x10, x30x20x11, x30x20x10}
T1
∅
T2
∅
Lemma 1: The algorithm, Init (T0, q) is used to construct the solution space of 2q possible subsets for a q-element set S. Proof: The algorithm, Init (T0, q), is implemented via amplify, append and merge operations. Step (1) and Step (2) are subsequently applied to append DNA sequences, which represent the value “1” for xq and the value “0” for xq respectively, onto the end of every strand in tube T1 and tube T2. This means that subsets containing the qth element appear in tube T1, and subsets not containing the qth element appear in tube T2. Next, Step (3) is used to pour tube T1 and T2 into tube T0. This indicates that DNA strands in tube T0 include DNA sequences of xq = 1 and xq = 0. Each time Step (4a) is performed, it uses amplify operation to copy the contents of tube T0 into two new tubes, T1 and T2, which are copies of T0. Tube T0 becomes empty. Step (4b) and Step (4c) are used to subsequently append DNA sequences, respectively representing the value “1” for xk and the value “0” for xk, onto the end of every strand in tube T1 and tube T2. This implies that subsets containing the kth element appear in tube T1 and subsets without containing the kth element appear in tube T2. Next, Step (4d) is used to pour tube T1 and T2 into tube T0. This indicates that DNA strands in tube T0 include DNA sequences of xk = 1 and xk = 0. After repeating execution of Step (4a) through Step (4d), it finally produces tube T0 that consists of 2q DNA sequences representing 2q possible subsets. Therefore, it is inferred that 2q possible subsets of a q-element set S can be constructed with DNA strands via this algorithm. From Init (T0, q), it takes (q−1) amplify operations, 2 × q append operations, q merge operations and three test tubes to construct the solution space for a q-element set S. A q-bit binary number corresponds to a subset. A value sequence for every bit contains 15 bases. Therefore, the length of a DNA strand, encoding a subset, is 15 × q bases, which is comprised of the concatenation of one value sequence for each bit. 3.3 Solution Space of the Value for Every Element of Each Subset for Solving the 0-1 Knapsack Problem of a Finite Set For the purpose of appending the DNA strands that encode the weight wm or profit pm of all selected items, an element wm (pm) for 1≤ m ≤ q representing the size of weight (profit) of items m can be converted as a n-bit binary number, wm,n, wm,n-1,…, wm,2, wm,1(pm,n, pm,n-1,…, pm,2, pm,1). Suppose that wm,n (pm,n) is the most significant bit, while wm,1 (pm,1) is the least significant bit. For every bit wm,k (pm,k) , 1≤ m ≤ q and 1 ≤ k ≤ n, from [20, 21] two distinct DNA sequences are designed. One corresponds to the value
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“0” for wm,k (pm,k), and the other corresponds to the value “1” for wm,k (pm,k). For the sake of convenience in our representation, assume that wm,k1(pm,k1) denotes the value of wm,k (pm,k) to be 1 and wm,k0(pm,k0) defines the value of wm,k(pm,k) to be 0. The following algorithm is employed to construct the binary values of weight and profit for each element in 2q subsets of a q-element set S. The partial result generated by ValueWT_PT (T0, q, n) for our example in Section 1 is shown in Table 3. Procedure ValueWT_PT (T0, q, n) (1) or m = 1 to q 1 1 (1a) T1 = + (T0, x m ) and T2 = − (T0, xm) (1b) For k = n downto1 (1c) Append (T1, wm, k) (1d) Append (T2, wm,k0) End For (1e) For k = n downto1 (1f) Append (T1, pm, k) (1g) Append (T2, pm,k0) End For (1h) T0 = ∪(T1, T2) EndFor EndProcedure Table 3. The result is generated by ValueWT_PT(T0, q, n) The result generated by ValueWT_PT (T0, q, n)
Tube T0
1
1
1
0
0
{x3 x2 x1 w1,4 w1,3 w1,21w1,11p1,40p1,31p1,21p1,10w2,40w2,31w2,20w2,11p2,40p2,31p2,20p2,10w3,40 w3,31w3,21w3,11 p3,40p3,31 p3,20p3,11 x31x21x10w1,40w1,30w1,20w1,10p1,40p1,30p1,20p1,10w2,40w2,31w2,20w2,11p2,40p2,31p2,20p2,10w3,40 w3,31w3,21w3,11 p3,40p3,31 p3,20p3,1
. . .
x30x20x11w1,40w1,30w1,21w1,11p1,40p1,31p1,21p1,10w2,40w2,30w2,20w2,10p2,40p2,30p2,20p2,10w3,40 w3,30w3,20w3,10p3,40p3,30p3,20p3,10 x30x20x10w1,40w1,30w1,20w1,10p1,40p1,30p1,20p1,10w2,40w2,30w2,20w2,10p2,40p2,30p2,20p2,10w3,40 w3,30w3,20w3,10 p3,40p3,30 p3,20p3,10}
Lemma 2: The binary value of weight and profit for each element in 2q subsets of a q-element set S can be constructed from the algorithm, ValueWT_PT (T0, q, n). Proof: Refer to Lemma 1.
From ValueWT_PT (T0, q, n), it takes q extract operations, 4 × n × q append operations, q merge operations and three test tubes to construct the solution space for elements in 2q subsets of a q-element set S. A q-bit binary number corresponds to a choice of items and an n-bit binary number encodes the weight or profit of an item. A value sequence for every bit contains 15 bases. Therefore, the length of a DNA strand, encoding the corresponding weight and profit for 2q possible choices of q items, is 15
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× (4 × n × q) bases which consist of the concatenation of one value sequence for each bit. 3.4 The Construction of a Parallel One-Bit Adder A one-bit adder is a Boolean function that forms the arithmetic sum of three inputs. It includes three inputs and two outputs. Two of the input bits represent augend and addend, respectively. The third input represents the carry from the previous lower significant position. The first output gives the value of the least significant bit of the sum for augend, addend and previous carry. The second output gives the output carry transferred into the input carry of the next one-bit adder. The truth table of the one-bit adder is shown in Table 4. Suppose that two one-bit binary numbers, αm-1,k and αm,k, represent the first input (addend) and the first output (sum) of a one-bit adder for 1≤ m ≤ q and 1≤ k ≤ n, respectively. A one-bit binary number, βm,k, is applied to represent the second input(augend) of a one-bit adder. Two one-bit binary numbers, γm,k-1 and γm,k, are used to represent the third input (previous carry) and the second output (carry) of a one-bit adder respectively. From [20, 21], two distinct DNA sequences are designed to represent the value “0” and “1” for every corresponding bit. For the sake of convenience in our representations, assume that βm,k1 contains the value of βm,k to be 1, and βm,k0 contains the value of βm,k to be 0. Also suppose that αm-1,k1 denotes the value of αm-1,k to be 1, and αm-1,k0 defines the value of αm-1,k to be 0. Similarly, suppose that αm, k1 contains the value of αm,k to be 1, and αm, k0 denotes the value of αm, k to be 0 γm,k-11 denotes the value of γm,k -1 to be 1, and γm,k-10 contains the value of γm,k-1, to be 0. γm,k1 defines the value of γm,k to be 1, and γm,k0 contains the value of γm,k to be 0. The following algorithm is proposed to perform the Boolean function of a parallel one-bit adder. Table 4. The true table of a one-bit adder Augend bit 0 0 0 0 1 1 1 1
Addend bit 0 0 1 1 0 0 1 1
Previous bit 0 1 0 1 0 1 0 1
Sum bit 0 1 1 0 1 0 0 1
Carry bit 0 0 0 1 0 1 1 1
Procedure ParallelOneBitAdder (T0, αm-1,k , β1m,k, γm,k-1, m, k) 1 (1)T1 = + (T0, αm-1,k ) and T2 = −( T0, αm-1,k ) 1 1 (2)T3 = + (T1, βm,k1 ) and T4 = − (T1, βm,k1 ) (3)T5 = + (T2, βm,k )1 and T6 = − (T2, βm,k ) 1 (4)T7 = + (T3, γm,k-1 ) and T8 = − (T3, γm,k-1 ) 1 1 (5)T9 = + (T4, γm,k-1 ) and T10 = − (T4, γm,k-1 ) 1 1 (6)T11 = + (T5, γm,k-11) and T12 = − (T5, γm,k-11) (7)T13 = + (T6, γm,k-1 ) and T14 = − (T6, γm,k-1 )
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(8)If (Detect (T7) = =”yes”) then 1 1 Append-head (T7, αm,k ) and Append-head (T7, γm,k ) EndIf (9)If (Detect (T8) = =”yes”) then 0 1 Append-head (T8,αm,k ) and Append-head (T8, γm,k ) EndIf (10)If (Detect (T9) = =”yes”) then 0 1 Append-head (T9,αm,k ) and Append-head (T9, γm,k ) EndIf (11)If (Detect (T10) = =”yes”) then 1 0 Append-head (T10, αm,k ) and Append-head (T10,γm,k ) EndIf (12)If (Detect (T11) = =”yes”) then 0 1 Append-head (T11, αm,k ) and Append-head (T11, γm,k ) EndIf (13)If (Detect (T12) = =”yes”) then 1 0 Append-head (T12, αm,k ) and Append-head (T12, γm,k ) EndIf (14)If (Detect (T13) = =”yes”) then 1 0 Append-head (T13, αm,k ) and Append-head (T13, γm,k ) EndIf (15)If (Detect (T14) = =”yes”) then 0 0 Append-head (T14, αm,k ) and Append-head (T14, γm,k ) EndIf (16) T0 = ∪(T7, T8, T9, T10, T11, T12, T13, T14) EndProcedure Lemma 3: The algorithm, ParallelOneBitAdder (T0, αm-1,k , βm,k, γm,k-1, m, k), can be applied to perform the Boolean function of a parallel one-bit adder. Proof: Refer to Lemma 1.
From ParallelOneBitAdder (T0, αm-1,k, βm,k, γm,k-1, m, k), it takes seven extract operations, eight detect operations, sixteen append-head operations, one merge operation, and fifteen test tubes to compute the addition of three input bits. Two output bits of a one-bit adder encode the sum and the carry to the addition of a bit. A value sequence for every output bit contains 15 base pairs. Therefore the length of a DNA strand, encoding two output bits has 30 base pairs, consists of the concatenation of one value sequence for each output bit. 3.5 The Construction of a Parallel N-Bit Adder The parallel one-bit adder introduced in Section 4 figures out the arithmetic sum of two bits and a previous carry. Similarly, A binary parallel n-bit adder is also directly to perform the arithmetic sum for the two input operands of n-bit and the input carry by means of performing this one-bit adder n times. The following algorithm is proposed to perform the arithmetic sum for a parallel n-bit adder. Procedure ParallelAdder (T0, α, β, γ, q, n) (1) For k = n downto 1 0 (1a) Append (T0, α0,k ) EndFor (2) For m =1 to q
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(2a) Append (T0, γm,0 ) (2b) For k =1 to n (2c) ParallelOneBitAdder (T0, αm-1,k , βm,k , γ m,k-1, m, k) 0
EndFor EndProcedure Lemma 4: The algorithm, ParallelAdder (T0, α, β, γ, q, n), can be applied to perform the Boolean function to a binary parallel adder of n bits.
Proof: Refer to Lemma 1.
From ParallelAdder (T0, α, β, γ, q, n), it takes 7× n × q extract operations, (n + q + 2 × n × q) append operations, n × q merge operations and fifteen test tubes to compute the sum of weight for elements in 2q subsets of a q-element set S. A q-bit binary number corresponds to a subset. An n-bit binary number encodes the size of weight for an element in S. Therefore, (q + 1)× n bits correspond to the sum of weight for q elements, and one accumulator element (α). q × (n + 1) bits encode the carry of the sum. A value sequence for every bit contains 15 bases. Therefore, the length of a DNA strand, encoding the total weight of selected items, is 15 × n base pairs consisting of the concatenation of one value sequence for each bit. 3.6 Parallel Comparator for Comparing the Sum of Weight Corresponding to Subsets of a Finite Set with Any Given Positive Integer Any given positive integer, M, can be converted as n one-bit binary numbers, MnMn1…M2M1. The main advantage is that it is feasible for bit operations of the DNA algorithm in a parallel comparator. MaxiWeight (TM, n) is proposed to construct DNA strands for encoding M. OneBitComparator (T0, TM, T0>, T0=, T0, T0=, T0, T0=, T0 = ∪ (T0> , T0ON) EndIf (4) TM= ∪ (TMON, TMOFF) Endprocedure Lemma 6: The algorithm, OneBitComparator (T0, TM, T0>, T0=, T0
=
<
From OneBitComparator (T0, TM, T0 , T0 , T0 , q, k), it takes two extract operation, one detect operations, three merge operations and seven test tubes to carry out the function of a one-bit comparator. Procedure ParallelComparator (T0, TM, T0>, T0=, T0, T0=, T0, T0=, T0
<
From Parallel Comparator (T0, TM, T0 , T0 , T0 , q, n), it takes 2 × n extract and detect operations, 4 × n + 1 merge operations, one discard operation and seven test tubes to carry out the function of an n-bit parallel comparator. =
3.7 Search and Calculation of the Maximum Total Profit under the Restriction That the Total Weight Does Not Exceed the Capacity of Knapsack M The following algorithm is applied to determine which strand has the maximum profit among those chosen items satisfying the constraint of problem. The strand that
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remains in tube T0 has the greatest binary value of profit after performing this algorithm. Procedure SearchMaxi (T0, q, n) (1) For k= n downto 1 (1a) T0ON = + (T0, Pq,k1) and T0OFF = − (T0, Pq,k1) (1b) If (Detect (T0ON) = =”yes”) then T0 = ∪ (T0, T0ON) and Discard (T0OFF) (1c) Else (1d) T0 = ∪ (T0, T0OFF) EndIf EndFor EndProcedure Lemma 8: The algorithm, SearchMaxi (T0, q, n) can be used to search the strands that encode the maximum value of profit. Proof: Refer to Lemma 1.
From SearchMaxi (T0, q, n), it takes n extract operations, n detect operations, 2 × n merge operations and n discard operations, and three test tubes to carry out the function of searching the maximum total profit subject to the condition that the total weight of selected items must not exceed the capacity of the knapsack. 3.8 DNA Algorithm for Solving the 0-1 Knapsack Problem Algorithm 1. Solving the 0-1 Knapsack Problem (1) Init (T0, q) (2) ValueWT_PT (T0, q, n) (3) ParallelAdder (T0, W, w, z, q, n) (4) MaxiWeight (TM, n) (5) ParallelComparator (T0, TM, T0>, T0=, T0 N is an integer with gcd(R, N) = 1, and n equals T N ′ mod R [13]. In order to obtain the correct result T ′, an additional −1 quantity N ′ is needed, and the property R × R − N × N ′ = 1 holds. In 1990, Dusse and Kaliski [14] proposed an efficient Montgomery modular multiplication algorithm to perform both multiplication and modular reduction simultaneously. This algorithm allows the precomputation of N 0′ = − N 0−1 mod 2 instead of n N ′ = − N −1 mod R where R = 2 . Let N = N n −1 × 2 n −1 + N n − 2 × 2 n − 2 + …+ N1 × 2 + N0 and X = X n −1 × 2 n −1 + X n − 2 × 2 n −2 + … + X 1 × 2 + X 0 , we can compute X one digit
X i in every modular
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reduction step instead of computing the whole X at one time [14]. Here given two Nresidue n-digit integers (in base 2) A and B, the Montgomery modular reduction −1
n
REDC(AB) result can be denoted as ABR mod N where R = 2 . The Montgomery modular reduction REDC(AB) algorithm is depicted as follows. Montgomery Modular Reduction (REDC) Algorithm Input: A, B, N /*A, B and N are n-digit integers in base 2 */ −1
−1
Output: X = AB R mod N X = Y = 0; begin for i = 0 to n − 1 do begin X = X + Ai B;
n
/*X = ABR mod N where R = 2 * /
Y = X i N 0′ mod 2 ;
/* N 0′ = − N 0 mod 2 and N ′ = − N −1
−1
mod R */
X = ( X + Y × N ) / 2; end; while (X ≥ N) X = X − N; end. From the Montgomery REDC algorithm depicted above, note that R and N ′ can be computed using the Euclidean algorithm [11]. In the Montgomery multiplication −1
algorithm, R > N is selected as an integer 2 , relatively prime to N, for simple processing. Given two N-residue n-digit integers A and B, the N-residue with respect to R of the product AB < N is defined by ABR mod N, and the Montgomery reduction for n
−1
−1
an integer X (< RN ) by XR mod N, where R is the inverse of R modulo N.
If R′ (= R mod N ) has been precomputed and stored before we using the Montgomery reduction algorithm, A′ and B′ in the N-residue can be easily computed from REDC( AR′) and REDC( BR′) respectively as follows. −1
A′ = REDC ( AR′) = AR mod N B′ = REDC ( BR′) = BR mod N X = A′ × B′ = AR × BR mod N C ′ = REDC ( X ) =ABR mod N C = REDC (C ′) = AB mod N
(7) (8) (9) (10) (11)
Notice that, formulas (7) to (11) shown above describe modular multiplication using the Montgomery REDC algorithm require a longer processing time than other methods due to the residue transformation of the multiplier and the multiplicand. The modular multiplication using formulas (7) to (11) requires 7n2 + 4n multiplications since every reduction operation takes n2 + n multiplications. The classical Montgomery modular reduction algorithm only requires 2n2 + n multiplications and m divisions [15].
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3 The Parallel Montgomery Algorithm In this section, we will first introduce the canonical-signed-digit (CSD) recoding arithmetic and the CSD recoding algorithm. Then, we will summarize some mathematical preliminaries for the proposed fast Montgomery exponentiation algorithm using the common-multiplicand multiplication method and CSD recoding technique. Finally, we will propose the parallel version of the CMM-CSD Montgomery binary algorithm for fast evaluating the modular exponentiation operation. 3.1 Canonical Signed-Digit Recoding Arithmetic
A signed-digit representation of an integer n in radix r is a sequence of digits a = (…, a2, a1, a0) with ai ∈ {0, ±1 ,…, ± ( r − 1) } such that n =
∑
∞ i =0
ai × r i . Signed-digit
representations of this form have been applied successfully in many modern computer arithmetic applications [6] by reducing the number of multiplications [7]. In 1993, Arno and Wheeler [8] proposed the signed-digit recoding (redundant representations) algorithm for finding signed digit representations of minimal Hamming weight. The CDR (canonical signed digit recoding) arithmetic algorithm [9] can find the signed-digit representation of minimal weight [10] and this algorithm can be shown in Figure 1 2r =
(rm−1, rm−2, rm−3,...., r1, r0,0)2
+ r=
(rm−1, rm−2 ,...., r2, r1, r0 )2
3r = (sm, sm−1, sm−2 , sm−3,..., s1, s0, r0 )2 "no-carrysubtraction" →−
r=
(rm−1, rm−2 ,...., r2 , r1, r0 )2
2r = (em, em−1, em−2 , em−3,..., e1, e0,0)2 Fig. 1. Canonical-signed-digit recoding arithmetic
Signed-digit representations of this form have been applied successfully in many modern computer arithmetic applications [16][17], including the modular exponentiation problem and modular multiplication problem used in public-key cryptosystems by reducing the number of multiplications [18][19][20][21]. In 1993, Arno and Wheeler [22] proposed the canonical-signed-digit recoding algorithm for finding signed digit representations of minimal Hamming weight. Let radix r ≥ 2 be an integer, we refer to Sr as the set of all signed digit radix r representations of elements of Z. If a = ∑ m ai′ × 2i denotes the binary signed expansion with signed-digit recoding of i =0
radix r = 2 (so called radix-2 signed-digit system) for a where ai′ ∈ { 1 ,0,1}, then we
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denote a = ( am′ ,…, a0′ )SD. The CSD recoding arithmetic algorithm can generate the canonical-signed-digit representation of minimal Hamming weight [23]. 3.2 The Proposed Montgomery Exponentiation Algorithm
By using mathematical techniques in number theory, the proposed CMM-CSD Montgomery binary exponentiation algorithm is depicted as follows. CMM-CSD Montgomery Binary Exponentiation Algorithm Input: M, ECSD, N, R E
Output: C= M CSD mod N begin S = MR mod N, C = R mod N; for i = 0 to m do begin if (ei = 1) then C = REDC(SC); if(ei = 1 )then C = REDC( S S = REDC(SS); end;
C = REDC(C); end.
−1
/* C=
C);
M ECSD mod N, 0 ≤ C < N * /
Here we can therefore further speedup and improve the proposed CMM-CSD Montgomery binary exponentiation algorithm as follows. Improved CMM-CSD Montgomery Binary Exponentiation Algorithm Input: M, ECSD, N, R Output: C=
M
ECSD[1]
mod N,
ECSD[1]
D= M mod N begin S = MR mod N, C = D = R mod N; for i = 0 to m do begin if (ei = 1) then C = REDC(SC); if (ei = 1 ) then D = REDC(SD); S = REDC(SS); end; C = REDC(C); D = REDC(D); end.
Note, in the improved CMM-CSD Montgomery algorithm, we have sped up the whole modular exponentiation operation by transforming the multiplicative inverse operations for negative CSD recoding part (i.e. ECSD[1] ) to multiplicative operations.
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In this improved algorithm, we put the operation results of “1s” in the register C, and we put the operation results of “ 1 s” in the register D. Hence, C and D are used to store the operation results of positive digit and negative digits in exponent ECSD, respectively. In the case ei = 1 that in the above improved CSD Montgomery exponentiation algorithm, both REDC(SC) and REDC(SS), the so-called commonmultiplicand multiplications are performed for the same common-multiplicand “S”. Meanwhile, in the case ei = 1 , both REDC(SD) and REDC(SS), the commonmultiplicand multiplications are also performed for the same common-multiplicand “S”. Our main goal for applying common-multiplicand multiplication technique is that the common part among REDC(SC), REDC(SD) and REDC(SS) can be therefore computed once rather than twice. Also notice that each step of a single modular multiplication in the CMM-CSD Montgomery exponentiation algorithm has a similar step in the Montgomery REDC algorithm shown previously. In the proposed CMM-CSD Montgomery exponentiation algorithm, the computation results after the first loop (for i = n − 3 to 0) are 0 ≤ X, Y < (n − 2) × N. All intermediate computation results in the proposed CMM-CSD algorithm are at most (n + 2)-digit integers. After the second loop (for i = 0 to 1), the computation results are 0 ≤ X, Y < (n/4+1) × N, and are enough to accept for 0 ≤ X, Y < 3N. The basic idea of using common-multiplicand multiplication technique in the proposed CMM-CSD Montgomery binary exponentiation algorithm is to compute the common part in REDC(SC), REDC(SD) and REDC(SS) once rather than triple. The modular operations of S × 2 − i mod N for 1 ≤ i ≤ n − 2 are common to − i +1
REDC(SC), REDC(SD) and REDC(SS). If we denote T as S × 2 mod N , the modular operations of S × 2 − i mod N for 1 ≤ i ≤ n − 2 are repeatedly computed using the previous computation result of T, where S × 2 − i mod N = T × 2 −1 mod N . Thus, we can conserve memory space for the proposed CMM-CSD Montgomery −1
binary exponentiation algorithm by alternatively computing S × 2 mod N , Cn −3S × 2 −1 mod N (or Dn −3 S × 2 −1 mod N ), Sn −3S × 2 −1 , S × 2 −2 , and so on. By adopting the common-multiplicand multiplication technique (depicted in Section 2.2) to the CMM-CSD Montgomery binary algorithm to compute REDC(SC) and REDC(SD) for nonzero digits in exponent ECSD. Moreover, to further speed up the CMM-CSD Montgomery algorithm, we can put the multiplicative inverse operation in the proposed algorithm over an elliptic curve or a finite filed (where the division is replaced by subtraction such as GF(2n) using normal basis [24]). 3.3 Parallel CMM-CSD Montgomery Binary Exponentiation Algorithm
As we can execute the modular multiplication, multiplicative inverse, and modular squaring operations of the proposed CMM-CSD algorithm separately, we can therefore apply “parallel-processing” technique on the CMM-CSD Montgomery algorithm to speed up the overall modular exponentiation evaluation as follows.
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Parallel CMM-CSD Montgomery Binary Exponentiation Algorithm Input: M, ECSD, N, R E Output: C= M CSD[1] mod N, E
D= M CSD[1] mod N begin S = MR mod N, C = D = R mod N; for i = 0 to m do parbegin {if (ei = 1) then C = MM(SC);} {if (ei = 1 ) then D = MM(SD);} {S = MS(SS);} end; parbegin {C = REDC(C);} {D = REDC(D);} end; end.
4 Complexity Analyses In this section, we will detailed describe the theoretical analyses for the performance of the proposed parallel CMM-CSD Montgomery binary exponentiation algorithm. We use the number of multiplications to express the speed-up efficiency. Let m denotes the digit-length of the radix-r signed-digit exponent ECSD in the proposed CMM-CSD Montgomery algorithm. As we use radix r = 2 in our proposed method, the occurrence of the digit “0” in signed exponent ECSD is approximately 2/3, and the occurrence of the nonzero digits “1” and “ 1 ” in ECSD is close to 1/6 and 1/6, respectively [25]. Based on the computational analyses of Montgomery reduction algorithm [15], the probability of executing REDC(SC), REDC(SD), and REDC(SS) is equivalent to the occurrence probability of signed-digit “1”, “ 1 ” , and “0” in ECSD, respectively. Therefore, by using the Lemma 2 shown in Section 3.2, REDC(SC) requires 1 [(n − 2)(2n+1)+2(2n+1)]= 1 (2n2+ n) single-precision multiplications. 6
6
REDC(SD) requires 1 [(n − 2)(2n+1)+2(2n+1)]= 1 (2n2+n) 6 6 single-precision multiplications. REDC(SS) requires 2 [n × (n − 2) + 2(2n+1)] = 2 (n2 + 2n + 2) single-precision multiplications, as the 3
3
( S × 2 − j mod N ) operations are computed once. Based on the computational complexity analysis in [14], a binary exponentiation with a m-bit exponent adapted Montgomery reduction algorithm requires on average
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1.5m × (2n2 + n) multiplications. Meanwhile, the Ha-Moon’s improved Montgomery algorithm [15] takes 0.5m × (5n2 + 4n) multiplications. However, the proposed parallel CMM-CSD Montgomery algorithm only takes
2
1
0.5m × [ 2 × 1 (2n2 + n) + (n2 + 2n + 2) + 2] + 0.5m × [ 2 × (2n2 + n) + 2] 3 6 6 = 0.5m × (2n2 + 2n+ 16 ) 3
single-precision multiplications. n
Take a 512-bit E exponent and 2 - base N to evaluate “ME mod N” for example, our parallel CMM-CSD Montgomery modular binary exponentiation algorithm on average reduces the overall number of single-precision multiplications (compared to the original Montgomery reduction algorithm [4]) by about
1−
16 16 ) 4n2 + n − 3 = 3 ≈ 66.7% (as n grows). 1.5m(2n2 + n) 6n2 + 3n
0.5m(2n2 + 2n +
Moreover, our parallel CMM-CSD Montgomery modular binary exponentiation algorithm on average reduces the overall number of single-precision multiplications (compared to the Ha-Moon’s improved Montgomery algorithm [15]) by about
1−
16 16 ) 3n2 + 2n − 3 = 3 ≈ 30% (as n grows). 0.5m(5n2 + 4n) 5n2 + 4n
0.5m(2n2 + 2n +
5 Conclusions As we know one of the most important computer arithmetic operations in public-key cryptosystems for information security is modular exponentiation, and the Montgomery modular reduction algorithm is very useful for modular exponentiation due to its simplicity and high speed. In this paper, a new CMM-CSD Montgomery exponentiation method for speeding up modular exponentiation to benefit the RSA public-key cryptosystem was proposed based on the binary exponentiation algorithm, commonmultiplicand method, and canonical-signed-digit recoding technique. By using the proposed CMM-CSD Montgomery binary algorithm, the total number of multiplications can be reduced by about 66.7% and 30% compare the original Montgomery modular reduction algorithm and Ha-Moon’s improved Montgomery algorithm, respectively. Under the application of our proposed algorithm, “ME mod N” for a 512-bit exponent E in RSA cryptographic scheme, can be computed with the computational cost of approximately 256 modular multiplications instead of 646 modular multiplications (using the Ha-Moon’s improved Montgomery algorithm) or 768 modular multiplications (using the original Montgomery reduction algorithm).
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References [1] Rivest, R.L., Shamir, A., Adleman, L.: A method for obtaining digital signatures and public key cryptosystems. Communications of the ACM 21(2), 120–126 (1978) [2] ElGamal, T.: A public key cryptosystem and a signature scheme based on discrete logarithms. IEEE Trans. on Inform. Theory 31(4), 469–472 (1985) [3] Alia, G., Martinelli, E.: Fast modular exponentiation of large numbers with large exponents. Journal of Systems Architecture 47(14), 1079–1088 (2002) [4] Montgomery, P.L.: Modular multiplication without trial division. Mathematics of Computation 44(170), 519–521 (1985) [5] Blum, T., Parr, C.: High-radix Montgomery modular exponentiation on re- configurable hardware. IEEE Trans. on Computers 50(7), 759–764 (2001) [6] Lou, D.-C., Chang, C.-C.: Fast exponentiation method obtained by folding the exponent in half. Electronics Letters 32(11), 984–985 (1996) [7] Nozaki, H., Shimbo, A., Kawamura, S.: RNS Montgomery multiplication for duplicate processing of base transformations. IEICE Trans. on Fundamentals E.86-A(1), 89–97 (2003) [8] Joye, M., Yen, S.-M.: Optimal left-to-right binary signed-digit recoding. IEEE Trans. on Computers 49(7), 740–748 (2000) [9] Chang, C.-C., Kuo, Y.-T., Lin, C.-H.: Fast algorithms for common-multiplicand multiplication and exponentiation by performing complements. In: Proceedings of the 17th IEEE Symposium on Advanced Inform. Networking and Applications, March 2003, pp. 807– 811 (2003) [10] Menezes, A., van Oorschot, P., Vanstone, S.: Handbook of Applied Cryptography. CRC Press, Boca Raton (1997) [11] Knuth, D.E.: The Art of Computer Programming, Seminumerical Algorithms, 3rd edn., vol. II. Addison-Wesley, MA (1997) [12] Yen, S.-M., Laih, C.-S.: Common-multiplicand multiplication and its applications to public key cryptography. Electronics Letters 29(17), 1583–1584 (1993) [13] Gueron, S.: Enhanced Montgomery multiplication. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 46–56. Springer, Heidelberg (2003) [14] Dusse, S.R., Kaliski, B.S.: A cryptographic library for the motorola DSP 56000. In: Damgård, I.B. (ed.) EUROCRYPT 1990. LNCS, vol. 473, pp. 230–244. Springer, Heidelberg (1991) [15] Ha, J.-C., Moon, S.-J.: A common-multiplicand method to the Montgomery algorithm for speeding up exponentiation. Information Processing Letters 66(2), 105–107 (1998) [16] Reitwiesner, G.W.: Binary arithmetic. In: Advances in Computers, vol. 1, pp. 231–308. Academic Education Press, NY (1960) [17] Avizienis, A.: Signed digit number representation for fast parallel arithmetic. IRE Trans. on Electronic Computers EC-10(3), 389–400 (1961) [18] Hwang, K.: Computer Arithmetic, Principles, Architecture and Design. John Wiley & Sons, NY (1979) [19] Manochehri, K., Pourmozafari, S.: Modified radix-2 Montgomery modular multiplication to make it faster and simpler. In: Proceedings of the IEEE Conference on Information Technology: Coding and Computing (ITCC), vol. 1, pp. 598–602 (2005) [20] Tawalbeh, L.A., Tenca, A.F., Koc, C.K.: A radix-4 scalable design. IEEE Potentials 24(2), 16–18 (2005)
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[21] Fournaris, A.P., Koufopavlou, O.: A new RSA encryption architecture and hardware implementation based on optimized Montgomery multiplication. In: Proceedings of the IEEE Symposium on Circuits and Systems (ISCAS), vol. 5, pp. 4645–4648 (2005) [22] Arno, S., Wheeler, F.S.: Signed digit representations of minimal Hamming weight. IEEE Trans. on Computers 42(8), 1007–1010 (1993) [23] Park, I.-C., Kang, H.-J.: Digital filter synthesis based on an algorithm to generate all minimal signed digit representation. IEEE Trans. on Computers-Aided Design of Integrated Circuits and Systems 21(12), 1525–1529 (2002) [24] Takagi, N., Yoshiki, J., Takagi, K.: A fast algorithm for multiplicative inversion in GF(2n) using normal basis. IEEE Trans. on Computers 50(5), 394–398 (2001) [25] David, J.P., Kalach, K., Tittley, N.: Hardware complexity of modular multiplication and exponentiation. IEEE Trans. on Computers 56(10), 1308–1319 (2007)
Fault-Free Cycles in Conditional Faulty Folded Hypercubes Che-Nan Kuo and Sun-Yuan Hsieh Department of Computer Science and Information Engineering, National Cheng Kung University, No. 1, University Road, Tainan 70101, Taiwan
[email protected],
[email protected]
Abstract. An n-dimensional folded hypercube F Qn is an attractive variance of an n-dimensional hypercube Qn , which is obtained by a standard hypercube with some extra edges established between its vertices. F Qn for any odd n is known to be bipartite. In this paper, for any F Qn (n ≥ 2) with at most 2n − 3 faulty edges in which each vertex is incident with at least two fault-free edges, we prove that there exists a fault-free cycle of every even length from 4 to 2n , and when n ≥ 2 is even, there also exists a fault-free cycle of every odd length from n + 1 to 2n − 1. The result is optimal with respect to the number of edges faults tolerated. Keywords: Bipancyclicity, folded hypercubes, fault-tolerant cycle embedding, graph-theoretic interconnection networks, Hamiltonian cycles, pancyclicity.
1
Introduction
Design of interconnection networks (networks for short) is an important integral part of the parallel processing or distributed system. There are a large number of topological choices for interconnection networks. The interested readers may refer to [2,10,25] for extensive references. Among the proposed networks, the hypercube [3] has several excellent properties such as recursive structure, regularity, symmetry, small diameter, relatively short mean internode distance, low degree, and much small edge complexity, which are very important for designing massively parallel or distributed systems [15]. Numerous variants of the hypercube have been proposed in the literature [1,4,19]. One variant that has been the focus of great deal of research is the folded hypercube, which is an extension of the hypercube, constructed by adding an edge to every pair of vertices that are the farthest apart, i.e., two vertices with complementary addresses. The folded hypercube has been shown to be able to improve the system’s performance over a regular hypercube in many measurements [1,23]. Since faults may happen when a network is put into use, it is practically meaningful and important to consider faulty networks. An edge (u, v) is said
Corresponding author.
A. Hua and S.-L. Chang (Eds.): ICA3PP 2009, LNCS 5574, pp. 439–448, 2009. c Springer-Verlag Berlin Heidelberg 2009
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to be faulty if the communication link between the end-vertices u and v fails. Usually, two models are used for fault-tolerant cycle embedding: The standard fault model assumes that the distribution of faulty edges and faulty vertices is not restricted. More recently, Fu [5] posited the conditional fault model which assumes that each node is incident with at least two fault-free edges. Under the conditional fault model, Fu [6] showed that, for any n-dimensional star graph with at most 2n − 7 faulty edges, there exists a fault-free Hamiltonian cycle. Fu [8] also showed that an n-dimensional twisted cube T Qn with at most 2n − 5 edge faults contains a fault-free Hamiltonian cycle. Hung et al. [9] showed that an n-dimensional crossed cube with at most 2n − 5 edge faults contains a fault-free Hamiltonian cycle. Previously, the problem of cycle embedding on an n-dimensional folded hypercube F Qn has been studied in [7,13,18,23,26,27]. Let F Fe be the sets of faulty edges of F Qn . In this paper, under the conditional fault model with |F Fe | = 2n − 3, we prove that F Qn − F Fe for n ≥ 2 exists a cycle of every even length from 4 to 2n , and when n ≥ 2 is even, F Qn − F Fe also exists a cycle of every odd length from n + 1 to 2n − 1. The remainder of this paper is organized as follows: In Section 2, we provide some necessary definitions and notations. Embedding cycles of every length is presented in Section 3. Some concluding remarks are given in Section 4.
2
Preliminaries
A graph G = (V, E) is an ordered pair in which V is a finite set and E is a subset of {(u, v)|(u, v) is an unordered pair of V }. We say that V is the vertex set and E is the edge set. We also use V (G) and E(G) to denote the vertex set and edge set of G, respectively. Two vertices u and v are adjacent if (u, v) ∈ E. A graph G = (V0 ∪ V1 , E) is bipartite if V0 ∩ V1 = ∅ and E ⊆ {(x, y)|x ∈ V0 and y ∈ V1 }. A path P [v0 , vk ] = v0 , v1 , . . . , vk is a sequence of distinct vertices in which any two consecutive vertices are adjacent. We call v0 and vk the end-vertices of the path. In addition, a path may contain a subpath, denoted as v0 , v1 , . . . , vi , P [vi , vj ], vj , vj+1 , . . . , vk , where P [vi , vj ] = vi , vi+1 , . . . , vj−1 , vj . The length of a path is the number of edges on the path. A path with end-vertices u and v is abbreviated to an u-v path. A cycle in a graph G is a sequence of vertices v0 , v1 , ..., vk , v0 , where k ≥ 2, such that v0 , v1 , ..., vk are all distinct, and any two consecutive vertices are adjacent. For graph-theoretic terminologies and notations not mentioned here, see [24]. An n-dimensional hypercube Qn can be represented as an undirected graph such that V (Qn ) consists of 2n vertices which are labeled as binary strings of length n from 00 . . . 0 to 11 . . . 1. Each edge e = (u, v) ∈ E(Qn ) connects two n
n
vertices u and v if and only if u and v differ in exactly one bit of their labels, i.e., u = bn bn−1 . . . bk . . . b1 and v = bn bn−1 . . . b¯k . . . b1 , where b¯k is the one’s complement of bk such that b¯k = 1 − i iff bk = i for i = 0, 1. For convenience, we call e as an edge of dimension k, denoted by dim(e) = k. Clearly, each vertex
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connects to exactly n other vertices, and there are 2n−1 edges in each dimension and |E(Qn )| = n2n−1 . Let x = xn xn−1 . . . x1 and y = yn yn−1 . . . y1 be two n-bit binary strings. Let y = x(k) , where 1 ≤ k ≤ n, if yk = 1 − xk and yi = xi for all i = k and 1 ≤ i ≤ n. Also, let y = x¯ if yi = 1 − xi for all 1 ≤ i ≤ n. The Hamming distance dH (x, y) between two vertices x and y is the number of different bits in the corresponding strings of both vertices. The Hamming weight hw(x) of x is the number of i’s such that xi = 1. Note that Qn is a bipartite graph with bipartition {x| hw(x) is odd} and {x| hw(x) is even}. Let dQn (x, y) be the distance of a shortest path between two vertices x and y in graph Qn . Then, dQn (x, y) = dH (x, y). An n-dimensional folded hypercube F Qn is a regular n-dimensional hypercube augmented by adding more edges among its vertices. More specifically, F Qn is obtained by adding an edge between two vertices whose addresses are comple¯ . . . b¯1 . mentary to each other; i.e., vertex x = bn bn−1 . . . b1 and vertex x ¯ = b¯n bn−1 n−1 So F Qn has 2 more edges than a regular Qn . We call these augmented edges skips, to distinguish them from regular edges, and use Es to denote the set of skips and Er to denote the set of regular edges, i.e., Er = E(Qn ). Clearly, E(F Qn ) = Er ∪ Es = {e = (u, v)| dH (u, v) = 1 ∈ Er or dH (u, v) = n ∈ Es }. It has been shown that F Qn for any odd n ≥ 3 is bipartite [12]. For convenience, F Qn can be represented with ∗ ∗ . . . ∗ ∗ = ∗n , where ∗ ∈ n
{0, 1} means the “don’t care” symbol. A Qn can be partitioned into two subcubes Qn−1 along some dimension i, where 1 ≤ i ≤ n. We denote them as Q0n−1 = ∗n−i 0∗i−1 and Q1n−1 = ∗n−i 1∗i−1 , in which the ith bits of each vertex are 0 and 1, respectively. Formally, Q0n−1 (respectively, Q1n−1 ) is a subgraph of F Qn induced by {xn . . . xi . . . x1 ∈ V (F Qn )| xi = 0} (respectively, {xn . . . xi . . . x1 ∈ V (F Qn )| xi = 1}). Furthermore, we call those non-skip edges which are between Q0n−1 and Q1n−1 the crossing edges, denoted by Ec , that is, Ec = {(x, y) ∈ E(Qn )| x ∈ V (Q0n−1 ) and y ∈ V (Q1n−1 )}. Definition 1. An i-partition on F Qn = ∗n , where 1 ≤ i ≤ n, is to partition F Qn along dimension i into two (n − 1)-dimensional hypercubes ∗n−i 0∗i−1 (Q0n−1 ) and ∗n−i 1∗i−1 (Q1n−1 ). In this paper, we consider faulty F Qn , i.e., F Qn contains faulty edges. An edge is fault-free if it is not faulty. A path (cycle) is fault-free if it does not contain any faulty edge. Throughout this paper, let F Fe (respectively, Fe ) be the set of faulty edges in F Qn (respectively, Qn ). In F Qn , let Fs denote the set of faulty skips in Es . For 1 ≤ i ≤ n, let Fi denote the set of i-dimensional edges in F Fe . Therefore, ni=1 |Fi | + |Fs | = |F Fe |. If we execute an i-partition on F Qn to form two (n − 1)-dimensional hypercubes Q0n−1 and Q1n−1 , then we use Fe0 = F Fe ∩E(Q0n−1 ) and Fe1 = F Fe ∩E(Q1n−1 ). Hence, F Fe = Fe0 ∪Fi ∪Fs ∪Fe1 . In the remainder of this section, we provide some previously known results for path (cycle) embedding in hypercubes and folded hypercubes, which are useful to our method.
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Lemma 1. [28] The following two statements hold: (a) Qn − Fe for n ≥ 3 has a cycle of length l for every even 4 ≤ l ≤ 2n if |Fe | ≤ 2n − 5 and each vertex in Qn − Fe is incident to at least two fault-free edges. (b) Qn − Fe for n ≥ 3 has a cycle of length l for every even 4 ≤ l ≤ 2n − 2 if |Fe | ≤ 2n − 3 and a certain vertex in Qn − Fe is incident to less than two fault-free edges. Lemma 2. [18] F Qn − F Fe for n ≥ 3 contains a Hamiltonian cycle of length 2n if |F Fe | ≤ 2n − 3 and each vertex in F Qn − F Fe is incident to at least two fault-free edges. Lemma 3. [27] In an F Qn , there is an automorphism σ of F Qn such that σ(Ei ) = Ej and F Qn − Ei ∼ = Qn for i, j ∈ {1, 2, . . . , n, s}. Lemma 4. [22] Every non-faulty edge in Qn − Fe for n ≥ 3 lies on a cycle of every even length from 6 to 2n provided that |Fe | ≤ 2n − 5 and each vertex is incident to at least two fault-free edges. Lemma 5. [17] Every non-faulty edge in Qn − Fe for n ≥ 3 lies on a cycle of every even length from 4 to 2n if |Fe | ≤ n − 2. Lemma 6. [21] Assume that n ≥ 3, and x and y are in the same partite set. Then, Qn −Fe contains a fault-free path of length 2n −2 between any two vertices x and y in the same partite set, provided that |Fe | ≤ 2n − 5 and every vertex is incident to at least two fault-free edges. Lemma 7. [20] Let u and v be any two different vertices in Qn and dQn (u, v) = d. Then there exist n internally disjoint u-v paths in Qn such that d of them are of length d, which lie in a d-dimensional subcube, otherwise of length d + 2. Lemma 8. [27] Let u and v be any two different vertices in Qn . Then, Qn − Fe for n ≥ 2 exists a fault-free u-v path of length dQn (u, v) + 2 if |Fe | ≤ n − 2.
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Embedding Cycles in a Faulty Folded Hypercube
In this section, under the conditional fault model with |F Fe | = 2n − 3, we prove that F Qn − F Fe for any even n ≥ 2 contains a fault-free cycle of every odd length from n + 1 to 2n − 1. Lemma 9. Under the conditional fault model with |F Fe | = 2n − 3, F Qn − F Fe for any even n ≥ 2 contains a fault-free cycle of every odd length from n + 1 to 2n − 1. Proof. It is easy to check that the result holds for n = 2. We now consider F Qn for any even n ≥ 4 with |F Fe | = ni=1 |Fi |+|Fs | = 2n−3. By Lemma 3, without loss of generality, we assume that |Fs | ≥ |Fn | ≥ · · · ≥ |F1 |. Then, we consider the following two cases according to n = 4 and n ≥ 6 is even.
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Case 1: n = 4. In this case, 4i=1 |Fi | + |Fs | = |F Fe | = 5. Then, we have the following scenarios. Case 1.1: 4 ≤ |Fs | + |F4 | ≤ 5. In this case, |F3 | ≤ 1 and |F2 | = |F1 | = 0. We can execute a 4-partition on F Q4 to form two subcubes Q03 and Q13 such that |Fe0 | + |Fe1 | ≤ 1. Without loss of generality, we can assume that |Fe0 | ≤ 1 and |Fe1 | = 0. We choose an edge (u, v) of dimension 1 in Q03 such that either (u, u(4) ) and (v, v) are both fault-free or (u, u) and (v, v (4) ) are both faultfree. (If such an edge does not exist, then |Fs | + |F4 | ≥ 8, which contradicts the assumption that |Fs |+|F4 | ≤ 5). Note that (u, v) is fault-free by |F1 | = 0. Without loss of generality, let (u, u) and (v, v (4) ) are both fault-free. Let l be any odd integer with 5 ≤ l ≤ 15. Then, we consider the following subcases: Case 1.1.1: l = 5. Note that dQ13 (u, v (4) ) = 2. By Lemma 7, there exists a fault-free path P [u, v (4) ] of length 2 in Q13 . Therefore, u, u, P [u, v (4) ], v (4) , v, u forms a fault-free cycle of length l = 5. Case 1.1.2: 7 ≤ l ≤ 11. By Lemma 5, (u, v) in Q03 − Fe0 lies on a fault-free cycle C1 of every even length from 4 to 23 . Clearly, C1 can be represented by u, P1 [u, v], v, u. Note that dQ13 (u, v (4) ) = 2. Then, by Lemma 7, there exists a fault-free path P2 [u, v (4) ] of length 2 in Q13 . Therefore, u, P1 [u, v], v, v (4) , P2 [v (4) , u], u, u forms a fault-free cycle of every odd length l with 7 ≤ l ≤ 11. Case 1.1.3: 11 ≤ l ≤ 15. By Lemma 5, (u, v) in Q03 − Fe0 lies on a fault-free cycle C1 of every even length from 4 to 23 . Clearly, C1 can be represented by u, P1 [u, v], v, u. Since dQ13 (u, v (4) )(= 2) is even, u and v (4) are in the same partite set in Q13 . Then, by Lemma 6, there exists a fault-free path P2 [u, v (4) ] of length 23 − 2 = 6 in Q13 . Therefore, u, P1 [u, v], v, v (4) , P2 [v (4) , u], u, u forms a fault-free cycle of every odd length l with 11 ≤ l ≤ 15. Case 1.2: |Fs | = 2 and |F4 | = 1. In this case, |Fs | + |F4 | = 3, |F3 | + |F2 | = 2 and |F1 | = 0. We can execute a 4-partition on F Q4 to form two subcubes Q03 and Q13 such that |Fe0 | + |Fe1 | = 2. Then, we have the following scenarios. Case 1.2.1: (|Fe0 | = 2 and |Fe1 | = 0) or (|Fe0 | = 0 and |Fe1 | = 2). Without loss of generality, we can assume that |Fe0 | = 2 and |Fe1 | = 0. Let l be any odd integer with 5 ≤ l ≤ 15. When l = 5, the proof is similar to that presented in Case 1.1.1. Then, in order to complete the proof of cycle of every odd length l with 7 ≤ l ≤ 15, we consider the following subcases: Case 1.2.1.1: Two faulty edges are not incident to the same vertex in Q03 . In this case, we can choose a faulty edge (u, v) in Q03 such that either (u, u(4) ) and (v, v) are both fault-free or (u, u) and (v, v (4) ) are both faultfree. (If such an edge does not exist, then |Fs | + |F4 | ≥ 4, which contradicts the assumption that |Fs | + |F4 | = 3). Without loss of generality, let (u, u) and (v, v (4) ) are both fault-free. By Lemma 5, (u, v) in Q03 − (Fe0 − (u, v)) lies on a fault-free cycle C1 of every even length from 4 to 23 . Clearly, C1 can be represented as u, P1 [u, v], v, u. Note that dQ13 (u, v (4) ) = 2. Then, we consider the following two subcases: Case 1.2.1.1.1: 7 ≤ l ≤ 11. By Lemma 7, Q13 contains a fault-free path P2 [u, v (4) ] of length 2. Therefore, u, P1 [u, v], v, v (4) , P2 [v (4) , u], u, u forms a fault-free cycle of every odd length l with 7 ≤ l ≤ 11.
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Case 1.2.1.1.2: 11 ≤ l ≤ 15. By Lemma 6, there exists a fault-free path P2 [u, v (4) ] of length 23 − 2 = 6 in Q13 . Therefore, u, P1 [u, v], v, v (4) , P2 [v (4) , u], u, u forms a fault-free cycle of every odd length l with 11 ≤ l ≤ 15. Case 1.2.1.2: Two faulty edges are incident to the same vertex in Q03 . We assume that Fe0 = {(u, v), (u, w)}. By assumption that there are at least two fault-free edges incident to u, without loss of generality, we assume that (u, u) is fault-free. Clearly, either (v, v (4) ) is fault-free or (w, w(4) ) is faultfree because of |F4 | = 1. Without loss of generality, suppose that (v, v (4) ) is fault-free. By Lemma 5, (u, v) in Q03 − (u, w) lies on a fault-free cycle C1 of every even length from 4 to 23 . Note that dQ13 (u, v (4) ) = 2. Then, the construction of a cycle of every odd length l with 7 ≤ l ≤ 15 is similar that presented in Case 1.2.1.1.1 and Case 1.2.1.1.2. Case 1.2.2: |Fe0 | = 1 and |Fe1 | = 1. The proof is similar to that presented in Case 1.1. Case 1.3: |Fs | = |F4 | = |F3 | = |F2 | = |F1 | = 1. In this case, we execute an i-partition on F Q4 to form two subcubes Q03 and Q13 such that Qj3 for some j ∈ {0, 1} contains two faulty edges and Q1−j contains exactly one faulty edge. 3 Without loss of generality, we can assume that i = 4, |Fe0 | = 2 and |Fe1 | = 1. Then, the proof of cycle of every odd length from 5 to 15 is similar to that presented in Case 1.2.1. n Case 2: n ≥ 6 and n is even. In this case, since i=1 |Fi | + |Fs | = |F Fe | = 2n−3 ≥ n+3 for n ≥ 6 and |Fs | ≥ |Fn | ≥ · · · ≥ |F1 |, it leads to |Fs |+|Fn | ≥ 4, which implies that |Fs | ≥ 2. Furthermore, there exists at most one vertex which is incident to exactly one fault-free edge in F Qn − Es ∼ = Qn . (If there are two vertices in F Qn − Es such that each vertex is incident to exactly one fault-free edge, then |F Fe | ≥ (n − 1) + (n − 1) − 1 + 2 = 2n − 1, which contradicts the assumption that |F Fe | ≤ 2n − 3). Hence, we can execute an npartition on F Qn to form two subcubes Q0n−1 and Q1n−1 so that |Fe0 | + |Fe1 | ≤ 2n − 3 − 4 = 2n − 7. Without loss of generality, we assume that |Fe0 | ≥ |Fe1 | 1 which implies that |Fe1 | ≤ 2n−7 2 = n − 4 and thus every vertex in Qn−1 is incident to at least two fault-free edges. Let l be any odd integer with n + 1 ≤ l ≤ 2n − 1. We first construct a fault-free cycle with length l = n + 1 and l = n + 3. We can choose an edge (u, v) ∈ E(Q0n−1 ) of dimension 1 such that {(u, v), (u, u), (v, v (n) )} ∩ F Fe = ∅. (If the three edges do not exist, then |F1 | + |Fs | + |Fn | ≥ 2n−2 > 2n − 3 for n ≥ 5, which contradicts the assumption that |F Fe | ≤ 2n − 3). Since dQ1n−1 (u, v (n) ) = n − 2, then by Lemma 7 (resp., Lemma 8), there exists a fault-free path P [u, v (n) ] of length n − 2 (resp., n) in Q13 . Therefore, u, u, P [u, v (n) ], v (n) , v, u forms a fault-free cycle of length l = n + 1, n + 3. In order to construct a cycle of every odd length l with n + 5 ≤ l ≤ 2n − 1, we consider the following subcases: Case 2.1: Every vertex in F Qn − Es ∼ = Qn is incident to at least two faultfree edges. Note that Q0n−1 contains at most one vertex which is incident to exactly one fault-free edge in Q0n−1 . (If there are two vertices in Q0n−1 such that each vertex is incident to exactly one fault-free edge in Q0n−1 , then
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|Fe0 | ≥ (n − 2) + (n − 2) − 1 = 2n − 5 > 2n − 7, which contradicts the assumption that |Fe0 | ≤ 2n − 7). Case 2.1.1: Every vertex in Q0n−1 is incident to at least two fault-free edges. We can choose an edge (u, v) of dimension 1 such that {(u, v), (u, u), (v, v (n) )} ∩F Fe = ∅. By Lemma 4, (u, v) in Q0n−1 − Fe0 lies on a fault-free cycle C1 of every even length from 6 to 2n−1 . Clearly, C1 can be represented as u, P1 [u, v], v, u. Note that dQ1n−1 (u, v (n) ) = n − 2. Then, we consider the following two subcases: Case 2.1.1.1: n + 5 ≤ l ≤ 2n−1 + n − 1. By Lemma 7, there exists a faultfree path P2 [u, v (n) ] of length n − 2 in Q1n−1 − Fe1 . Therefore, u, P1 [u, v], v, v (n) , P2 [v (n) , u], u, u forms a fault-free cycle of every odd length l with n + 5 ≤ l ≤ 2n−1 + n − 1. Case 2.1.1.2: 2n−1 + 5 ≤ l ≤ 2n − 1. By Lemma 6, there exists a fault-free path P2 [u, v (n) ] of length 2n−1 − 2 in Q1n−1 − Fe1 because of |Fe1 | ≤ n − 4 < 2n − 7 for n ≥ 4. Therefore, u, P1 [u, v], v, v (n) , P2 [v (n) , u], u, u forms a fault-free cycle of every odd length l with 2n−1 + 5 ≤ l ≤ 2n − 1. Note that l = 2n−1 + n − 1 ≥ 2n−1 + 5 for n ≥ 6. Therefore, a cycle of every odd length l with n + 1 ≤ l ≤ 2n − 1 is constructed in F Qn − F Fe . Case 2.1.2: There is a unique vertex u in Q0n−1 which is incident to exactly one fault-free edge. In this case, there are n − 2 faulty edges with different dimensions which are all incident to u in Q0n−1 . By the assumption of Case 2.1 and |Fn | ≥ |Fi | for 1 ≤ i ≤ n − 1, (u, u(n) ) is fault-free and |Fn | ≥ 1. Then, we consider the following subcases: Case 2.1.2.1: (u, u) is fault-free. In this case, we can choose a faulty edge (u, v) ∈ E(Q0n−1 ) incident to u such that (v, v (n) ) is fault-free. (If such an edge does not exist, then |Fe0 | + |Fn | + |Fs | ≥ (n − 2) + (n − 2) + 2 = 2n − 2 > 2n − 3, which contradicts the assumption that |F Fe | ≤ 2n − 3). By Lemma 4, (u, v) in Q0n−1 − (Fe0 − (u, v)) lies on a cycle C1 of every even length from 6 to 2n−1 in Q0n−1 . Note that dQ1n−1 (u, v (n) ) = n − 2. Then, the construction of cycle of every odd length l with n + 5 ≤ l ≤ 2n − 1 is similar to that presented in Case 2.1.1.1 and Case 2.1.1.2. Case 2.1.2.2: (u, u) is faulty. In this case, we can choose a faulty edge (u, v) ∈ E(Q0n−1 ) incident to u such that (v, v) is fault-free. (If such an edge does not exist, then |Fe0 | + |Fs | + |Fn | ≥ (n − 2) + (n − 1) + 1 = 2n − 2 > 2n − 3, which contradicts the assumption that |F Fe | ≤ 2n − 3). Then, the construction of a fault-free cycle of every odd length l with n + 5 ≤ l ≤ 2n − 1 is similar to that used in Case 2.1.2.1. Case 2.2: There is a unique vertex u in F Qn − Es ∼ = Qn which is incident to exactly one fault-free edge. In this case, since u is incident to at least two faultfree edges, (u, u) is fault-free. Moreover, because |Fs | ≥ 2 and the number of faulty regular edges which are incident to u equals n − 1, there are at most (2n − 3) − (n − 1) − 2 = n − 4 other faulty regular edges and every vertex in F Qn −u is incident to at least n−(n−4)−1 = 3 fault-free regular edges. In this case, we repartition F Qn along dimension j for some 1 ≤ j ≤ n to form two subcubes Q0n−1 and Q1n−1 such that one faulty edge (u, uj ) is a crossing edge,
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i.e., (u, uj ) ∈ Ec . Without loss of generality, we assume that u ∈ V (Q0n−1 ) and j = 1. Hence, |Fs | + |F1 | ≥ 3, |Fe0 | + |Fe1 | ≤ 2n − 6, and |Fe1 | ≤ n − 4. We can choose a faulty edge (u, v) ∈ E(Q0n−1 ) such that (v, v (1) ) is fault-free. (If such an edge does not exist, then |Fe0 | + |Fs | + |F1 | ≥ (n − 2) + 2 + (n − 2) + 1 = 2n − 1 > 2n − 3, which contradicts the assumption that |F Fe | ≤ 2n − 3). By Lemma 4, (u, v) in Q0n−1 − (Fe0 − (u, v)) lies on a fault-free cycle C1 of every even length from 6 to 2n−1 . Note that dQ1n−1 (u, v (1) ) = n − 2. Then, the construction of a fault-free cycle of every odd length l with n + 5 ≤ l ≤ 2n − 1 is similar to that presented in Case 2.1.1.1 and Case 2.1.1.2. By combining the above two cases, we complete the proof. Under the conditional fault model with |F Fe | = 2n − 3, we can prove that F Qn − F Fe for n ≥ 2 contains a fault-free cycle of every even length from 4 to 2n . Due to the space limitation, the proof of the following lemma is omitted. Lemma 10. Under the conditional fault model with |F Fe | = 2n− 3, F Qn − F Fe for n ≥ 2 contains a fault-free cycle of every even length from 4 to 2n . By Lemmas 9 and 10, we have the following theorem. Theorem 1. Under the conditional fault model with |F Fe | = 2n−3, F Qn −F Fe for n ≥ 2 contains a fault-free cycle of every even length from 4 to 2n , and when n ≥ 2 is even, F Qn − F Fe contains a fault-free cycle of every odd length from n + 1 to 2n − 1.
4
Concluding Remarks
There exists an n-dimensional folded hypercube with 2n − 2 faulty edges, in which each vertex is incident to at least two fault-free edges such that a faultfree Hamiltonian cycle does not exist. For example, let u = bn bn−1 . . . bi . . . b2 b1 and v = b¯n bn−1 . . . bi . . . b2 b¯1 . One can consider the 2n− 2 faulty edges in F Qn as (u, u), (v, v), (u, u(i) ) and (v, v (i) ) for all 2 ≤ i ≤ n − 1. Obviously, vertices u and v each have exactly two fault-free edges incident to them. Hence the four edges (u, u(1) ), (u, u(n) ), (v, v (1) ) and (v, v (n) ) form a four cycle by themselves. Therefore, in this worst case, it is impossible to construct a fault-free Hamiltonian cycle. Therefore, our result is worst-case optimal with respect to the number of edges faults tolerated.
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